Lee Kai Xuan / mbed-os

mbed-os

Fork of mbed-os by erkin yucel

targets/TARGET_Freescale/TARGET_K20XX/rtc_api.c@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

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elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2006-2015 ARM Limited
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16 #include "rtc_api.h"
elessair 0:f269e3021894 17
elessair 0:f269e3021894 18 static void init(void) {
elessair 0:f269e3021894 19 // enable PORTC clock
elessair 0:f269e3021894 20 SIM->SCGC5 |= SIM_SCGC5_PORTC_MASK;
elessair 0:f269e3021894 21
elessair 0:f269e3021894 22 // enable RTC clock
elessair 0:f269e3021894 23 SIM->SCGC6 |= SIM_SCGC6_RTC_MASK;
elessair 0:f269e3021894 24
elessair 0:f269e3021894 25 // OSC32 as source
elessair 0:f269e3021894 26 SIM->SOPT1 &= ~SIM_SOPT1_OSC32KSEL_MASK;
elessair 0:f269e3021894 27 SIM->SOPT1 |= SIM_SOPT1_OSC32KSEL(0);
elessair 0:f269e3021894 28 }
elessair 0:f269e3021894 29
elessair 0:f269e3021894 30 void rtc_init(void) {
elessair 0:f269e3021894 31 init();
elessair 0:f269e3021894 32
elessair 0:f269e3021894 33 // Enable the oscillator
elessair 0:f269e3021894 34 #if defined (TARGET_K20D50M)
elessair 0:f269e3021894 35 RTC->CR |= RTC_CR_OSCE_MASK;
elessair 0:f269e3021894 36 #else
elessair 0:f269e3021894 37 // Teensy3.1 requires 20pF MCU loading capacitors for 32KHz RTC oscillator
elessair 0:f269e3021894 38 /* RTC->CR: SC2P=0,SC4P=1,SC8P=0,SC16P=1,CLKO=0,OSCE=1,UM=0,SUP=0,SPE=0,SWR=0 */
elessair 0:f269e3021894 39 RTC->CR |= RTC_CR_OSCE_MASK |RTC_CR_SC16P_MASK | RTC_CR_SC4P_MASK;
elessair 0:f269e3021894 40 #endif
elessair 0:f269e3021894 41
elessair 0:f269e3021894 42 //Configure the TSR. default value: 1
elessair 0:f269e3021894 43 RTC->TSR = 1;
elessair 0:f269e3021894 44
elessair 0:f269e3021894 45 // enable counter
elessair 0:f269e3021894 46 RTC->SR |= RTC_SR_TCE_MASK;
elessair 0:f269e3021894 47 }
elessair 0:f269e3021894 48
elessair 0:f269e3021894 49 void rtc_free(void) {
elessair 0:f269e3021894 50 // [TODO]
elessair 0:f269e3021894 51 }
elessair 0:f269e3021894 52
elessair 0:f269e3021894 53 /*
elessair 0:f269e3021894 54 * Little check routine to see if the RTC has been enabled
elessair 0:f269e3021894 55 * 0 = Disabled, 1 = Enabled
elessair 0:f269e3021894 56 */
elessair 0:f269e3021894 57 int rtc_isenabled(void) {
elessair 0:f269e3021894 58 // even if the RTC module is enabled,
elessair 0:f269e3021894 59 // as we use RTC_CLKIN and an external clock,
elessair 0:f269e3021894 60 // we need to reconfigure the pins. That is why we
elessair 0:f269e3021894 61 // call init() if the rtc is enabled
elessair 0:f269e3021894 62
elessair 0:f269e3021894 63 // if RTC not enabled return 0
elessair 0:f269e3021894 64 SIM->SCGC5 |= SIM_SCGC5_PORTC_MASK;
elessair 0:f269e3021894 65 SIM->SCGC6 |= SIM_SCGC6_RTC_MASK;
elessair 0:f269e3021894 66 if ((RTC->SR & RTC_SR_TCE_MASK) == 0)
elessair 0:f269e3021894 67 return 0;
elessair 0:f269e3021894 68
elessair 0:f269e3021894 69 init();
elessair 0:f269e3021894 70 return 1;
elessair 0:f269e3021894 71 }
elessair 0:f269e3021894 72
elessair 0:f269e3021894 73 time_t rtc_read(void) {
elessair 0:f269e3021894 74 return RTC->TSR;
elessair 0:f269e3021894 75 }
elessair 0:f269e3021894 76
elessair 0:f269e3021894 77 void rtc_write(time_t t) {
elessair 0:f269e3021894 78 // disable counter
elessair 0:f269e3021894 79 RTC->SR &= ~RTC_SR_TCE_MASK;
elessair 0:f269e3021894 80
elessair 0:f269e3021894 81 // we do not write 0 into TSR
elessair 0:f269e3021894 82 // to avoid invalid time
elessair 0:f269e3021894 83 if (t == 0)
elessair 0:f269e3021894 84 t = 1;
elessair 0:f269e3021894 85
elessair 0:f269e3021894 86 // write seconds
elessair 0:f269e3021894 87 RTC->TSR = t;
elessair 0:f269e3021894 88
elessair 0:f269e3021894 89 // re-enable counter
elessair 0:f269e3021894 90 RTC->SR |= RTC_SR_TCE_MASK;
elessair 0:f269e3021894 91 }