Lee Kai Xuan / mbed-os

mbed-os

Fork of mbed-os by erkin yucel

targets/TARGET_NXP/TARGET_LPC82X/spi_api.c@1:3deb71413561, 2017-07-20 (annotated)

Committer:
xuaner
Date:
Thu Jul 20 14:26:57 2017 +0000
Revision:
1:3deb71413561
Parent:
0:f269e3021894 
mbed_os

Who changed what in which revision?

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elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2006-2013 ARM Limited
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16 #include "mbed_assert.h"
elessair 0:f269e3021894 17
elessair 0:f269e3021894 18 #include "spi_api.h"
elessair 0:f269e3021894 19 #include "cmsis.h"
elessair 0:f269e3021894 20 #include "pinmap.h"
elessair 0:f269e3021894 21 #include "mbed_error.h"
elessair 0:f269e3021894 22
elessair 0:f269e3021894 23 #if DEVICE_SPI
elessair 0:f269e3021894 24
elessair 0:f269e3021894 25 static const SWM_Map SWM_SPI_SSEL[] = {
elessair 0:f269e3021894 26 {4, 16},
elessair 0:f269e3021894 27 {6, 8},
elessair 0:f269e3021894 28 };
elessair 0:f269e3021894 29
elessair 0:f269e3021894 30 static const SWM_Map SWM_SPI_SCLK[] = {
elessair 0:f269e3021894 31 {3, 24},
elessair 0:f269e3021894 32 {5, 16},
elessair 0:f269e3021894 33 };
elessair 0:f269e3021894 34
elessair 0:f269e3021894 35 static const SWM_Map SWM_SPI_MOSI[] = {
elessair 0:f269e3021894 36 {4, 0},
elessair 0:f269e3021894 37 {5, 24},
elessair 0:f269e3021894 38 };
elessair 0:f269e3021894 39
elessair 0:f269e3021894 40 static const SWM_Map SWM_SPI_MISO[] = {
elessair 0:f269e3021894 41 {4, 8},
elessair 0:f269e3021894 42 {6, 0},
elessair 0:f269e3021894 43 };
elessair 0:f269e3021894 44
elessair 0:f269e3021894 45 // bit flags for used SPIs
elessair 0:f269e3021894 46 static unsigned char spi_used = 0;
elessair 0:f269e3021894 47
elessair 0:f269e3021894 48 static int get_available_spi(void)
elessair 0:f269e3021894 49 {
elessair 0:f269e3021894 50 int i;
elessair 0:f269e3021894 51 for (i=0; i<2; i++) {
elessair 0:f269e3021894 52 if ((spi_used & (1 << i)) == 0)
elessair 0:f269e3021894 53 return i;
elessair 0:f269e3021894 54 }
elessair 0:f269e3021894 55 return -1;
elessair 0:f269e3021894 56 }
elessair 0:f269e3021894 57
elessair 0:f269e3021894 58 static inline void spi_disable(spi_t *obj);
elessair 0:f269e3021894 59 static inline void spi_enable(spi_t *obj);
elessair 0:f269e3021894 60
elessair 0:f269e3021894 61 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
elessair 0:f269e3021894 62 {
elessair 0:f269e3021894 63 int spi_n = get_available_spi();
elessair 0:f269e3021894 64 if (spi_n == -1) {
elessair 0:f269e3021894 65 error("No available SPI");
elessair 0:f269e3021894 66 }
elessair 0:f269e3021894 67 obj->spi_n = spi_n;
elessair 0:f269e3021894 68 spi_used |= (1 << spi_n);
elessair 0:f269e3021894 69
elessair 0:f269e3021894 70 obj->spi = (spi_n) ? (LPC_SPI0_Type *)(LPC_SPI1_BASE) : (LPC_SPI0_Type *)(LPC_SPI0_BASE);
elessair 0:f269e3021894 71
elessair 0:f269e3021894 72 const SWM_Map *swm;
elessair 0:f269e3021894 73 uint32_t regVal;
elessair 0:f269e3021894 74
elessair 0:f269e3021894 75 if (sclk != (PinName)NC) {
elessair 0:f269e3021894 76 swm = &SWM_SPI_SCLK[obj->spi_n];
elessair 0:f269e3021894 77 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
elessair 0:f269e3021894 78 LPC_SWM->PINASSIGN[swm->n] = regVal | ((sclk >> PIN_SHIFT) << swm->offset);
elessair 0:f269e3021894 79 }
elessair 0:f269e3021894 80
elessair 0:f269e3021894 81 if (mosi != (PinName)NC) {
elessair 0:f269e3021894 82 swm = &SWM_SPI_MOSI[obj->spi_n];
elessair 0:f269e3021894 83 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
elessair 0:f269e3021894 84 LPC_SWM->PINASSIGN[swm->n] = regVal | ((mosi >> PIN_SHIFT) << swm->offset);
elessair 0:f269e3021894 85 }
elessair 0:f269e3021894 86
elessair 0:f269e3021894 87 if (miso != (PinName)NC) {
elessair 0:f269e3021894 88 swm = &SWM_SPI_MISO[obj->spi_n];
elessair 0:f269e3021894 89 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
elessair 0:f269e3021894 90 LPC_SWM->PINASSIGN[swm->n] = regVal | ((miso >> PIN_SHIFT) << swm->offset);
elessair 0:f269e3021894 91 }
elessair 0:f269e3021894 92
elessair 0:f269e3021894 93 if (ssel != (PinName)NC) {
elessair 0:f269e3021894 94 swm = &SWM_SPI_SSEL[obj->spi_n];
elessair 0:f269e3021894 95 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
elessair 0:f269e3021894 96 LPC_SWM->PINASSIGN[swm->n] = regVal | ((ssel >> PIN_SHIFT) << swm->offset);
elessair 0:f269e3021894 97 }
elessair 0:f269e3021894 98
elessair 0:f269e3021894 99 // clear interrupts
elessair 0:f269e3021894 100 obj->spi->INTENCLR = 0x3f;
elessair 0:f269e3021894 101
elessair 0:f269e3021894 102 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << (11 + obj->spi_n));
elessair 0:f269e3021894 103 LPC_SYSCON->PRESETCTRL &= ~(1 << obj->spi_n);
elessair 0:f269e3021894 104 LPC_SYSCON->PRESETCTRL |= (1 << obj->spi_n);
elessair 0:f269e3021894 105
elessair 0:f269e3021894 106 obj->spi->DLY = 2; // 2 SPI clock times pre-delay
elessair 0:f269e3021894 107 }
elessair 0:f269e3021894 108
elessair 0:f269e3021894 109 void spi_free(spi_t *obj)
elessair 0:f269e3021894 110 {
elessair 0:f269e3021894 111 }
elessair 0:f269e3021894 112
elessair 0:f269e3021894 113 void spi_format(spi_t *obj, int bits, int mode, int slave)
elessair 0:f269e3021894 114 {
elessair 0:f269e3021894 115 MBED_ASSERT(((bits >= 1) && (bits <= 16)) && ((mode >= 0) && (mode <= 3)));
elessair 0:f269e3021894 116 spi_disable(obj);
elessair 0:f269e3021894 117
elessair 0:f269e3021894 118 obj->spi->CFG &= ~((0x3 << 4) | (1 << 2));
elessair 0:f269e3021894 119 obj->spi->CFG |= ((mode & 0x3) << 4) | ((slave ? 0 : 1) << 2);
elessair 0:f269e3021894 120
elessair 0:f269e3021894 121 obj->spi->TXCTL &= ~( 0xF << 24);
elessair 0:f269e3021894 122 obj->spi->TXCTL |= ((bits - 1) << 24);
elessair 0:f269e3021894 123
elessair 0:f269e3021894 124 spi_enable(obj);
elessair 0:f269e3021894 125 }
elessair 0:f269e3021894 126
elessair 0:f269e3021894 127 void spi_frequency(spi_t *obj, int hz)
elessair 0:f269e3021894 128 {
elessair 0:f269e3021894 129 spi_disable(obj);
elessair 0:f269e3021894 130
elessair 0:f269e3021894 131 // rise DIV value if it cannot be divided
elessair 0:f269e3021894 132 obj->spi->DIV = (SystemCoreClock + (hz - 1))/hz - 1;
elessair 0:f269e3021894 133
elessair 0:f269e3021894 134 spi_enable(obj);
elessair 0:f269e3021894 135 }
elessair 0:f269e3021894 136
elessair 0:f269e3021894 137 static inline void spi_disable(spi_t *obj)
elessair 0:f269e3021894 138 {
elessair 0:f269e3021894 139 obj->spi->CFG &= ~(1 << 0);
elessair 0:f269e3021894 140 }
elessair 0:f269e3021894 141
elessair 0:f269e3021894 142 static inline void spi_enable(spi_t *obj)
elessair 0:f269e3021894 143 {
elessair 0:f269e3021894 144 obj->spi->CFG |= (1 << 0);
elessair 0:f269e3021894 145 }
elessair 0:f269e3021894 146
elessair 0:f269e3021894 147 static inline int spi_readable(spi_t *obj)
elessair 0:f269e3021894 148 {
elessair 0:f269e3021894 149 return obj->spi->STAT & (1 << 0);
elessair 0:f269e3021894 150 }
elessair 0:f269e3021894 151
elessair 0:f269e3021894 152 static inline int spi_writeable(spi_t *obj)
elessair 0:f269e3021894 153 {
elessair 0:f269e3021894 154 return obj->spi->STAT & (1 << 1);
elessair 0:f269e3021894 155 }
elessair 0:f269e3021894 156
elessair 0:f269e3021894 157 static inline void spi_write(spi_t *obj, int value)
elessair 0:f269e3021894 158 {
elessair 0:f269e3021894 159 while (!spi_writeable(obj));
elessair 0:f269e3021894 160 // end of transfer
elessair 0:f269e3021894 161 obj->spi->TXCTL |= (1 << 20);
elessair 0:f269e3021894 162 obj->spi->TXDAT = (value & 0xffff);
elessair 0:f269e3021894 163 }
elessair 0:f269e3021894 164
elessair 0:f269e3021894 165 static inline int spi_read(spi_t *obj)
elessair 0:f269e3021894 166 {
elessair 0:f269e3021894 167 while (!spi_readable(obj));
elessair 0:f269e3021894 168 return (obj->spi->RXDAT & 0xFFFF);
elessair 0:f269e3021894 169 }
elessair 0:f269e3021894 170
elessair 0:f269e3021894 171 int spi_master_write(spi_t *obj, int value)
elessair 0:f269e3021894 172 {
elessair 0:f269e3021894 173 spi_write(obj, value);
elessair 0:f269e3021894 174 return spi_read(obj);
elessair 0:f269e3021894 175 }
elessair 0:f269e3021894 176
elessair 0:f269e3021894 177 int spi_busy(spi_t *obj)
elessair 0:f269e3021894 178 {
elessair 0:f269e3021894 179 // checking RXOV(Receiver Overrun interrupt flag)
elessair 0:f269e3021894 180 return obj->spi->STAT & (1 << 2);
elessair 0:f269e3021894 181 }
elessair 0:f269e3021894 182
elessair 0:f269e3021894 183 int spi_slave_receive(spi_t *obj)
elessair 0:f269e3021894 184 {
elessair 0:f269e3021894 185 return (spi_readable(obj) && !spi_busy(obj)) ? (1) : (0);
elessair 0:f269e3021894 186 }
elessair 0:f269e3021894 187
elessair 0:f269e3021894 188 int spi_slave_read(spi_t *obj)
elessair 0:f269e3021894 189 {
elessair 0:f269e3021894 190 return (obj->spi->RXDAT & 0xFFFF);
elessair 0:f269e3021894 191 }
elessair 0:f269e3021894 192
elessair 0:f269e3021894 193 void spi_slave_write(spi_t *obj, int value)
elessair 0:f269e3021894 194 {
elessair 0:f269e3021894 195 while (spi_writeable(obj) == 0);
elessair 0:f269e3021894 196 obj->spi->TXDAT = value;
elessair 0:f269e3021894 197 }
elessair 0:f269e3021894 198
elessair 0:f269e3021894 199 #endif