Lee Kai Xuan / mbed-os

mbed-os

Fork of mbed-os by erkin yucel

targets/TARGET_NXP/TARGET_LPC11U6X/spi_api.c@1:3deb71413561, 2017-07-20 (annotated)

Committer:
xuaner
Date:
Thu Jul 20 14:26:57 2017 +0000
Revision:
1:3deb71413561
Parent:
0:f269e3021894 
mbed_os

Who changed what in which revision?

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elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2006-2013 ARM Limited
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16 #include "mbed_assert.h"
elessair 0:f269e3021894 17 #include <math.h>
elessair 0:f269e3021894 18
elessair 0:f269e3021894 19 #include "spi_api.h"
elessair 0:f269e3021894 20 #include "cmsis.h"
elessair 0:f269e3021894 21 #include "pinmap.h"
elessair 0:f269e3021894 22 #include "mbed_error.h"
elessair 0:f269e3021894 23
elessair 0:f269e3021894 24 #if DEVICE_SPI
elessair 0:f269e3021894 25
elessair 0:f269e3021894 26 static const PinMap PinMap_SPI_SCLK[] = {
elessair 0:f269e3021894 27 {P0_6 , SPI_0, 0x02},
elessair 0:f269e3021894 28 {P1_29, SPI_0, 0x01},
elessair 0:f269e3021894 29 {P2_7 , SPI_0, 0x01},
elessair 0:f269e3021894 30 {P1_20, SPI_1, 0x02},
elessair 0:f269e3021894 31 {P1_27, SPI_1, 0x04},
elessair 0:f269e3021894 32 {NC , NC , 0}
elessair 0:f269e3021894 33 };
elessair 0:f269e3021894 34
elessair 0:f269e3021894 35 static const PinMap PinMap_SPI_MOSI[] = {
elessair 0:f269e3021894 36 {P0_9 , SPI_0, 0x01},
elessair 0:f269e3021894 37 {P1_12, SPI_0, 0x01},
elessair 0:f269e3021894 38 {P0_21, SPI_1, 0x02},
elessair 0:f269e3021894 39 {P1_22, SPI_1, 0x01},
elessair 0:f269e3021894 40 {NC , NC , 0}
elessair 0:f269e3021894 41 };
elessair 0:f269e3021894 42
elessair 0:f269e3021894 43 static const PinMap PinMap_SPI_MISO[] = {
elessair 0:f269e3021894 44 {P0_8 , SPI_0, 0x01},
elessair 0:f269e3021894 45 {P1_16, SPI_0, 0x01},
elessair 0:f269e3021894 46 {P0_22, SPI_1, 0x03},
elessair 0:f269e3021894 47 {P1_21, SPI_1, 0x02},
elessair 0:f269e3021894 48 {NC , NC , 0}
elessair 0:f269e3021894 49 };
elessair 0:f269e3021894 50
elessair 0:f269e3021894 51 static const PinMap PinMap_SPI_SSEL[] = {
elessair 0:f269e3021894 52 {P0_2 , SPI_0, 0x01},
elessair 0:f269e3021894 53 {P1_15, SPI_0, 0x01},
elessair 0:f269e3021894 54 {P0_23, SPI_1, 0x04},
elessair 0:f269e3021894 55 {P1_23, SPI_1, 0x02},
elessair 0:f269e3021894 56 {NC , NC , 0}
elessair 0:f269e3021894 57 };
elessair 0:f269e3021894 58
elessair 0:f269e3021894 59 static inline int ssp_disable(spi_t *obj);
elessair 0:f269e3021894 60 static inline int ssp_enable(spi_t *obj);
elessair 0:f269e3021894 61
elessair 0:f269e3021894 62 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
elessair 0:f269e3021894 63 // determine the SPI to use
elessair 0:f269e3021894 64 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
elessair 0:f269e3021894 65 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
elessair 0:f269e3021894 66 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
elessair 0:f269e3021894 67 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
elessair 0:f269e3021894 68 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
elessair 0:f269e3021894 69 SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
elessair 0:f269e3021894 70
elessair 0:f269e3021894 71 obj->spi = (LPC_SSP0_Type*)pinmap_merge(spi_data, spi_cntl);
elessair 0:f269e3021894 72 MBED_ASSERT((int)obj->spi != NC);
elessair 0:f269e3021894 73
elessair 0:f269e3021894 74 // enable power and clocking
elessair 0:f269e3021894 75 switch ((int)obj->spi) {
elessair 0:f269e3021894 76 case SPI_0:
elessair 0:f269e3021894 77 LPC_SYSCON->SYSAHBCLKCTRL |= 1 << 11;
elessair 0:f269e3021894 78 LPC_SYSCON->SSP0CLKDIV = 0x01;
elessair 0:f269e3021894 79 LPC_SYSCON->PRESETCTRL |= 1 << 0;
elessair 0:f269e3021894 80 break;
elessair 0:f269e3021894 81 case SPI_1:
elessair 0:f269e3021894 82 LPC_SYSCON->SYSAHBCLKCTRL |= 1 << 18;
elessair 0:f269e3021894 83 LPC_SYSCON->SSP1CLKDIV = 0x01;
elessair 0:f269e3021894 84 LPC_SYSCON->PRESETCTRL |= 1 << 2;
elessair 0:f269e3021894 85 break;
elessair 0:f269e3021894 86 }
elessair 0:f269e3021894 87
elessair 0:f269e3021894 88 // pin out the spi pins
elessair 0:f269e3021894 89 pinmap_pinout(mosi, PinMap_SPI_MOSI);
elessair 0:f269e3021894 90 pinmap_pinout(miso, PinMap_SPI_MISO);
elessair 0:f269e3021894 91 pinmap_pinout(sclk, PinMap_SPI_SCLK);
elessair 0:f269e3021894 92 if (ssel != NC) {
elessair 0:f269e3021894 93 pinmap_pinout(ssel, PinMap_SPI_SSEL);
elessair 0:f269e3021894 94 }
elessair 0:f269e3021894 95 }
elessair 0:f269e3021894 96
elessair 0:f269e3021894 97 void spi_free(spi_t *obj) {}
elessair 0:f269e3021894 98
elessair 0:f269e3021894 99 void spi_format(spi_t *obj, int bits, int mode, int slave) {
elessair 0:f269e3021894 100 ssp_disable(obj);
elessair 0:f269e3021894 101 MBED_ASSERT(((bits >= 4) && (bits <= 16)) || ((mode >= 0) && (mode <= 3)));
elessair 0:f269e3021894 102
elessair 0:f269e3021894 103 int polarity = (mode & 0x2) ? 1 : 0;
elessair 0:f269e3021894 104 int phase = (mode & 0x1) ? 1 : 0;
elessair 0:f269e3021894 105
elessair 0:f269e3021894 106 // set it up
elessair 0:f269e3021894 107 int DSS = bits - 1; // DSS (data select size)
elessair 0:f269e3021894 108 int SPO = (polarity) ? 1 : 0; // SPO - clock out polarity
elessair 0:f269e3021894 109 int SPH = (phase) ? 1 : 0; // SPH - clock out phase
elessair 0:f269e3021894 110
elessair 0:f269e3021894 111 int FRF = 0; // FRF (frame format) = SPI
elessair 0:f269e3021894 112 uint32_t tmp = obj->spi->CR0;
elessair 0:f269e3021894 113 tmp &= ~(0xFFFF);
elessair 0:f269e3021894 114 tmp |= DSS << 0
elessair 0:f269e3021894 115 | FRF << 4
elessair 0:f269e3021894 116 | SPO << 6
elessair 0:f269e3021894 117 | SPH << 7;
elessair 0:f269e3021894 118 obj->spi->CR0 = tmp;
elessair 0:f269e3021894 119
elessair 0:f269e3021894 120 tmp = obj->spi->CR1;
elessair 0:f269e3021894 121 tmp &= ~(0xD);
elessair 0:f269e3021894 122 tmp |= 0 << 0 // LBM - loop back mode - off
elessair 0:f269e3021894 123 | ((slave) ? 1 : 0) << 2 // MS - master slave mode, 1 = slave
elessair 0:f269e3021894 124 | 0 << 3; // SOD - slave output disable - na
elessair 0:f269e3021894 125 obj->spi->CR1 = tmp;
elessair 0:f269e3021894 126
elessair 0:f269e3021894 127 ssp_enable(obj);
elessair 0:f269e3021894 128 }
elessair 0:f269e3021894 129
elessair 0:f269e3021894 130 void spi_frequency(spi_t *obj, int hz) {
elessair 0:f269e3021894 131 ssp_disable(obj);
elessair 0:f269e3021894 132
elessair 0:f269e3021894 133 uint32_t PCLK = SystemCoreClock;
elessair 0:f269e3021894 134
elessair 0:f269e3021894 135 int prescaler;
elessair 0:f269e3021894 136
elessair 0:f269e3021894 137 for (prescaler = 2; prescaler <= 254; prescaler += 2) {
elessair 0:f269e3021894 138 int prescale_hz = PCLK / prescaler;
elessair 0:f269e3021894 139
elessair 0:f269e3021894 140 // calculate the divider
elessair 0:f269e3021894 141 int divider = floor(((float)prescale_hz / (float)hz) + 0.5f);
elessair 0:f269e3021894 142
elessair 0:f269e3021894 143 // check we can support the divider
elessair 0:f269e3021894 144 if (divider < 256) {
elessair 0:f269e3021894 145 // prescaler
elessair 0:f269e3021894 146 obj->spi->CPSR = prescaler;
elessair 0:f269e3021894 147
elessair 0:f269e3021894 148 // divider
elessair 0:f269e3021894 149 obj->spi->CR0 &= ~(0xFFFF << 8);
elessair 0:f269e3021894 150 obj->spi->CR0 |= (divider - 1) << 8;
elessair 0:f269e3021894 151 ssp_enable(obj);
elessair 0:f269e3021894 152 return;
elessair 0:f269e3021894 153 }
elessair 0:f269e3021894 154 }
elessair 0:f269e3021894 155 error("Couldn't setup requested SPI frequency");
elessair 0:f269e3021894 156 }
elessair 0:f269e3021894 157
elessair 0:f269e3021894 158 static inline int ssp_disable(spi_t *obj) {
elessair 0:f269e3021894 159 return obj->spi->CR1 &= ~(1 << 1);
elessair 0:f269e3021894 160 }
elessair 0:f269e3021894 161
elessair 0:f269e3021894 162 static inline int ssp_enable(spi_t *obj) {
elessair 0:f269e3021894 163 return obj->spi->CR1 |= (1 << 1);
elessair 0:f269e3021894 164 }
elessair 0:f269e3021894 165
elessair 0:f269e3021894 166 static inline int ssp_readable(spi_t *obj) {
elessair 0:f269e3021894 167 return obj->spi->SR & (1 << 2);
elessair 0:f269e3021894 168 }
elessair 0:f269e3021894 169
elessair 0:f269e3021894 170 static inline int ssp_writeable(spi_t *obj) {
elessair 0:f269e3021894 171 return obj->spi->SR & (1 << 1);
elessair 0:f269e3021894 172 }
elessair 0:f269e3021894 173
elessair 0:f269e3021894 174 static inline void ssp_write(spi_t *obj, int value) {
elessair 0:f269e3021894 175 while (!ssp_writeable(obj));
elessair 0:f269e3021894 176 obj->spi->DR = value;
elessair 0:f269e3021894 177 }
elessair 0:f269e3021894 178
elessair 0:f269e3021894 179 static inline int ssp_read(spi_t *obj) {
elessair 0:f269e3021894 180 while (!ssp_readable(obj));
elessair 0:f269e3021894 181 return obj->spi->DR;
elessair 0:f269e3021894 182 }
elessair 0:f269e3021894 183
elessair 0:f269e3021894 184 static inline int ssp_busy(spi_t *obj) {
elessair 0:f269e3021894 185 return (obj->spi->SR & (1 << 4)) ? (1) : (0);
elessair 0:f269e3021894 186 }
elessair 0:f269e3021894 187
elessair 0:f269e3021894 188 int spi_master_write(spi_t *obj, int value) {
elessair 0:f269e3021894 189 ssp_write(obj, value);
elessair 0:f269e3021894 190 return ssp_read(obj);
elessair 0:f269e3021894 191 }
elessair 0:f269e3021894 192
elessair 0:f269e3021894 193 int spi_slave_receive(spi_t *obj) {
elessair 0:f269e3021894 194 return (ssp_readable(obj) && !ssp_busy(obj)) ? (1) : (0);
elessair 0:f269e3021894 195 }
elessair 0:f269e3021894 196
elessair 0:f269e3021894 197 int spi_slave_read(spi_t *obj) {
elessair 0:f269e3021894 198 return obj->spi->DR;
elessair 0:f269e3021894 199 }
elessair 0:f269e3021894 200
elessair 0:f269e3021894 201 void spi_slave_write(spi_t *obj, int value) {
elessair 0:f269e3021894 202 while (ssp_writeable(obj) == 0) ;
elessair 0:f269e3021894 203 obj->spi->DR = value;
elessair 0:f269e3021894 204 }
elessair 0:f269e3021894 205
elessair 0:f269e3021894 206 int spi_busy(spi_t *obj) {
elessair 0:f269e3021894 207 return ssp_busy(obj);
elessair 0:f269e3021894 208 }
elessair 0:f269e3021894 209
elessair 0:f269e3021894 210 #endif