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mbed-os

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cmsis/core_ca9.h@1:3deb71413561, 2017-07-20 (annotated)

Committer:
xuaner
Date:
Thu Jul 20 14:26:57 2017 +0000
Revision:
1:3deb71413561
Parent:
0:f269e3021894 
mbed_os

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elessair 0:f269e3021894 1 /**************************************************************************//**
elessair 0:f269e3021894 2 * @file core_ca9.h
elessair 0:f269e3021894 3 * @brief CMSIS Cortex-A9 Core Peripheral Access Layer Header File
elessair 0:f269e3021894 4 * @version
elessair 0:f269e3021894 5 * @date 25 March 2013
elessair 0:f269e3021894 6 *
elessair 0:f269e3021894 7 * @note
elessair 0:f269e3021894 8 *
elessair 0:f269e3021894 9 ******************************************************************************/
elessair 0:f269e3021894 10 /* Copyright (c) 2009 - 2012 ARM LIMITED
elessair 0:f269e3021894 11
elessair 0:f269e3021894 12 All rights reserved.
elessair 0:f269e3021894 13 Redistribution and use in source and binary forms, with or without
elessair 0:f269e3021894 14 modification, are permitted provided that the following conditions are met:
elessair 0:f269e3021894 15 - Redistributions of source code must retain the above copyright
elessair 0:f269e3021894 16 notice, this list of conditions and the following disclaimer.
elessair 0:f269e3021894 17 - Redistributions in binary form must reproduce the above copyright
elessair 0:f269e3021894 18 notice, this list of conditions and the following disclaimer in the
elessair 0:f269e3021894 19 documentation and/or other materials provided with the distribution.
elessair 0:f269e3021894 20 - Neither the name of ARM nor the names of its contributors may be used
elessair 0:f269e3021894 21 to endorse or promote products derived from this software without
elessair 0:f269e3021894 22 specific prior written permission.
elessair 0:f269e3021894 23 *
elessair 0:f269e3021894 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
elessair 0:f269e3021894 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
elessair 0:f269e3021894 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
elessair 0:f269e3021894 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
elessair 0:f269e3021894 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
elessair 0:f269e3021894 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
elessair 0:f269e3021894 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
elessair 0:f269e3021894 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
elessair 0:f269e3021894 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
elessair 0:f269e3021894 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
elessair 0:f269e3021894 34 POSSIBILITY OF SUCH DAMAGE.
elessair 0:f269e3021894 35 ---------------------------------------------------------------------------*/
elessair 0:f269e3021894 36
elessair 0:f269e3021894 37
elessair 0:f269e3021894 38 #if defined ( __ICCARM__ )
elessair 0:f269e3021894 39 #pragma system_include /* treat file as system include file for MISRA check */
elessair 0:f269e3021894 40 #endif
elessair 0:f269e3021894 41
elessair 0:f269e3021894 42 #ifdef __cplusplus
elessair 0:f269e3021894 43 extern "C" {
elessair 0:f269e3021894 44 #endif
elessair 0:f269e3021894 45
elessair 0:f269e3021894 46 #ifndef __CORE_CA9_H_GENERIC
elessair 0:f269e3021894 47 #define __CORE_CA9_H_GENERIC
elessair 0:f269e3021894 48
elessair 0:f269e3021894 49
elessair 0:f269e3021894 50 /** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
elessair 0:f269e3021894 51 CMSIS violates the following MISRA-C:2004 rules:
elessair 0:f269e3021894 52
elessair 0:f269e3021894 53 \li Required Rule 8.5, object/function definition in header file.<br>
elessair 0:f269e3021894 54 Function definitions in header files are used to allow 'inlining'.
elessair 0:f269e3021894 55
elessair 0:f269e3021894 56 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
elessair 0:f269e3021894 57 Unions are used for effective representation of core registers.
elessair 0:f269e3021894 58
elessair 0:f269e3021894 59 \li Advisory Rule 19.7, Function-like macro defined.<br>
elessair 0:f269e3021894 60 Function-like macros are used to allow more efficient code.
elessair 0:f269e3021894 61 */
elessair 0:f269e3021894 62
elessair 0:f269e3021894 63
elessair 0:f269e3021894 64 /*******************************************************************************
elessair 0:f269e3021894 65 * CMSIS definitions
elessair 0:f269e3021894 66 ******************************************************************************/
elessair 0:f269e3021894 67 /** \ingroup Cortex_A9
elessair 0:f269e3021894 68 @{
elessair 0:f269e3021894 69 */
elessair 0:f269e3021894 70
elessair 0:f269e3021894 71 /* CMSIS CA9 definitions */
elessair 0:f269e3021894 72 #define __CA9_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
elessair 0:f269e3021894 73 #define __CA9_CMSIS_VERSION_SUB (0x10) /*!< [15:0] CMSIS HAL sub version */
elessair 0:f269e3021894 74 #define __CA9_CMSIS_VERSION ((__CA9_CMSIS_VERSION_MAIN << 16) | \
elessair 0:f269e3021894 75 __CA9_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
elessair 0:f269e3021894 76
elessair 0:f269e3021894 77 #define __CORTEX_A (0x09) /*!< Cortex-A Core */
elessair 0:f269e3021894 78
elessair 0:f269e3021894 79
elessair 0:f269e3021894 80 #if defined ( __CC_ARM )
elessair 0:f269e3021894 81 #define __ASM __asm /*!< asm keyword for ARM Compiler */
elessair 0:f269e3021894 82 #define __INLINE __inline /*!< inline keyword for ARM Compiler */
elessair 0:f269e3021894 83 #define __STATIC_INLINE static __inline
elessair 0:f269e3021894 84 #define __STATIC_ASM static __asm
elessair 0:f269e3021894 85
elessair 0:f269e3021894 86 #elif defined ( __ICCARM__ )
elessair 0:f269e3021894 87 #define __ASM __asm /*!< asm keyword for IAR Compiler */
elessair 0:f269e3021894 88 #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
elessair 0:f269e3021894 89 #define __STATIC_INLINE static inline
elessair 0:f269e3021894 90 #define __STATIC_ASM static __asm
elessair 0:f269e3021894 91
elessair 0:f269e3021894 92 #include <stdint.h>
elessair 0:f269e3021894 93 inline uint32_t __get_PSR(void) {
elessair 0:f269e3021894 94 __ASM("mrs r0, cpsr");
elessair 0:f269e3021894 95 }
elessair 0:f269e3021894 96
elessair 0:f269e3021894 97 #elif defined ( __TMS470__ )
elessair 0:f269e3021894 98 #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
elessair 0:f269e3021894 99 #define __STATIC_INLINE static inline
elessair 0:f269e3021894 100 #define __STATIC_ASM static __asm
elessair 0:f269e3021894 101
elessair 0:f269e3021894 102 #elif defined ( __GNUC__ )
elessair 0:f269e3021894 103 #define __ASM __asm /*!< asm keyword for GNU Compiler */
elessair 0:f269e3021894 104 #define __INLINE inline /*!< inline keyword for GNU Compiler */
elessair 0:f269e3021894 105 #define __STATIC_INLINE static inline
elessair 0:f269e3021894 106 #define __STATIC_ASM static __asm
elessair 0:f269e3021894 107
elessair 0:f269e3021894 108 #elif defined ( __TASKING__ )
elessair 0:f269e3021894 109 #define __ASM __asm /*!< asm keyword for TASKING Compiler */
elessair 0:f269e3021894 110 #define __INLINE inline /*!< inline keyword for TASKING Compiler */
elessair 0:f269e3021894 111 #define __STATIC_INLINE static inline
elessair 0:f269e3021894 112 #define __STATIC_ASM static __asm
elessair 0:f269e3021894 113
elessair 0:f269e3021894 114 #endif
elessair 0:f269e3021894 115
elessair 0:f269e3021894 116 /** __FPU_USED indicates whether an FPU is used or not. For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
elessair 0:f269e3021894 117 */
elessair 0:f269e3021894 118 #if defined ( __CC_ARM )
elessair 0:f269e3021894 119 #if defined __TARGET_FPU_VFP
elessair 0:f269e3021894 120 #if (__FPU_PRESENT == 1)
elessair 0:f269e3021894 121 #define __FPU_USED 1
elessair 0:f269e3021894 122 #else
elessair 0:f269e3021894 123 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
elessair 0:f269e3021894 124 #define __FPU_USED 0
elessair 0:f269e3021894 125 #endif
elessair 0:f269e3021894 126 #else
elessair 0:f269e3021894 127 #define __FPU_USED 0
elessair 0:f269e3021894 128 #endif
elessair 0:f269e3021894 129
elessair 0:f269e3021894 130 #elif defined ( __ICCARM__ )
elessair 0:f269e3021894 131 #if defined __ARMVFP__
elessair 0:f269e3021894 132 #if (__FPU_PRESENT == 1)
elessair 0:f269e3021894 133 #define __FPU_USED 1
elessair 0:f269e3021894 134 #else
elessair 0:f269e3021894 135 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
elessair 0:f269e3021894 136 #define __FPU_USED 0
elessair 0:f269e3021894 137 #endif
elessair 0:f269e3021894 138 #else
elessair 0:f269e3021894 139 #define __FPU_USED 0
elessair 0:f269e3021894 140 #endif
elessair 0:f269e3021894 141
elessair 0:f269e3021894 142 #elif defined ( __TMS470__ )
elessair 0:f269e3021894 143 #if defined __TI_VFP_SUPPORT__
elessair 0:f269e3021894 144 #if (__FPU_PRESENT == 1)
elessair 0:f269e3021894 145 #define __FPU_USED 1
elessair 0:f269e3021894 146 #else
elessair 0:f269e3021894 147 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
elessair 0:f269e3021894 148 #define __FPU_USED 0
elessair 0:f269e3021894 149 #endif
elessair 0:f269e3021894 150 #else
elessair 0:f269e3021894 151 #define __FPU_USED 0
elessair 0:f269e3021894 152 #endif
elessair 0:f269e3021894 153
elessair 0:f269e3021894 154 #elif defined ( __GNUC__ )
elessair 0:f269e3021894 155 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
elessair 0:f269e3021894 156 #if (__FPU_PRESENT == 1)
elessair 0:f269e3021894 157 #define __FPU_USED 1
elessair 0:f269e3021894 158 #else
elessair 0:f269e3021894 159 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
elessair 0:f269e3021894 160 #define __FPU_USED 0
elessair 0:f269e3021894 161 #endif
elessair 0:f269e3021894 162 #else
elessair 0:f269e3021894 163 #define __FPU_USED 0
elessair 0:f269e3021894 164 #endif
elessair 0:f269e3021894 165
elessair 0:f269e3021894 166 #elif defined ( __TASKING__ )
elessair 0:f269e3021894 167 #if defined __FPU_VFP__
elessair 0:f269e3021894 168 #if (__FPU_PRESENT == 1)
elessair 0:f269e3021894 169 #define __FPU_USED 1
elessair 0:f269e3021894 170 #else
elessair 0:f269e3021894 171 #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
elessair 0:f269e3021894 172 #define __FPU_USED 0
elessair 0:f269e3021894 173 #endif
elessair 0:f269e3021894 174 #else
elessair 0:f269e3021894 175 #define __FPU_USED 0
elessair 0:f269e3021894 176 #endif
elessair 0:f269e3021894 177 #endif
elessair 0:f269e3021894 178
elessair 0:f269e3021894 179 #include <stdint.h> /*!< standard types definitions */
elessair 0:f269e3021894 180 #include "core_caInstr.h" /*!< Core Instruction Access */
elessair 0:f269e3021894 181 #include "core_caFunc.h" /*!< Core Function Access */
elessair 0:f269e3021894 182 #include "core_cm4_simd.h" /*!< Compiler specific SIMD Intrinsics */
elessair 0:f269e3021894 183
elessair 0:f269e3021894 184 #endif /* __CORE_CA9_H_GENERIC */
elessair 0:f269e3021894 185
elessair 0:f269e3021894 186 #ifndef __CMSIS_GENERIC
elessair 0:f269e3021894 187
elessair 0:f269e3021894 188 #ifndef __CORE_CA9_H_DEPENDANT
elessair 0:f269e3021894 189 #define __CORE_CA9_H_DEPENDANT
elessair 0:f269e3021894 190
elessair 0:f269e3021894 191 /* check device defines and use defaults */
elessair 0:f269e3021894 192 #if defined __CHECK_DEVICE_DEFINES
elessair 0:f269e3021894 193 #ifndef __CA9_REV
elessair 0:f269e3021894 194 #define __CA9_REV 0x0000
elessair 0:f269e3021894 195 #warning "__CA9_REV not defined in device header file; using default!"
elessair 0:f269e3021894 196 #endif
elessair 0:f269e3021894 197
elessair 0:f269e3021894 198 #ifndef __FPU_PRESENT
elessair 0:f269e3021894 199 #define __FPU_PRESENT 1
elessair 0:f269e3021894 200 #warning "__FPU_PRESENT not defined in device header file; using default!"
elessair 0:f269e3021894 201 #endif
elessair 0:f269e3021894 202
elessair 0:f269e3021894 203 #ifndef __Vendor_SysTickConfig
elessair 0:f269e3021894 204 #define __Vendor_SysTickConfig 1
elessair 0:f269e3021894 205 #endif
elessair 0:f269e3021894 206
elessair 0:f269e3021894 207 #if __Vendor_SysTickConfig == 0
elessair 0:f269e3021894 208 #error "__Vendor_SysTickConfig set to 0, but vendor systick timer must be supplied for Cortex-A9"
elessair 0:f269e3021894 209 #endif
elessair 0:f269e3021894 210 #endif
elessair 0:f269e3021894 211
elessair 0:f269e3021894 212 /* IO definitions (access restrictions to peripheral registers) */
elessair 0:f269e3021894 213 /**
elessair 0:f269e3021894 214 \defgroup CMSIS_glob_defs CMSIS Global Defines
elessair 0:f269e3021894 215
elessair 0:f269e3021894 216 <strong>IO Type Qualifiers</strong> are used
elessair 0:f269e3021894 217 \li to specify the access to peripheral variables.
elessair 0:f269e3021894 218 \li for automatic generation of peripheral register debug information.
elessair 0:f269e3021894 219 */
elessair 0:f269e3021894 220 #ifdef __cplusplus
elessair 0:f269e3021894 221 #define __I volatile /*!< Defines 'read only' permissions */
elessair 0:f269e3021894 222 #else
elessair 0:f269e3021894 223 #define __I volatile const /*!< Defines 'read only' permissions */
elessair 0:f269e3021894 224 #endif
elessair 0:f269e3021894 225 #define __O volatile /*!< Defines 'write only' permissions */
elessair 0:f269e3021894 226 #define __IO volatile /*!< Defines 'read / write' permissions */
elessair 0:f269e3021894 227
elessair 0:f269e3021894 228 /*@} end of group Cortex_A9 */
elessair 0:f269e3021894 229
elessair 0:f269e3021894 230
elessair 0:f269e3021894 231 /*******************************************************************************
elessair 0:f269e3021894 232 * Register Abstraction
elessair 0:f269e3021894 233 ******************************************************************************/
elessair 0:f269e3021894 234 /** \defgroup CMSIS_core_register Defines and Type Definitions
elessair 0:f269e3021894 235 \brief Type definitions and defines for Cortex-A processor based devices.
elessair 0:f269e3021894 236 */
elessair 0:f269e3021894 237
elessair 0:f269e3021894 238 /** \ingroup CMSIS_core_register
elessair 0:f269e3021894 239 \defgroup CMSIS_CORE Status and Control Registers
elessair 0:f269e3021894 240 \brief Core Register type definitions.
elessair 0:f269e3021894 241 @{
elessair 0:f269e3021894 242 */
elessair 0:f269e3021894 243
elessair 0:f269e3021894 244 /** \brief Union type to access the Application Program Status Register (APSR).
elessair 0:f269e3021894 245 */
elessair 0:f269e3021894 246 typedef union
elessair 0:f269e3021894 247 {
elessair 0:f269e3021894 248 struct
elessair 0:f269e3021894 249 {
elessair 0:f269e3021894 250 uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
elessair 0:f269e3021894 251 uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
elessair 0:f269e3021894 252 uint32_t reserved1:7; /*!< bit: 20..23 Reserved */
elessair 0:f269e3021894 253 uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
elessair 0:f269e3021894 254 uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
elessair 0:f269e3021894 255 uint32_t C:1; /*!< bit: 29 Carry condition code flag */
elessair 0:f269e3021894 256 uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
elessair 0:f269e3021894 257 uint32_t N:1; /*!< bit: 31 Negative condition code flag */
elessair 0:f269e3021894 258 } b; /*!< Structure used for bit access */
elessair 0:f269e3021894 259 uint32_t w; /*!< Type used for word access */
elessair 0:f269e3021894 260 } APSR_Type;
elessair 0:f269e3021894 261
elessair 0:f269e3021894 262
elessair 0:f269e3021894 263 /*@} end of group CMSIS_CORE */
elessair 0:f269e3021894 264
elessair 0:f269e3021894 265 /*@} end of CMSIS_Core_FPUFunctions */
elessair 0:f269e3021894 266
elessair 0:f269e3021894 267
elessair 0:f269e3021894 268 #endif /* __CORE_CA9_H_GENERIC */
elessair 0:f269e3021894 269
elessair 0:f269e3021894 270 #endif /* __CMSIS_GENERIC */
elessair 0:f269e3021894 271
elessair 0:f269e3021894 272 #ifdef __cplusplus
elessair 0:f269e3021894 273 }
elessair 0:f269e3021894 274
elessair 0:f269e3021894 275
elessair 0:f269e3021894 276 #endif