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targets/TARGET_ONSEMI/TARGET_NCS36510/pwm_map.h@0:f269e3021894, 2016-10-23 (annotated)
- Committer:
- elessair
- Date:
- Sun Oct 23 15:10:02 2016 +0000
- Revision:
- 0:f269e3021894
Initial commit
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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elessair | 0:f269e3021894 | 1 | /** |
elessair | 0:f269e3021894 | 2 | ****************************************************************************** |
elessair | 0:f269e3021894 | 3 | * @file pwm_map.h |
elessair | 0:f269e3021894 | 4 | * @brief PWM HW register map |
elessair | 0:f269e3021894 | 5 | * @internal |
elessair | 0:f269e3021894 | 6 | * @author ON Semiconductor |
elessair | 0:f269e3021894 | 7 | * $Rev: 3378 $ |
elessair | 0:f269e3021894 | 8 | * $Date: 2015-04-28 13:38:36 +0530 (Tue, 28 Apr 2015) $ |
elessair | 0:f269e3021894 | 9 | ****************************************************************************** |
elessair | 0:f269e3021894 | 10 | * Copyright 2016 Semiconductor Components Industries LLC (d/b/a ON Semiconductor). |
elessair | 0:f269e3021894 | 11 | * All rights reserved. This software and/or documentation is licensed by ON Semiconductor |
elessair | 0:f269e3021894 | 12 | * under limited terms and conditions. The terms and conditions pertaining to the software |
elessair | 0:f269e3021894 | 13 | * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf |
elessair | 0:f269e3021894 | 14 | * (ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software) and |
elessair | 0:f269e3021894 | 15 | * if applicable the software license agreement. Do not use this software and/or |
elessair | 0:f269e3021894 | 16 | * documentation unless you have carefully read and you agree to the limited terms and |
elessair | 0:f269e3021894 | 17 | * conditions. By using this software and/or documentation, you agree to the limited |
elessair | 0:f269e3021894 | 18 | * terms and conditions. |
elessair | 0:f269e3021894 | 19 | * |
elessair | 0:f269e3021894 | 20 | * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
elessair | 0:f269e3021894 | 21 | * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF |
elessair | 0:f269e3021894 | 22 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. |
elessair | 0:f269e3021894 | 23 | * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, |
elessair | 0:f269e3021894 | 24 | * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. |
elessair | 0:f269e3021894 | 25 | * @endinternal |
elessair | 0:f269e3021894 | 26 | * |
elessair | 0:f269e3021894 | 27 | * @ingroup pwm |
elessair | 0:f269e3021894 | 28 | * |
elessair | 0:f269e3021894 | 29 | * @details |
elessair | 0:f269e3021894 | 30 | * <p> |
elessair | 0:f269e3021894 | 31 | * PWM HW register map description |
elessair | 0:f269e3021894 | 32 | * </p> |
elessair | 0:f269e3021894 | 33 | * |
elessair | 0:f269e3021894 | 34 | * <h1> Reference document(s) </h1> |
elessair | 0:f269e3021894 | 35 | * <p> |
elessair | 0:f269e3021894 | 36 | * <a href="../../../../build/doc/pdf/IPC7205_PWM_APB_DS_v1P1.pdf" target="_blank"> |
elessair | 0:f269e3021894 | 37 | * IPC7205 APB PWM Design Specification v1.1 </a> |
elessair | 0:f269e3021894 | 38 | * </p> |
elessair | 0:f269e3021894 | 39 | */ |
elessair | 0:f269e3021894 | 40 | |
elessair | 0:f269e3021894 | 41 | #ifndef PWM_MAP_H_ |
elessair | 0:f269e3021894 | 42 | #define PWM_MAP_H_ |
elessair | 0:f269e3021894 | 43 | |
elessair | 0:f269e3021894 | 44 | #include "architecture.h" |
elessair | 0:f269e3021894 | 45 | |
elessair | 0:f269e3021894 | 46 | /** Power management Control HW Structure Overlay */ |
elessair | 0:f269e3021894 | 47 | #ifdef REVB |
elessair | 0:f269e3021894 | 48 | typedef struct { |
elessair | 0:f269e3021894 | 49 | __IO uint32_t DUTYCYCLE; |
elessair | 0:f269e3021894 | 50 | union { |
elessair | 0:f269e3021894 | 51 | struct { |
elessair | 0:f269e3021894 | 52 | __IO uint32_t ENABLED :1;/**< 1 = PWM enable , 0 = PWM disable */ |
elessair | 0:f269e3021894 | 53 | __I uint32_t CURRENT :1;/**< current state of PWM enable signal */ |
elessair | 0:f269e3021894 | 54 | __O uint32_t PAD1 :6; /**< Reserved. Writes have no effect; Read as 0x00. */ |
elessair | 0:f269e3021894 | 55 | __O uint32_t RDPWMEN :1;/**< current state of pwmEnable configuration */ |
elessair | 0:f269e3021894 | 56 | __O uint32_t RDPWMOP :1;/**< current state of PWM out signal */ |
elessair | 0:f269e3021894 | 57 | __O uint32_t PAD2 :6; /**< Reserved. Writes have no effect; Read as 0x00. */ |
elessair | 0:f269e3021894 | 58 | } BITS; |
elessair | 0:f269e3021894 | 59 | __I uint32_t WORD; |
elessair | 0:f269e3021894 | 60 | } PWMOUT; |
elessair | 0:f269e3021894 | 61 | __O uint32_t DISABLE; |
elessair | 0:f269e3021894 | 62 | union { |
elessair | 0:f269e3021894 | 63 | struct { |
elessair | 0:f269e3021894 | 64 | __IO uint32_t ENABLED :1; |
elessair | 0:f269e3021894 | 65 | __O uint32_t PAD1 :7; /**< Reserved. Writes have no effect */ |
elessair | 0:f269e3021894 | 66 | __O uint32_t STATE :1; /**< current state of prescaler enable configuration. */ |
elessair | 0:f269e3021894 | 67 | __O uint32_t PAD2 :7; /**< Reserved. Writes have no effect; Read as 0x00. */ |
elessair | 0:f269e3021894 | 68 | } BITS; |
elessair | 0:f269e3021894 | 69 | __I uint32_t WORD; |
elessair | 0:f269e3021894 | 70 | } PRESCALE_EN; |
elessair | 0:f269e3021894 | 71 | |
elessair | 0:f269e3021894 | 72 | __O uint32_t PRESCALE_DIS; |
elessair | 0:f269e3021894 | 73 | |
elessair | 0:f269e3021894 | 74 | } PwmReg_t, *PwmReg_pt; |
elessair | 0:f269e3021894 | 75 | #endif /* REVB */ |
elessair | 0:f269e3021894 | 76 | |
elessair | 0:f269e3021894 | 77 | #ifdef REVD |
elessair | 0:f269e3021894 | 78 | typedef struct { |
elessair | 0:f269e3021894 | 79 | __IO uint32_t DUTYCYCLE; |
elessair | 0:f269e3021894 | 80 | union { |
elessair | 0:f269e3021894 | 81 | struct { |
elessair | 0:f269e3021894 | 82 | __O uint32_t ENABLE :8; /**< Write any value to enable PWM output */ |
elessair | 0:f269e3021894 | 83 | __I uint32_t PAD :1; /** < Pad */ |
elessair | 0:f269e3021894 | 84 | __I uint32_t ENABLE_STATE :1; /**< Current state of pwmEnable configuration bit. 1 PWM output is enabled. 0 PWN output is disabled. */ |
elessair | 0:f269e3021894 | 85 | __I uint32_t OUTPUT_STATE :1; /**< Current state of PWM output */ |
elessair | 0:f269e3021894 | 86 | } BITS; |
elessair | 0:f269e3021894 | 87 | __IO uint32_t WORD; |
elessair | 0:f269e3021894 | 88 | } PWM_ENABLE; |
elessair | 0:f269e3021894 | 89 | __O uint32_t PWM_DISABLE; |
elessair | 0:f269e3021894 | 90 | union { |
elessair | 0:f269e3021894 | 91 | struct { |
elessair | 0:f269e3021894 | 92 | __O uint32_t ENABLE :8; /**< Write any value to select enable the 4-bit prescaler */ |
elessair | 0:f269e3021894 | 93 | __I uint32_t STATE:1; /**< Current state of the prescaler. 1 the prescaler is enabled. 0 the prescaler is disabled. */ |
elessair | 0:f269e3021894 | 94 | } BITS; |
elessair | 0:f269e3021894 | 95 | __IO uint32_t WORD; |
elessair | 0:f269e3021894 | 96 | } PRESCALE_ENABLE; |
elessair | 0:f269e3021894 | 97 | __O uint32_t PRESCALE_DISABLE; |
elessair | 0:f269e3021894 | 98 | } PwmReg_t, *PwmReg_pt; |
elessair | 0:f269e3021894 | 99 | #endif /* REVD */ |
elessair | 0:f269e3021894 | 100 | #endif /* PWM_MAP_H_ */ |