Lee Kai Xuan / mbed-os

mbed-os

Fork of mbed-os by erkin yucel

targets/TARGET_NXP/TARGET_LPC13XX/i2c_api.c@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2006-2013 ARM Limited
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16 #include "mbed_assert.h"
elessair 0:f269e3021894 17 #include "i2c_api.h"
elessair 0:f269e3021894 18 #include "cmsis.h"
elessair 0:f269e3021894 19 #include "pinmap.h"
elessair 0:f269e3021894 20 #include "mbed_error.h"
elessair 0:f269e3021894 21
elessair 0:f269e3021894 22 static const PinMap PinMap_I2C_SDA[] = {
elessair 0:f269e3021894 23 {P0_5, I2C_0, 1},
elessair 0:f269e3021894 24 {NC , NC , 0}
elessair 0:f269e3021894 25 };
elessair 0:f269e3021894 26
elessair 0:f269e3021894 27 static const PinMap PinMap_I2C_SCL[] = {
elessair 0:f269e3021894 28 {P0_4, I2C_0, 1},
elessair 0:f269e3021894 29 {NC , NC, 0}
elessair 0:f269e3021894 30 };
elessair 0:f269e3021894 31
elessair 0:f269e3021894 32 #define I2C_CONSET(x) (x->i2c->CONSET)
elessair 0:f269e3021894 33 #define I2C_CONCLR(x) (x->i2c->CONCLR)
elessair 0:f269e3021894 34 #define I2C_STAT(x) (x->i2c->STAT)
elessair 0:f269e3021894 35 #define I2C_DAT(x) (x->i2c->DAT)
elessair 0:f269e3021894 36 #define I2C_SCLL(x, val) (x->i2c->SCLL = val)
elessair 0:f269e3021894 37 #define I2C_SCLH(x, val) (x->i2c->SCLH = val)
elessair 0:f269e3021894 38
elessair 0:f269e3021894 39 static const uint32_t I2C_addr_offset[2][4] = {
elessair 0:f269e3021894 40 {0x0C, 0x20, 0x24, 0x28},
elessair 0:f269e3021894 41 {0x30, 0x34, 0x38, 0x3C}
elessair 0:f269e3021894 42 };
elessair 0:f269e3021894 43
elessair 0:f269e3021894 44 static inline void i2c_conclr(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
elessair 0:f269e3021894 45 I2C_CONCLR(obj) = (start << 5)
elessair 0:f269e3021894 46 | (stop << 4)
elessair 0:f269e3021894 47 | (interrupt << 3)
elessair 0:f269e3021894 48 | (acknowledge << 2);
elessair 0:f269e3021894 49 }
elessair 0:f269e3021894 50
elessair 0:f269e3021894 51 static inline void i2c_conset(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
elessair 0:f269e3021894 52 I2C_CONSET(obj) = (start << 5)
elessair 0:f269e3021894 53 | (stop << 4)
elessair 0:f269e3021894 54 | (interrupt << 3)
elessair 0:f269e3021894 55 | (acknowledge << 2);
elessair 0:f269e3021894 56 }
elessair 0:f269e3021894 57
elessair 0:f269e3021894 58 // Clear the Serial Interrupt (SI)
elessair 0:f269e3021894 59 static inline void i2c_clear_SI(i2c_t *obj) {
elessair 0:f269e3021894 60 i2c_conclr(obj, 0, 0, 1, 0);
elessair 0:f269e3021894 61 }
elessair 0:f269e3021894 62
elessair 0:f269e3021894 63 static inline int i2c_status(i2c_t *obj) {
elessair 0:f269e3021894 64 return I2C_STAT(obj);
elessair 0:f269e3021894 65 }
elessair 0:f269e3021894 66
elessair 0:f269e3021894 67 // Wait until the Serial Interrupt (SI) is set
elessair 0:f269e3021894 68 static int i2c_wait_SI(i2c_t *obj) {
elessair 0:f269e3021894 69 int timeout = 0;
elessair 0:f269e3021894 70 while (!(I2C_CONSET(obj) & (1 << 3))) {
elessair 0:f269e3021894 71 timeout++;
elessair 0:f269e3021894 72 if (timeout > 100000) return -1;
elessair 0:f269e3021894 73 }
elessair 0:f269e3021894 74 return 0;
elessair 0:f269e3021894 75 }
elessair 0:f269e3021894 76
elessair 0:f269e3021894 77 static inline void i2c_interface_enable(i2c_t *obj) {
elessair 0:f269e3021894 78 I2C_CONSET(obj) = 0x40;
elessair 0:f269e3021894 79 }
elessair 0:f269e3021894 80
elessair 0:f269e3021894 81 static inline void i2c_power_enable(i2c_t *obj) {
elessair 0:f269e3021894 82 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 5);
elessair 0:f269e3021894 83 LPC_SYSCON->PRESETCTRL |= 1 << 1;
elessair 0:f269e3021894 84 }
elessair 0:f269e3021894 85
elessair 0:f269e3021894 86 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
elessair 0:f269e3021894 87 // determine the SPI to use
elessair 0:f269e3021894 88 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
elessair 0:f269e3021894 89 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
elessair 0:f269e3021894 90 obj->i2c = (LPC_I2C_Type *)pinmap_merge(i2c_sda, i2c_scl);
elessair 0:f269e3021894 91 MBED_ASSERT((int)obj->i2c != NC);
elessair 0:f269e3021894 92
elessair 0:f269e3021894 93 // enable power
elessair 0:f269e3021894 94 i2c_power_enable(obj);
elessair 0:f269e3021894 95
elessair 0:f269e3021894 96 // set default frequency at 100k
elessair 0:f269e3021894 97 i2c_frequency(obj, 100000);
elessair 0:f269e3021894 98 i2c_conclr(obj, 1, 1, 1, 1);
elessair 0:f269e3021894 99 i2c_interface_enable(obj);
elessair 0:f269e3021894 100
elessair 0:f269e3021894 101 pinmap_pinout(sda, PinMap_I2C_SDA);
elessair 0:f269e3021894 102 pinmap_pinout(scl, PinMap_I2C_SCL);
elessair 0:f269e3021894 103 }
elessair 0:f269e3021894 104
elessair 0:f269e3021894 105 inline int i2c_start(i2c_t *obj) {
elessair 0:f269e3021894 106 int status = 0;
elessair 0:f269e3021894 107 int isInterrupted = I2C_CONSET(obj) & (1 << 3);
elessair 0:f269e3021894 108
elessair 0:f269e3021894 109 // 8.1 Before master mode can be entered, I2CON must be initialised to:
elessair 0:f269e3021894 110 // - I2EN STA STO SI AA - -
elessair 0:f269e3021894 111 // - 1 0 0 x x - -
elessair 0:f269e3021894 112 // if AA = 0, it can't enter slave mode
elessair 0:f269e3021894 113 i2c_conclr(obj, 1, 1, 0, 1);
elessair 0:f269e3021894 114
elessair 0:f269e3021894 115 // The master mode may now be entered by setting the STA bit
elessair 0:f269e3021894 116 // this will generate a start condition when the bus becomes free
elessair 0:f269e3021894 117 i2c_conset(obj, 1, 0, 0, 1);
elessair 0:f269e3021894 118 // Clearing SI bit when it wasn't set on entry can jump past state
elessair 0:f269e3021894 119 // 0x10 or 0x08 and erroneously send uninitialized slave address.
elessair 0:f269e3021894 120 if (isInterrupted)
elessair 0:f269e3021894 121 i2c_clear_SI(obj);
elessair 0:f269e3021894 122
elessair 0:f269e3021894 123 i2c_wait_SI(obj);
elessair 0:f269e3021894 124 status = i2c_status(obj);
elessair 0:f269e3021894 125
elessair 0:f269e3021894 126 // Clear start bit now that it's transmitted
elessair 0:f269e3021894 127 i2c_conclr(obj, 1, 0, 0, 0);
elessair 0:f269e3021894 128 return status;
elessair 0:f269e3021894 129 }
elessair 0:f269e3021894 130
elessair 0:f269e3021894 131 inline int i2c_stop(i2c_t *obj) {
elessair 0:f269e3021894 132 int timeout = 0;
elessair 0:f269e3021894 133
elessair 0:f269e3021894 134 // write the stop bit
elessair 0:f269e3021894 135 i2c_conset(obj, 0, 1, 0, 0);
elessair 0:f269e3021894 136 i2c_clear_SI(obj);
elessair 0:f269e3021894 137
elessair 0:f269e3021894 138 // wait for STO bit to reset
elessair 0:f269e3021894 139 while(I2C_CONSET(obj) & (1 << 4)) {
elessair 0:f269e3021894 140 timeout ++;
elessair 0:f269e3021894 141 if (timeout > 100000) return 1;
elessair 0:f269e3021894 142 }
elessair 0:f269e3021894 143
elessair 0:f269e3021894 144 return 0;
elessair 0:f269e3021894 145 }
elessair 0:f269e3021894 146
elessair 0:f269e3021894 147
elessair 0:f269e3021894 148 static inline int i2c_do_write(i2c_t *obj, int value, uint8_t addr) {
elessair 0:f269e3021894 149 // write the data
elessair 0:f269e3021894 150 I2C_DAT(obj) = value;
elessair 0:f269e3021894 151
elessair 0:f269e3021894 152 // clear SI to init a send
elessair 0:f269e3021894 153 i2c_clear_SI(obj);
elessair 0:f269e3021894 154
elessair 0:f269e3021894 155 // wait and return status
elessair 0:f269e3021894 156 i2c_wait_SI(obj);
elessair 0:f269e3021894 157 return i2c_status(obj);
elessair 0:f269e3021894 158 }
elessair 0:f269e3021894 159
elessair 0:f269e3021894 160 static inline int i2c_do_read(i2c_t *obj, int last) {
elessair 0:f269e3021894 161 // we are in state 0x40 (SLA+R tx'd) or 0x50 (data rx'd and ack)
elessair 0:f269e3021894 162 if (last) {
elessair 0:f269e3021894 163 i2c_conclr(obj, 0, 0, 0, 1); // send a NOT ACK
elessair 0:f269e3021894 164 } else {
elessair 0:f269e3021894 165 i2c_conset(obj, 0, 0, 0, 1); // send a ACK
elessair 0:f269e3021894 166 }
elessair 0:f269e3021894 167
elessair 0:f269e3021894 168 // accept byte
elessair 0:f269e3021894 169 i2c_clear_SI(obj);
elessair 0:f269e3021894 170
elessair 0:f269e3021894 171 // wait for it to arrive
elessair 0:f269e3021894 172 i2c_wait_SI(obj);
elessair 0:f269e3021894 173
elessair 0:f269e3021894 174 // return the data
elessair 0:f269e3021894 175 return (I2C_DAT(obj) & 0xFF);
elessair 0:f269e3021894 176 }
elessair 0:f269e3021894 177
elessair 0:f269e3021894 178 void i2c_frequency(i2c_t *obj, int hz) {
elessair 0:f269e3021894 179 // No peripheral clock divider on the M0
elessair 0:f269e3021894 180 uint32_t PCLK = SystemCoreClock;
elessair 0:f269e3021894 181
elessair 0:f269e3021894 182 uint32_t pulse = PCLK / (hz * 2);
elessair 0:f269e3021894 183
elessair 0:f269e3021894 184 // I2C Rate
elessair 0:f269e3021894 185 I2C_SCLL(obj, pulse);
elessair 0:f269e3021894 186 I2C_SCLH(obj, pulse);
elessair 0:f269e3021894 187 }
elessair 0:f269e3021894 188
elessair 0:f269e3021894 189 // The I2C does a read or a write as a whole operation
elessair 0:f269e3021894 190 // There are two types of error conditions it can encounter
elessair 0:f269e3021894 191 // 1) it can not obtain the bus
elessair 0:f269e3021894 192 // 2) it gets error responses at part of the transmission
elessair 0:f269e3021894 193 //
elessair 0:f269e3021894 194 // We tackle them as follows:
elessair 0:f269e3021894 195 // 1) we retry until we get the bus. we could have a "timeout" if we can not get it
elessair 0:f269e3021894 196 // which basically turns it in to a 2)
elessair 0:f269e3021894 197 // 2) on error, we use the standard error mechanisms to report/debug
elessair 0:f269e3021894 198 //
elessair 0:f269e3021894 199 // Therefore an I2C transaction should always complete. If it doesn't it is usually
elessair 0:f269e3021894 200 // because something is setup wrong (e.g. wiring), and we don't need to programatically
elessair 0:f269e3021894 201 // check for that
elessair 0:f269e3021894 202
elessair 0:f269e3021894 203 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
elessair 0:f269e3021894 204 int count, status;
elessair 0:f269e3021894 205
elessair 0:f269e3021894 206 status = i2c_start(obj);
elessair 0:f269e3021894 207
elessair 0:f269e3021894 208 if ((status != 0x10) && (status != 0x08)) {
elessair 0:f269e3021894 209 i2c_stop(obj);
elessair 0:f269e3021894 210 return I2C_ERROR_BUS_BUSY;
elessair 0:f269e3021894 211 }
elessair 0:f269e3021894 212
elessair 0:f269e3021894 213 status = i2c_do_write(obj, (address | 0x01), 1);
elessair 0:f269e3021894 214 if (status != 0x40) {
elessair 0:f269e3021894 215 i2c_stop(obj);
elessair 0:f269e3021894 216 return I2C_ERROR_NO_SLAVE;
elessair 0:f269e3021894 217 }
elessair 0:f269e3021894 218
elessair 0:f269e3021894 219 // Read in all except last byte
elessair 0:f269e3021894 220 for (count = 0; count < (length - 1); count++) {
elessair 0:f269e3021894 221 int value = i2c_do_read(obj, 0);
elessair 0:f269e3021894 222 status = i2c_status(obj);
elessair 0:f269e3021894 223 if (status != 0x50) {
elessair 0:f269e3021894 224 i2c_stop(obj);
elessair 0:f269e3021894 225 return count;
elessair 0:f269e3021894 226 }
elessair 0:f269e3021894 227 data[count] = (char) value;
elessair 0:f269e3021894 228 }
elessair 0:f269e3021894 229
elessair 0:f269e3021894 230 // read in last byte
elessair 0:f269e3021894 231 int value = i2c_do_read(obj, 1);
elessair 0:f269e3021894 232 status = i2c_status(obj);
elessair 0:f269e3021894 233 if (status != 0x58) {
elessair 0:f269e3021894 234 i2c_stop(obj);
elessair 0:f269e3021894 235 return length - 1;
elessair 0:f269e3021894 236 }
elessair 0:f269e3021894 237
elessair 0:f269e3021894 238 data[count] = (char) value;
elessair 0:f269e3021894 239
elessair 0:f269e3021894 240 // If not repeated start, send stop.
elessair 0:f269e3021894 241 if (stop) {
elessair 0:f269e3021894 242 i2c_stop(obj);
elessair 0:f269e3021894 243 }
elessair 0:f269e3021894 244
elessair 0:f269e3021894 245 return length;
elessair 0:f269e3021894 246 }
elessair 0:f269e3021894 247
elessair 0:f269e3021894 248 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
elessair 0:f269e3021894 249 int i, status;
elessair 0:f269e3021894 250
elessair 0:f269e3021894 251 status = i2c_start(obj);
elessair 0:f269e3021894 252
elessair 0:f269e3021894 253 if ((status != 0x10) && (status != 0x08)) {
elessair 0:f269e3021894 254 i2c_stop(obj);
elessair 0:f269e3021894 255 return I2C_ERROR_BUS_BUSY;
elessair 0:f269e3021894 256 }
elessair 0:f269e3021894 257
elessair 0:f269e3021894 258 status = i2c_do_write(obj, (address & 0xFE), 1);
elessair 0:f269e3021894 259 if (status != 0x18) {
elessair 0:f269e3021894 260 i2c_stop(obj);
elessair 0:f269e3021894 261 return I2C_ERROR_NO_SLAVE;
elessair 0:f269e3021894 262 }
elessair 0:f269e3021894 263
elessair 0:f269e3021894 264 for (i=0; i<length; i++) {
elessair 0:f269e3021894 265 status = i2c_do_write(obj, data[i], 0);
elessair 0:f269e3021894 266 if(status != 0x28) {
elessair 0:f269e3021894 267 i2c_stop(obj);
elessair 0:f269e3021894 268 return i;
elessair 0:f269e3021894 269 }
elessair 0:f269e3021894 270 }
elessair 0:f269e3021894 271
elessair 0:f269e3021894 272 // clearing the serial interrupt here might cause an unintended rewrite of the last byte
elessair 0:f269e3021894 273 // see also issue report https://mbed.org/users/mbed_official/code/mbed/issues/1
elessair 0:f269e3021894 274 // i2c_clear_SI(obj);
elessair 0:f269e3021894 275
elessair 0:f269e3021894 276 // If not repeated start, send stop.
elessair 0:f269e3021894 277 if (stop) {
elessair 0:f269e3021894 278 i2c_stop(obj);
elessair 0:f269e3021894 279 }
elessair 0:f269e3021894 280
elessair 0:f269e3021894 281 return length;
elessair 0:f269e3021894 282 }
elessair 0:f269e3021894 283
elessair 0:f269e3021894 284 void i2c_reset(i2c_t *obj) {
elessair 0:f269e3021894 285 i2c_stop(obj);
elessair 0:f269e3021894 286 }
elessair 0:f269e3021894 287
elessair 0:f269e3021894 288 int i2c_byte_read(i2c_t *obj, int last) {
elessair 0:f269e3021894 289 return (i2c_do_read(obj, last) & 0xFF);
elessair 0:f269e3021894 290 }
elessair 0:f269e3021894 291
elessair 0:f269e3021894 292 int i2c_byte_write(i2c_t *obj, int data) {
elessair 0:f269e3021894 293 int ack;
elessair 0:f269e3021894 294 int status = i2c_do_write(obj, (data & 0xFF), 0);
elessair 0:f269e3021894 295
elessair 0:f269e3021894 296 switch(status) {
elessair 0:f269e3021894 297 case 0x18: case 0x28: // Master transmit ACKs
elessair 0:f269e3021894 298 ack = 1;
elessair 0:f269e3021894 299 break;
elessair 0:f269e3021894 300 case 0x40: // Master receive address transmitted ACK
elessair 0:f269e3021894 301 ack = 1;
elessair 0:f269e3021894 302 break;
elessair 0:f269e3021894 303 case 0xB8: // Slave transmit ACK
elessair 0:f269e3021894 304 ack = 1;
elessair 0:f269e3021894 305 break;
elessair 0:f269e3021894 306 default:
elessair 0:f269e3021894 307 ack = 0;
elessair 0:f269e3021894 308 break;
elessair 0:f269e3021894 309 }
elessair 0:f269e3021894 310
elessair 0:f269e3021894 311 return ack;
elessair 0:f269e3021894 312 }
elessair 0:f269e3021894 313
elessair 0:f269e3021894 314 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
elessair 0:f269e3021894 315 if (enable_slave != 0) {
elessair 0:f269e3021894 316 i2c_conclr(obj, 1, 1, 1, 0);
elessair 0:f269e3021894 317 i2c_conset(obj, 0, 0, 0, 1);
elessair 0:f269e3021894 318 } else {
elessair 0:f269e3021894 319 i2c_conclr(obj, 1, 1, 1, 1);
elessair 0:f269e3021894 320 }
elessair 0:f269e3021894 321 }
elessair 0:f269e3021894 322
elessair 0:f269e3021894 323 int i2c_slave_receive(i2c_t *obj) {
elessair 0:f269e3021894 324 int status;
elessair 0:f269e3021894 325 int retval;
elessair 0:f269e3021894 326
elessair 0:f269e3021894 327 status = i2c_status(obj);
elessair 0:f269e3021894 328 switch(status) {
elessair 0:f269e3021894 329 case 0x60: retval = 3; break;
elessair 0:f269e3021894 330 case 0x70: retval = 2; break;
elessair 0:f269e3021894 331 case 0xA8: retval = 1; break;
elessair 0:f269e3021894 332 default : retval = 0; break;
elessair 0:f269e3021894 333 }
elessair 0:f269e3021894 334
elessair 0:f269e3021894 335 return(retval);
elessair 0:f269e3021894 336 }
elessair 0:f269e3021894 337
elessair 0:f269e3021894 338 int i2c_slave_read(i2c_t *obj, char *data, int length) {
elessair 0:f269e3021894 339 int count = 0;
elessair 0:f269e3021894 340 int status;
elessair 0:f269e3021894 341
elessair 0:f269e3021894 342 do {
elessair 0:f269e3021894 343 i2c_clear_SI(obj);
elessair 0:f269e3021894 344 i2c_wait_SI(obj);
elessair 0:f269e3021894 345 status = i2c_status(obj);
elessair 0:f269e3021894 346 if((status == 0x80) || (status == 0x90)) {
elessair 0:f269e3021894 347 data[count] = I2C_DAT(obj) & 0xFF;
elessair 0:f269e3021894 348 }
elessair 0:f269e3021894 349 count++;
elessair 0:f269e3021894 350 } while (((status == 0x80) || (status == 0x90) ||
elessair 0:f269e3021894 351 (status == 0x060) || (status == 0x70)) && (count < length));
elessair 0:f269e3021894 352
elessair 0:f269e3021894 353 if(status != 0xA0) {
elessair 0:f269e3021894 354 i2c_stop(obj);
elessair 0:f269e3021894 355 }
elessair 0:f269e3021894 356
elessair 0:f269e3021894 357 i2c_clear_SI(obj);
elessair 0:f269e3021894 358
elessair 0:f269e3021894 359 return count;
elessair 0:f269e3021894 360 }
elessair 0:f269e3021894 361
elessair 0:f269e3021894 362 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
elessair 0:f269e3021894 363 int count = 0;
elessair 0:f269e3021894 364 int status;
elessair 0:f269e3021894 365
elessair 0:f269e3021894 366 if(length <= 0) {
elessair 0:f269e3021894 367 return(0);
elessair 0:f269e3021894 368 }
elessair 0:f269e3021894 369
elessair 0:f269e3021894 370 do {
elessair 0:f269e3021894 371 status = i2c_do_write(obj, data[count], 0);
elessair 0:f269e3021894 372 count++;
elessair 0:f269e3021894 373 } while ((count < length) && (status == 0xB8));
elessair 0:f269e3021894 374
elessair 0:f269e3021894 375 if((status != 0xC0) && (status != 0xC8)) {
elessair 0:f269e3021894 376 i2c_stop(obj);
elessair 0:f269e3021894 377 }
elessair 0:f269e3021894 378
elessair 0:f269e3021894 379 i2c_clear_SI(obj);
elessair 0:f269e3021894 380
elessair 0:f269e3021894 381 return(count);
elessair 0:f269e3021894 382 }
elessair 0:f269e3021894 383
elessair 0:f269e3021894 384 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
elessair 0:f269e3021894 385 uint32_t addr;
elessair 0:f269e3021894 386
elessair 0:f269e3021894 387 if ((idx >= 0) && (idx <= 3)) {
elessair 0:f269e3021894 388 addr = ((uint32_t)obj->i2c) + I2C_addr_offset[0][idx];
elessair 0:f269e3021894 389 *((uint32_t *) addr) = address & 0xFF;
elessair 0:f269e3021894 390 }
elessair 0:f269e3021894 391 }