Lee Kai Xuan / mbed-os

mbed-os

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targets/TARGET_NUVOTON/TARGET_NUC472/pwmout_api.c@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

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elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2015-2016 Nuvoton
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16
elessair 0:f269e3021894 17 #include "pwmout_api.h"
elessair 0:f269e3021894 18
elessair 0:f269e3021894 19 #if DEVICE_PWMOUT
elessair 0:f269e3021894 20
elessair 0:f269e3021894 21 #include "cmsis.h"
elessair 0:f269e3021894 22 #include "pinmap.h"
elessair 0:f269e3021894 23 #include "PeripheralPins.h"
elessair 0:f269e3021894 24 #include "nu_modutil.h"
elessair 0:f269e3021894 25 #include "nu_miscutil.h"
elessair 0:f269e3021894 26 #include "nu_bitutil.h"
elessair 0:f269e3021894 27
elessair 0:f269e3021894 28 struct nu_pwm_var {
elessair 0:f269e3021894 29 uint32_t en_msk;
elessair 0:f269e3021894 30 };
elessair 0:f269e3021894 31
elessair 0:f269e3021894 32 static struct nu_pwm_var pwm0_var = {
elessair 0:f269e3021894 33 .en_msk = 0
elessair 0:f269e3021894 34 };
elessair 0:f269e3021894 35
elessair 0:f269e3021894 36 static struct nu_pwm_var pwm1_var = {
elessair 0:f269e3021894 37 .en_msk = 0
elessair 0:f269e3021894 38 };
elessair 0:f269e3021894 39
elessair 0:f269e3021894 40 static uint32_t pwm_modinit_mask = 0;
elessair 0:f269e3021894 41
elessair 0:f269e3021894 42 // FIXME: PWM1 2/3 channels fail. PWM registers cannot write after their respective clocks are enabled.
elessair 0:f269e3021894 43 static const struct nu_modinit_s pwm_modinit_tab[] = {
elessair 0:f269e3021894 44 {PWM_0_0, PWM0CH01_MODULE, CLK_CLKSEL2_PWM0CH01SEL_HIRC, 0, PWM0_RST, PWM0CH0_IRQn, &pwm0_var},
elessair 0:f269e3021894 45 {PWM_0_1, PWM0CH01_MODULE, CLK_CLKSEL2_PWM0CH01SEL_HIRC, 0, PWM0_RST, PWM0CH1_IRQn, &pwm0_var},
elessair 0:f269e3021894 46 {PWM_0_2, PWM0CH23_MODULE, CLK_CLKSEL2_PWM0CH23SEL_HIRC, 0, PWM0_RST, PWM0CH2_IRQn, &pwm0_var},
elessair 0:f269e3021894 47 {PWM_0_3, PWM0CH23_MODULE, CLK_CLKSEL2_PWM0CH23SEL_HIRC, 0, PWM0_RST, PWM0CH3_IRQn, &pwm0_var},
elessair 0:f269e3021894 48 {PWM_0_4, PWM0CH45_MODULE, CLK_CLKSEL2_PWM0CH45SEL_HIRC, 0, PWM0_RST, PWM0CH4_IRQn, &pwm0_var},
elessair 0:f269e3021894 49 {PWM_0_5, PWM0CH45_MODULE, CLK_CLKSEL2_PWM0CH45SEL_HIRC, 0, PWM0_RST, PWM0CH5_IRQn, &pwm0_var},
elessair 0:f269e3021894 50
elessair 0:f269e3021894 51 {PWM_1_0, PWM1CH01_MODULE, CLK_CLKSEL2_PWM1CH01SEL_HIRC, 0, PWM1_RST, PWM1CH0_IRQn, &pwm1_var},
elessair 0:f269e3021894 52 {PWM_1_1, PWM1CH01_MODULE, CLK_CLKSEL2_PWM1CH01SEL_HIRC, 0, PWM1_RST, PWM1CH1_IRQn, &pwm1_var},
elessair 0:f269e3021894 53 {PWM_1_2, PWM1CH23_MODULE, CLK_CLKSEL2_PWM1CH23SEL_HIRC, 0, PWM1_RST, PWM1CH2_IRQn, &pwm1_var},
elessair 0:f269e3021894 54 {PWM_1_3, PWM1CH23_MODULE, CLK_CLKSEL2_PWM1CH23SEL_HIRC, 0, PWM1_RST, PWM1CH3_IRQn, &pwm1_var},
elessair 0:f269e3021894 55 {PWM_1_4, PWM1CH45_MODULE, CLK_CLKSEL2_PWM1CH45SEL_HIRC, 0, PWM1_RST, PWM1CH4_IRQn, &pwm1_var},
elessair 0:f269e3021894 56 {PWM_1_5, PWM1CH45_MODULE, CLK_CLKSEL2_PWM1CH45SEL_HIRC, 0, PWM1_RST, PWM1CH5_IRQn, &pwm1_var},
elessair 0:f269e3021894 57
elessair 0:f269e3021894 58 {NC, 0, 0, 0, 0, (IRQn_Type) 0, NULL}
elessair 0:f269e3021894 59 };
elessair 0:f269e3021894 60
elessair 0:f269e3021894 61 static void pwmout_config(pwmout_t* obj);
elessair 0:f269e3021894 62
elessair 0:f269e3021894 63 void pwmout_init(pwmout_t* obj, PinName pin)
elessair 0:f269e3021894 64 {
elessair 0:f269e3021894 65 obj->pwm = (PWMName) pinmap_peripheral(pin, PinMap_PWM);
elessair 0:f269e3021894 66 MBED_ASSERT((int) obj->pwm != NC);
elessair 0:f269e3021894 67
elessair 0:f269e3021894 68 const struct nu_modinit_s *modinit = get_modinit(obj->pwm, pwm_modinit_tab);
elessair 0:f269e3021894 69 MBED_ASSERT(modinit != NULL);
elessair 0:f269e3021894 70 MBED_ASSERT(modinit->modname == obj->pwm);
elessair 0:f269e3021894 71
elessair 0:f269e3021894 72 // NOTE: All channels (identified by PWMName) share a PWM module. This reset will also affect other channels of the same PWM module.
elessair 0:f269e3021894 73 if (! ((struct nu_pwm_var *) modinit->var)->en_msk) {
elessair 0:f269e3021894 74 // Reset this module if no channel enabled
elessair 0:f269e3021894 75 SYS_ResetModule(modinit->rsetidx);
elessair 0:f269e3021894 76 }
elessair 0:f269e3021894 77
elessair 0:f269e3021894 78 PWM_T *pwm_base = (PWM_T *) NU_MODBASE(obj->pwm);
elessair 0:f269e3021894 79 uint32_t chn = NU_MODSUBINDEX(obj->pwm);
elessair 0:f269e3021894 80
elessair 0:f269e3021894 81 // NOTE: Channels 0/1, 2/3, and 4/5 share a clock source.
elessair 0:f269e3021894 82 if ((((struct nu_pwm_var *) modinit->var)->en_msk & (0x3 << (chn / 2 * 2))) == 0) {
elessair 0:f269e3021894 83 // Select clock source of paired channels
elessair 0:f269e3021894 84 CLK_SetModuleClock(modinit->clkidx, modinit->clksrc, modinit->clkdiv);
elessair 0:f269e3021894 85 // Enable clock of paired channels
elessair 0:f269e3021894 86 CLK_EnableModuleClock(modinit->clkidx);
elessair 0:f269e3021894 87
elessair 0:f269e3021894 88 // FIXME: PWM_1_2/3 design bug. PWM_1_2/3 also require PWM_1_0/1 clock enabled.
elessair 0:f269e3021894 89 if (obj->pwm == PWM_1_2 || obj->pwm == PWM_1_3) {
elessair 0:f269e3021894 90 CLK_EnableModuleClock(PWM1CH01_MODULE);
elessair 0:f269e3021894 91 }
elessair 0:f269e3021894 92 }
elessair 0:f269e3021894 93
elessair 0:f269e3021894 94 // Wire pinout
elessair 0:f269e3021894 95 pinmap_pinout(pin, PinMap_PWM);
elessair 0:f269e3021894 96
elessair 0:f269e3021894 97 // Default: period = 10 ms, pulse width = 0 ms
elessair 0:f269e3021894 98 obj->period_us = 1000 * 10;
elessair 0:f269e3021894 99 obj->pulsewidth_us = 0;
elessair 0:f269e3021894 100 pwmout_config(obj);
elessair 0:f269e3021894 101
elessair 0:f269e3021894 102 // Enable output of the specified PWM channel
elessair 0:f269e3021894 103 PWM_EnableOutput(pwm_base, 1 << chn);
elessair 0:f269e3021894 104 PWM_Start(pwm_base, 1 << chn);
elessair 0:f269e3021894 105
elessair 0:f269e3021894 106 ((struct nu_pwm_var *) modinit->var)->en_msk |= 1 << chn;
elessair 0:f269e3021894 107
elessair 0:f269e3021894 108 // Mark this module to be inited.
elessair 0:f269e3021894 109 int i = modinit - pwm_modinit_tab;
elessair 0:f269e3021894 110 pwm_modinit_mask |= 1 << i;
elessair 0:f269e3021894 111 }
elessair 0:f269e3021894 112
elessair 0:f269e3021894 113 void pwmout_free(pwmout_t* obj)
elessair 0:f269e3021894 114 {
elessair 0:f269e3021894 115 PWM_T *pwm_base = (PWM_T *) NU_MODBASE(obj->pwm);
elessair 0:f269e3021894 116 uint32_t chn = NU_MODSUBINDEX(obj->pwm);
elessair 0:f269e3021894 117 PWM_ForceStop(pwm_base, 1 << chn);
elessair 0:f269e3021894 118
elessair 0:f269e3021894 119 const struct nu_modinit_s *modinit = get_modinit(obj->pwm, pwm_modinit_tab);
elessair 0:f269e3021894 120 MBED_ASSERT(modinit != NULL);
elessair 0:f269e3021894 121 MBED_ASSERT(modinit->modname == obj->pwm);
elessair 0:f269e3021894 122 ((struct nu_pwm_var *) modinit->var)->en_msk &= ~(1 << chn);
elessair 0:f269e3021894 123
elessair 0:f269e3021894 124
elessair 0:f269e3021894 125 if ((((struct nu_pwm_var *) modinit->var)->en_msk & (0x3 << (chn / 2 * 2))) == 0) {
elessair 0:f269e3021894 126 // FIXME: PWM_1_2/3 design bug. PWM_1_2/3 also require PWM_1_0/1 clock enabled.
elessair 0:f269e3021894 127 switch (obj->pwm) {
elessair 0:f269e3021894 128 case PWM_1_0:
elessair 0:f269e3021894 129 case PWM_1_1:
elessair 0:f269e3021894 130 if (pwm1_var.en_msk & 0xC) {
elessair 0:f269e3021894 131 break;
elessair 0:f269e3021894 132 }
elessair 0:f269e3021894 133
elessair 0:f269e3021894 134 case PWM_1_2:
elessair 0:f269e3021894 135 case PWM_1_3:
elessair 0:f269e3021894 136 if (! (pwm1_var.en_msk & 0x3)) {
elessair 0:f269e3021894 137 CLK_DisableModuleClock(PWM1CH01_MODULE);
elessair 0:f269e3021894 138 }
elessair 0:f269e3021894 139
elessair 0:f269e3021894 140 default:
elessair 0:f269e3021894 141 // Disable clock of paired channels
elessair 0:f269e3021894 142 CLK_DisableModuleClock(modinit->clkidx);
elessair 0:f269e3021894 143 }
elessair 0:f269e3021894 144 }
elessair 0:f269e3021894 145
elessair 0:f269e3021894 146 // Mark this module to be deinited.
elessair 0:f269e3021894 147 int i = modinit - pwm_modinit_tab;
elessair 0:f269e3021894 148 pwm_modinit_mask &= ~(1 << i);
elessair 0:f269e3021894 149 }
elessair 0:f269e3021894 150
elessair 0:f269e3021894 151 void pwmout_write(pwmout_t* obj, float value)
elessair 0:f269e3021894 152 {
elessair 0:f269e3021894 153 obj->pulsewidth_us = NU_CLAMP((uint32_t) (value * obj->period_us), 0, obj->period_us);
elessair 0:f269e3021894 154 pwmout_config(obj);
elessair 0:f269e3021894 155 }
elessair 0:f269e3021894 156
elessair 0:f269e3021894 157 float pwmout_read(pwmout_t* obj)
elessair 0:f269e3021894 158 {
elessair 0:f269e3021894 159 return NU_CLAMP((((float) obj->pulsewidth_us) / obj->period_us), 0.0f, 1.0f);
elessair 0:f269e3021894 160 }
elessair 0:f269e3021894 161
elessair 0:f269e3021894 162 void pwmout_period(pwmout_t* obj, float seconds)
elessair 0:f269e3021894 163 {
elessair 0:f269e3021894 164 pwmout_period_us(obj, seconds * 1000000.0f);
elessair 0:f269e3021894 165 }
elessair 0:f269e3021894 166
elessair 0:f269e3021894 167 void pwmout_period_ms(pwmout_t* obj, int ms)
elessair 0:f269e3021894 168 {
elessair 0:f269e3021894 169 pwmout_period_us(obj, ms * 1000);
elessair 0:f269e3021894 170 }
elessair 0:f269e3021894 171
elessair 0:f269e3021894 172 // Set the PWM period, keeping the duty cycle the same.
elessair 0:f269e3021894 173 void pwmout_period_us(pwmout_t* obj, int us)
elessair 0:f269e3021894 174 {
elessair 0:f269e3021894 175 uint32_t period_us_old = obj->period_us;
elessair 0:f269e3021894 176 uint32_t pulsewidth_us_old = obj->pulsewidth_us;
elessair 0:f269e3021894 177 obj->period_us = us;
elessair 0:f269e3021894 178 obj->pulsewidth_us = NU_CLAMP(obj->period_us * pulsewidth_us_old / period_us_old, 0, obj->period_us);
elessair 0:f269e3021894 179 pwmout_config(obj);
elessair 0:f269e3021894 180 }
elessair 0:f269e3021894 181
elessair 0:f269e3021894 182 void pwmout_pulsewidth(pwmout_t* obj, float seconds)
elessair 0:f269e3021894 183 {
elessair 0:f269e3021894 184 pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
elessair 0:f269e3021894 185 }
elessair 0:f269e3021894 186
elessair 0:f269e3021894 187 void pwmout_pulsewidth_ms(pwmout_t* obj, int ms)
elessair 0:f269e3021894 188 {
elessair 0:f269e3021894 189 pwmout_pulsewidth_us(obj, ms * 1000);
elessair 0:f269e3021894 190 }
elessair 0:f269e3021894 191
elessair 0:f269e3021894 192 void pwmout_pulsewidth_us(pwmout_t* obj, int us)
elessair 0:f269e3021894 193 {
elessair 0:f269e3021894 194 obj->pulsewidth_us = NU_CLAMP(us, 0, obj->period_us);
elessair 0:f269e3021894 195 pwmout_config(obj);
elessair 0:f269e3021894 196 }
elessair 0:f269e3021894 197
elessair 0:f269e3021894 198 int pwmout_allow_powerdown(void)
elessair 0:f269e3021894 199 {
elessair 0:f269e3021894 200 uint32_t modinit_mask = pwm_modinit_mask;
elessair 0:f269e3021894 201 while (modinit_mask) {
elessair 0:f269e3021894 202 int pwm_idx = nu_ctz(modinit_mask);
elessair 0:f269e3021894 203 const struct nu_modinit_s *modinit = pwm_modinit_tab + pwm_idx;
elessair 0:f269e3021894 204 if (modinit->modname != NC) {
elessair 0:f269e3021894 205 PWM_T *pwm_base = (PWM_T *) NU_MODBASE(modinit->modname);
elessair 0:f269e3021894 206 uint32_t chn = NU_MODSUBINDEX(modinit->modname);
elessair 0:f269e3021894 207 // Disallow entering power-down mode if PWM counter is enabled.
elessair 0:f269e3021894 208 if ((pwm_base->CNTEN & (1 << chn)) && pwm_base->CMPDAT[chn]) {
elessair 0:f269e3021894 209 return 0;
elessair 0:f269e3021894 210 }
elessair 0:f269e3021894 211 }
elessair 0:f269e3021894 212 modinit_mask &= ~(1 << pwm_idx);
elessair 0:f269e3021894 213 }
elessair 0:f269e3021894 214
elessair 0:f269e3021894 215 return 1;
elessair 0:f269e3021894 216 }
elessair 0:f269e3021894 217
elessair 0:f269e3021894 218 static void pwmout_config(pwmout_t* obj)
elessair 0:f269e3021894 219 {
elessair 0:f269e3021894 220 PWM_T *pwm_base = (PWM_T *) NU_MODBASE(obj->pwm);
elessair 0:f269e3021894 221 uint32_t chn = NU_MODSUBINDEX(obj->pwm);
elessair 0:f269e3021894 222 // NOTE: Support period < 1s
elessair 0:f269e3021894 223 //PWM_ConfigOutputChannel(pwm_base, chn, 1000 * 1000 / obj->period_us, obj->pulsewidth_us * 100 / obj->period_us);
elessair 0:f269e3021894 224 PWM_ConfigOutputChannel2(pwm_base, chn, 1000 * 1000, obj->pulsewidth_us * 100 / obj->period_us, obj->period_us);
elessair 0:f269e3021894 225 }
elessair 0:f269e3021894 226
elessair 0:f269e3021894 227 #endif