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targets/TARGET_NORDIC/TARGET_NRF5/sleep.c@0:f269e3021894, 2016-10-23 (annotated)
- Committer:
- elessair
- Date:
- Sun Oct 23 15:10:02 2016 +0000
- Revision:
- 0:f269e3021894
Initial commit
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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elessair | 0:f269e3021894 | 1 | /* mbed Microcontroller Library |
elessair | 0:f269e3021894 | 2 | * Copyright (c) 2006-2013 ARM Limited |
elessair | 0:f269e3021894 | 3 | * |
elessair | 0:f269e3021894 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
elessair | 0:f269e3021894 | 5 | * you may not use this file except in compliance with the License. |
elessair | 0:f269e3021894 | 6 | * You may obtain a copy of the License at |
elessair | 0:f269e3021894 | 7 | * |
elessair | 0:f269e3021894 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
elessair | 0:f269e3021894 | 9 | * |
elessair | 0:f269e3021894 | 10 | * Unless required by applicable law or agreed to in writing, software |
elessair | 0:f269e3021894 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
elessair | 0:f269e3021894 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
elessair | 0:f269e3021894 | 13 | * See the License for the specific language governing permissions and |
elessair | 0:f269e3021894 | 14 | * limitations under the License. |
elessair | 0:f269e3021894 | 15 | */ |
elessair | 0:f269e3021894 | 16 | #include "sleep_api.h" |
elessair | 0:f269e3021894 | 17 | #include "cmsis.h" |
elessair | 0:f269e3021894 | 18 | #include "mbed_interface.h" |
elessair | 0:f269e3021894 | 19 | #include "softdevice_handler.h" |
elessair | 0:f269e3021894 | 20 | #include "nrf_soc.h" |
elessair | 0:f269e3021894 | 21 | |
elessair | 0:f269e3021894 | 22 | // Mask of reserved bits of the register ICSR in the System Control Block peripheral |
elessair | 0:f269e3021894 | 23 | // In this case, bits which are equal to 0 are the bits reserved in this register |
elessair | 0:f269e3021894 | 24 | #define SCB_ICSR_RESERVED_BITS_MASK 0x9E43F03F |
elessair | 0:f269e3021894 | 25 | |
elessair | 0:f269e3021894 | 26 | void sleep(void) |
elessair | 0:f269e3021894 | 27 | { |
elessair | 0:f269e3021894 | 28 | // ensure debug is disconnected if semihost is enabled.... |
elessair | 0:f269e3021894 | 29 | |
elessair | 0:f269e3021894 | 30 | // Trigger an event when an interrupt is pending. This allows to wake up |
elessair | 0:f269e3021894 | 31 | // the processor from disabled interrupts. |
elessair | 0:f269e3021894 | 32 | SCB->SCR |= SCB_SCR_SEVONPEND_Msk; |
elessair | 0:f269e3021894 | 33 | |
elessair | 0:f269e3021894 | 34 | // If the SoftDevice is enabled, its API must be used to go to sleep. |
elessair | 0:f269e3021894 | 35 | if (softdevice_handler_isEnabled()) { |
elessair | 0:f269e3021894 | 36 | sd_power_mode_set(NRF_POWER_MODE_LOWPWR); |
elessair | 0:f269e3021894 | 37 | sd_app_evt_wait(); |
elessair | 0:f269e3021894 | 38 | } else { |
elessair | 0:f269e3021894 | 39 | NRF_POWER->TASKS_LOWPWR = 1; |
elessair | 0:f269e3021894 | 40 | |
elessair | 0:f269e3021894 | 41 | // Note: it is not sufficient to just use WFE here, since the internal |
elessair | 0:f269e3021894 | 42 | // event register may be already set from an event that occurred in the |
elessair | 0:f269e3021894 | 43 | // past (like an SVC call to the SoftDevice) and in such case WFE will |
elessair | 0:f269e3021894 | 44 | // just clear the register and continue execution. |
elessair | 0:f269e3021894 | 45 | // Therefore, the strategy here is to first clear the event register |
elessair | 0:f269e3021894 | 46 | // by using SEV/WFE pair, and then execute WFE again, unless there is |
elessair | 0:f269e3021894 | 47 | // a pending interrupt. |
elessair | 0:f269e3021894 | 48 | |
elessair | 0:f269e3021894 | 49 | // Set an event and wake up whatsoever, this will clear the event |
elessair | 0:f269e3021894 | 50 | // register from all previous events set (SVC call included) |
elessair | 0:f269e3021894 | 51 | __SEV(); |
elessair | 0:f269e3021894 | 52 | __WFE(); |
elessair | 0:f269e3021894 | 53 | |
elessair | 0:f269e3021894 | 54 | // Test if there is an interrupt pending (mask reserved regions) |
elessair | 0:f269e3021894 | 55 | if (SCB->ICSR & (SCB_ICSR_RESERVED_BITS_MASK)) { |
elessair | 0:f269e3021894 | 56 | // Ok, there is an interrut pending, no need to go to sleep |
elessair | 0:f269e3021894 | 57 | return; |
elessair | 0:f269e3021894 | 58 | } else { |
elessair | 0:f269e3021894 | 59 | // next event will wakeup the CPU |
elessair | 0:f269e3021894 | 60 | // If an interrupt occured between the test of SCB->ICSR and this |
elessair | 0:f269e3021894 | 61 | // instruction, WFE will just not put the CPU to sleep |
elessair | 0:f269e3021894 | 62 | __WFE(); |
elessair | 0:f269e3021894 | 63 | } |
elessair | 0:f269e3021894 | 64 | } |
elessair | 0:f269e3021894 | 65 | } |
elessair | 0:f269e3021894 | 66 | |
elessair | 0:f269e3021894 | 67 | void deepsleep(void) |
elessair | 0:f269e3021894 | 68 | { |
elessair | 0:f269e3021894 | 69 | sleep(); |
elessair | 0:f269e3021894 | 70 | // NRF_POWER->SYSTEMOFF=1; |
elessair | 0:f269e3021894 | 71 | } |