Lee Kai Xuan / mbed-os

mbed-os

Fork of mbed-os by erkin yucel

targets/TARGET_ONSEMI/TARGET_NCS36510/macHw_map.h@1:3deb71413561, 2017-07-20 (annotated)

Committer:
xuaner
Date:
Thu Jul 20 14:26:57 2017 +0000
Revision:
1:3deb71413561
Parent:
0:f269e3021894 
mbed_os

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elessair 0:f269e3021894 1 /**
elessair 0:f269e3021894 2 ******************************************************************************
elessair 0:f269e3021894 3 * @file macHw_map.h
elessair 0:f269e3021894 4 * @brief MACHW hw module register map
elessair 0:f269e3021894 5 * @internal
elessair 0:f269e3021894 6 * @author ON Semiconductor
elessair 0:f269e3021894 7 * $Rev: 3390 $
elessair 0:f269e3021894 8 * $Date: 2015-05-13 17:21:05 +0530 (Wed, 13 May 2015) $
elessair 0:f269e3021894 9 ******************************************************************************
elessair 0:f269e3021894 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
elessair 0:f269e3021894 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
elessair 0:f269e3021894 12 * under limited terms and conditions. The terms and conditions pertaining to the software
elessair 0:f269e3021894 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
elessair 0:f269e3021894 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
elessair 0:f269e3021894 15 * if applicable the software license agreement. Do not use this software and/or
elessair 0:f269e3021894 16 * documentation unless you have carefully read and you agree to the limited terms and
elessair 0:f269e3021894 17 * conditions. By using this software and/or documentation, you agree to the limited
elessair 0:f269e3021894 18 * terms and conditions.
elessair 0:f269e3021894 19 *
elessair 0:f269e3021894 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
elessair 0:f269e3021894 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
elessair 0:f269e3021894 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
elessair 0:f269e3021894 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
elessair 0:f269e3021894 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
elessair 0:f269e3021894 25 * @endinternal
elessair 0:f269e3021894 26 *
elessair 0:f269e3021894 27 * @ingroup macHw
elessair 0:f269e3021894 28 *
elessair 0:f269e3021894 29 * @details
elessair 0:f269e3021894 30 */
elessair 0:f269e3021894 31
elessair 0:f269e3021894 32 #ifndef MACHW_MAP_H_
elessair 0:f269e3021894 33 #define MACHW_MAP_H_
elessair 0:f269e3021894 34
elessair 0:f269e3021894 35 /*************************************************************************************************
elessair 0:f269e3021894 36 * *
elessair 0:f269e3021894 37 * Header files *
elessair 0:f269e3021894 38 * *
elessair 0:f269e3021894 39 *************************************************************************************************/
elessair 0:f269e3021894 40
elessair 0:f269e3021894 41 #include "architecture.h"
elessair 0:f269e3021894 42
elessair 0:f269e3021894 43 /**************************************************************************************************
elessair 0:f269e3021894 44 * *
elessair 0:f269e3021894 45 * Type definitions *
elessair 0:f269e3021894 46 * *
elessair 0:f269e3021894 47 **************************************************************************************************/
elessair 0:f269e3021894 48
elessair 0:f269e3021894 49 /** macHw register map (phy, mac and agc parts) */
elessair 0:f269e3021894 50 typedef struct {
elessair 0:f269e3021894 51 __O uint32_t SEQUENCER; /**< 0x40014000 */
elessair 0:f269e3021894 52 union {
elessair 0:f269e3021894 53 struct {
elessair 0:f269e3021894 54 __IO uint32_t MODE:2;
elessair 0:f269e3021894 55 __IO uint32_t NOACK:1;
elessair 0:f269e3021894 56 __IO uint32_t FT:1;
elessair 0:f269e3021894 57 __IO uint32_t PAD0:3;
elessair 0:f269e3021894 58 __IO uint32_t AUTO:1;
elessair 0:f269e3021894 59 __IO uint32_t PAD1:1;
elessair 0:f269e3021894 60 __IO uint32_t NOW:1;
elessair 0:f269e3021894 61 __IO uint32_t PAD2:1;
elessair 0:f269e3021894 62 __IO uint32_t PRM:1;
elessair 0:f269e3021894 63 __IO uint32_t NFCS:1;
elessair 0:f269e3021894 64 __IO uint32_t PAN:1;
elessair 0:f269e3021894 65 __IO uint32_t RSTT:1;
elessair 0:f269e3021894 66 __IO uint32_t RSTR:1;
elessair 0:f269e3021894 67 __IO uint32_t ACK_ENABLE:1;
elessair 0:f269e3021894 68 __IO uint32_t BEA_ENABLE:1;
elessair 0:f269e3021894 69 __IO uint32_t CMD_ENABLE:1;
elessair 0:f269e3021894 70 __IO uint32_t DATA_ENABLE:1;
elessair 0:f269e3021894 71 __IO uint32_t RES_ENABLE:1;
elessair 0:f269e3021894 72 } BITS;
elessair 0:f269e3021894 73 __IO uint32_t WORD;
elessair 0:f269e3021894 74 } SEQ_OPTIONS; /**< 0x40014004 */
elessair 0:f269e3021894 75 union {
elessair 0:f269e3021894 76 struct {
elessair 0:f269e3021894 77 __IO uint32_t SRST:1;
elessair 0:f269e3021894 78 __IO uint32_t ON:1;
elessair 0:f269e3021894 79 __IO uint32_t CLKDIV:1;
elessair 0:f269e3021894 80 } BITS;
elessair 0:f269e3021894 81 __IO uint32_t WORD;
elessair 0:f269e3021894 82 } CONTROL; /**< 0x40014008 */
elessair 0:f269e3021894 83 __O uint32_t PAD0; /**< 0x4001400C */
elessair 0:f269e3021894 84 union {
elessair 0:f269e3021894 85 struct {
elessair 0:f269e3021894 86 __I uint32_t CODE:4;
elessair 0:f269e3021894 87 __I uint32_t PAD0:8;
elessair 0:f269e3021894 88 __I uint32_t MSO:1;
elessair 0:f269e3021894 89 __I uint32_t CB:1;
elessair 0:f269e3021894 90 __I uint32_t PAD1:1;
elessair 0:f269e3021894 91 __I uint32_t MST:1;
elessair 0:f269e3021894 92 } BITS;
elessair 0:f269e3021894 93 __I uint32_t WORD;
elessair 0:f269e3021894 94 } STATUS; /**< 0x40014010 */
elessair 0:f269e3021894 95 union {
elessair 0:f269e3021894 96 struct {
elessair 0:f269e3021894 97 __IO uint32_t TFP:1;
elessair 0:f269e3021894 98 __IO uint32_t SDC:1;
elessair 0:f269e3021894 99 __IO uint32_t IC:1;
elessair 0:f269e3021894 100 __IO uint32_t SDB:1;
elessair 0:f269e3021894 101 __IO uint32_t SSP:1;
elessair 0:f269e3021894 102 __IO uint32_t TFPO:1;
elessair 0:f269e3021894 103 } BITS;
elessair 0:f269e3021894 104 __IO uint32_t WORD;
elessair 0:f269e3021894 105 } OPTIONS; /**< 0x40014014 */
elessair 0:f269e3021894 106 __IO uint32_t PANID; /**< 0x40014018 */
elessair 0:f269e3021894 107 __IO uint32_t SHORT_ADDRESS; /**< 0x4001401C */
elessair 0:f269e3021894 108 __IO uint32_t LONG_ADDRESS_HIGH; /**< 0x40014020 */
elessair 0:f269e3021894 109 __IO uint32_t LONG_ADDRESS_LOW; /**< 0x40014024 */
elessair 0:f269e3021894 110 union {
elessair 0:f269e3021894 111 struct {
elessair 0:f269e3021894 112 __IO uint32_t BIT_CLOCK_DIVIDER:8;
elessair 0:f269e3021894 113 __IO uint32_t SYSTEM_CLOCK_DIVIDER:8;
elessair 0:f269e3021894 114 __IO uint32_t CHIP_CLOCK_DIVIDER:8;
elessair 0:f269e3021894 115 } BITS;
elessair 0:f269e3021894 116 __IO uint32_t WORD;
elessair 0:f269e3021894 117 } DIVIDER; /**< 0x40014028 */
elessair 0:f269e3021894 118 union {
elessair 0:f269e3021894 119 struct {
elessair 0:f269e3021894 120 __IO uint32_t RECEIVE_WARMPUP:12;
elessair 0:f269e3021894 121 __IO uint32_t PAD0:4;
elessair 0:f269e3021894 122 __IO uint32_t TRANSMIT_WARMPUP:12;
elessair 0:f269e3021894 123 } BITS;
elessair 0:f269e3021894 124 __IO uint32_t WORD;
elessair 0:f269e3021894 125 } RX_TX_WARMPUPS; /**< 0x4001402c */
elessair 0:f269e3021894 126 union {
elessair 0:f269e3021894 127 struct {
elessair 0:f269e3021894 128 __O uint32_t EC:1;
elessair 0:f269e3021894 129 __O uint32_t ES:1;
elessair 0:f269e3021894 130 __O uint32_t DATA:1;
elessair 0:f269e3021894 131 __O uint32_t FS:1;
elessair 0:f269e3021894 132 __O uint32_t FP:1;
elessair 0:f269e3021894 133 __O uint32_t FMD:1;
elessair 0:f269e3021894 134 #ifdef REVD
elessair 0:f269e3021894 135 __I uint32_t PC:1;
elessair 0:f269e3021894 136 #endif /* REVD */
elessair 0:f269e3021894 137 } BITS;
elessair 0:f269e3021894 138 __O uint32_t WORD;
elessair 0:f269e3021894 139 } CLEAR_IRQ; /**< 0x40014030 */
elessair 0:f269e3021894 140 union {
elessair 0:f269e3021894 141 struct {
elessair 0:f269e3021894 142 __IO uint32_t EC:1;
elessair 0:f269e3021894 143 __IO uint32_t ES:1;
elessair 0:f269e3021894 144 __IO uint32_t DATA:1;
elessair 0:f269e3021894 145 __IO uint32_t FS:1;
elessair 0:f269e3021894 146 __IO uint32_t FP:1;
elessair 0:f269e3021894 147 __IO uint32_t FM:1;
elessair 0:f269e3021894 148 #ifdef REVD
elessair 0:f269e3021894 149 __I uint32_t PC:1;
elessair 0:f269e3021894 150 #endif /* REVD */
elessair 0:f269e3021894 151 } BITS;
elessair 0:f269e3021894 152 __IO uint32_t WORD;
elessair 0:f269e3021894 153 } MASK_IRQ; /**< 0x40014034 */
elessair 0:f269e3021894 154 union {
elessair 0:f269e3021894 155 struct {
elessair 0:f269e3021894 156 __I uint32_t EC:1;
elessair 0:f269e3021894 157 __I uint32_t ES:1;
elessair 0:f269e3021894 158 __I uint32_t DATA:1;
elessair 0:f269e3021894 159 __I uint32_t FS:1;
elessair 0:f269e3021894 160 __I uint32_t FP:1;
elessair 0:f269e3021894 161 __I uint32_t FM:1;
elessair 0:f269e3021894 162 #ifdef REVD
elessair 0:f269e3021894 163 __I uint32_t PC:1;
elessair 0:f269e3021894 164 #endif /* REVD */
elessair 0:f269e3021894 165 } BITS;
elessair 0:f269e3021894 166 __I uint32_t WORD;
elessair 0:f269e3021894 167 } IRQ_STATUS; /**< 0x40014038 */
elessair 0:f269e3021894 168 __O uint32_t PAD1; /**< 0x4001403C */
elessair 0:f269e3021894 169 union {
elessair 0:f269e3021894 170 struct {
elessair 0:f269e3021894 171 __IO uint32_t START:1;
elessair 0:f269e3021894 172 __IO uint32_t STOP:1;
elessair 0:f269e3021894 173 } BITS;
elessair 0:f269e3021894 174 __IO uint32_t WORD;
elessair 0:f269e3021894 175 } TIMER_ENABLE; /**< 0x40014040 */
elessair 0:f269e3021894 176 union {
elessair 0:f269e3021894 177 struct {
elessair 0:f269e3021894 178 __IO uint32_t START:1;
elessair 0:f269e3021894 179 __IO uint32_t STOP:1;
elessair 0:f269e3021894 180 } BITS;
elessair 0:f269e3021894 181 __IO uint32_t WORD;
elessair 0:f269e3021894 182 } TIMER_DISABLE; /**< 0x40014044 */
elessair 0:f269e3021894 183 __IO uint32_t TIMER; /**< 0x40014048 */
elessair 0:f269e3021894 184 __IO uint32_t START_TIME; /**< 0x4001404C */
elessair 0:f269e3021894 185 __IO uint32_t STOP_TIME; /**< 0x40014050 */
elessair 0:f269e3021894 186 union {
elessair 0:f269e3021894 187 struct {
elessair 0:f269e3021894 188 __I uint32_t START:1;
elessair 0:f269e3021894 189 __I uint32_t STOP:1;
elessair 0:f269e3021894 190 } BITS;
elessair 0:f269e3021894 191 __I uint32_t WORD;
elessair 0:f269e3021894 192 } TIMER_STATUS; /**< 0x40014054 */
elessair 0:f269e3021894 193 __I uint32_t PROTOCOL_TIMER; /**< 0x40014058 */
elessair 0:f269e3021894 194 __O uint32_t PAD4; /**< 0x4001405C */
elessair 0:f269e3021894 195 __I uint32_t FINISH_TIME; /**< 0x40014060 */
elessair 0:f269e3021894 196 union {
elessair 0:f269e3021894 197 struct {
elessair 0:f269e3021894 198 __IO uint32_t TX_SLOT_OFFSET:12;
elessair 0:f269e3021894 199 __IO uint32_t PAD0:4;
elessair 0:f269e3021894 200 __IO uint32_t RX_SLOT_OFFSET:12;
elessair 0:f269e3021894 201 } BITS;
elessair 0:f269e3021894 202 __IO uint32_t WORD;
elessair 0:f269e3021894 203 } SLOT_OFFSET; /**< 0x40014064 */
elessair 0:f269e3021894 204 __I uint32_t TIME_STAMP; /**< 0x40014068 */
elessair 0:f269e3021894 205 #ifdef REVB
elessair 0:f269e3021894 206 __O uint32_t PAD5; /**< 0x4001406C */
elessair 0:f269e3021894 207 #endif /* REVB */
elessair 0:f269e3021894 208 union {
elessair 0:f269e3021894 209 struct {
elessair 0:f269e3021894 210 __IO uint32_t CRD_SHORT_ADDRESS:16;
elessair 0:f269e3021894 211 __IO uint32_t PAD0:13;
elessair 0:f269e3021894 212 __IO uint32_t ASSOC_PAN_COORD:1;
elessair 0:f269e3021894 213 __IO uint32_t PAN_COORD_ADDR_L:1;
elessair 0:f269e3021894 214 __IO uint32_t PAN_COORD_ADDR_S:1;
elessair 0:f269e3021894 215 } BITS;
elessair 0:f269e3021894 216 __IO uint32_t WORD;
elessair 0:f269e3021894 217 #ifdef REVB
elessair 0:f269e3021894 218 } CRD_SHORT_ADDR; /**< 0x40014070 */
elessair 0:f269e3021894 219 __IO uint32_t CRD_LONG_ADDR_HI; /**< 0x40014074 */
elessair 0:f269e3021894 220 __IO uint32_t CRD_LONG_ADDR_LO; /**< 0x40014078 */
elessair 0:f269e3021894 221 #endif /* REVB */
elessair 0:f269e3021894 222 #ifdef REVD
elessair 0:f269e3021894 223 } CRD_SHORT_ADDR; /**< 0x4001406C */
elessair 0:f269e3021894 224 __IO uint32_t CRD_LONG_ADDR_HI; /**< 0x40014070 */
elessair 0:f269e3021894 225 __IO uint32_t CRD_LONG_ADDR_LO; /**< 0x40014074 */
elessair 0:f269e3021894 226 __O uint32_t PAD5; /**< 0x40014078 */
elessair 0:f269e3021894 227 #endif /* REVD */
elessair 0:f269e3021894 228 __O uint32_t PAD9; /**< 0x4001407C */
elessair 0:f269e3021894 229 __O uint32_t PAD10; /**< 0x40014080 */
elessair 0:f269e3021894 230 __O uint32_t PAD11; /**< 0x40014084 */
elessair 0:f269e3021894 231 __IO uint32_t RX_LENGTH; /**< 0x40014088 */
elessair 0:f269e3021894 232 union {
elessair 0:f269e3021894 233 struct {
elessair 0:f269e3021894 234 __IO uint32_t TXLENGTH:7;
elessair 0:f269e3021894 235 __O uint32_t PAD0:1;
elessair 0:f269e3021894 236 __IO uint32_t TX_PRE_CHIPS:4;
elessair 0:f269e3021894 237 } BITS;
elessair 0:f269e3021894 238 __IO uint32_t WORD;
elessair 0:f269e3021894 239 } TX_LENGTH; /**< 0x4001408C */
elessair 0:f269e3021894 240 __IO uint32_t TX_SEQ_NUMBER; /**< 0x40014090 */
elessair 0:f269e3021894 241 __IO uint32_t TX_ACK_DELAY; /**< 0x40014094 */
elessair 0:f269e3021894 242 union {
elessair 0:f269e3021894 243 struct {
elessair 0:f269e3021894 244 __IO uint32_t RXACKDELAY:12;
elessair 0:f269e3021894 245 __IO uint32_t PAD0:4;
elessair 0:f269e3021894 246 __IO uint32_t RXAUTODELAY:12;
elessair 0:f269e3021894 247 } BITS;
elessair 0:f269e3021894 248 __IO uint32_t WORD;
elessair 0:f269e3021894 249 } RX_ACK_DELAY; /**< 0x40014098 */
elessair 0:f269e3021894 250 __IO uint32_t TX_FLUSH; /**< 0x4001409C */
elessair 0:f269e3021894 251 union {
elessair 0:f269e3021894 252 struct {
elessair 0:f269e3021894 253 __IO uint32_t CCA_DELAY:12;
elessair 0:f269e3021894 254 __IO uint32_t PAD0:4;
elessair 0:f269e3021894 255 __IO uint32_t CCA_LENGTH:12;
elessair 0:f269e3021894 256 } BITS;
elessair 0:f269e3021894 257 __IO uint32_t WORD;
elessair 0:f269e3021894 258 } CCA; /**< 0x400140A0 */
elessair 0:f269e3021894 259 union {
elessair 0:f269e3021894 260 struct {
elessair 0:f269e3021894 261 __IO uint32_t RXACK_END:12;
elessair 0:f269e3021894 262 __IO uint32_t PAD0:4;
elessair 0:f269e3021894 263 __IO uint32_t RXSLOTTED_END:12;
elessair 0:f269e3021894 264 } BITS;
elessair 0:f269e3021894 265 __IO uint32_t WORD;
elessair 0:f269e3021894 266 } ACK_STOP; /**< 0x400140A4 */
elessair 0:f269e3021894 267 __IO uint32_t TXCCA; /**< 0x400140A8 */
elessair 0:f269e3021894 268 __IO uint32_t ADDR_L_LOC; /**< 0x400140AC */
elessair 0:f269e3021894 269 __IO uint32_t ADDR_S_LOC; /**< 0x400140B0 */
elessair 0:f269e3021894 270 __IO uint32_t FRAME_MATCH_RESULT; /**< 0x400140B4 */
elessair 0:f269e3021894 271 __IO uint32_t FRAME_MATCH_ADDR_L; /**< 0x400140B8 */
elessair 0:f269e3021894 272 __IO uint32_t FRAME_MATCH_ADDR_S; /**< 0x400140BC */
elessair 0:f269e3021894 273 union {
elessair 0:f269e3021894 274 struct {
elessair 0:f269e3021894 275 __IO uint32_t AA:1;
elessair 0:f269e3021894 276 __IO uint32_t AFA:1;
elessair 0:f269e3021894 277 __IO uint32_t PRE:1;
elessair 0:f269e3021894 278 __IO uint32_t PAD0:25;
elessair 0:f269e3021894 279 __IO uint32_t GAIN_START:4;
elessair 0:f269e3021894 280 } BITS;
elessair 0:f269e3021894 281 __IO uint32_t WORD;
elessair 0:f269e3021894 282 } AGC_CONTROL; /**< 0x400140C0 */
elessair 0:f269e3021894 283 union {
elessair 0:f269e3021894 284 struct {
elessair 0:f269e3021894 285 __IO uint32_t SETTLE_DELAY:8;
elessair 0:f269e3021894 286 __IO uint32_t MEASURE_DELAY:8;
elessair 0:f269e3021894 287 __IO uint32_t DIVIDER:8;
elessair 0:f269e3021894 288 __IO uint32_t HIGH_THRESHOLD:4;
elessair 0:f269e3021894 289 __IO uint32_t LOW_THRESHOLD:4;
elessair 0:f269e3021894 290 } BITS;
elessair 0:f269e3021894 291 __IO uint32_t WORD;
elessair 0:f269e3021894 292 } AGC_SETTINGS; /**< 0x400140C4 */
elessair 0:f269e3021894 293 union {
elessair 0:f269e3021894 294 struct {
elessair 0:f269e3021894 295 __IO uint32_t GC1:3;
elessair 0:f269e3021894 296 __IO uint32_t GC2:3;
elessair 0:f269e3021894 297 __IO uint32_t GC3:1;
elessair 0:f269e3021894 298 __IO uint32_t PAD:1;
elessair 0:f269e3021894 299 __IO uint32_t AGC_STATE:4;
elessair 0:f269e3021894 300 } BITS;
elessair 0:f269e3021894 301 __IO uint32_t WORD;
elessair 0:f269e3021894 302 } AGC_STATUS; /**< 0x400140C8 */
elessair 0:f269e3021894 303 union {
elessair 0:f269e3021894 304 struct {
elessair 0:f269e3021894 305 __IO uint32_t GAIN3:7;
elessair 0:f269e3021894 306 __IO uint32_t PAD0:1;
elessair 0:f269e3021894 307 __IO uint32_t GAIN2:7;
elessair 0:f269e3021894 308 __IO uint32_t PAD1:1;
elessair 0:f269e3021894 309 __IO uint32_t GAIN1:7;
elessair 0:f269e3021894 310 __IO uint32_t PAD2:1;
elessair 0:f269e3021894 311 __IO uint32_t GAIN0:7;
elessair 0:f269e3021894 312 __IO uint32_t PAD3:1;
elessair 0:f269e3021894 313 } BITS;
elessair 0:f269e3021894 314 __IO uint32_t WORD;
elessair 0:f269e3021894 315 } AGC_GAIN_TABLE0; /**< 0x400140CC */
elessair 0:f269e3021894 316 union {
elessair 0:f269e3021894 317 struct {
elessair 0:f269e3021894 318 __IO uint32_t GAIN7:7;
elessair 0:f269e3021894 319 __IO uint32_t PAD0:1;
elessair 0:f269e3021894 320 __IO uint32_t GAIN6:7;
elessair 0:f269e3021894 321 __IO uint32_t PAD1:1;
elessair 0:f269e3021894 322 __IO uint32_t GAIN5:7;
elessair 0:f269e3021894 323 __IO uint32_t PAD2:1;
elessair 0:f269e3021894 324 __IO uint32_t GAIN4:7;
elessair 0:f269e3021894 325 __IO uint32_t PAD3:1;
elessair 0:f269e3021894 326 } BITS;
elessair 0:f269e3021894 327 __IO uint32_t WORD;
elessair 0:f269e3021894 328 } AGC_GAIN_TABLE1; /**< 0x400140D0 */
elessair 0:f269e3021894 329 union {
elessair 0:f269e3021894 330 struct {
elessair 0:f269e3021894 331 __IO uint32_t GAIN11:7;
elessair 0:f269e3021894 332 __IO uint32_t PAD0:1;
elessair 0:f269e3021894 333 __IO uint32_t GAIN10:7;
elessair 0:f269e3021894 334 __IO uint32_t PAD1:1;
elessair 0:f269e3021894 335 __IO uint32_t GAIN9:7;
elessair 0:f269e3021894 336 __IO uint32_t PAD2:1;
elessair 0:f269e3021894 337 __IO uint32_t GAIN8:7;
elessair 0:f269e3021894 338 __IO uint32_t PAD3:1;
elessair 0:f269e3021894 339 } BITS;
elessair 0:f269e3021894 340 __IO uint32_t WORD;
elessair 0:f269e3021894 341 } AGC_GAIN_TABLE2; /**< 0x400140D4 */
elessair 0:f269e3021894 342 union {
elessair 0:f269e3021894 343 struct {
elessair 0:f269e3021894 344 __IO uint32_t GAIN15:7;
elessair 0:f269e3021894 345 __IO uint32_t PAD0:1;
elessair 0:f269e3021894 346 __IO uint32_t GAIN14:7;
elessair 0:f269e3021894 347 __IO uint32_t PAD1:1;
elessair 0:f269e3021894 348 __IO uint32_t GAIN13:7;
elessair 0:f269e3021894 349 __IO uint32_t PAD2:1;
elessair 0:f269e3021894 350 __IO uint32_t GAIN12:7;
elessair 0:f269e3021894 351 __IO uint32_t PAD3:1;
elessair 0:f269e3021894 352 } BITS;
elessair 0:f269e3021894 353 __IO uint32_t WORD;
elessair 0:f269e3021894 354 } AGC_GAIN_TABLE3; /**< 0x400140D8 */
elessair 0:f269e3021894 355 } MacHwReg_t, *MacHwReg_pt;
elessair 0:f269e3021894 356
elessair 0:f269e3021894 357 /** macHw register map (demodulator part) */
elessair 0:f269e3021894 358 typedef struct {
elessair 0:f269e3021894 359 union {
elessair 0:f269e3021894 360 struct {
elessair 0:f269e3021894 361 __IO uint32_t DRC:1; /**< Reserved */
elessair 0:f269e3021894 362 __IO uint32_t SWIQ:1; /**< Compensation for quadrature polarity. (set to 1 for RevB) */
elessair 0:f269e3021894 363 __IO uint32_t LIF:1; /**< Allows the receiver to use a low-IF frequency of +1.23 MHz (0) or -1.23 MHz (1). */
elessair 0:f269e3021894 364 __IO uint32_t PM:1; /**< Preamble Mode: Mode 0 (high sensitivity) – Preamble detection is based on observation of a regular pattern of correlation peaks over a span of 5 consecutive symbol periods. Each symbol period produces a time index and frequency index corresponding to the largest correlation peak. If 4 out of 5 symbol periods produce time/frequency index values that meet a set of similarity criteria, then preamble detection is declared. This mode improves preamble detection rate by tolerating one corrupt correlation result in the span of 5 symbols. However, the relaxed detection rule allows a higher rate of false preamble detection when no signal is present. Mode 1 (low false detection) – Preamble detection is based on a span of 4 consecutive symbol periods. Each symbol period produces a time index and frequency index corresponding to the largest correlation peak. If all four symbol periods produce time/frequency index values that meet a set of similarity criteria, then preamble detection is declared. This mode enforces a more strict detection rule and therefore offers lower rate of false preamble detection at the expense of higher missed detection. */
elessair 0:f269e3021894 365 __IO uint32_t ASM:1; /**< This bit determines whether antenna selection is automatic (1) or manual (0). For applications that do not use antenna diversity, this bit should be set to 0. */
elessair 0:f269e3021894 366 __IO uint32_t AS:1; /**< If automatic antenna selection mode is used, this bit determines the initial antenna selection. If manual antenna selection mode is used, this bit determines the antenna selection, 0 or 1. */
elessair 0:f269e3021894 367 __IO uint32_t DTC:1; /**< Sets the decay time constant used in the RSSI calculation and Digital Gain Control functions. 0: Time constant set to 1 symbol period. This produces a slower response time but more stable RSSI values. Not recommended for use with antenna diversity. 1: Time constant set to 1/4th of a symbol period. This produces a faster response with slightly more variance in the RSSI calculation. Recommended for most cases. */
elessair 0:f269e3021894 368 __IO uint32_t PAD1:9;
elessair 0:f269e3021894 369 __IO uint32_t DFR:16; /**<Selectively enables individual frequency offsets used during preamble search. Each of the 15 bits in this field corresponds to one of 15 different frequency offsets. A bit value of 0 removes a specific frequency offset from the search, while a bit value of 1 includes the frequency offset in the search. */
elessair 0:f269e3021894 370 } BITS;
elessair 0:f269e3021894 371 __IO uint32_t WORD;
elessair 0:f269e3021894 372 } DMD_CONTROL0; /**< 0x40014100 */
elessair 0:f269e3021894 373 union {
elessair 0:f269e3021894 374 struct {
elessair 0:f269e3021894 375 __IO uint32_t DST:4; /**< This value specifies the SFD search period in symbols. After preamble detection, the demodulator begins symbol recovery and searches for the start-of-frame delimiter (SFD). If the SFD is not found within the number of symbols specified, the preamble detection flag is cleared and a new preamble search is initiated. The default value of 8 symbols should be sufficient for 802.15.4 compliant applications. Default 8 */
elessair 0:f269e3021894 376 __IO uint32_t PAD0:4;
elessair 0:f269e3021894 377 __IO uint32_t DPT:6; /**< The similarity criteria used for preamble detection includes a rule that all time index values must occupy a span equal to or less than this value. The default span of 0011 means that the correlation peaks must span a range of 3Ts, where Ts is the sample period = 0.25 µs. This value is recommended for typical multipath conditions. Very long-range applications may benefit from a higher value. Default 3 */
elessair 0:f269e3021894 378 __IO uint32_t PAD1:2;
elessair 0:f269e3021894 379 __IO uint32_t DPF:4; /**< The similarity criteria used for preamble detection includes a rule that all frequency index values must occupy a span equal to or less than this value. The default span of 0001 means that the difference between largest frequency index and smallest frequency index must be less than or equal to 1. Default 1 */
elessair 0:f269e3021894 380 __IO uint32_t PAD2:4;
elessair 0:f269e3021894 381 __IO uint32_t DCT:4; /**< In order for preamble detection to be declared, the correlation peaks must exceed a threshold. The threshold is computed dynamically and includes a programmable scale factor: 1 + bit[27]/2 + bit[26]/4 + bit[25]/8 + bit[24]/16 The default value of 1.5 is recommended for manual-antenna selection, while a value of 1.75 is recommended for automatic antenna selection. */
elessair 0:f269e3021894 382
elessair 0:f269e3021894 383 } BITS;
elessair 0:f269e3021894 384 __IO uint32_t WORD;
elessair 0:f269e3021894 385 } DMD_CONTROL1; /**< 0x40014104 */
elessair 0:f269e3021894 386 union {
elessair 0:f269e3021894 387 struct {
elessair 0:f269e3021894 388 __IO uint32_t RSSI_THRESHOLD:8; /**< Threshold value used to determine clear channel assessment (CCA) result. The channel is declared busy if RSSI > threshold. Default 0xFF */
elessair 0:f269e3021894 389 __IO uint32_t RSSI_OFFSET:6; /**< Calibration constant added to the RSSI calculation. The 6-bit field is treated as a signed value in two’s complement format with values from -32 to +31 dB. */
elessair 0:f269e3021894 390 } BITS;
elessair 0:f269e3021894 391 __IO uint32_t WORD;
elessair 0:f269e3021894 392 } DMD_CONTROL2; /**< 0x40014108 */
elessair 0:f269e3021894 393 union {
elessair 0:f269e3021894 394 struct {
elessair 0:f269e3021894 395 __I uint32_t RSSI_VALUE:8; /**< The value is captured at the end of packet reception or at the end of ED/CCA measurements and is interpreted in dBm as follows: 00000000 -> 0127dBm (or below) ... 01111111 -> 0dBm (or above) */
elessair 0:f269e3021894 396 __I uint32_t FREQUENCY_OFFSET:4; /**< Frequency correction applied to the received packet. The value is captured at the end of packet reception or at the end of ED/CCA measurements. */
elessair 0:f269e3021894 397 __I uint32_t ANT:1; /**< Antenna used for reception. The value is captured at the end of packet reception or at the end of ED/CCA measurements. */
elessair 0:f269e3021894 398 __I uint32_t PAD0:3;
elessair 0:f269e3021894 399 __I uint32_t RSSI_COMPONENT:4; /**< Magnitude of the baseband digital signal (units are dB relative to A/D saturation). The value is updated until AGC is frozen. The value is captured at the end of packet reception or at the end of ED/CCA measurements. */
elessair 0:f269e3021894 400 } BITS;
elessair 0:f269e3021894 401 __I uint32_t WORD;
elessair 0:f269e3021894 402 } DMD_STATUS; /**< 0x4001410C */
elessair 0:f269e3021894 403 } DmdReg_t, *DmdReg_pt;
elessair 0:f269e3021894 404
elessair 0:f269e3021894 405 #endif /* MACHW_MAP_H_ */