mbed-os
Fork of mbed-os by
targets/TARGET_ONSEMI/TARGET_NCS36510/i2c.h@1:3deb71413561, 2017-07-20 (annotated)
- Committer:
- xuaner
- Date:
- Thu Jul 20 14:26:57 2017 +0000
- Revision:
- 1:3deb71413561
- Parent:
- 0:f269e3021894
mbed_os
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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elessair | 0:f269e3021894 | 1 | /** |
elessair | 0:f269e3021894 | 2 | ****************************************************************************** |
elessair | 0:f269e3021894 | 3 | * @file i2c.h |
elessair | 0:f269e3021894 | 4 | * @brief (API) Public header of i2c driver |
elessair | 0:f269e3021894 | 5 | * @internal |
elessair | 0:f269e3021894 | 6 | * @author ON Semiconductor |
elessair | 0:f269e3021894 | 7 | * $Rev: $ |
elessair | 0:f269e3021894 | 8 | * $Date: 2016-04-20 $ |
elessair | 0:f269e3021894 | 9 | ****************************************************************************** |
elessair | 0:f269e3021894 | 10 | * Copyright 2016 Semiconductor Components Industries LLC (d/b/a ON Semiconductor). |
elessair | 0:f269e3021894 | 11 | * All rights reserved. This software and/or documentation is licensed by ON Semiconductor |
elessair | 0:f269e3021894 | 12 | * under limited terms and conditions. The terms and conditions pertaining to the software |
elessair | 0:f269e3021894 | 13 | * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf |
elessair | 0:f269e3021894 | 14 | * (ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software) and |
elessair | 0:f269e3021894 | 15 | * if applicable the software license agreement. Do not use this software and/or |
elessair | 0:f269e3021894 | 16 | * documentation unless you have carefully read and you agree to the limited terms and |
elessair | 0:f269e3021894 | 17 | * conditions. By using this software and/or documentation, you agree to the limited |
elessair | 0:f269e3021894 | 18 | * terms and conditions. |
elessair | 0:f269e3021894 | 19 | * |
elessair | 0:f269e3021894 | 20 | * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
elessair | 0:f269e3021894 | 21 | * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF |
elessair | 0:f269e3021894 | 22 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. |
elessair | 0:f269e3021894 | 23 | * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, |
elessair | 0:f269e3021894 | 24 | * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. |
elessair | 0:f269e3021894 | 25 | * @endinternal |
elessair | 0:f269e3021894 | 26 | * |
elessair | 0:f269e3021894 | 27 | * @ingroup i2c |
elessair | 0:f269e3021894 | 28 | */ |
elessair | 0:f269e3021894 | 29 | |
elessair | 0:f269e3021894 | 30 | #include "mbed_assert.h" |
elessair | 0:f269e3021894 | 31 | #include "i2c_api.h" |
elessair | 0:f269e3021894 | 32 | #include "clock.h" |
elessair | 0:f269e3021894 | 33 | #include "i2c_ipc7208_map.h" |
elessair | 0:f269e3021894 | 34 | #include "memory_map.h" |
elessair | 0:f269e3021894 | 35 | #include "PeripheralPins.h" |
elessair | 0:f269e3021894 | 36 | |
elessair | 0:f269e3021894 | 37 | #ifndef I2C_H_ |
elessair | 0:f269e3021894 | 38 | #define I2C_H_ |
elessair | 0:f269e3021894 | 39 | |
elessair | 0:f269e3021894 | 40 | /* Miscellaneous I/O and control operations codes */ |
elessair | 0:f269e3021894 | 41 | #define I2C_IPC7208_IOCTL_NOT_ACK 0x03 |
elessair | 0:f269e3021894 | 42 | #define I2C_IPC7208_IOCTL_NULL_CMD 0x04 |
elessair | 0:f269e3021894 | 43 | #define I2C_IPC7208_IOCTL_ACK 0x05 |
elessair | 0:f269e3021894 | 44 | |
elessair | 0:f269e3021894 | 45 | /* Definitions for the clock speed. */ |
elessair | 0:f269e3021894 | 46 | #define I2C_SPEED_100K_AT_8MHZ (uint8_t)0x12 |
elessair | 0:f269e3021894 | 47 | #define I2C_SPEED_100K_AT_16MHZ (uint8_t)0x26 |
elessair | 0:f269e3021894 | 48 | #define I2C_SPEED_400K_AT_8MHZ (uint8_t)0x03 |
elessair | 0:f269e3021894 | 49 | #define I2C_SPEED_400K_AT_16MHZ (uint8_t)0x08 |
elessair | 0:f269e3021894 | 50 | |
elessair | 0:f269e3021894 | 51 | |
elessair | 0:f269e3021894 | 52 | /* I2C commands */ |
elessair | 0:f269e3021894 | 53 | #define I2C_CMD_NULL 0x00 |
elessair | 0:f269e3021894 | 54 | #define I2C_CMD_WDAT0 0x10 |
elessair | 0:f269e3021894 | 55 | #define I2C_CMD_WDAT1 0x11 |
elessair | 0:f269e3021894 | 56 | #define I2C_CMD_WDAT8 0x12 |
elessair | 0:f269e3021894 | 57 | #define I2C_CMD_RDAT8 0x13 |
elessair | 0:f269e3021894 | 58 | #define I2C_CMD_STOP 0x14 |
elessair | 0:f269e3021894 | 59 | #define I2C_CMD_START 0x15 |
elessair | 0:f269e3021894 | 60 | #define I2C_CMD_VRFY_ACK 0x16 |
elessair | 0:f269e3021894 | 61 | #define I2C_CMD_VRFY_VACK 0x17 |
elessair | 0:f269e3021894 | 62 | |
elessair | 0:f269e3021894 | 63 | /* Status register bits */ |
elessair | 0:f269e3021894 | 64 | #define I2C_STATUS_CMD_FIFO_MPTY_BIT 0x01 |
elessair | 0:f269e3021894 | 65 | #define I2C_STATUS_RD_DATA_RDY_BIT 0x02 |
elessair | 0:f269e3021894 | 66 | #define I2C_STATUS_BUS_ERR_BIT 0x04 |
elessair | 0:f269e3021894 | 67 | #define I2C_STATUS_RD_DATA_UFL_BIT 0x08 |
elessair | 0:f269e3021894 | 68 | #define I2C_STATUS_CMD_FIFO_OFL_BIT 0x10 |
elessair | 0:f269e3021894 | 69 | #define I2C_STATUS_CMD_FIFO_FULL_BIT 0x20 |
elessair | 0:f269e3021894 | 70 | |
elessair | 0:f269e3021894 | 71 | /* I2C return status */ |
elessair | 0:f269e3021894 | 72 | #define I2C_STATUS_INVALID 0xFF |
elessair | 0:f269e3021894 | 73 | #define I2C_STATUS_SUCCESS 0x00 |
elessair | 0:f269e3021894 | 74 | #define I2C_STATUS_FAIL 0x01 |
elessair | 0:f269e3021894 | 75 | #define I2C_STATUS_BUS_ERROR 0x02 |
elessair | 0:f269e3021894 | 76 | #define I2C_STATUS_RD_DATA_UFL 0x03 |
elessair | 0:f269e3021894 | 77 | #define I2C_STATUS_CMD_FIFO_OFL 0x04 |
elessair | 0:f269e3021894 | 78 | #define I2C_STATUS_INTERRUPT_ERROR 0x05 |
elessair | 0:f269e3021894 | 79 | #define I2C_STATUS_CMD_FIFO_EMPTY 0x06 |
elessair | 0:f269e3021894 | 80 | |
elessair | 0:f269e3021894 | 81 | /* I2C clock divider position */ |
elessair | 0:f269e3021894 | 82 | #define I2C_CLOCKDIVEDER_VAL_MASK 0x1F |
elessair | 0:f269e3021894 | 83 | #define I2C_APB_CLK_DIVIDER_VAL_MASK 0x1FE0 |
elessair | 0:f269e3021894 | 84 | |
elessair | 0:f269e3021894 | 85 | /* Error check */ |
elessair | 0:f269e3021894 | 86 | #define I2C_UFL_CHECK (d->membase->STATUS.WORD & 0x80) |
elessair | 0:f269e3021894 | 87 | #define FIFO_OFL_CHECK (d->membase->STATUS.WORD & 0x10) |
elessair | 0:f269e3021894 | 88 | #define I2C_BUS_ERR_CHECK (d->membase->STATUS.WORD & 0x04) |
elessair | 0:f269e3021894 | 89 | #define RD_DATA_READY (d->membase->STATUS.WORD & 0x02) |
elessair | 0:f269e3021894 | 90 | |
elessair | 0:f269e3021894 | 91 | #define I2C_API_STATUS_SUCCESS 0 |
elessair | 0:f269e3021894 | 92 | #define PAD_REG_ADRS_BYTE_SIZE 4 |
elessair | 0:f269e3021894 | 93 | |
elessair | 0:f269e3021894 | 94 | /** Init I2C device. |
elessair | 0:f269e3021894 | 95 | * @details |
elessair | 0:f269e3021894 | 96 | * Sets the necessary registers. The baud rate is set default to 100K |
elessair | 0:f269e3021894 | 97 | * |
elessair | 0:f269e3021894 | 98 | * @param obj A I2C device instance. |
elessair | 0:f269e3021894 | 99 | * @param sda GPIO number for SDA line |
elessair | 0:f269e3021894 | 100 | * @param scl GPIO number for SCL line |
elessair | 0:f269e3021894 | 101 | * @return None |
elessair | 0:f269e3021894 | 102 | */ |
elessair | 0:f269e3021894 | 103 | extern void fI2cInit(i2c_t *obj,PinName sda,PinName scl); |
elessair | 0:f269e3021894 | 104 | |
elessair | 0:f269e3021894 | 105 | /** Set baud rate or frequency |
elessair | 0:f269e3021894 | 106 | * @details |
elessair | 0:f269e3021894 | 107 | * Sets user baudrate |
elessair | 0:f269e3021894 | 108 | * |
elessair | 0:f269e3021894 | 109 | * @param obj A I2C device instance. |
elessair | 0:f269e3021894 | 110 | * @param hz User desired baud rate/frequency |
elessair | 0:f269e3021894 | 111 | * @return None |
elessair | 0:f269e3021894 | 112 | */ |
elessair | 0:f269e3021894 | 113 | extern void fI2cFrequency(i2c_t *obj, uint32_t hz); |
elessair | 0:f269e3021894 | 114 | |
elessair | 0:f269e3021894 | 115 | /** Sends start bit |
elessair | 0:f269e3021894 | 116 | * @details |
elessair | 0:f269e3021894 | 117 | * Sends start bit on i2c pins |
elessair | 0:f269e3021894 | 118 | * |
elessair | 0:f269e3021894 | 119 | * @param obj A I2C device instance. |
elessair | 0:f269e3021894 | 120 | * @return status |
elessair | 0:f269e3021894 | 121 | */ |
elessair | 0:f269e3021894 | 122 | extern int32_t fI2cStart(i2c_t *obj); |
elessair | 0:f269e3021894 | 123 | |
elessair | 0:f269e3021894 | 124 | /** Sends stop bit |
elessair | 0:f269e3021894 | 125 | * @details |
elessair | 0:f269e3021894 | 126 | * Sends stop bit on i2c pins |
elessair | 0:f269e3021894 | 127 | * |
elessair | 0:f269e3021894 | 128 | * @param obj A I2C device instance. |
elessair | 0:f269e3021894 | 129 | * @return status |
elessair | 0:f269e3021894 | 130 | */ |
elessair | 0:f269e3021894 | 131 | extern int32_t fI2cStop(i2c_t *obj); |
elessair | 0:f269e3021894 | 132 | |
elessair | 0:f269e3021894 | 133 | /** Reads data from a I2C device in blocking fashion. |
elessair | 0:f269e3021894 | 134 | * @details |
elessair | 0:f269e3021894 | 135 | * The data is read from the receive queue into the buffer. The receive queue is |
elessair | 0:f269e3021894 | 136 | * filled by the interrupt handler. If not enough data is available, |
elessair | 0:f269e3021894 | 137 | * |
elessair | 0:f269e3021894 | 138 | * @param d The device to read from. |
elessair | 0:f269e3021894 | 139 | * @param buf The buffer to read into (only the contents of the buffer may be modified, not the buffer itself). |
elessair | 0:f269e3021894 | 140 | * @param len The maximum number of bytes to read, typically the buffer length. |
elessair | 0:f269e3021894 | 141 | * @return On Success: The actual number of bytes read. On Failure: Failure code. |
elessair | 0:f269e3021894 | 142 | */ |
elessair | 0:f269e3021894 | 143 | extern int32_t fI2cReadB(i2c_t *d, char *buf, int len); |
elessair | 0:f269e3021894 | 144 | |
elessair | 0:f269e3021894 | 145 | /** Write data to an I2C device. |
elessair | 0:f269e3021894 | 146 | * @details |
elessair | 0:f269e3021894 | 147 | * The commands(I2C instructions) and data arrive at the I2C Engine via the Command FIFO. |
elessair | 0:f269e3021894 | 148 | * The command to write the data & data to be written is sent to command FIFO by writing it into command register. |
elessair | 0:f269e3021894 | 149 | * |
elessair | 0:f269e3021894 | 150 | * @param d The device to write to. |
elessair | 0:f269e3021894 | 151 | * @param buf The buffer to write from (the contents of the buffer may not be modified). |
elessair | 0:f269e3021894 | 152 | * @param len The number of bytes to write. |
elessair | 0:f269e3021894 | 153 | * @return On success: The actual number of bytes written. On Failure: Failure code |
elessair | 0:f269e3021894 | 154 | */ |
elessair | 0:f269e3021894 | 155 | extern int32_t fI2cWriteB(i2c_t *d, const char *buf, int len); |
elessair | 0:f269e3021894 | 156 | |
elessair | 0:f269e3021894 | 157 | #endif /* I2C_H_ */ |