mbed-os

Fork of mbed-os by erkin yucel

Committer:
xuaner
Date:
Thu Jul 20 14:26:57 2017 +0000
Revision:
1:3deb71413561
Parent:
0:f269e3021894
mbed_os

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elessair 0:f269e3021894 1 /**
elessair 0:f269e3021894 2 ******************************************************************************
elessair 0:f269e3021894 3 * @file aes_map.h
elessair 0:f269e3021894 4 * @brief AES HW register map
elessair 0:f269e3021894 5 * @internal
elessair 0:f269e3021894 6 * @author ON Semiconductor.
elessair 0:f269e3021894 7 * $Rev: 2110 $
elessair 0:f269e3021894 8 * $Date: 2013-07-16 20:13:03 +0530 (Tue, 16 Jul 2013) $
elessair 0:f269e3021894 9 ******************************************************************************
elessair 0:f269e3021894 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
elessair 0:f269e3021894 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
elessair 0:f269e3021894 12 * under limited terms and conditions. The terms and conditions pertaining to the software
elessair 0:f269e3021894 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
elessair 0:f269e3021894 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
elessair 0:f269e3021894 15 * if applicable the software license agreement. Do not use this software and/or
elessair 0:f269e3021894 16 * documentation unless you have carefully read and you agree to the limited terms and
elessair 0:f269e3021894 17 * conditions. By using this software and/or documentation, you agree to the limited
elessair 0:f269e3021894 18 * terms and conditions.
elessair 0:f269e3021894 19 *
elessair 0:f269e3021894 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
elessair 0:f269e3021894 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
elessair 0:f269e3021894 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
elessair 0:f269e3021894 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
elessair 0:f269e3021894 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
elessair 0:f269e3021894 25 * @endinternal
elessair 0:f269e3021894 26 *
elessair 0:f269e3021894 27 * @ingroup aes
elessair 0:f269e3021894 28 *
elessair 0:f269e3021894 29 * @details
elessair 0:f269e3021894 30 * <p>
elessair 0:f269e3021894 31 * AES HW register map description
elessair 0:f269e3021894 32 * </p>
elessair 0:f269e3021894 33 */
elessair 0:f269e3021894 34
elessair 0:f269e3021894 35 #if defined ( __CC_ARM )
elessair 0:f269e3021894 36 #pragma anon_unions
elessair 0:f269e3021894 37 #endif
elessair 0:f269e3021894 38
elessair 0:f269e3021894 39 #ifndef AES_MAP_H_
elessair 0:f269e3021894 40 #define AES_MAP_H_
elessair 0:f269e3021894 41
elessair 0:f269e3021894 42 #include "architecture.h"
elessair 0:f269e3021894 43
elessair 0:f269e3021894 44 /** AES Encryption HW Structure Overlay */
elessair 0:f269e3021894 45 typedef struct {
elessair 0:f269e3021894 46 __IO uint32_t KEY0; /**< Bits[31:00] of the 128-bit key */
elessair 0:f269e3021894 47 __IO uint32_t KEY1; /**< Bits[63:32] of the 128-bit key */
elessair 0:f269e3021894 48 __IO uint32_t KEY2; /**< Bits[95:64] of the 128-bit key */
elessair 0:f269e3021894 49 __IO uint32_t KEY3; /**< Bits[127:96] of the 128-bit key */
elessair 0:f269e3021894 50 __IO uint32_t KEY4; /**< Bits[159:128] of the 256-bit key */
elessair 0:f269e3021894 51 __IO uint32_t KEY5; /**< Bits[191:160] of the 256-bit key */
elessair 0:f269e3021894 52 __IO uint32_t KEY6; /**< Bits[223:192] of the 256-bit key */
elessair 0:f269e3021894 53 __IO uint32_t KEY7; /**< Bits[255:224] of the 256-bit key */
elessair 0:f269e3021894 54
elessair 0:f269e3021894 55 __IO uint32_t CNTi0; /**< Bits[31:00] of the 128-bit counter value used in counter mode */
elessair 0:f269e3021894 56 __IO uint32_t CNTi1; /**< Bits[63:32] of the 128-bit counter value used in counter mode */
elessair 0:f269e3021894 57 __IO uint32_t CNTi2; /**< Bits[95:64] of the 128-bit counter value used in counter mode */
elessair 0:f269e3021894 58 __IO uint32_t CNTi3; /**< Bits[127:96] of the 128-bit counter value used in counter mode */
elessair 0:f269e3021894 59 __I uint32_t CNTo0; /**< Bits[31:00] of the 128-bit counter result */
elessair 0:f269e3021894 60 __I uint32_t CNTo1; /**< Bits[63:32] of the 128-bit counter result */
elessair 0:f269e3021894 61 __I uint32_t CNTo2; /**< Bits[95:64] of the 128-bit counter result */
elessair 0:f269e3021894 62 __I uint32_t CNTo3; /**< Bits[127:96] of the 128-bit counter result */
elessair 0:f269e3021894 63
elessair 0:f269e3021894 64 __I uint32_t CBCo0; /**< Bits[31:00] of the 128-bit CBC result */
elessair 0:f269e3021894 65 __I uint32_t CBCo1; /**< Bits[63:32] of the 128-bit CBC result */
elessair 0:f269e3021894 66 __I uint32_t CBCo2; /**< Bits[95:64] of the 128-bit CBC result */
elessair 0:f269e3021894 67 __I uint32_t CBCo3; /**< Bits[127:96] of the 128-bit CBC result */
elessair 0:f269e3021894 68 union {
elessair 0:f269e3021894 69 struct {
elessair 0:f269e3021894 70 __O uint32_t START:1; /**< start the encryption : 0 = no-effect , 1 = enable */
elessair 0:f269e3021894 71 __O uint32_t ACC_CLR:1; /**< Clear the CBC accumulator : 0 = no-effect 1 = clears the CBC accumulator */
elessair 0:f269e3021894 72 __O uint32_t INT_CLEAR:1; /**< interrupt clear : 0 = no-effect 1 = clear the interrupt */
elessair 0:f269e3021894 73 __O uint32_t KEY_LENGTH:1; /**< Key Length: 0 = 128 Bit Encryption 1 = 256 Bit Encryption */
elessair 0:f269e3021894 74 } BITS;
elessair 0:f269e3021894 75 __O uint32_t WORD;
elessair 0:f269e3021894 76 } CTL;
elessair 0:f269e3021894 77 union {
elessair 0:f269e3021894 78 struct {
elessair 0:f269e3021894 79 __IO uint32_t CBC_MODE:1; /**< counter mode : 0 = counter mode , 1 = CBC mode */
elessair 0:f269e3021894 80 __IO uint32_t BYPASS:1; /**< encryption : 0 = Normal Mode , 1 = Bypasss any encryption */
elessair 0:f269e3021894 81 __IO uint32_t INT_EN:1; /**< interrupt mask : 0 = disabled 1 = enabled */
elessair 0:f269e3021894 82 } BITS;
elessair 0:f269e3021894 83 __IO uint32_t WORD;
elessair 0:f269e3021894 84 } MODE;
elessair 0:f269e3021894 85 union {
elessair 0:f269e3021894 86 struct {
elessair 0:f269e3021894 87 __I uint32_t COMPLETE:1;/**< status : 0 = not complete , 1 = complete */
elessair 0:f269e3021894 88 } BITS;
elessair 0:f269e3021894 89 __IO uint32_t WORD;
elessair 0:f269e3021894 90 } STAT;
elessair 0:f269e3021894 91
elessair 0:f269e3021894 92 __O uint32_t MAC_INIT0; /**< Bits[31:00] of the CBC Initialization Vector */
elessair 0:f269e3021894 93 __O uint32_t MAC_INIT1; /**< Bits[63:32] of the CBC Initialization Vector */
elessair 0:f269e3021894 94 __O uint32_t MAC_INIT2; /**< Bits[95:64] of the CBC Initialization Vector */
elessair 0:f269e3021894 95 __O uint32_t MAC_INIT3; /**< Bits[127:96] of the CBC Initialization Vector */
elessair 0:f269e3021894 96
elessair 0:f269e3021894 97 __IO uint32_t RESERVED;
elessair 0:f269e3021894 98 __O uint32_t DATA0; /**< Bits[31:00] of the 128-bit data to encrypt */
elessair 0:f269e3021894 99 __O uint32_t DATA1; /**< Bits[63:32] of the 128-bit data to encrypt */
elessair 0:f269e3021894 100 __O uint32_t DATA2; /**< Bits[95:64] of the 128-bit data to encrypt */
elessair 0:f269e3021894 101 __O uint32_t DATA3; /**< Bits[127:96] of the 128-bit data to encrypt */
elessair 0:f269e3021894 102 } AesReg_t, *AesReg_pt;
elessair 0:f269e3021894 103
elessair 0:f269e3021894 104 #endif /* AES_MAP_H_ */