Lee Kai Xuan / mbed-os

mbed-os

Fork of mbed-os by erkin yucel

targets/TARGET_NXP/TARGET_LPC82X/serial_api.c@1:3deb71413561, 2017-07-20 (annotated)

Committer:
xuaner
Date:
Thu Jul 20 14:26:57 2017 +0000
Revision:
1:3deb71413561
Parent:
0:f269e3021894 
mbed_os

Who changed what in which revision?

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elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2006-2013 ARM Limited
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16 // math.h required for floating point operations for baud rate calculation
elessair 0:f269e3021894 17 #include "mbed_assert.h"
elessair 0:f269e3021894 18 #include <math.h>
elessair 0:f269e3021894 19 #include <string.h>
elessair 0:f269e3021894 20
elessair 0:f269e3021894 21 #include "serial_api.h"
elessair 0:f269e3021894 22 #include "cmsis.h"
elessair 0:f269e3021894 23 #include "pinmap.h"
elessair 0:f269e3021894 24 #include "mbed_error.h"
elessair 0:f269e3021894 25
elessair 0:f269e3021894 26 #if DEVICE_SERIAL
elessair 0:f269e3021894 27
elessair 0:f269e3021894 28 /******************************************************************************
elessair 0:f269e3021894 29 * INITIALIZATION
elessair 0:f269e3021894 30 ******************************************************************************/
elessair 0:f269e3021894 31 #define UART_NUM 3
elessair 0:f269e3021894 32
elessair 0:f269e3021894 33 static const SWM_Map SWM_UART_TX[] = {
elessair 0:f269e3021894 34 {0, 0},
elessair 0:f269e3021894 35 {1, 8},
elessair 0:f269e3021894 36 {2, 16},
elessair 0:f269e3021894 37 };
elessair 0:f269e3021894 38
elessair 0:f269e3021894 39 static const SWM_Map SWM_UART_RX[] = {
elessair 0:f269e3021894 40 {0, 8},
elessair 0:f269e3021894 41 {1, 16},
elessair 0:f269e3021894 42 {2, 24},
elessair 0:f269e3021894 43 };
elessair 0:f269e3021894 44
elessair 0:f269e3021894 45 static const SWM_Map SWM_UART_RTS[] = {
elessair 0:f269e3021894 46 {0, 16},
elessair 0:f269e3021894 47 {1, 24},
elessair 0:f269e3021894 48 {3, 0},
elessair 0:f269e3021894 49 };
elessair 0:f269e3021894 50
elessair 0:f269e3021894 51 static const SWM_Map SWM_UART_CTS[] = {
elessair 0:f269e3021894 52 {0, 24},
elessair 0:f269e3021894 53 {2, 0},
elessair 0:f269e3021894 54 {3, 8}
elessair 0:f269e3021894 55 };
elessair 0:f269e3021894 56
elessair 0:f269e3021894 57 // bit flags for used UARTs
elessair 0:f269e3021894 58 static unsigned char uart_used = 0;
elessair 0:f269e3021894 59
elessair 0:f269e3021894 60 static int get_available_uart(void)
elessair 0:f269e3021894 61 {
elessair 0:f269e3021894 62 int i;
elessair 0:f269e3021894 63 for (i=0; i<UART_NUM; i++) {
elessair 0:f269e3021894 64 if ((uart_used & (1 << i)) == 0)
elessair 0:f269e3021894 65 return i;
elessair 0:f269e3021894 66 }
elessair 0:f269e3021894 67 return -1;
elessair 0:f269e3021894 68 }
elessair 0:f269e3021894 69
elessair 0:f269e3021894 70 #define UART_EN (0x01<<0)
elessair 0:f269e3021894 71
elessair 0:f269e3021894 72 #define CTS_DELTA (0x01<<5)
elessair 0:f269e3021894 73 #define RXBRK (0x01<<10)
elessair 0:f269e3021894 74 #define DELTA_RXBRK (0x01<<11)
elessair 0:f269e3021894 75
elessair 0:f269e3021894 76 #define RXRDY (0x01<<0)
elessair 0:f269e3021894 77 #define TXRDY (0x01<<2)
elessair 0:f269e3021894 78
elessair 0:f269e3021894 79 #define RXRDYEN RXRDY
elessair 0:f269e3021894 80 #define TXRDYEN TXRDY
elessair 0:f269e3021894 81
elessair 0:f269e3021894 82 #define TXBRKEN (0x01<<1)
elessair 0:f269e3021894 83 #define CTSEN (0x01<<9)
elessair 0:f269e3021894 84
elessair 0:f269e3021894 85 static uint32_t UARTSysClk;
elessair 0:f269e3021894 86
elessair 0:f269e3021894 87 static uint32_t serial_irq_ids[UART_NUM] = {0};
elessair 0:f269e3021894 88 static uart_irq_handler irq_handler;
elessair 0:f269e3021894 89
elessair 0:f269e3021894 90 int stdio_uart_inited = 0;
elessair 0:f269e3021894 91 serial_t stdio_uart;
elessair 0:f269e3021894 92
elessair 0:f269e3021894 93 static int check_duplication(serial_t *obj, PinName tx, PinName rx)
elessair 0:f269e3021894 94 {
elessair 0:f269e3021894 95 if (uart_used == 0)
elessair 0:f269e3021894 96 return 0;
elessair 0:f269e3021894 97
elessair 0:f269e3021894 98 const SWM_Map *swm;
elessair 0:f269e3021894 99 uint32_t assigned_tx, assigned_rx;
elessair 0:f269e3021894 100 int ch;
elessair 0:f269e3021894 101 for (ch=0; ch<UART_NUM; ch++) {
elessair 0:f269e3021894 102 // read assigned TX in the UART channel of switch matrix
elessair 0:f269e3021894 103 swm = &SWM_UART_TX[ch];
elessair 0:f269e3021894 104 assigned_tx = LPC_SWM->PINASSIGN[swm->n] & (0xFF << swm->offset);
elessair 0:f269e3021894 105 assigned_tx = assigned_tx >> swm->offset;
elessair 0:f269e3021894 106 // read assigned RX in the UART channel of switch matrix
elessair 0:f269e3021894 107 swm = &SWM_UART_RX[ch];
elessair 0:f269e3021894 108 assigned_rx = LPC_SWM->PINASSIGN[swm->n] & (0xFF << swm->offset);
elessair 0:f269e3021894 109 assigned_rx = assigned_rx >> swm->offset;
elessair 0:f269e3021894 110 if ((assigned_tx == (uint32_t)(tx >> PIN_SHIFT)) && (assigned_rx == (uint32_t)(rx >> PIN_SHIFT))) {
elessair 0:f269e3021894 111 obj->index = ch;
elessair 0:f269e3021894 112 obj->uart = (LPC_USART0_Type *)(LPC_USART0_BASE + (0x4000 * ch));
elessair 0:f269e3021894 113 return 1;
elessair 0:f269e3021894 114 }
elessair 0:f269e3021894 115 }
elessair 0:f269e3021894 116 return 0;
elessair 0:f269e3021894 117 }
elessair 0:f269e3021894 118
elessair 0:f269e3021894 119 void serial_init(serial_t *obj, PinName tx, PinName rx)
elessair 0:f269e3021894 120 {
elessair 0:f269e3021894 121 int is_stdio_uart = 0;
elessair 0:f269e3021894 122
elessair 0:f269e3021894 123 if (check_duplication(obj, tx, rx) == 1)
elessair 0:f269e3021894 124 return;
elessair 0:f269e3021894 125
elessair 0:f269e3021894 126 int uart_n = get_available_uart();
elessair 0:f269e3021894 127 if (uart_n == -1) {
elessair 0:f269e3021894 128 error("No available UART");
elessair 0:f269e3021894 129 }
elessair 0:f269e3021894 130 obj->index = uart_n;
elessair 0:f269e3021894 131 obj->uart = (LPC_USART0_Type *)(LPC_USART0_BASE + (0x4000 * uart_n));
elessair 0:f269e3021894 132 uart_used |= (1 << uart_n);
elessair 0:f269e3021894 133
elessair 0:f269e3021894 134 const SWM_Map *swm;
elessair 0:f269e3021894 135 uint32_t regVal;
elessair 0:f269e3021894 136
elessair 0:f269e3021894 137 swm = &SWM_UART_TX[uart_n];
elessair 0:f269e3021894 138 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
elessair 0:f269e3021894 139 LPC_SWM->PINASSIGN[swm->n] = regVal | ((tx >> PIN_SHIFT) << swm->offset);
elessair 0:f269e3021894 140
elessair 0:f269e3021894 141 swm = &SWM_UART_RX[uart_n];
elessair 0:f269e3021894 142 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
elessair 0:f269e3021894 143 LPC_SWM->PINASSIGN[swm->n] = regVal | ((rx >> PIN_SHIFT) << swm->offset);
elessair 0:f269e3021894 144
elessair 0:f269e3021894 145 /* uart clock divided by 1 */
elessair 0:f269e3021894 146 LPC_SYSCON->UARTCLKDIV = 1;
elessair 0:f269e3021894 147
elessair 0:f269e3021894 148 /* disable uart interrupts */
elessair 0:f269e3021894 149 NVIC_DisableIRQ((IRQn_Type)(UART0_IRQn + uart_n));
elessair 0:f269e3021894 150
elessair 0:f269e3021894 151 /* Enable UART clock */
elessair 0:f269e3021894 152 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << (14 + uart_n));
elessair 0:f269e3021894 153
elessair 0:f269e3021894 154 /* Peripheral reset control to UART, a "1" bring it out of reset. */
elessair 0:f269e3021894 155 LPC_SYSCON->PRESETCTRL &= ~(0x1 << (3 + uart_n));
elessair 0:f269e3021894 156 LPC_SYSCON->PRESETCTRL |= (0x1 << (3 + uart_n));
elessair 0:f269e3021894 157
elessair 0:f269e3021894 158 UARTSysClk = MainClock / LPC_SYSCON->UARTCLKDIV;
elessair 0:f269e3021894 159
elessair 0:f269e3021894 160 // set default baud rate and format
elessair 0:f269e3021894 161 serial_baud (obj, 9600);
elessair 0:f269e3021894 162 serial_format(obj, 8, ParityNone, 1);
elessair 0:f269e3021894 163
elessair 0:f269e3021894 164 /* Clear all status bits. */
elessair 0:f269e3021894 165 obj->uart->STAT = CTS_DELTA | DELTA_RXBRK;
elessair 0:f269e3021894 166
elessair 0:f269e3021894 167 /* enable uart interrupts */
elessair 0:f269e3021894 168 NVIC_EnableIRQ((IRQn_Type)(UART0_IRQn + uart_n));
elessair 0:f269e3021894 169
elessair 0:f269e3021894 170 /* Enable UART */
elessair 0:f269e3021894 171 obj->uart->CFG |= UART_EN;
elessair 0:f269e3021894 172
elessair 0:f269e3021894 173 is_stdio_uart = ((tx == USBTX) && (rx == USBRX));
elessair 0:f269e3021894 174
elessair 0:f269e3021894 175 if (is_stdio_uart) {
elessair 0:f269e3021894 176 stdio_uart_inited = 1;
elessair 0:f269e3021894 177 memcpy(&stdio_uart, obj, sizeof(serial_t));
elessair 0:f269e3021894 178 }
elessair 0:f269e3021894 179 }
elessair 0:f269e3021894 180
elessair 0:f269e3021894 181 void serial_free(serial_t *obj)
elessair 0:f269e3021894 182 {
elessair 0:f269e3021894 183 uart_used &= ~(1 << obj->index);
elessair 0:f269e3021894 184 serial_irq_ids[obj->index] = 0;
elessair 0:f269e3021894 185 }
elessair 0:f269e3021894 186
elessair 0:f269e3021894 187 void serial_baud(serial_t *obj, int baudrate)
elessair 0:f269e3021894 188 {
elessair 0:f269e3021894 189 /* Integer divider:
elessair 0:f269e3021894 190 BRG = UARTSysClk/(Baudrate * 16) - 1
elessair 0:f269e3021894 191
elessair 0:f269e3021894 192 Frational divider:
elessair 0:f269e3021894 193 FRG = ((UARTSysClk / (Baudrate * 16 * (BRG + 1))) - 1)
elessair 0:f269e3021894 194
elessair 0:f269e3021894 195 where
elessair 0:f269e3021894 196 FRG = (LPC_SYSCON->UARTFRDADD + 1) / (LPC_SYSCON->UARTFRDSUB + 1)
elessair 0:f269e3021894 197
elessair 0:f269e3021894 198 (1) The easiest way is set SUB value to 256, -1 encoded, thus SUB
elessair 0:f269e3021894 199 register is 0xFF.
elessair 0:f269e3021894 200 (2) In ADD register value, depending on the value of UartSysClk,
elessair 0:f269e3021894 201 baudrate, BRG register value, and SUB register value, be careful
elessair 0:f269e3021894 202 about the order of multiplier and divider and make sure any
elessair 0:f269e3021894 203 multiplier doesn't exceed 32-bit boundary and any divider doesn't get
elessair 0:f269e3021894 204 down below one(integer 0).
elessair 0:f269e3021894 205 (3) ADD should be always less than SUB.
elessair 0:f269e3021894 206 */
elessair 0:f269e3021894 207 obj->uart->BRG = UARTSysClk / 16 / baudrate - 1;
elessair 0:f269e3021894 208
elessair 0:f269e3021894 209 LPC_SYSCON->UARTFRGDIV = 0xFF;
elessair 0:f269e3021894 210 LPC_SYSCON->UARTFRGMULT = ( ((UARTSysClk / 16) * (LPC_SYSCON->UARTFRGDIV + 1)) /
elessair 0:f269e3021894 211 (baudrate * (obj->uart->BRG + 1))
elessair 0:f269e3021894 212 ) - (LPC_SYSCON->UARTFRGDIV + 1);
elessair 0:f269e3021894 213 }
elessair 0:f269e3021894 214
elessair 0:f269e3021894 215 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
elessair 0:f269e3021894 216 {
elessair 0:f269e3021894 217 // 0: 1 stop bits, 1: 2 stop bits
elessair 0:f269e3021894 218 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2));
elessair 0:f269e3021894 219 MBED_ASSERT((data_bits > 6) && (data_bits < 10)); // 0: 7 data bits ... 2: 9 data bits
elessair 0:f269e3021894 220 MBED_ASSERT((parity == ParityNone) || (parity == ParityEven) || (parity == ParityOdd));
elessair 0:f269e3021894 221 stop_bits -= 1;
elessair 0:f269e3021894 222 data_bits -= 7;
elessair 0:f269e3021894 223
elessair 0:f269e3021894 224 int paritysel = 0;
elessair 0:f269e3021894 225 switch (parity) {
elessair 0:f269e3021894 226 case ParityNone: paritysel = 0; break;
elessair 0:f269e3021894 227 case ParityEven: paritysel = 2; break;
elessair 0:f269e3021894 228 case ParityOdd : paritysel = 3; break;
elessair 0:f269e3021894 229 default:
elessair 0:f269e3021894 230 break;
elessair 0:f269e3021894 231 }
elessair 0:f269e3021894 232
elessair 0:f269e3021894 233 // First disable the the usart as described in documentation and then enable while updating CFG
elessair 0:f269e3021894 234
elessair 0:f269e3021894 235 // 24.6.1 USART Configuration register
elessair 0:f269e3021894 236 // Remark: If software needs to change configuration values, the following sequence should
elessair 0:f269e3021894 237 // be used: 1) Make sure the USART is not currently sending or receiving data. 2) Disable
elessair 0:f269e3021894 238 // the USART by writing a 0 to the Enable bit (0 may be written to the entire register). 3)
elessair 0:f269e3021894 239 // Write the new configuration value, with the ENABLE bit set to 1.
elessair 0:f269e3021894 240 obj->uart->CFG &= ~(1 << 0);
elessair 0:f269e3021894 241
elessair 0:f269e3021894 242 obj->uart->CFG = (1 << 0) // this will enable the usart
elessair 0:f269e3021894 243 | (data_bits << 2)
elessair 0:f269e3021894 244 | (paritysel << 4)
elessair 0:f269e3021894 245 | (stop_bits << 6);
elessair 0:f269e3021894 246 }
elessair 0:f269e3021894 247
elessair 0:f269e3021894 248 /******************************************************************************
elessair 0:f269e3021894 249 * INTERRUPTS HANDLING
elessair 0:f269e3021894 250 ******************************************************************************/
elessair 0:f269e3021894 251 static inline void uart_irq(SerialIrq irq_type, uint32_t index)
elessair 0:f269e3021894 252 {
elessair 0:f269e3021894 253 if (serial_irq_ids[index] != 0)
elessair 0:f269e3021894 254 irq_handler(serial_irq_ids[index], irq_type);
elessair 0:f269e3021894 255 }
elessair 0:f269e3021894 256
elessair 0:f269e3021894 257 void uart0_irq() {uart_irq((LPC_USART0->INTSTAT & RXRDY) ? RxIrq : TxIrq, 0);}
elessair 0:f269e3021894 258 void uart1_irq() {uart_irq((LPC_USART1->INTSTAT & RXRDY) ? RxIrq : TxIrq, 1);}
elessair 0:f269e3021894 259 void uart2_irq() {uart_irq((LPC_USART2->INTSTAT & RXRDY) ? RxIrq : TxIrq, 2);}
elessair 0:f269e3021894 260
elessair 0:f269e3021894 261 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
elessair 0:f269e3021894 262 {
elessair 0:f269e3021894 263 irq_handler = handler;
elessair 0:f269e3021894 264 serial_irq_ids[obj->index] = id;
elessair 0:f269e3021894 265 }
elessair 0:f269e3021894 266
elessair 0:f269e3021894 267 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
elessair 0:f269e3021894 268 {
elessair 0:f269e3021894 269 IRQn_Type irq_n = (IRQn_Type)0;
elessair 0:f269e3021894 270 uint32_t vector = 0;
elessair 0:f269e3021894 271 switch ((int)obj->uart) {
elessair 0:f269e3021894 272 case LPC_USART0_BASE: irq_n=UART0_IRQn; vector = (uint32_t)&uart0_irq; break;
elessair 0:f269e3021894 273 case LPC_USART1_BASE: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
elessair 0:f269e3021894 274 case LPC_USART2_BASE: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break;
elessair 0:f269e3021894 275 }
elessair 0:f269e3021894 276
elessair 0:f269e3021894 277 if (enable) {
elessair 0:f269e3021894 278 NVIC_DisableIRQ(irq_n);
elessair 0:f269e3021894 279 obj->uart->INTENSET |= (1 << ((irq == RxIrq) ? 0 : 2));
elessair 0:f269e3021894 280 NVIC_SetVector(irq_n, vector);
elessair 0:f269e3021894 281 NVIC_EnableIRQ(irq_n);
elessair 0:f269e3021894 282 } else { // disable
elessair 0:f269e3021894 283 obj->uart->INTENCLR |= (1 << ((irq == RxIrq) ? 0 : 2));
elessair 0:f269e3021894 284 if ( (obj->uart->INTENSET & (RXRDYEN | TXRDYEN)) == 0) {
elessair 0:f269e3021894 285 NVIC_DisableIRQ(irq_n);
elessair 0:f269e3021894 286 }
elessair 0:f269e3021894 287 }
elessair 0:f269e3021894 288 }
elessair 0:f269e3021894 289
elessair 0:f269e3021894 290 /******************************************************************************
elessair 0:f269e3021894 291 * READ/WRITE
elessair 0:f269e3021894 292 ******************************************************************************/
elessair 0:f269e3021894 293 int serial_getc(serial_t *obj)
elessair 0:f269e3021894 294 {
elessair 0:f269e3021894 295 while (!serial_readable(obj));
elessair 0:f269e3021894 296 return obj->uart->RXDAT;
elessair 0:f269e3021894 297 }
elessair 0:f269e3021894 298
elessair 0:f269e3021894 299 void serial_putc(serial_t *obj, int c)
elessair 0:f269e3021894 300 {
elessair 0:f269e3021894 301 while (!serial_writable(obj));
elessair 0:f269e3021894 302 obj->uart->TXDAT = c;
elessair 0:f269e3021894 303 }
elessair 0:f269e3021894 304
elessair 0:f269e3021894 305 int serial_readable(serial_t *obj)
elessair 0:f269e3021894 306 {
elessair 0:f269e3021894 307 return obj->uart->STAT & RXRDY;
elessair 0:f269e3021894 308 }
elessair 0:f269e3021894 309
elessair 0:f269e3021894 310 int serial_writable(serial_t *obj)
elessair 0:f269e3021894 311 {
elessair 0:f269e3021894 312 return obj->uart->STAT & TXRDY;
elessair 0:f269e3021894 313 }
elessair 0:f269e3021894 314
elessair 0:f269e3021894 315 void serial_clear(serial_t *obj)
elessair 0:f269e3021894 316 {
elessair 0:f269e3021894 317 // [TODO]
elessair 0:f269e3021894 318 }
elessair 0:f269e3021894 319
elessair 0:f269e3021894 320 void serial_pinout_tx(PinName tx)
elessair 0:f269e3021894 321 {
elessair 0:f269e3021894 322
elessair 0:f269e3021894 323 }
elessair 0:f269e3021894 324
elessair 0:f269e3021894 325 void serial_break_set(serial_t *obj)
elessair 0:f269e3021894 326 {
elessair 0:f269e3021894 327 obj->uart->CTL |= TXBRKEN;
elessair 0:f269e3021894 328 }
elessair 0:f269e3021894 329
elessair 0:f269e3021894 330 void serial_break_clear(serial_t *obj)
elessair 0:f269e3021894 331 {
elessair 0:f269e3021894 332 obj->uart->CTL &= ~TXBRKEN;
elessair 0:f269e3021894 333 }
elessair 0:f269e3021894 334
elessair 0:f269e3021894 335 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
elessair 0:f269e3021894 336 {
elessair 0:f269e3021894 337 const SWM_Map *swm_rts, *swm_cts;
elessair 0:f269e3021894 338 uint32_t regVal_rts, regVal_cts;
elessair 0:f269e3021894 339
elessair 0:f269e3021894 340 swm_rts = &SWM_UART_RTS[obj->index];
elessair 0:f269e3021894 341 swm_cts = &SWM_UART_CTS[obj->index];
elessair 0:f269e3021894 342 regVal_rts = LPC_SWM->PINASSIGN[swm_rts->n] & ~(0xFF << swm_rts->offset);
elessair 0:f269e3021894 343 regVal_cts = LPC_SWM->PINASSIGN[swm_cts->n] & ~(0xFF << swm_cts->offset);
elessair 0:f269e3021894 344
elessair 0:f269e3021894 345 if (FlowControlNone == type) {
elessair 0:f269e3021894 346 LPC_SWM->PINASSIGN[swm_rts->n] = regVal_rts | (0xFF << swm_rts->offset);
elessair 0:f269e3021894 347 LPC_SWM->PINASSIGN[swm_cts->n] = regVal_cts | (0xFF << swm_cts->offset);
elessair 0:f269e3021894 348 obj->uart->CFG &= ~CTSEN;
elessair 0:f269e3021894 349 return;
elessair 0:f269e3021894 350 }
elessair 0:f269e3021894 351 if ((FlowControlRTS == type || FlowControlRTSCTS == type) && (rxflow != NC)) {
elessair 0:f269e3021894 352 LPC_SWM->PINASSIGN[swm_rts->n] = regVal_rts | ((rxflow >> PIN_SHIFT) << swm_rts->offset);
elessair 0:f269e3021894 353 if (FlowControlRTS == type) {
elessair 0:f269e3021894 354 LPC_SWM->PINASSIGN[swm_cts->n] = regVal_cts | (0xFF << swm_cts->offset);
elessair 0:f269e3021894 355 obj->uart->CFG &= ~CTSEN;
elessair 0:f269e3021894 356 }
elessair 0:f269e3021894 357 }
elessair 0:f269e3021894 358 if ((FlowControlCTS == type || FlowControlRTSCTS == type) && (txflow != NC)) {
elessair 0:f269e3021894 359 LPC_SWM->PINASSIGN[swm_cts->n] = regVal_cts | ((txflow >> PIN_SHIFT) << swm_cts->offset);
elessair 0:f269e3021894 360 obj->uart->CFG |= CTSEN;
elessair 0:f269e3021894 361 if (FlowControlCTS == type) {
elessair 0:f269e3021894 362 LPC_SWM->PINASSIGN[swm_rts->n] = regVal_rts | (0xFF << swm_rts->offset);
elessair 0:f269e3021894 363 }
elessair 0:f269e3021894 364 }
elessair 0:f269e3021894 365 }
elessair 0:f269e3021894 366
elessair 0:f269e3021894 367 #endif