Lee Kai Xuan / mbed-os

mbed-os

Fork of mbed-os by erkin yucel

targets/TARGET_NXP/TARGET_LPC43XX/serial_api.c@1:3deb71413561, 2017-07-20 (annotated)

Committer:
xuaner
Date:
Thu Jul 20 14:26:57 2017 +0000
Revision:
1:3deb71413561
Parent:
0:f269e3021894 
mbed_os

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2006-2013 ARM Limited
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 *
elessair 0:f269e3021894 16 * Ported to NXP LPC43XX by Micromint USA <support@micromint.com>
elessair 0:f269e3021894 17 */
elessair 0:f269e3021894 18 // math.h required for floating point operations for baud rate calculation
elessair 0:f269e3021894 19 #include <math.h>
elessair 0:f269e3021894 20 #include <string.h>
elessair 0:f269e3021894 21 #include <stdlib.h>
elessair 0:f269e3021894 22
elessair 0:f269e3021894 23 #include "serial_api.h"
elessair 0:f269e3021894 24 #include "cmsis.h"
elessair 0:f269e3021894 25 #include "pinmap.h"
elessair 0:f269e3021894 26 #include "mbed_error.h"
elessair 0:f269e3021894 27 #include "gpio_api.h"
elessair 0:f269e3021894 28
elessair 0:f269e3021894 29 /******************************************************************************
elessair 0:f269e3021894 30 * INITIALIZATION
elessair 0:f269e3021894 31 ******************************************************************************/
elessair 0:f269e3021894 32 #define UART_NUM 4
elessair 0:f269e3021894 33
elessair 0:f269e3021894 34 // SCU mode for UART pins
elessair 0:f269e3021894 35 #define SCU_PINIO_UART_TX SCU_MODE_PULLDOWN
elessair 0:f269e3021894 36 #define SCU_PINIO_UART_RX SCU_PINIO_PULLNONE
elessair 0:f269e3021894 37
elessair 0:f269e3021894 38 static const PinMap PinMap_UART_TX[] = {
elessair 0:f269e3021894 39 {P1_13, UART_1, (SCU_PINIO_UART_TX | 1)},
elessair 0:f269e3021894 40 {P1_15, UART_2, (SCU_PINIO_UART_TX | 1)},
elessair 0:f269e3021894 41 {P2_0, UART_0, (SCU_PINIO_UART_TX | 1)},
elessair 0:f269e3021894 42 {P2_3, UART_3, (SCU_PINIO_UART_TX | 2)},
elessair 0:f269e3021894 43 {P2_10, UART_2, (SCU_PINIO_UART_TX | 2)},
elessair 0:f269e3021894 44 {P3_4, UART_1, (SCU_PINIO_UART_TX | 4)},
elessair 0:f269e3021894 45 {P4_1, UART_3, (SCU_PINIO_UART_TX | 6)},
elessair 0:f269e3021894 46 {P5_6, UART_1, (SCU_PINIO_UART_TX | 4)},
elessair 0:f269e3021894 47 {P6_4, UART_0, (SCU_PINIO_UART_TX | 2)},
elessair 0:f269e3021894 48 {P7_1, UART_2, (SCU_PINIO_UART_TX | 6)},
elessair 0:f269e3021894 49 {P9_3, UART_3, (SCU_PINIO_UART_TX | 7)},
elessair 0:f269e3021894 50 {P9_5, UART_0, (SCU_PINIO_UART_TX | 7)},
elessair 0:f269e3021894 51 {PA_1, UART_2, (SCU_PINIO_UART_TX | 3)},
elessair 0:f269e3021894 52 {PC_13, UART_1, (SCU_PINIO_UART_TX | 2)},
elessair 0:f269e3021894 53 {PE_11, UART_1, (SCU_PINIO_UART_TX | 2)},
elessair 0:f269e3021894 54 {PF_2, UART_3, (SCU_PINIO_UART_TX | 1)},
elessair 0:f269e3021894 55 {PF_10, UART_0, (SCU_PINIO_UART_TX | 1)},
elessair 0:f269e3021894 56 {NC, NC, 0}
elessair 0:f269e3021894 57 };
elessair 0:f269e3021894 58
elessair 0:f269e3021894 59 static const PinMap PinMap_UART_RX[] = {
elessair 0:f269e3021894 60 {P1_14, UART_1, (SCU_PINIO_UART_RX | 1)},
elessair 0:f269e3021894 61 {P1_16, UART_2, (SCU_PINIO_UART_RX | 1)},
elessair 0:f269e3021894 62 {P2_1, UART_0, (SCU_PINIO_UART_RX | 1)},
elessair 0:f269e3021894 63 {P2_4, UART_3, (SCU_PINIO_UART_RX | 2)},
elessair 0:f269e3021894 64 {P2_11, UART_2, (SCU_PINIO_UART_RX | 2)},
elessair 0:f269e3021894 65 {P3_5, UART_1, (SCU_PINIO_UART_RX | 4)},
elessair 0:f269e3021894 66 {P4_2, UART_3, (SCU_PINIO_UART_RX | 6)},
elessair 0:f269e3021894 67 {P5_7, UART_1, (SCU_PINIO_UART_RX | 4)},
elessair 0:f269e3021894 68 {P6_5, UART_0, (SCU_PINIO_UART_RX | 2)},
elessair 0:f269e3021894 69 {P7_2, UART_2, (SCU_PINIO_UART_RX | 6)},
elessair 0:f269e3021894 70 {P9_4, UART_3, (SCU_PINIO_UART_RX | 7)},
elessair 0:f269e3021894 71 {P9_6, UART_0, (SCU_PINIO_UART_RX | 7)},
elessair 0:f269e3021894 72 {PA_2, UART_2, (SCU_PINIO_UART_RX | 3)},
elessair 0:f269e3021894 73 {PC_14, UART_1, (SCU_PINIO_UART_RX | 2)},
elessair 0:f269e3021894 74 {PE_12, UART_1, (SCU_PINIO_UART_RX | 2)},
elessair 0:f269e3021894 75 {PF_3, UART_3, (SCU_PINIO_UART_RX | 1)},
elessair 0:f269e3021894 76 {PF_11, UART_0, (SCU_PINIO_UART_RX | 1)},
elessair 0:f269e3021894 77 {NC, NC, 0}
elessair 0:f269e3021894 78 };
elessair 0:f269e3021894 79
elessair 0:f269e3021894 80 #if (DEVICE_SERIAL_FC)
elessair 0:f269e3021894 81 // RTS/CTS PinMap for flow control
elessair 0:f269e3021894 82 static const PinMap PinMap_UART_RTS[] = {
elessair 0:f269e3021894 83 {P1_9, UART_1, (SCU_PINIO_FAST | 1)},
elessair 0:f269e3021894 84 {P5_2, UART_1, (SCU_PINIO_FAST | 4)},
elessair 0:f269e3021894 85 {PC_3, UART_1, (SCU_PINIO_FAST | 2)},
elessair 0:f269e3021894 86 {PE_5, UART_1, (SCU_PINIO_FAST | 2)},
elessair 0:f269e3021894 87 {NC, NC, 0}
elessair 0:f269e3021894 88 };
elessair 0:f269e3021894 89
elessair 0:f269e3021894 90 static const PinMap PinMap_UART_CTS[] = {
elessair 0:f269e3021894 91 {P1_11, UART_1, (SCU_PINIO_FAST | 1)},
elessair 0:f269e3021894 92 {P5_4, UART_1, (SCU_PINIO_FAST | 4),
elessair 0:f269e3021894 93 {PC_2, UART_1, (SCU_PINIO_FAST | 2)},
elessair 0:f269e3021894 94 {PE_7, UART_1, (SCU_PINIO_FAST | 2)},
elessair 0:f269e3021894 95 {NC, NC, 0}
elessair 0:f269e3021894 96 };
elessair 0:f269e3021894 97 #endif
elessair 0:f269e3021894 98
elessair 0:f269e3021894 99 static uart_irq_handler irq_handler;
elessair 0:f269e3021894 100
elessair 0:f269e3021894 101 int stdio_uart_inited = 0;
elessair 0:f269e3021894 102 serial_t stdio_uart;
elessair 0:f269e3021894 103
elessair 0:f269e3021894 104 struct serial_global_data_s {
elessair 0:f269e3021894 105 uint32_t serial_irq_id;
elessair 0:f269e3021894 106 gpio_t sw_rts, sw_cts;
elessair 0:f269e3021894 107 uint8_t count, rx_irq_set_flow, rx_irq_set_api;
elessair 0:f269e3021894 108 };
elessair 0:f269e3021894 109
elessair 0:f269e3021894 110 static struct serial_global_data_s uart_data[UART_NUM];
elessair 0:f269e3021894 111
elessair 0:f269e3021894 112 void serial_init(serial_t *obj, PinName tx, PinName rx) {
elessair 0:f269e3021894 113 int is_stdio_uart = 0;
elessair 0:f269e3021894 114
elessair 0:f269e3021894 115 // determine the UART to use
elessair 0:f269e3021894 116 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
elessair 0:f269e3021894 117 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
elessair 0:f269e3021894 118 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
elessair 0:f269e3021894 119 if ((int)uart == NC) {
elessair 0:f269e3021894 120 error("Serial pinout mapping failed");
elessair 0:f269e3021894 121 }
elessair 0:f269e3021894 122
elessair 0:f269e3021894 123 obj->uart = (LPC_USART_T *)uart;
elessair 0:f269e3021894 124
elessair 0:f269e3021894 125 // enable fifos and default rx trigger level
elessair 0:f269e3021894 126 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
elessair 0:f269e3021894 127 | 0 << 1 // Rx Fifo Reset
elessair 0:f269e3021894 128 | 0 << 2 // Tx Fifo Reset
elessair 0:f269e3021894 129 | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars
elessair 0:f269e3021894 130
elessair 0:f269e3021894 131 // disable irqs
elessair 0:f269e3021894 132 obj->uart->IER = 0 << 0 // Rx Data available irq enable
elessair 0:f269e3021894 133 | 0 << 1 // Tx Fifo empty irq enable
elessair 0:f269e3021894 134 | 0 << 2; // Rx Line Status irq enable
elessair 0:f269e3021894 135
elessair 0:f269e3021894 136 // set default baud rate and format
elessair 0:f269e3021894 137 serial_baud (obj, 9600);
elessair 0:f269e3021894 138 serial_format(obj, 8, ParityNone, 1);
elessair 0:f269e3021894 139
elessair 0:f269e3021894 140 // pinout the chosen uart
elessair 0:f269e3021894 141 pinmap_pinout(tx, PinMap_UART_TX);
elessair 0:f269e3021894 142 pinmap_pinout(rx, PinMap_UART_RX);
elessair 0:f269e3021894 143
elessair 0:f269e3021894 144 // set rx/tx pins in PullUp mode
elessair 0:f269e3021894 145 if (tx != NC) {
elessair 0:f269e3021894 146 pin_mode(tx, PullUp);
elessair 0:f269e3021894 147 }
elessair 0:f269e3021894 148 if (rx != NC) {
elessair 0:f269e3021894 149 pin_mode(rx, PullUp);
elessair 0:f269e3021894 150 }
elessair 0:f269e3021894 151
elessair 0:f269e3021894 152 switch (uart) {
elessair 0:f269e3021894 153 case UART_0: obj->index = 0; break;
elessair 0:f269e3021894 154 case UART_1: obj->index = 1; break;
elessair 0:f269e3021894 155 case UART_2: obj->index = 2; break;
elessair 0:f269e3021894 156 case UART_3: obj->index = 3; break;
elessair 0:f269e3021894 157 }
elessair 0:f269e3021894 158 uart_data[obj->index].sw_rts.pin = NC;
elessair 0:f269e3021894 159 uart_data[obj->index].sw_cts.pin = NC;
elessair 0:f269e3021894 160 serial_set_flow_control(obj, FlowControlNone, NC, NC);
elessair 0:f269e3021894 161
elessair 0:f269e3021894 162 is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
elessair 0:f269e3021894 163
elessair 0:f269e3021894 164 if (is_stdio_uart) {
elessair 0:f269e3021894 165 stdio_uart_inited = 1;
elessair 0:f269e3021894 166 serial_baud (obj, STDIO_BAUD);
elessair 0:f269e3021894 167 memcpy(&stdio_uart, obj, sizeof(serial_t));
elessair 0:f269e3021894 168 }
elessair 0:f269e3021894 169 }
elessair 0:f269e3021894 170
elessair 0:f269e3021894 171 void serial_free(serial_t *obj) {
elessair 0:f269e3021894 172 uart_data[obj->index].serial_irq_id = 0;
elessair 0:f269e3021894 173 }
elessair 0:f269e3021894 174
elessair 0:f269e3021894 175 // serial_baud
elessair 0:f269e3021894 176 // set the baud rate, taking in to account the current SystemFrequency
elessair 0:f269e3021894 177 void serial_baud(serial_t *obj, int baudrate) {
elessair 0:f269e3021894 178 uint32_t PCLK = SystemCoreClock;
elessair 0:f269e3021894 179
elessair 0:f269e3021894 180 // First we check to see if the basic divide with no DivAddVal/MulVal
elessair 0:f269e3021894 181 // ratio gives us an integer result. If it does, we set DivAddVal = 0,
elessair 0:f269e3021894 182 // MulVal = 1. Otherwise, we search the valid ratio value range to find
elessair 0:f269e3021894 183 // the closest match. This could be more elegant, using search methods
elessair 0:f269e3021894 184 // and/or lookup tables, but the brute force method is not that much
elessair 0:f269e3021894 185 // slower, and is more maintainable.
elessair 0:f269e3021894 186 uint16_t DL = PCLK / (16 * baudrate);
elessair 0:f269e3021894 187
elessair 0:f269e3021894 188 uint8_t DivAddVal = 0;
elessair 0:f269e3021894 189 uint8_t MulVal = 1;
elessair 0:f269e3021894 190 int hit = 0;
elessair 0:f269e3021894 191 uint16_t dlv;
elessair 0:f269e3021894 192 uint8_t mv, dav;
elessair 0:f269e3021894 193 if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder
elessair 0:f269e3021894 194 int err_best = baudrate, b;
elessair 0:f269e3021894 195 for (mv = 1; mv < 16 && !hit; mv++)
elessair 0:f269e3021894 196 {
elessair 0:f269e3021894 197 for (dav = 0; dav < mv; dav++)
elessair 0:f269e3021894 198 {
elessair 0:f269e3021894 199 // baudrate = PCLK / (16 * dlv * (1 + (DivAdd / Mul))
elessair 0:f269e3021894 200 // solving for dlv, we get dlv = mul * PCLK / (16 * baudrate * (divadd + mul))
elessair 0:f269e3021894 201 // mul has 4 bits, PCLK has 27 so we have 1 bit headroom which can be used for rounding
elessair 0:f269e3021894 202 // for many values of mul and PCLK we have 2 or more bits of headroom which can be used to improve precision
elessair 0:f269e3021894 203 // note: X / 32 doesn't round correctly. Instead, we use ((X / 16) + 1) / 2 for correct rounding
elessair 0:f269e3021894 204
elessair 0:f269e3021894 205 if ((mv * PCLK * 2) & 0x80000000) // 1 bit headroom
elessair 0:f269e3021894 206 dlv = ((((2 * mv * PCLK) / (baudrate * (dav + mv))) / 16) + 1) / 2;
elessair 0:f269e3021894 207 else // 2 bits headroom, use more precision
elessair 0:f269e3021894 208 dlv = ((((4 * mv * PCLK) / (baudrate * (dav + mv))) / 32) + 1) / 2;
elessair 0:f269e3021894 209
elessair 0:f269e3021894 210 // datasheet says if DLL==DLM==0, then 1 is used instead since divide by zero is ungood
elessair 0:f269e3021894 211 if (dlv == 0)
elessair 0:f269e3021894 212 dlv = 1;
elessair 0:f269e3021894 213
elessair 0:f269e3021894 214 // datasheet says if dav > 0 then DL must be >= 2
elessair 0:f269e3021894 215 if ((dav > 0) && (dlv < 2))
elessair 0:f269e3021894 216 dlv = 2;
elessair 0:f269e3021894 217
elessair 0:f269e3021894 218 // integer rearrangement of the baudrate equation (with rounding)
elessair 0:f269e3021894 219 b = ((PCLK * mv / (dlv * (dav + mv) * 8)) + 1) / 2;
elessair 0:f269e3021894 220
elessair 0:f269e3021894 221 // check to see how we went
elessair 0:f269e3021894 222 b = abs(b - baudrate);
elessair 0:f269e3021894 223 if (b < err_best)
elessair 0:f269e3021894 224 {
elessair 0:f269e3021894 225 err_best = b;
elessair 0:f269e3021894 226
elessair 0:f269e3021894 227 DL = dlv;
elessair 0:f269e3021894 228 MulVal = mv;
elessair 0:f269e3021894 229 DivAddVal = dav;
elessair 0:f269e3021894 230
elessair 0:f269e3021894 231 if (b == baudrate)
elessair 0:f269e3021894 232 {
elessair 0:f269e3021894 233 hit = 1;
elessair 0:f269e3021894 234 break;
elessair 0:f269e3021894 235 }
elessair 0:f269e3021894 236 }
elessair 0:f269e3021894 237 }
elessair 0:f269e3021894 238 }
elessair 0:f269e3021894 239 }
elessair 0:f269e3021894 240
elessair 0:f269e3021894 241 // set LCR[DLAB] to enable writing to divider registers
elessair 0:f269e3021894 242 obj->uart->LCR |= (1 << 7);
elessair 0:f269e3021894 243
elessair 0:f269e3021894 244 // set divider values
elessair 0:f269e3021894 245 obj->uart->DLM = (DL >> 8) & 0xFF;
elessair 0:f269e3021894 246 obj->uart->DLL = (DL >> 0) & 0xFF;
elessair 0:f269e3021894 247 obj->uart->FDR = (uint32_t) DivAddVal << 0
elessair 0:f269e3021894 248 | (uint32_t) MulVal << 4;
elessair 0:f269e3021894 249
elessair 0:f269e3021894 250 // clear LCR[DLAB]
elessair 0:f269e3021894 251 obj->uart->LCR &= ~(1 << 7);
elessair 0:f269e3021894 252 }
elessair 0:f269e3021894 253
elessair 0:f269e3021894 254 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
elessair 0:f269e3021894 255 // 0: 1 stop bits, 1: 2 stop bits
elessair 0:f269e3021894 256 if (stop_bits != 1 && stop_bits != 2) {
elessair 0:f269e3021894 257 error("Invalid stop bits specified");
elessair 0:f269e3021894 258 }
elessair 0:f269e3021894 259 stop_bits -= 1;
elessair 0:f269e3021894 260
elessair 0:f269e3021894 261 // 0: 5 data bits ... 3: 8 data bits
elessair 0:f269e3021894 262 if (data_bits < 5 || data_bits > 8) {
elessair 0:f269e3021894 263 error("Invalid number of bits (%d) in serial format, should be 5..8", data_bits);
elessair 0:f269e3021894 264 }
elessair 0:f269e3021894 265 data_bits -= 5;
elessair 0:f269e3021894 266
elessair 0:f269e3021894 267 int parity_enable, parity_select;
elessair 0:f269e3021894 268 switch (parity) {
elessair 0:f269e3021894 269 case ParityNone: parity_enable = 0; parity_select = 0; break;
elessair 0:f269e3021894 270 case ParityOdd : parity_enable = 1; parity_select = 0; break;
elessair 0:f269e3021894 271 case ParityEven: parity_enable = 1; parity_select = 1; break;
elessair 0:f269e3021894 272 case ParityForced1: parity_enable = 1; parity_select = 2; break;
elessair 0:f269e3021894 273 case ParityForced0: parity_enable = 1; parity_select = 3; break;
elessair 0:f269e3021894 274 default:
elessair 0:f269e3021894 275 error("Invalid serial parity setting");
elessair 0:f269e3021894 276 return;
elessair 0:f269e3021894 277 }
elessair 0:f269e3021894 278
elessair 0:f269e3021894 279 obj->uart->LCR = data_bits << 0
elessair 0:f269e3021894 280 | stop_bits << 2
elessair 0:f269e3021894 281 | parity_enable << 3
elessair 0:f269e3021894 282 | parity_select << 4;
elessair 0:f269e3021894 283 }
elessair 0:f269e3021894 284
elessair 0:f269e3021894 285 /******************************************************************************
elessair 0:f269e3021894 286 * INTERRUPTS HANDLING
elessair 0:f269e3021894 287 ******************************************************************************/
elessair 0:f269e3021894 288 static inline void uart_irq(uint32_t iir, uint32_t index, LPC_USART_T *puart) {
elessair 0:f269e3021894 289 // [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling
elessair 0:f269e3021894 290 SerialIrq irq_type;
elessair 0:f269e3021894 291 switch (iir) {
elessair 0:f269e3021894 292 case 1: irq_type = TxIrq; break;
elessair 0:f269e3021894 293 case 2: irq_type = RxIrq; break;
elessair 0:f269e3021894 294 default: return;
elessair 0:f269e3021894 295 }
elessair 0:f269e3021894 296 if ((RxIrq == irq_type) && (NC != uart_data[index].sw_rts.pin)) {
elessair 0:f269e3021894 297 gpio_write(&uart_data[index].sw_rts, 1);
elessair 0:f269e3021894 298 // Disable interrupt if it wasn't enabled by other part of the application
elessair 0:f269e3021894 299 if (!uart_data[index].rx_irq_set_api)
elessair 0:f269e3021894 300 puart->IER &= ~(1 << RxIrq);
elessair 0:f269e3021894 301 }
elessair 0:f269e3021894 302 if (uart_data[index].serial_irq_id != 0)
elessair 0:f269e3021894 303 if ((irq_type != RxIrq) || (uart_data[index].rx_irq_set_api))
elessair 0:f269e3021894 304 irq_handler(uart_data[index].serial_irq_id, irq_type);
elessair 0:f269e3021894 305 }
elessair 0:f269e3021894 306
elessair 0:f269e3021894 307 void uart0_irq() {uart_irq((LPC_USART0->IIR >> 1) & 0x7, 0, (LPC_USART_T*)LPC_USART0);}
elessair 0:f269e3021894 308 void uart1_irq() {uart_irq((LPC_UART1->IIR >> 1) & 0x7, 1, (LPC_USART_T*)LPC_UART1);}
elessair 0:f269e3021894 309 void uart2_irq() {uart_irq((LPC_USART2->IIR >> 1) & 0x7, 2, (LPC_USART_T*)LPC_USART2);}
elessair 0:f269e3021894 310 void uart3_irq() {uart_irq((LPC_USART3->IIR >> 1) & 0x7, 3, (LPC_USART_T*)LPC_USART3);}
elessair 0:f269e3021894 311
elessair 0:f269e3021894 312 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
elessair 0:f269e3021894 313 irq_handler = handler;
elessair 0:f269e3021894 314 uart_data[obj->index].serial_irq_id = id;
elessair 0:f269e3021894 315 }
elessair 0:f269e3021894 316
elessair 0:f269e3021894 317 static void serial_irq_set_internal(serial_t *obj, SerialIrq irq, uint32_t enable) {
elessair 0:f269e3021894 318 IRQn_Type irq_n = (IRQn_Type)0;
elessair 0:f269e3021894 319 uint32_t vector = 0;
elessair 0:f269e3021894 320 switch ((int)obj->uart) {
elessair 0:f269e3021894 321 case UART_0: irq_n=USART0_IRQn; vector = (uint32_t)&uart0_irq; break;
elessair 0:f269e3021894 322 case UART_1: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
elessair 0:f269e3021894 323 case UART_2: irq_n=USART2_IRQn; vector = (uint32_t)&uart2_irq; break;
elessair 0:f269e3021894 324 case UART_3: irq_n=USART3_IRQn; vector = (uint32_t)&uart3_irq; break;
elessair 0:f269e3021894 325 }
elessair 0:f269e3021894 326
elessair 0:f269e3021894 327 if (enable) {
elessair 0:f269e3021894 328 obj->uart->IER |= 1 << irq;
elessair 0:f269e3021894 329 NVIC_SetVector(irq_n, vector);
elessair 0:f269e3021894 330 NVIC_EnableIRQ(irq_n);
elessair 0:f269e3021894 331 } else if ((TxIrq == irq) || (uart_data[obj->index].rx_irq_set_api + uart_data[obj->index].rx_irq_set_flow == 0)) { // disable
elessair 0:f269e3021894 332 int all_disabled = 0;
elessair 0:f269e3021894 333 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
elessair 0:f269e3021894 334 obj->uart->IER &= ~(1 << irq);
elessair 0:f269e3021894 335 all_disabled = (obj->uart->IER & (1 << other_irq)) == 0;
elessair 0:f269e3021894 336 if (all_disabled)
elessair 0:f269e3021894 337 NVIC_DisableIRQ(irq_n);
elessair 0:f269e3021894 338 }
elessair 0:f269e3021894 339 }
elessair 0:f269e3021894 340
elessair 0:f269e3021894 341 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
elessair 0:f269e3021894 342 if (RxIrq == irq)
elessair 0:f269e3021894 343 uart_data[obj->index].rx_irq_set_api = enable;
elessair 0:f269e3021894 344 serial_irq_set_internal(obj, irq, enable);
elessair 0:f269e3021894 345 }
elessair 0:f269e3021894 346
elessair 0:f269e3021894 347 #if (DEVICE_SERIAL_FC)
elessair 0:f269e3021894 348 static void serial_flow_irq_set(serial_t *obj, uint32_t enable) {
elessair 0:f269e3021894 349 uart_data[obj->index].rx_irq_set_flow = enable;
elessair 0:f269e3021894 350 serial_irq_set_internal(obj, RxIrq, enable);
elessair 0:f269e3021894 351 }
elessair 0:f269e3021894 352 #endif
elessair 0:f269e3021894 353
elessair 0:f269e3021894 354 /******************************************************************************
elessair 0:f269e3021894 355 * READ/WRITE
elessair 0:f269e3021894 356 ******************************************************************************/
elessair 0:f269e3021894 357 int serial_getc(serial_t *obj) {
elessair 0:f269e3021894 358 while (!serial_readable(obj));
elessair 0:f269e3021894 359 int data = obj->uart->RBR;
elessair 0:f269e3021894 360 if (NC != uart_data[obj->index].sw_rts.pin) {
elessair 0:f269e3021894 361 gpio_write(&uart_data[obj->index].sw_rts, 0);
elessair 0:f269e3021894 362 obj->uart->IER |= 1 << RxIrq;
elessair 0:f269e3021894 363 }
elessair 0:f269e3021894 364 return data;
elessair 0:f269e3021894 365 }
elessair 0:f269e3021894 366
elessair 0:f269e3021894 367 void serial_putc(serial_t *obj, int c) {
elessair 0:f269e3021894 368 while (!serial_writable(obj));
elessair 0:f269e3021894 369 obj->uart->THR = c;
elessair 0:f269e3021894 370 uart_data[obj->index].count++;
elessair 0:f269e3021894 371 }
elessair 0:f269e3021894 372
elessair 0:f269e3021894 373 int serial_readable(serial_t *obj) {
elessair 0:f269e3021894 374 return obj->uart->LSR & 0x01;
elessair 0:f269e3021894 375 }
elessair 0:f269e3021894 376
elessair 0:f269e3021894 377 int serial_writable(serial_t *obj) {
elessair 0:f269e3021894 378 int isWritable = 1;
elessair 0:f269e3021894 379 if (NC != uart_data[obj->index].sw_cts.pin)
elessair 0:f269e3021894 380 isWritable = (gpio_read(&uart_data[obj->index].sw_cts) == 0) && (obj->uart->LSR & 0x40); //If flow control: writable if CTS low + UART done
elessair 0:f269e3021894 381 else {
elessair 0:f269e3021894 382 if (obj->uart->LSR & 0x20)
elessair 0:f269e3021894 383 uart_data[obj->index].count = 0;
elessair 0:f269e3021894 384 else if (uart_data[obj->index].count >= 16)
elessair 0:f269e3021894 385 isWritable = 0;
elessair 0:f269e3021894 386 }
elessair 0:f269e3021894 387 return isWritable;
elessair 0:f269e3021894 388 }
elessair 0:f269e3021894 389
elessair 0:f269e3021894 390 void serial_clear(serial_t *obj) {
elessair 0:f269e3021894 391 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
elessair 0:f269e3021894 392 | 1 << 1 // rx FIFO reset
elessair 0:f269e3021894 393 | 1 << 2 // tx FIFO reset
elessair 0:f269e3021894 394 | 0 << 6; // interrupt depth
elessair 0:f269e3021894 395 }
elessair 0:f269e3021894 396
elessair 0:f269e3021894 397 void serial_pinout_tx(PinName tx) {
elessair 0:f269e3021894 398 pinmap_pinout(tx, PinMap_UART_TX);
elessair 0:f269e3021894 399 }
elessair 0:f269e3021894 400
elessair 0:f269e3021894 401 void serial_break_set(serial_t *obj) {
elessair 0:f269e3021894 402 obj->uart->LCR |= (1 << 6);
elessair 0:f269e3021894 403 }
elessair 0:f269e3021894 404
elessair 0:f269e3021894 405 void serial_break_clear(serial_t *obj) {
elessair 0:f269e3021894 406 obj->uart->LCR &= ~(1 << 6);
elessair 0:f269e3021894 407 }
elessair 0:f269e3021894 408
elessair 0:f269e3021894 409 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) {
elessair 0:f269e3021894 410 #if (DEVICE_SERIAL_FC)
elessair 0:f269e3021894 411 #endif
elessair 0:f269e3021894 412 }