Lee Kai Xuan / mbed-os

mbed-os

Fork of mbed-os by erkin yucel

targets/TARGET_NXP/TARGET_LPC15XX/serial_api.c@1:3deb71413561, 2017-07-20 (annotated)

Committer:
xuaner
Date:
Thu Jul 20 14:26:57 2017 +0000
Revision:
1:3deb71413561
Parent:
0:f269e3021894 
mbed_os

Who changed what in which revision?

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elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2006-2013 ARM Limited
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16 // math.h required for floating point operations for baud rate calculation
elessair 0:f269e3021894 17 #include "mbed_assert.h"
elessair 0:f269e3021894 18 #include <math.h>
elessair 0:f269e3021894 19 #include <string.h>
elessair 0:f269e3021894 20
elessair 0:f269e3021894 21 #include "serial_api.h"
elessair 0:f269e3021894 22 #include "cmsis.h"
elessair 0:f269e3021894 23 #include "pinmap.h"
elessair 0:f269e3021894 24 #include "mbed_error.h"
elessair 0:f269e3021894 25
elessair 0:f269e3021894 26 /******************************************************************************
elessair 0:f269e3021894 27 * INITIALIZATION
elessair 0:f269e3021894 28 ******************************************************************************/
elessair 0:f269e3021894 29 #define UART_NUM 3
elessair 0:f269e3021894 30
elessair 0:f269e3021894 31 static const SWM_Map SWM_UART_TX[] = {
elessair 0:f269e3021894 32 {0, 0}, // Pin assign register0, 7:0bit
elessair 0:f269e3021894 33 {1, 8}, // Pin assign register1, 15:8bit
elessair 0:f269e3021894 34 {2, 16}, // Pin assign register2, 23:16bit
elessair 0:f269e3021894 35 };
elessair 0:f269e3021894 36
elessair 0:f269e3021894 37 static const SWM_Map SWM_UART_RX[] = {
elessair 0:f269e3021894 38 {0, 8},
elessair 0:f269e3021894 39 {1, 16},
elessair 0:f269e3021894 40 {2, 24},
elessair 0:f269e3021894 41 };
elessair 0:f269e3021894 42
elessair 0:f269e3021894 43 static const SWM_Map SWM_UART_RTS[] = {
elessair 0:f269e3021894 44 {0, 16},
elessair 0:f269e3021894 45 {1, 24},
elessair 0:f269e3021894 46 {3, 0}, // not available
elessair 0:f269e3021894 47 };
elessair 0:f269e3021894 48
elessair 0:f269e3021894 49 static const SWM_Map SWM_UART_CTS[] = {
elessair 0:f269e3021894 50 {0, 24},
elessair 0:f269e3021894 51 {2, 0},
elessair 0:f269e3021894 52 {3, 8} // not available
elessair 0:f269e3021894 53 };
elessair 0:f269e3021894 54
elessair 0:f269e3021894 55 // bit flags for used UARTs
elessair 0:f269e3021894 56 static unsigned char uart_used = 0;
elessair 0:f269e3021894 57 static int get_available_uart(void) {
elessair 0:f269e3021894 58 int i;
elessair 0:f269e3021894 59 for (i=0; i<3; i++) {
elessair 0:f269e3021894 60 if ((uart_used & (1 << i)) == 0)
elessair 0:f269e3021894 61 return i;
elessair 0:f269e3021894 62 }
elessair 0:f269e3021894 63 return -1;
elessair 0:f269e3021894 64 }
elessair 0:f269e3021894 65
elessair 0:f269e3021894 66 #define UART_EN (0x01<<0)
elessair 0:f269e3021894 67
elessair 0:f269e3021894 68 #define CTS_DELTA (0x01<<5)
elessair 0:f269e3021894 69 #define RXBRK (0x01<<10)
elessair 0:f269e3021894 70 #define DELTA_RXBRK (0x01<<11)
elessair 0:f269e3021894 71
elessair 0:f269e3021894 72 #define RXRDY (0x01<<0)
elessair 0:f269e3021894 73 #define TXRDY (0x01<<2)
elessair 0:f269e3021894 74
elessair 0:f269e3021894 75 #define TXBRKEN (0x01<<1)
elessair 0:f269e3021894 76 #define CTSEN (0x01<<9)
elessair 0:f269e3021894 77
elessair 0:f269e3021894 78 static uint32_t UARTSysClk;
elessair 0:f269e3021894 79
elessair 0:f269e3021894 80 static uint32_t serial_irq_ids[UART_NUM] = {0};
elessair 0:f269e3021894 81 static uart_irq_handler irq_handler;
elessair 0:f269e3021894 82
elessair 0:f269e3021894 83 int stdio_uart_inited = 0;
elessair 0:f269e3021894 84 serial_t stdio_uart;
elessair 0:f269e3021894 85
elessair 0:f269e3021894 86 static void switch_pin(const SWM_Map *swm, PinName pn)
elessair 0:f269e3021894 87 {
elessair 0:f269e3021894 88 uint32_t regVal;
elessair 0:f269e3021894 89 if (pn != NC)
elessair 0:f269e3021894 90 {
elessair 0:f269e3021894 91 // check if we have any function mapped to this pin already and remove it
elessair 0:f269e3021894 92 for (uint32_t n = 0; n < sizeof(LPC_SWM->PINASSIGN)/sizeof(*LPC_SWM->PINASSIGN); n ++) {
elessair 0:f269e3021894 93 regVal = LPC_SWM->PINASSIGN[n];
elessair 0:f269e3021894 94 for (uint32_t j = 0; j <= 24; j += 8) {
elessair 0:f269e3021894 95 if (((regVal >> j) & 0xFF) == (uint32_t)pn)
elessair 0:f269e3021894 96 regVal |= (0xFF << j);
elessair 0:f269e3021894 97 }
elessair 0:f269e3021894 98 LPC_SWM->PINASSIGN[n] = regVal;
elessair 0:f269e3021894 99 }
elessair 0:f269e3021894 100 }
elessair 0:f269e3021894 101 // now map it
elessair 0:f269e3021894 102 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
elessair 0:f269e3021894 103 LPC_SWM->PINASSIGN[swm->n] = regVal | (pn << swm->offset);
elessair 0:f269e3021894 104 }
elessair 0:f269e3021894 105
elessair 0:f269e3021894 106 void serial_init(serial_t *obj, PinName tx, PinName rx) {
elessair 0:f269e3021894 107 int is_stdio_uart = 0;
elessair 0:f269e3021894 108
elessair 0:f269e3021894 109 int uart_n = get_available_uart();
elessair 0:f269e3021894 110 if (uart_n == -1) {
elessair 0:f269e3021894 111 error("No available UART");
elessair 0:f269e3021894 112 }
elessair 0:f269e3021894 113 obj->index = uart_n;
elessair 0:f269e3021894 114 switch (uart_n) {
elessair 0:f269e3021894 115 case 0: obj->uart = (LPC_USART0_Type *)LPC_USART0_BASE; break;
elessair 0:f269e3021894 116 case 1: obj->uart = (LPC_USART0_Type *)LPC_USART1_BASE; break;
elessair 0:f269e3021894 117 case 2: obj->uart = (LPC_USART0_Type *)LPC_USART2_BASE; break;
elessair 0:f269e3021894 118 }
elessair 0:f269e3021894 119 uart_used |= (1 << uart_n);
elessair 0:f269e3021894 120
elessair 0:f269e3021894 121 switch_pin(&SWM_UART_TX[uart_n], tx);
elessair 0:f269e3021894 122 switch_pin(&SWM_UART_RX[uart_n], rx);
elessair 0:f269e3021894 123
elessair 0:f269e3021894 124 /* uart clock divided by 6 */
elessair 0:f269e3021894 125 LPC_SYSCON->UARTCLKDIV =6;
elessair 0:f269e3021894 126
elessair 0:f269e3021894 127 /* disable uart interrupts */
elessair 0:f269e3021894 128 NVIC_DisableIRQ((IRQn_Type)(UART0_IRQn + uart_n));
elessair 0:f269e3021894 129
elessair 0:f269e3021894 130 /* Enable UART clock */
elessair 0:f269e3021894 131 LPC_SYSCON->SYSAHBCLKCTRL1 |= (1 << (17 + uart_n));
elessair 0:f269e3021894 132
elessair 0:f269e3021894 133 /* Peripheral reset control to UART, a "1" bring it out of reset. */
elessair 0:f269e3021894 134 LPC_SYSCON->PRESETCTRL1 |= (0x1 << (17 + uart_n));
elessair 0:f269e3021894 135 LPC_SYSCON->PRESETCTRL1 &= ~(0x1 << (17 + uart_n));
elessair 0:f269e3021894 136
elessair 0:f269e3021894 137 UARTSysClk = SystemCoreClock / LPC_SYSCON->UARTCLKDIV;
elessair 0:f269e3021894 138
elessair 0:f269e3021894 139 // set default baud rate and format
elessair 0:f269e3021894 140 serial_baud (obj, 9600);
elessair 0:f269e3021894 141 serial_format(obj, 8, ParityNone, 1);
elessair 0:f269e3021894 142
elessair 0:f269e3021894 143 /* Clear all status bits. */
elessair 0:f269e3021894 144 obj->uart->STAT = CTS_DELTA | DELTA_RXBRK;
elessair 0:f269e3021894 145
elessair 0:f269e3021894 146 /* enable uart interrupts */
elessair 0:f269e3021894 147 NVIC_EnableIRQ((IRQn_Type)(UART0_IRQn + uart_n));
elessair 0:f269e3021894 148
elessair 0:f269e3021894 149 /* Enable UART */
elessair 0:f269e3021894 150 obj->uart->CFG |= UART_EN;
elessair 0:f269e3021894 151
elessair 0:f269e3021894 152 is_stdio_uart = ((tx == USBTX) && (rx == USBRX));
elessair 0:f269e3021894 153
elessair 0:f269e3021894 154 if (is_stdio_uart) {
elessair 0:f269e3021894 155 stdio_uart_inited = 1;
elessair 0:f269e3021894 156 memcpy(&stdio_uart, obj, sizeof(serial_t));
elessair 0:f269e3021894 157 }
elessair 0:f269e3021894 158 }
elessair 0:f269e3021894 159
elessair 0:f269e3021894 160 void serial_free(serial_t *obj) {
elessair 0:f269e3021894 161 uart_used &= ~(1 << obj->index);
elessair 0:f269e3021894 162 serial_irq_ids[obj->index] = 0;
elessair 0:f269e3021894 163 }
elessair 0:f269e3021894 164
elessair 0:f269e3021894 165 // serial_baud
elessair 0:f269e3021894 166 // set the baud rate, taking in to account the current SystemFrequency
elessair 0:f269e3021894 167 void serial_baud(serial_t *obj, int baudrate) {
elessair 0:f269e3021894 168 /* Integer divider:
elessair 0:f269e3021894 169 BRG = UARTSysClk/(Baudrate * 16) - 1
elessair 0:f269e3021894 170
elessair 0:f269e3021894 171 Frational divider:
elessair 0:f269e3021894 172 FRG = ((UARTSysClk / (Baudrate * 16 * (BRG + 1))) - 1)
elessair 0:f269e3021894 173
elessair 0:f269e3021894 174 where
elessair 0:f269e3021894 175 FRG = (LPC_SYSCON->UARTFRDADD + 1) / (LPC_SYSCON->UARTFRDSUB + 1)
elessair 0:f269e3021894 176
elessair 0:f269e3021894 177 (1) The easiest way is set SUB value to 256, -1 encoded, thus SUB
elessair 0:f269e3021894 178 register is 0xFF.
elessair 0:f269e3021894 179 (2) In ADD register value, depending on the value of UartSysClk,
elessair 0:f269e3021894 180 baudrate, BRG register value, and SUB register value, be careful
elessair 0:f269e3021894 181 about the order of multiplier and divider and make sure any
elessair 0:f269e3021894 182 multiplier doesn't exceed 32-bit boundary and any divider doesn't get
elessair 0:f269e3021894 183 down below one(integer 0).
elessair 0:f269e3021894 184 (3) ADD should be always less than SUB.
elessair 0:f269e3021894 185 */
elessair 0:f269e3021894 186 obj->uart->BRG = UARTSysClk / 16 / baudrate - 1;
elessair 0:f269e3021894 187
elessair 0:f269e3021894 188 // To use of the fractional baud rate generator, you must write 0xFF to the DIV
elessair 0:f269e3021894 189 // value to yield a denominator value of 256. All other values are not supported.
elessair 0:f269e3021894 190 LPC_SYSCON->FRGCTRL = 0xFF;
elessair 0:f269e3021894 191
elessair 0:f269e3021894 192 LPC_SYSCON->FRGCTRL |= ( ( ((UARTSysClk / 16) * (0xFF + 1)) /
elessair 0:f269e3021894 193 (baudrate * (obj->uart->BRG + 1))
elessair 0:f269e3021894 194 ) - (0xFF + 1) ) << 8;
elessair 0:f269e3021894 195
elessair 0:f269e3021894 196 }
elessair 0:f269e3021894 197
elessair 0:f269e3021894 198 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
elessair 0:f269e3021894 199 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); // 0: 1 stop bits, 1: 2 stop bits
elessair 0:f269e3021894 200 MBED_ASSERT((data_bits > 6) && (data_bits < 10)); // 0: 7 data bits ... 2: 9 data bits
elessair 0:f269e3021894 201 MBED_ASSERT((parity == ParityNone) || (parity == ParityEven) || (parity == ParityOdd));
elessair 0:f269e3021894 202
elessair 0:f269e3021894 203 stop_bits -= 1;
elessair 0:f269e3021894 204 data_bits -= 7;
elessair 0:f269e3021894 205
elessair 0:f269e3021894 206 int paritysel;
elessair 0:f269e3021894 207 switch (parity) {
elessair 0:f269e3021894 208 case ParityNone: paritysel = 0; break;
elessair 0:f269e3021894 209 case ParityEven: paritysel = 2; break;
elessair 0:f269e3021894 210 case ParityOdd : paritysel = 3; break;
elessair 0:f269e3021894 211 default:
elessair 0:f269e3021894 212 break;
elessair 0:f269e3021894 213 }
elessair 0:f269e3021894 214
elessair 0:f269e3021894 215 // First disable the the usart as described in documentation and then enable while updating CFG
elessair 0:f269e3021894 216
elessair 0:f269e3021894 217 // 24.6.1 USART Configuration register
elessair 0:f269e3021894 218 // Remark: If software needs to change configuration values, the following sequence should
elessair 0:f269e3021894 219 // be used: 1) Make sure the USART is not currently sending or receiving data. 2) Disable
elessair 0:f269e3021894 220 // the USART by writing a 0 to the Enable bit (0 may be written to the entire register). 3)
elessair 0:f269e3021894 221 // Write the new configuration value, with the ENABLE bit set to 1.
elessair 0:f269e3021894 222 obj->uart->CFG &= ~(1 << 0);
elessair 0:f269e3021894 223
elessair 0:f269e3021894 224 obj->uart->CFG = (1 << 0) // this will enable the usart
elessair 0:f269e3021894 225 | (data_bits << 2)
elessair 0:f269e3021894 226 | (paritysel << 4)
elessair 0:f269e3021894 227 | (stop_bits << 6);
elessair 0:f269e3021894 228 }
elessair 0:f269e3021894 229
elessair 0:f269e3021894 230 /******************************************************************************
elessair 0:f269e3021894 231 * INTERRUPTS HANDLING
elessair 0:f269e3021894 232 ******************************************************************************/
elessair 0:f269e3021894 233 static inline void uart_irq(SerialIrq irq_type, uint32_t index) {
elessair 0:f269e3021894 234 if (serial_irq_ids[index] != 0)
elessair 0:f269e3021894 235 irq_handler(serial_irq_ids[index], irq_type);
elessair 0:f269e3021894 236 }
elessair 0:f269e3021894 237
elessair 0:f269e3021894 238 void uart0_irq() {uart_irq((LPC_USART0->INTSTAT & 1) ? RxIrq : TxIrq, 0);}
elessair 0:f269e3021894 239 void uart1_irq() {uart_irq((LPC_USART1->INTSTAT & 1) ? RxIrq : TxIrq, 1);}
elessair 0:f269e3021894 240 void uart2_irq() {uart_irq((LPC_USART2->INTSTAT & 1) ? RxIrq : TxIrq, 2);}
elessair 0:f269e3021894 241
elessair 0:f269e3021894 242 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
elessair 0:f269e3021894 243 irq_handler = handler;
elessair 0:f269e3021894 244 serial_irq_ids[obj->index] = id;
elessair 0:f269e3021894 245 }
elessair 0:f269e3021894 246
elessair 0:f269e3021894 247 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
elessair 0:f269e3021894 248 IRQn_Type irq_n = (IRQn_Type)0;
elessair 0:f269e3021894 249 uint32_t vector = 0;
elessair 0:f269e3021894 250 switch ((int)obj->uart) {
elessair 0:f269e3021894 251 case LPC_USART0_BASE: irq_n=UART0_IRQn; vector = (uint32_t)&uart0_irq; break;
elessair 0:f269e3021894 252 case LPC_USART1_BASE: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
elessair 0:f269e3021894 253 case LPC_USART2_BASE: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break;
elessair 0:f269e3021894 254 }
elessair 0:f269e3021894 255
elessair 0:f269e3021894 256 if (enable) {
elessair 0:f269e3021894 257 NVIC_DisableIRQ(irq_n);
elessair 0:f269e3021894 258 obj->uart->INTENSET |= (1 << ((irq == RxIrq) ? 0 : 2));
elessair 0:f269e3021894 259 NVIC_SetVector(irq_n, vector);
elessair 0:f269e3021894 260 NVIC_EnableIRQ(irq_n);
elessair 0:f269e3021894 261 } else { // disable
elessair 0:f269e3021894 262 int all_disabled = 0;
elessair 0:f269e3021894 263 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
elessair 0:f269e3021894 264 obj->uart->INTENCLR |= (1 << ((irq == RxIrq) ? 0 : 2)); // disable the interrupt
elessair 0:f269e3021894 265 all_disabled = (obj->uart->INTENSET & (1 << ((other_irq == RxIrq) ? 0 : 2))) == 0;
elessair 0:f269e3021894 266 if (all_disabled)
elessair 0:f269e3021894 267 NVIC_DisableIRQ(irq_n);
elessair 0:f269e3021894 268 }
elessair 0:f269e3021894 269 }
elessair 0:f269e3021894 270
elessair 0:f269e3021894 271 /******************************************************************************
elessair 0:f269e3021894 272 * READ/WRITE
elessair 0:f269e3021894 273 ******************************************************************************/
elessair 0:f269e3021894 274 int serial_getc(serial_t *obj) {
elessair 0:f269e3021894 275 while (!serial_readable(obj));
elessair 0:f269e3021894 276 return obj->uart->RXDATA;
elessair 0:f269e3021894 277 }
elessair 0:f269e3021894 278
elessair 0:f269e3021894 279 void serial_putc(serial_t *obj, int c) {
elessair 0:f269e3021894 280 while (!serial_writable(obj));
elessair 0:f269e3021894 281 obj->uart->TXDATA = c;
elessair 0:f269e3021894 282 }
elessair 0:f269e3021894 283
elessair 0:f269e3021894 284 int serial_readable(serial_t *obj) {
elessair 0:f269e3021894 285 return obj->uart->STAT & RXRDY;
elessair 0:f269e3021894 286 }
elessair 0:f269e3021894 287
elessair 0:f269e3021894 288 int serial_writable(serial_t *obj) {
elessair 0:f269e3021894 289 return obj->uart->STAT & TXRDY;
elessair 0:f269e3021894 290 }
elessair 0:f269e3021894 291
elessair 0:f269e3021894 292 void serial_clear(serial_t *obj) {
elessair 0:f269e3021894 293 // [TODO]
elessair 0:f269e3021894 294 }
elessair 0:f269e3021894 295
elessair 0:f269e3021894 296 void serial_pinout_tx(PinName tx) {
elessair 0:f269e3021894 297
elessair 0:f269e3021894 298 }
elessair 0:f269e3021894 299
elessair 0:f269e3021894 300 void serial_break_set(serial_t *obj) {
elessair 0:f269e3021894 301 obj->uart->CTRL |= TXBRKEN;
elessair 0:f269e3021894 302 }
elessair 0:f269e3021894 303
elessair 0:f269e3021894 304 void serial_break_clear(serial_t *obj) {
elessair 0:f269e3021894 305 obj->uart->CTRL &= ~TXBRKEN;
elessair 0:f269e3021894 306 }
elessair 0:f269e3021894 307
elessair 0:f269e3021894 308 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) {
elessair 0:f269e3021894 309 if ((FlowControlNone == type || FlowControlRTS == type)) txflow = NC;
elessair 0:f269e3021894 310 if ((FlowControlNone == type || FlowControlCTS == type)) rxflow = NC;
elessair 0:f269e3021894 311 switch_pin(&SWM_UART_RTS[obj->index], rxflow);
elessair 0:f269e3021894 312 switch_pin(&SWM_UART_CTS[obj->index], txflow);
elessair 0:f269e3021894 313 if (txflow == NC) obj->uart->CFG &= ~CTSEN;
elessair 0:f269e3021894 314 else obj->uart->CFG |= CTSEN;
elessair 0:f269e3021894 315 }
elessair 0:f269e3021894 316