mbed-os
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targets/TARGET_NXP/TARGET_LPC11U6X/serial_api.c@1:3deb71413561, 2017-07-20 (annotated)
- Committer:
- xuaner
- Date:
- Thu Jul 20 14:26:57 2017 +0000
- Revision:
- 1:3deb71413561
- Parent:
- 0:f269e3021894
mbed_os
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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elessair | 0:f269e3021894 | 1 | /* mbed Microcontroller Library |
elessair | 0:f269e3021894 | 2 | * Copyright (c) 2006-2013 ARM Limited |
elessair | 0:f269e3021894 | 3 | * |
elessair | 0:f269e3021894 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
elessair | 0:f269e3021894 | 5 | * you may not use this file except in compliance with the License. |
elessair | 0:f269e3021894 | 6 | * You may obtain a copy of the License at |
elessair | 0:f269e3021894 | 7 | * |
elessair | 0:f269e3021894 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
elessair | 0:f269e3021894 | 9 | * |
elessair | 0:f269e3021894 | 10 | * Unless required by applicable law or agreed to in writing, software |
elessair | 0:f269e3021894 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
elessair | 0:f269e3021894 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
elessair | 0:f269e3021894 | 13 | * See the License for the specific language governing permissions and |
elessair | 0:f269e3021894 | 14 | * limitations under the License. |
elessair | 0:f269e3021894 | 15 | */ |
elessair | 0:f269e3021894 | 16 | |
elessair | 0:f269e3021894 | 17 | // math.h required for floating point operations for baud rate calculation |
elessair | 0:f269e3021894 | 18 | #include "mbed_assert.h" |
elessair | 0:f269e3021894 | 19 | #include <math.h> |
elessair | 0:f269e3021894 | 20 | #include <string.h> |
elessair | 0:f269e3021894 | 21 | #include <stdlib.h> |
elessair | 0:f269e3021894 | 22 | |
elessair | 0:f269e3021894 | 23 | #include "serial_api.h" |
elessair | 0:f269e3021894 | 24 | #include "cmsis.h" |
elessair | 0:f269e3021894 | 25 | #include "pinmap.h" |
elessair | 0:f269e3021894 | 26 | |
elessair | 0:f269e3021894 | 27 | #if DEVICE_SERIAL |
elessair | 0:f269e3021894 | 28 | |
elessair | 0:f269e3021894 | 29 | /****************************************************************************** |
elessair | 0:f269e3021894 | 30 | * INITIALIZATION |
elessair | 0:f269e3021894 | 31 | ******************************************************************************/ |
elessair | 0:f269e3021894 | 32 | |
elessair | 0:f269e3021894 | 33 | #define UART_NUM 5 |
elessair | 0:f269e3021894 | 34 | |
elessair | 0:f269e3021894 | 35 | // CFG |
elessair | 0:f269e3021894 | 36 | #define UART_EN (0x01<<0) |
elessair | 0:f269e3021894 | 37 | |
elessair | 0:f269e3021894 | 38 | // CTL |
elessair | 0:f269e3021894 | 39 | #define TXBRKEN (0x01<<1) |
elessair | 0:f269e3021894 | 40 | |
elessair | 0:f269e3021894 | 41 | // STAT |
elessair | 0:f269e3021894 | 42 | #define RXRDY (0x01<<0) |
elessair | 0:f269e3021894 | 43 | #define TXRDY (0x01<<2) |
elessair | 0:f269e3021894 | 44 | #define DELTACTS (0x01<<5) |
elessair | 0:f269e3021894 | 45 | #define RXBRK (0x01<<10) |
elessair | 0:f269e3021894 | 46 | #define DELTARXBRK (0x01<<11) |
elessair | 0:f269e3021894 | 47 | |
elessair | 0:f269e3021894 | 48 | static const PinMap PinMap_UART_TX[] = { |
elessair | 0:f269e3021894 | 49 | {P0_19, UART_0, 1}, |
elessair | 0:f269e3021894 | 50 | {P1_18, UART_0, 2}, |
elessair | 0:f269e3021894 | 51 | {P1_27, UART_0, 2}, |
elessair | 0:f269e3021894 | 52 | {P1_8 , UART_1, 2}, |
elessair | 0:f269e3021894 | 53 | {P0_14, UART_1, 4}, |
elessair | 0:f269e3021894 | 54 | {P1_0 , UART_2, 3}, |
elessair | 0:f269e3021894 | 55 | {P1_23, UART_2, 3}, |
elessair | 0:f269e3021894 | 56 | {P2_4 , UART_3, 1}, |
elessair | 0:f269e3021894 | 57 | {P2_12, UART_4, 1}, |
elessair | 0:f269e3021894 | 58 | { NC , NC , 0} |
elessair | 0:f269e3021894 | 59 | }; |
elessair | 0:f269e3021894 | 60 | |
elessair | 0:f269e3021894 | 61 | static const PinMap PinMap_UART_RX[] = { |
elessair | 0:f269e3021894 | 62 | {P0_18, UART_0, 1}, |
elessair | 0:f269e3021894 | 63 | {P1_17, UART_0, 2}, |
elessair | 0:f269e3021894 | 64 | {P1_26, UART_0, 2}, |
elessair | 0:f269e3021894 | 65 | {P1_2 , UART_1, 3}, |
elessair | 0:f269e3021894 | 66 | {P0_13, UART_1, 4}, |
elessair | 0:f269e3021894 | 67 | {P0_20, UART_2, 2}, |
elessair | 0:f269e3021894 | 68 | {P1_6 , UART_2, 2}, |
elessair | 0:f269e3021894 | 69 | {P2_3 , UART_3, 1}, |
elessair | 0:f269e3021894 | 70 | {P2_11, UART_4, 1}, |
elessair | 0:f269e3021894 | 71 | {NC , NC , 0} |
elessair | 0:f269e3021894 | 72 | }; |
elessair | 0:f269e3021894 | 73 | |
elessair | 0:f269e3021894 | 74 | static uint32_t serial_irq_ids[UART_NUM] = {0}; |
elessair | 0:f269e3021894 | 75 | static uart_irq_handler irq_handler; |
elessair | 0:f269e3021894 | 76 | |
elessair | 0:f269e3021894 | 77 | int stdio_uart_inited = 0; |
elessair | 0:f269e3021894 | 78 | serial_t stdio_uart; |
elessair | 0:f269e3021894 | 79 | |
elessair | 0:f269e3021894 | 80 | void serial_init(serial_t *obj, PinName tx, PinName rx) { |
elessair | 0:f269e3021894 | 81 | int is_stdio_uart = 0; |
elessair | 0:f269e3021894 | 82 | |
elessair | 0:f269e3021894 | 83 | // determine the UART to use |
elessair | 0:f269e3021894 | 84 | UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX); |
elessair | 0:f269e3021894 | 85 | UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX); |
elessair | 0:f269e3021894 | 86 | UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx); |
elessair | 0:f269e3021894 | 87 | MBED_ASSERT((int)uart != NC); |
elessair | 0:f269e3021894 | 88 | |
elessair | 0:f269e3021894 | 89 | switch (uart) { |
elessair | 0:f269e3021894 | 90 | case UART_0: |
elessair | 0:f269e3021894 | 91 | obj->index = 0; |
elessair | 0:f269e3021894 | 92 | LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 12); |
elessair | 0:f269e3021894 | 93 | break; |
elessair | 0:f269e3021894 | 94 | case UART_1: |
elessair | 0:f269e3021894 | 95 | obj->index = 1; |
elessair | 0:f269e3021894 | 96 | LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 20); |
elessair | 0:f269e3021894 | 97 | LPC_SYSCON->PRESETCTRL |= (1 << 5); |
elessair | 0:f269e3021894 | 98 | break; |
elessair | 0:f269e3021894 | 99 | case UART_2: |
elessair | 0:f269e3021894 | 100 | obj->index = 2; |
elessair | 0:f269e3021894 | 101 | LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 21); |
elessair | 0:f269e3021894 | 102 | LPC_SYSCON->PRESETCTRL |= (1 << 6); |
elessair | 0:f269e3021894 | 103 | break; |
elessair | 0:f269e3021894 | 104 | case UART_3: |
elessair | 0:f269e3021894 | 105 | obj->index = 3; |
elessair | 0:f269e3021894 | 106 | LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 22); |
elessair | 0:f269e3021894 | 107 | LPC_SYSCON->PRESETCTRL |= (1 << 7); |
elessair | 0:f269e3021894 | 108 | break; |
elessair | 0:f269e3021894 | 109 | case UART_4: |
elessair | 0:f269e3021894 | 110 | obj->index = 4; |
elessair | 0:f269e3021894 | 111 | LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 22); |
elessair | 0:f269e3021894 | 112 | LPC_SYSCON->PRESETCTRL |= (1 << 8); |
elessair | 0:f269e3021894 | 113 | break; |
elessair | 0:f269e3021894 | 114 | } |
elessair | 0:f269e3021894 | 115 | |
elessair | 0:f269e3021894 | 116 | if (obj->index == 0) |
elessair | 0:f269e3021894 | 117 | obj->uart = (LPC_USART0_Type *)uart; |
elessair | 0:f269e3021894 | 118 | else |
elessair | 0:f269e3021894 | 119 | obj->mini_uart = (LPC_USART4_Type *)uart; |
elessair | 0:f269e3021894 | 120 | |
elessair | 0:f269e3021894 | 121 | if (obj->index == 0) { |
elessair | 0:f269e3021894 | 122 | // enable fifos and default rx trigger level |
elessair | 0:f269e3021894 | 123 | obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled |
elessair | 0:f269e3021894 | 124 | | 0 << 1 // Rx Fifo Clear |
elessair | 0:f269e3021894 | 125 | | 0 << 2 // Tx Fifo Clear |
elessair | 0:f269e3021894 | 126 | | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars |
elessair | 0:f269e3021894 | 127 | // disable irqs |
elessair | 0:f269e3021894 | 128 | obj->uart->IER = 0 << 0 // Rx Data available irq enable |
elessair | 0:f269e3021894 | 129 | | 0 << 1 // Tx Fifo empty irq enable |
elessair | 0:f269e3021894 | 130 | | 0 << 2; // Rx Line Status irq enable |
elessair | 0:f269e3021894 | 131 | } |
elessair | 0:f269e3021894 | 132 | else { |
elessair | 0:f269e3021894 | 133 | // Clear all status bits |
elessair | 0:f269e3021894 | 134 | obj->mini_uart->STAT = (DELTACTS | DELTARXBRK); |
elessair | 0:f269e3021894 | 135 | // Enable UART |
elessair | 0:f269e3021894 | 136 | obj->mini_uart->CFG |= UART_EN; |
elessair | 0:f269e3021894 | 137 | } |
elessair | 0:f269e3021894 | 138 | // set default baud rate and format |
elessair | 0:f269e3021894 | 139 | serial_baud (obj, 9600); |
elessair | 0:f269e3021894 | 140 | serial_format(obj, 8, ParityNone, 1); |
elessair | 0:f269e3021894 | 141 | |
elessair | 0:f269e3021894 | 142 | // pinout the chosen uart |
elessair | 0:f269e3021894 | 143 | pinmap_pinout(tx, PinMap_UART_TX); |
elessair | 0:f269e3021894 | 144 | pinmap_pinout(rx, PinMap_UART_RX); |
elessair | 0:f269e3021894 | 145 | |
elessair | 0:f269e3021894 | 146 | // set rx/tx pins in PullUp mode |
elessair | 0:f269e3021894 | 147 | if (tx != NC) { |
elessair | 0:f269e3021894 | 148 | pin_mode(tx, PullUp); |
elessair | 0:f269e3021894 | 149 | } |
elessair | 0:f269e3021894 | 150 | if (rx != NC) { |
elessair | 0:f269e3021894 | 151 | pin_mode(rx, PullUp); |
elessair | 0:f269e3021894 | 152 | } |
elessair | 0:f269e3021894 | 153 | |
elessair | 0:f269e3021894 | 154 | is_stdio_uart = (uart == STDIO_UART) ? (1) : (0); |
elessair | 0:f269e3021894 | 155 | |
elessair | 0:f269e3021894 | 156 | if (is_stdio_uart && (obj->index == 0)) { |
elessair | 0:f269e3021894 | 157 | stdio_uart_inited = 1; |
elessair | 0:f269e3021894 | 158 | memcpy(&stdio_uart, obj, sizeof(serial_t)); |
elessair | 0:f269e3021894 | 159 | } |
elessair | 0:f269e3021894 | 160 | } |
elessair | 0:f269e3021894 | 161 | |
elessair | 0:f269e3021894 | 162 | void serial_free(serial_t *obj) { |
elessair | 0:f269e3021894 | 163 | serial_irq_ids[obj->index] = 0; |
elessair | 0:f269e3021894 | 164 | } |
elessair | 0:f269e3021894 | 165 | |
elessair | 0:f269e3021894 | 166 | // serial_baud |
elessair | 0:f269e3021894 | 167 | // set the baud rate, taking in to account the current SystemFrequency |
elessair | 0:f269e3021894 | 168 | void serial_baud(serial_t *obj, int baudrate) { |
elessair | 0:f269e3021894 | 169 | LPC_SYSCON->USART0CLKDIV = 1; |
elessair | 0:f269e3021894 | 170 | LPC_SYSCON->FRGCLKDIV = 1; |
elessair | 0:f269e3021894 | 171 | |
elessair | 0:f269e3021894 | 172 | if (obj->index == 0) { |
elessair | 0:f269e3021894 | 173 | uint32_t PCLK = SystemCoreClock; |
elessair | 0:f269e3021894 | 174 | // First we check to see if the basic divide with no DivAddVal/MulVal |
elessair | 0:f269e3021894 | 175 | // ratio gives us an integer result. If it does, we set DivAddVal = 0, |
elessair | 0:f269e3021894 | 176 | // MulVal = 1. Otherwise, we search the valid ratio value range to find |
elessair | 0:f269e3021894 | 177 | // the closest match. This could be more elegant, using search methods |
elessair | 0:f269e3021894 | 178 | // and/or lookup tables, but the brute force method is not that much |
elessair | 0:f269e3021894 | 179 | // slower, and is more maintainable. |
elessair | 0:f269e3021894 | 180 | uint16_t DL = PCLK / (16 * baudrate); |
elessair | 0:f269e3021894 | 181 | |
elessair | 0:f269e3021894 | 182 | uint8_t DivAddVal = 0; |
elessair | 0:f269e3021894 | 183 | uint8_t MulVal = 1; |
elessair | 0:f269e3021894 | 184 | int hit = 0; |
elessair | 0:f269e3021894 | 185 | uint16_t dlv; |
elessair | 0:f269e3021894 | 186 | uint8_t mv, dav; |
elessair | 0:f269e3021894 | 187 | if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder |
elessair | 0:f269e3021894 | 188 | int err_best = baudrate, b; |
elessair | 0:f269e3021894 | 189 | for (mv = 1; mv < 16 && !hit; mv++) |
elessair | 0:f269e3021894 | 190 | { |
elessair | 0:f269e3021894 | 191 | for (dav = 0; dav < mv; dav++) |
elessair | 0:f269e3021894 | 192 | { |
elessair | 0:f269e3021894 | 193 | // baudrate = PCLK / (16 * dlv * (1 + (DivAdd / Mul)) |
elessair | 0:f269e3021894 | 194 | // solving for dlv, we get dlv = mul * PCLK / (16 * baudrate * (divadd + mul)) |
elessair | 0:f269e3021894 | 195 | // mul has 4 bits, PCLK has 27 so we have 1 bit headroom which can be used for rounding |
elessair | 0:f269e3021894 | 196 | // for many values of mul and PCLK we have 2 or more bits of headroom which can be used to improve precision |
elessair | 0:f269e3021894 | 197 | // note: X / 32 doesn't round correctly. Instead, we use ((X / 16) + 1) / 2 for correct rounding |
elessair | 0:f269e3021894 | 198 | |
elessair | 0:f269e3021894 | 199 | if ((mv * PCLK * 2) & 0x80000000) // 1 bit headroom |
elessair | 0:f269e3021894 | 200 | dlv = ((((2 * mv * PCLK) / (baudrate * (dav + mv))) / 16) + 1) / 2; |
elessair | 0:f269e3021894 | 201 | else // 2 bits headroom, use more precision |
elessair | 0:f269e3021894 | 202 | dlv = ((((4 * mv * PCLK) / (baudrate * (dav + mv))) / 32) + 1) / 2; |
elessair | 0:f269e3021894 | 203 | |
elessair | 0:f269e3021894 | 204 | // datasheet says if DLL==DLM==0, then 1 is used instead since divide by zero is ungood |
elessair | 0:f269e3021894 | 205 | if (dlv == 0) |
elessair | 0:f269e3021894 | 206 | dlv = 1; |
elessair | 0:f269e3021894 | 207 | |
elessair | 0:f269e3021894 | 208 | // datasheet says if dav > 0 then DL must be >= 2 |
elessair | 0:f269e3021894 | 209 | if ((dav > 0) && (dlv < 2)) |
elessair | 0:f269e3021894 | 210 | dlv = 2; |
elessair | 0:f269e3021894 | 211 | |
elessair | 0:f269e3021894 | 212 | // integer rearrangement of the baudrate equation (with rounding) |
elessair | 0:f269e3021894 | 213 | b = ((PCLK * mv / (dlv * (dav + mv) * 8)) + 1) / 2; |
elessair | 0:f269e3021894 | 214 | |
elessair | 0:f269e3021894 | 215 | // check to see how we went |
elessair | 0:f269e3021894 | 216 | b = abs(b - baudrate); |
elessair | 0:f269e3021894 | 217 | if (b < err_best) |
elessair | 0:f269e3021894 | 218 | { |
elessair | 0:f269e3021894 | 219 | err_best = b; |
elessair | 0:f269e3021894 | 220 | |
elessair | 0:f269e3021894 | 221 | DL = dlv; |
elessair | 0:f269e3021894 | 222 | MulVal = mv; |
elessair | 0:f269e3021894 | 223 | DivAddVal = dav; |
elessair | 0:f269e3021894 | 224 | |
elessair | 0:f269e3021894 | 225 | if (b == baudrate) |
elessair | 0:f269e3021894 | 226 | { |
elessair | 0:f269e3021894 | 227 | hit = 1; |
elessair | 0:f269e3021894 | 228 | break; |
elessair | 0:f269e3021894 | 229 | } |
elessair | 0:f269e3021894 | 230 | } |
elessair | 0:f269e3021894 | 231 | } |
elessair | 0:f269e3021894 | 232 | } |
elessair | 0:f269e3021894 | 233 | } |
elessair | 0:f269e3021894 | 234 | |
elessair | 0:f269e3021894 | 235 | // set LCR[DLAB] to enable writing to divider registers |
elessair | 0:f269e3021894 | 236 | obj->uart->LCR |= (1 << 7); |
elessair | 0:f269e3021894 | 237 | |
elessair | 0:f269e3021894 | 238 | // set divider values |
elessair | 0:f269e3021894 | 239 | obj->uart->DLM = (DL >> 8) & 0xFF; |
elessair | 0:f269e3021894 | 240 | obj->uart->DLL = (DL >> 0) & 0xFF; |
elessair | 0:f269e3021894 | 241 | obj->uart->FDR = (uint32_t) DivAddVal << 0 |
elessair | 0:f269e3021894 | 242 | | (uint32_t) MulVal << 4; |
elessair | 0:f269e3021894 | 243 | |
elessair | 0:f269e3021894 | 244 | // clear LCR[DLAB] |
elessair | 0:f269e3021894 | 245 | obj->uart->LCR &= ~(1 << 7); |
elessair | 0:f269e3021894 | 246 | } |
elessair | 0:f269e3021894 | 247 | else { |
elessair | 0:f269e3021894 | 248 | uint32_t UARTSysClk = SystemCoreClock / LPC_SYSCON->FRGCLKDIV; |
elessair | 0:f269e3021894 | 249 | obj->mini_uart->BRG = UARTSysClk / 16 / baudrate - 1; |
elessair | 0:f269e3021894 | 250 | |
elessair | 0:f269e3021894 | 251 | LPC_SYSCON->UARTFRGDIV = 0xFF; |
elessair | 0:f269e3021894 | 252 | LPC_SYSCON->UARTFRGMULT = ( ((UARTSysClk / 16) * (LPC_SYSCON->UARTFRGDIV + 1)) / |
elessair | 0:f269e3021894 | 253 | (baudrate * (obj->mini_uart->BRG + 1)) |
elessair | 0:f269e3021894 | 254 | ) - (LPC_SYSCON->UARTFRGDIV + 1); |
elessair | 0:f269e3021894 | 255 | } |
elessair | 0:f269e3021894 | 256 | } |
elessair | 0:f269e3021894 | 257 | |
elessair | 0:f269e3021894 | 258 | void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) { |
elessair | 0:f269e3021894 | 259 | MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); // 0: 1 stop bits, 1: 2 stop bits |
elessair | 0:f269e3021894 | 260 | |
elessair | 0:f269e3021894 | 261 | stop_bits -= 1; |
elessair | 0:f269e3021894 | 262 | |
elessair | 0:f269e3021894 | 263 | if (obj->index == 0) { |
elessair | 0:f269e3021894 | 264 | MBED_ASSERT((data_bits > 4) && (data_bits < 9)); // 0: 5 data bits ... 3: 8 data bits |
elessair | 0:f269e3021894 | 265 | MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven) || |
elessair | 0:f269e3021894 | 266 | (parity == ParityForced1) || (parity == ParityForced0)); |
elessair | 0:f269e3021894 | 267 | data_bits -= 5; |
elessair | 0:f269e3021894 | 268 | |
elessair | 0:f269e3021894 | 269 | int parity_enable, parity_select; |
elessair | 0:f269e3021894 | 270 | switch (parity) { |
elessair | 0:f269e3021894 | 271 | case ParityNone: parity_enable = 0; parity_select = 0; break; |
elessair | 0:f269e3021894 | 272 | case ParityOdd : parity_enable = 1; parity_select = 0; break; |
elessair | 0:f269e3021894 | 273 | case ParityEven: parity_enable = 1; parity_select = 1; break; |
elessair | 0:f269e3021894 | 274 | case ParityForced1: parity_enable = 1; parity_select = 2; break; |
elessair | 0:f269e3021894 | 275 | case ParityForced0: parity_enable = 1; parity_select = 3; break; |
elessair | 0:f269e3021894 | 276 | default: |
elessair | 0:f269e3021894 | 277 | return; |
elessair | 0:f269e3021894 | 278 | } |
elessair | 0:f269e3021894 | 279 | |
elessair | 0:f269e3021894 | 280 | obj->uart->LCR = data_bits << 0 |
elessair | 0:f269e3021894 | 281 | | stop_bits << 2 |
elessair | 0:f269e3021894 | 282 | | parity_enable << 3 |
elessair | 0:f269e3021894 | 283 | | parity_select << 4; |
elessair | 0:f269e3021894 | 284 | } |
elessair | 0:f269e3021894 | 285 | else { |
elessair | 0:f269e3021894 | 286 | // 0: 7 data bits ... 2: 9 data bits |
elessair | 0:f269e3021894 | 287 | MBED_ASSERT((data_bits > 6) && (data_bits < 10)); |
elessair | 0:f269e3021894 | 288 | MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven)); |
elessair | 0:f269e3021894 | 289 | data_bits -= 7; |
elessair | 0:f269e3021894 | 290 | |
elessair | 0:f269e3021894 | 291 | int paritysel; |
elessair | 0:f269e3021894 | 292 | switch (parity) { |
elessair | 0:f269e3021894 | 293 | case ParityNone: paritysel = 0; break; |
elessair | 0:f269e3021894 | 294 | case ParityEven: paritysel = 2; break; |
elessair | 0:f269e3021894 | 295 | case ParityOdd : paritysel = 3; break; |
elessair | 0:f269e3021894 | 296 | default: |
elessair | 0:f269e3021894 | 297 | return; |
elessair | 0:f269e3021894 | 298 | } |
elessair | 0:f269e3021894 | 299 | obj->mini_uart->CFG = (data_bits << 2) |
elessair | 0:f269e3021894 | 300 | | (paritysel << 4) |
elessair | 0:f269e3021894 | 301 | | (stop_bits << 6) |
elessair | 0:f269e3021894 | 302 | | UART_EN; |
elessair | 0:f269e3021894 | 303 | } |
elessair | 0:f269e3021894 | 304 | } |
elessair | 0:f269e3021894 | 305 | |
elessair | 0:f269e3021894 | 306 | /****************************************************************************** |
elessair | 0:f269e3021894 | 307 | * INTERRUPTS HANDLING |
elessair | 0:f269e3021894 | 308 | ******************************************************************************/ |
elessair | 0:f269e3021894 | 309 | static inline void uart_irq(uint32_t iir, uint32_t index) { |
elessair | 0:f269e3021894 | 310 | SerialIrq irq_type; |
elessair | 0:f269e3021894 | 311 | switch (iir) { |
elessair | 0:f269e3021894 | 312 | case 1: irq_type = TxIrq; break; |
elessair | 0:f269e3021894 | 313 | case 2: irq_type = RxIrq; break; |
elessair | 0:f269e3021894 | 314 | default: return; |
elessair | 0:f269e3021894 | 315 | } |
elessair | 0:f269e3021894 | 316 | |
elessair | 0:f269e3021894 | 317 | if (serial_irq_ids[index] != 0) |
elessair | 0:f269e3021894 | 318 | irq_handler(serial_irq_ids[index], irq_type); |
elessair | 0:f269e3021894 | 319 | } |
elessair | 0:f269e3021894 | 320 | |
elessair | 0:f269e3021894 | 321 | void uart0_irq() |
elessair | 0:f269e3021894 | 322 | { |
elessair | 0:f269e3021894 | 323 | uart_irq((LPC_USART0->IIR >> 1) & 0x7, 0); |
elessair | 0:f269e3021894 | 324 | } |
elessair | 0:f269e3021894 | 325 | |
elessair | 0:f269e3021894 | 326 | void uart1_irq() |
elessair | 0:f269e3021894 | 327 | { |
elessair | 0:f269e3021894 | 328 | if(LPC_USART1->STAT & (1 << 2)){ |
elessair | 0:f269e3021894 | 329 | uart_irq(1, 1); |
elessair | 0:f269e3021894 | 330 | } |
elessair | 0:f269e3021894 | 331 | if(LPC_USART1->STAT & (1 << 0)){ |
elessair | 0:f269e3021894 | 332 | uart_irq(2, 1); |
elessair | 0:f269e3021894 | 333 | } |
elessair | 0:f269e3021894 | 334 | } |
elessair | 0:f269e3021894 | 335 | |
elessair | 0:f269e3021894 | 336 | void uart2_irq() |
elessair | 0:f269e3021894 | 337 | { |
elessair | 0:f269e3021894 | 338 | if(LPC_USART2->STAT & (1 << 2)){ |
elessair | 0:f269e3021894 | 339 | uart_irq(1, 2); |
elessair | 0:f269e3021894 | 340 | } |
elessair | 0:f269e3021894 | 341 | if(LPC_USART2->STAT & (1 << 0)){ |
elessair | 0:f269e3021894 | 342 | uart_irq(2, 2); |
elessair | 0:f269e3021894 | 343 | } |
elessair | 0:f269e3021894 | 344 | } |
elessair | 0:f269e3021894 | 345 | |
elessair | 0:f269e3021894 | 346 | void uart3_irq() |
elessair | 0:f269e3021894 | 347 | { |
elessair | 0:f269e3021894 | 348 | if(LPC_USART3->STAT & (1 << 2)){ |
elessair | 0:f269e3021894 | 349 | uart_irq(1, 3); |
elessair | 0:f269e3021894 | 350 | } |
elessair | 0:f269e3021894 | 351 | if(LPC_USART3->STAT & (1 << 0)){ |
elessair | 0:f269e3021894 | 352 | uart_irq(2, 3); |
elessair | 0:f269e3021894 | 353 | } |
elessair | 0:f269e3021894 | 354 | } |
elessair | 0:f269e3021894 | 355 | |
elessair | 0:f269e3021894 | 356 | void uart4_irq() |
elessair | 0:f269e3021894 | 357 | { |
elessair | 0:f269e3021894 | 358 | if(LPC_USART4->STAT & (1 << 2)){ |
elessair | 0:f269e3021894 | 359 | uart_irq(1, 4); |
elessair | 0:f269e3021894 | 360 | } |
elessair | 0:f269e3021894 | 361 | if(LPC_USART4->STAT & (1 << 0)){ |
elessair | 0:f269e3021894 | 362 | uart_irq(2, 4); |
elessair | 0:f269e3021894 | 363 | } |
elessair | 0:f269e3021894 | 364 | } |
elessair | 0:f269e3021894 | 365 | |
elessair | 0:f269e3021894 | 366 | void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) { |
elessair | 0:f269e3021894 | 367 | irq_handler = handler; |
elessair | 0:f269e3021894 | 368 | serial_irq_ids[obj->index] = id; |
elessair | 0:f269e3021894 | 369 | } |
elessair | 0:f269e3021894 | 370 | |
elessair | 0:f269e3021894 | 371 | void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) { |
elessair | 0:f269e3021894 | 372 | IRQn_Type irq_n = (IRQn_Type)0; |
elessair | 0:f269e3021894 | 373 | uint32_t vector = 0; |
elessair | 0:f269e3021894 | 374 | if(obj->index == 0){ |
elessair | 0:f269e3021894 | 375 | irq_n = USART0_IRQn; vector = (uint32_t)&uart0_irq; |
elessair | 0:f269e3021894 | 376 | } |
elessair | 0:f269e3021894 | 377 | else{ |
elessair | 0:f269e3021894 | 378 | switch ((int)obj->mini_uart) { |
elessair | 0:f269e3021894 | 379 | case UART_0: irq_n = USART0_IRQn; vector = (uint32_t)&uart0_irq; break; |
elessair | 0:f269e3021894 | 380 | case UART_1: irq_n = USART1_4_IRQn; vector = (uint32_t)&uart1_irq; break; |
elessair | 0:f269e3021894 | 381 | case UART_2: irq_n = USART2_3_IRQn; vector = (uint32_t)&uart2_irq; break; |
elessair | 0:f269e3021894 | 382 | case UART_3: irq_n = USART2_3_IRQn; vector = (uint32_t)&uart3_irq; break; |
elessair | 0:f269e3021894 | 383 | case UART_4: irq_n = USART1_4_IRQn; vector = (uint32_t)&uart4_irq; break; |
elessair | 0:f269e3021894 | 384 | } |
elessair | 0:f269e3021894 | 385 | } |
elessair | 0:f269e3021894 | 386 | |
elessair | 0:f269e3021894 | 387 | if (enable) { |
elessair | 0:f269e3021894 | 388 | if (obj->index == 0) { |
elessair | 0:f269e3021894 | 389 | obj->uart->IER |= (1 << irq); |
elessair | 0:f269e3021894 | 390 | } |
elessair | 0:f269e3021894 | 391 | else { |
elessair | 0:f269e3021894 | 392 | obj->mini_uart->INTENSET = (1 << ((irq == RxIrq) ? 0 : 2)); |
elessair | 0:f269e3021894 | 393 | } |
elessair | 0:f269e3021894 | 394 | NVIC_SetVector(irq_n, vector); |
elessair | 0:f269e3021894 | 395 | NVIC_EnableIRQ(irq_n); |
elessair | 0:f269e3021894 | 396 | } else { // disable |
elessair | 0:f269e3021894 | 397 | int all_disabled = 0; |
elessair | 0:f269e3021894 | 398 | SerialIrq other_irq = (irq == RxIrq) ? (RxIrq) : (TxIrq); |
elessair | 0:f269e3021894 | 399 | |
elessair | 0:f269e3021894 | 400 | if (obj->index == 0) { |
elessair | 0:f269e3021894 | 401 | obj->uart->IER &= ~(1 << irq); |
elessair | 0:f269e3021894 | 402 | all_disabled = (obj->uart->IER & (1 << other_irq)) == 0; |
elessair | 0:f269e3021894 | 403 | } |
elessair | 0:f269e3021894 | 404 | else { |
elessair | 0:f269e3021894 | 405 | obj->mini_uart->INTENCLR = (1 << ((irq == RxIrq) ? 0 : 2)); |
elessair | 0:f269e3021894 | 406 | all_disabled = (obj->mini_uart->INTENSET) == 0; |
elessair | 0:f269e3021894 | 407 | } |
elessair | 0:f269e3021894 | 408 | |
elessair | 0:f269e3021894 | 409 | if (all_disabled) |
elessair | 0:f269e3021894 | 410 | NVIC_DisableIRQ(irq_n); |
elessair | 0:f269e3021894 | 411 | } |
elessair | 0:f269e3021894 | 412 | } |
elessair | 0:f269e3021894 | 413 | |
elessair | 0:f269e3021894 | 414 | /****************************************************************************** |
elessair | 0:f269e3021894 | 415 | * READ/WRITE |
elessair | 0:f269e3021894 | 416 | ******************************************************************************/ |
elessair | 0:f269e3021894 | 417 | int serial_getc(serial_t *obj) { |
elessair | 0:f269e3021894 | 418 | while (!serial_readable(obj)); |
elessair | 0:f269e3021894 | 419 | if (obj->index == 0) { |
elessair | 0:f269e3021894 | 420 | return obj->uart->RBR; |
elessair | 0:f269e3021894 | 421 | } |
elessair | 0:f269e3021894 | 422 | else { |
elessair | 0:f269e3021894 | 423 | return obj->mini_uart->RXDAT; |
elessair | 0:f269e3021894 | 424 | } |
elessair | 0:f269e3021894 | 425 | } |
elessair | 0:f269e3021894 | 426 | |
elessair | 0:f269e3021894 | 427 | void serial_putc(serial_t *obj, int c) { |
elessair | 0:f269e3021894 | 428 | while (!serial_writable(obj)); |
elessair | 0:f269e3021894 | 429 | if (obj->index == 0) { |
elessair | 0:f269e3021894 | 430 | obj->uart->THR = c; |
elessair | 0:f269e3021894 | 431 | } |
elessair | 0:f269e3021894 | 432 | else { |
elessair | 0:f269e3021894 | 433 | obj->mini_uart->TXDAT = c; |
elessair | 0:f269e3021894 | 434 | } |
elessair | 0:f269e3021894 | 435 | } |
elessair | 0:f269e3021894 | 436 | |
elessair | 0:f269e3021894 | 437 | int serial_readable(serial_t *obj) { |
elessair | 0:f269e3021894 | 438 | if (obj->index == 0) { |
elessair | 0:f269e3021894 | 439 | return obj->uart->LSR & 0x01; |
elessair | 0:f269e3021894 | 440 | } |
elessair | 0:f269e3021894 | 441 | else { |
elessair | 0:f269e3021894 | 442 | return obj->mini_uart->STAT & RXRDY; |
elessair | 0:f269e3021894 | 443 | } |
elessair | 0:f269e3021894 | 444 | } |
elessair | 0:f269e3021894 | 445 | |
elessair | 0:f269e3021894 | 446 | int serial_writable(serial_t *obj) { |
elessair | 0:f269e3021894 | 447 | if (obj->index == 0) { |
elessair | 0:f269e3021894 | 448 | return obj->uart->LSR & 0x20; |
elessair | 0:f269e3021894 | 449 | } |
elessair | 0:f269e3021894 | 450 | else { |
elessair | 0:f269e3021894 | 451 | return obj->mini_uart->STAT & TXRDY; |
elessair | 0:f269e3021894 | 452 | } |
elessair | 0:f269e3021894 | 453 | } |
elessair | 0:f269e3021894 | 454 | |
elessair | 0:f269e3021894 | 455 | void serial_clear(serial_t *obj) { |
elessair | 0:f269e3021894 | 456 | if (obj->index == 0) { |
elessair | 0:f269e3021894 | 457 | obj->uart->FCR = 1 << 1 // rx FIFO reset |
elessair | 0:f269e3021894 | 458 | | 1 << 2 // tx FIFO reset |
elessair | 0:f269e3021894 | 459 | | 0 << 6; // interrupt depth |
elessair | 0:f269e3021894 | 460 | } |
elessair | 0:f269e3021894 | 461 | else { |
elessair | 0:f269e3021894 | 462 | obj->mini_uart->STAT = 0; |
elessair | 0:f269e3021894 | 463 | } |
elessair | 0:f269e3021894 | 464 | } |
elessair | 0:f269e3021894 | 465 | |
elessair | 0:f269e3021894 | 466 | void serial_pinout_tx(PinName tx) { |
elessair | 0:f269e3021894 | 467 | pinmap_pinout(tx, PinMap_UART_TX); |
elessair | 0:f269e3021894 | 468 | } |
elessair | 0:f269e3021894 | 469 | |
elessair | 0:f269e3021894 | 470 | void serial_break_set(serial_t *obj) { |
elessair | 0:f269e3021894 | 471 | if (obj->index == 0) { |
elessair | 0:f269e3021894 | 472 | obj->uart->LCR |= (1 << 6); |
elessair | 0:f269e3021894 | 473 | } |
elessair | 0:f269e3021894 | 474 | else { |
elessair | 0:f269e3021894 | 475 | obj->mini_uart->CTL |= TXBRKEN; |
elessair | 0:f269e3021894 | 476 | } |
elessair | 0:f269e3021894 | 477 | } |
elessair | 0:f269e3021894 | 478 | |
elessair | 0:f269e3021894 | 479 | void serial_break_clear(serial_t *obj) { |
elessair | 0:f269e3021894 | 480 | if (obj->index == 0) { |
elessair | 0:f269e3021894 | 481 | obj->uart->LCR &= ~(1 << 6); |
elessair | 0:f269e3021894 | 482 | } |
elessair | 0:f269e3021894 | 483 | else { |
elessair | 0:f269e3021894 | 484 | obj->mini_uart->CTL &= ~TXBRKEN; |
elessair | 0:f269e3021894 | 485 | } |
elessair | 0:f269e3021894 | 486 | } |
elessair | 0:f269e3021894 | 487 | |
elessair | 0:f269e3021894 | 488 | |
elessair | 0:f269e3021894 | 489 | #endif |