Lee Kai Xuan / mbed-os

mbed-os

Fork of mbed-os by erkin yucel

targets/TARGET_NUVOTON/TARGET_NUC472/lp_ticker.c@1:3deb71413561, 2017-07-20 (annotated)

Committer:
xuaner
Date:
Thu Jul 20 14:26:57 2017 +0000
Revision:
1:3deb71413561
Parent:
0:f269e3021894 
mbed_os

Who changed what in which revision?

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elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2015-2016 Nuvoton
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16
elessair 0:f269e3021894 17 #include "lp_ticker_api.h"
elessair 0:f269e3021894 18
elessair 0:f269e3021894 19 #if DEVICE_LOWPOWERTIMER
elessair 0:f269e3021894 20
elessair 0:f269e3021894 21 #include "sleep_api.h"
elessair 0:f269e3021894 22 #include "nu_modutil.h"
elessair 0:f269e3021894 23 #include "nu_miscutil.h"
elessair 0:f269e3021894 24 #include "critical.h"
elessair 0:f269e3021894 25
elessair 0:f269e3021894 26 // lp_ticker tick = us = timestamp
elessair 0:f269e3021894 27 #define US_PER_TICK (1)
elessair 0:f269e3021894 28 #define US_PER_SEC (1000 * 1000)
elessair 0:f269e3021894 29
elessair 0:f269e3021894 30 #define US_PER_TMR2_INT (US_PER_SEC * 10)
elessair 0:f269e3021894 31 #define TMR2_CLK_PER_SEC (__LXT)
elessair 0:f269e3021894 32 #define TMR2_CLK_PER_TMR2_INT ((uint32_t) ((uint64_t) US_PER_TMR2_INT * TMR2_CLK_PER_SEC / US_PER_SEC))
elessair 0:f269e3021894 33 #define TMR3_CLK_PER_SEC (__LXT)
elessair 0:f269e3021894 34
elessair 0:f269e3021894 35 static void tmr2_vec(void);
elessair 0:f269e3021894 36 static void tmr3_vec(void);
elessair 0:f269e3021894 37 static void lp_ticker_arm_cd(void);
elessair 0:f269e3021894 38
elessair 0:f269e3021894 39 static int lp_ticker_inited = 0;
elessair 0:f269e3021894 40 static volatile uint32_t counter_major = 0;
elessair 0:f269e3021894 41 static volatile uint32_t cd_major_minor_clks = 0;
elessair 0:f269e3021894 42 static volatile uint32_t cd_minor_clks = 0;
elessair 0:f269e3021894 43 static volatile uint32_t wakeup_tick = (uint32_t) -1;
elessair 0:f269e3021894 44
elessair 0:f269e3021894 45 // NOTE: To wake the system from power down mode, timer clock source must be ether LXT or LIRC.
elessair 0:f269e3021894 46 // NOTE: TIMER_2 for normal counting and TIMER_3 for scheduled wakeup
elessair 0:f269e3021894 47 static const struct nu_modinit_s timer2_modinit = {TIMER_2, TMR2_MODULE, CLK_CLKSEL1_TMR2SEL_LXT, 0, TMR2_RST, TMR2_IRQn, (void *) tmr2_vec};
elessair 0:f269e3021894 48 static const struct nu_modinit_s timer3_modinit = {TIMER_3, TMR3_MODULE, CLK_CLKSEL1_TMR3SEL_LXT, 0, TMR3_RST, TMR3_IRQn, (void *) tmr3_vec};
elessair 0:f269e3021894 49
elessair 0:f269e3021894 50 #define TMR_CMP_MIN 2
elessair 0:f269e3021894 51 #define TMR_CMP_MAX 0xFFFFFFu
elessair 0:f269e3021894 52
elessair 0:f269e3021894 53 void lp_ticker_init(void)
elessair 0:f269e3021894 54 {
elessair 0:f269e3021894 55 if (lp_ticker_inited) {
elessair 0:f269e3021894 56 return;
elessair 0:f269e3021894 57 }
elessair 0:f269e3021894 58 lp_ticker_inited = 1;
elessair 0:f269e3021894 59
elessair 0:f269e3021894 60 counter_major = 0;
elessair 0:f269e3021894 61 cd_major_minor_clks = 0;
elessair 0:f269e3021894 62 cd_minor_clks = 0;
elessair 0:f269e3021894 63 wakeup_tick = (uint32_t) -1;
elessair 0:f269e3021894 64
elessair 0:f269e3021894 65 // Reset module
elessair 0:f269e3021894 66 SYS_ResetModule(timer2_modinit.rsetidx);
elessair 0:f269e3021894 67 SYS_ResetModule(timer3_modinit.rsetidx);
elessair 0:f269e3021894 68
elessair 0:f269e3021894 69 // Select IP clock source
elessair 0:f269e3021894 70 CLK_SetModuleClock(timer2_modinit.clkidx, timer2_modinit.clksrc, timer2_modinit.clkdiv);
elessair 0:f269e3021894 71 CLK_SetModuleClock(timer3_modinit.clkidx, timer3_modinit.clksrc, timer3_modinit.clkdiv);
elessair 0:f269e3021894 72 // Enable IP clock
elessair 0:f269e3021894 73 CLK_EnableModuleClock(timer2_modinit.clkidx);
elessair 0:f269e3021894 74 CLK_EnableModuleClock(timer3_modinit.clkidx);
elessair 0:f269e3021894 75
elessair 0:f269e3021894 76 // Configure clock
elessair 0:f269e3021894 77 uint32_t clk_timer2 = TIMER_GetModuleClock((TIMER_T *) NU_MODBASE(timer2_modinit.modname));
elessair 0:f269e3021894 78 uint32_t prescale_timer2 = clk_timer2 / TMR2_CLK_PER_SEC - 1;
elessair 0:f269e3021894 79 MBED_ASSERT((prescale_timer2 != (uint32_t) -1) && prescale_timer2 <= 127);
elessair 0:f269e3021894 80 MBED_ASSERT((clk_timer2 % TMR2_CLK_PER_SEC) == 0);
elessair 0:f269e3021894 81 uint32_t cmp_timer2 = TMR2_CLK_PER_TMR2_INT;
elessair 0:f269e3021894 82 MBED_ASSERT(cmp_timer2 >= TMR_CMP_MIN && cmp_timer2 <= TMR_CMP_MAX);
elessair 0:f269e3021894 83 // Continuous mode
elessair 0:f269e3021894 84 ((TIMER_T *) NU_MODBASE(timer2_modinit.modname))->CTL = TIMER_PERIODIC_MODE | prescale_timer2 | TIMER_CTL_CNTDATEN_Msk;
elessair 0:f269e3021894 85 ((TIMER_T *) NU_MODBASE(timer2_modinit.modname))->CMP = cmp_timer2;
elessair 0:f269e3021894 86
elessair 0:f269e3021894 87 // Set vector
elessair 0:f269e3021894 88 NVIC_SetVector(timer2_modinit.irq_n, (uint32_t) timer2_modinit.var);
elessair 0:f269e3021894 89 NVIC_SetVector(timer3_modinit.irq_n, (uint32_t) timer3_modinit.var);
elessair 0:f269e3021894 90
elessair 0:f269e3021894 91 NVIC_EnableIRQ(timer2_modinit.irq_n);
elessair 0:f269e3021894 92 NVIC_EnableIRQ(timer3_modinit.irq_n);
elessair 0:f269e3021894 93
elessair 0:f269e3021894 94 TIMER_EnableInt((TIMER_T *) NU_MODBASE(timer2_modinit.modname));
elessair 0:f269e3021894 95 TIMER_EnableWakeup((TIMER_T *) NU_MODBASE(timer2_modinit.modname));
elessair 0:f269e3021894 96
elessair 0:f269e3021894 97 // Schedule wakeup to match semantics of lp_ticker_get_compare_match()
elessair 0:f269e3021894 98 lp_ticker_set_interrupt(wakeup_tick);
elessair 0:f269e3021894 99
elessair 0:f269e3021894 100 // Start timer
elessair 0:f269e3021894 101 TIMER_Start((TIMER_T *) NU_MODBASE(timer2_modinit.modname));
elessair 0:f269e3021894 102 }
elessair 0:f269e3021894 103
elessair 0:f269e3021894 104 timestamp_t lp_ticker_read()
elessair 0:f269e3021894 105 {
elessair 0:f269e3021894 106 if (! lp_ticker_inited) {
elessair 0:f269e3021894 107 lp_ticker_init();
elessair 0:f269e3021894 108 }
elessair 0:f269e3021894 109
elessair 0:f269e3021894 110 TIMER_T * timer2_base = (TIMER_T *) NU_MODBASE(timer2_modinit.modname);
elessair 0:f269e3021894 111
elessair 0:f269e3021894 112 do {
elessair 0:f269e3021894 113 uint64_t major_minor_clks;
elessair 0:f269e3021894 114 uint32_t minor_clks;
elessair 0:f269e3021894 115
elessair 0:f269e3021894 116 // NOTE: As TIMER_CNT = TIMER_CMP and counter_major has increased by one, TIMER_CNT doesn't change to 0 for one tick time.
elessair 0:f269e3021894 117 // NOTE: As TIMER_CNT = TIMER_CMP or TIMER_CNT = 0, counter_major (ISR) may not sync with TIMER_CNT. So skip and fetch stable one at the cost of 1 clock delay on this read.
elessair 0:f269e3021894 118 do {
elessair 0:f269e3021894 119 core_util_critical_section_enter();
elessair 0:f269e3021894 120
elessair 0:f269e3021894 121 // NOTE: Order of reading minor_us/carry here is significant.
elessair 0:f269e3021894 122 minor_clks = TIMER_GetCounter(timer2_base);
elessair 0:f269e3021894 123 uint32_t carry = (timer2_base->INTSTS & TIMER_INTSTS_TIF_Msk) ? 1 : 0;
elessair 0:f269e3021894 124 // When TIMER_CNT approaches TIMER_CMP and will wrap soon, we may get carry but TIMER_CNT not wrapped. Hanlde carefully carry == 1 && TIMER_CNT is near TIMER_CMP.
elessair 0:f269e3021894 125 if (carry && minor_clks > (TMR2_CLK_PER_TMR2_INT / 2)) {
elessair 0:f269e3021894 126 major_minor_clks = (counter_major + 1) * TMR2_CLK_PER_TMR2_INT;
elessair 0:f269e3021894 127 }
elessair 0:f269e3021894 128 else {
elessair 0:f269e3021894 129 major_minor_clks = (counter_major + carry) * TMR2_CLK_PER_TMR2_INT + minor_clks;
elessair 0:f269e3021894 130 }
elessair 0:f269e3021894 131
elessair 0:f269e3021894 132 core_util_critical_section_exit();
elessair 0:f269e3021894 133 }
elessair 0:f269e3021894 134 while (minor_clks == 0 || minor_clks == TMR2_CLK_PER_TMR2_INT);
elessair 0:f269e3021894 135
elessair 0:f269e3021894 136 // Add power-down compensation
elessair 0:f269e3021894 137 return ((uint64_t) major_minor_clks * US_PER_SEC / TMR3_CLK_PER_SEC / US_PER_TICK);
elessair 0:f269e3021894 138 }
elessair 0:f269e3021894 139 while (0);
elessair 0:f269e3021894 140 }
elessair 0:f269e3021894 141
elessair 0:f269e3021894 142 void lp_ticker_set_interrupt(timestamp_t timestamp)
elessair 0:f269e3021894 143 {
elessair 0:f269e3021894 144 uint32_t now = lp_ticker_read();
elessair 0:f269e3021894 145 wakeup_tick = timestamp;
elessair 0:f269e3021894 146
elessair 0:f269e3021894 147 TIMER_Stop((TIMER_T *) NU_MODBASE(timer3_modinit.modname));
elessair 0:f269e3021894 148
elessair 0:f269e3021894 149 /**
elessair 0:f269e3021894 150 * FIXME: Scheduled alarm may go off incorrectly due to wrap around.
elessair 0:f269e3021894 151 * Conditions in which delta is negative:
elessair 0:f269e3021894 152 * 1. Wrap around
elessair 0:f269e3021894 153 * 2. Newly scheduled alarm is behind now
elessair 0:f269e3021894 154 */
elessair 0:f269e3021894 155 //int delta = (timestamp > now) ? (timestamp - now) : (uint32_t) ((uint64_t) timestamp + 0xFFFFFFFFu - now);
elessair 0:f269e3021894 156 int delta = (int) (timestamp - now);
elessair 0:f269e3021894 157 if (delta > 0) {
elessair 0:f269e3021894 158 cd_major_minor_clks = (uint64_t) delta * US_PER_TICK * TMR3_CLK_PER_SEC / US_PER_SEC;
elessair 0:f269e3021894 159 lp_ticker_arm_cd();
elessair 0:f269e3021894 160 }
elessair 0:f269e3021894 161 else {
elessair 0:f269e3021894 162 cd_major_minor_clks = cd_minor_clks = 0;
elessair 0:f269e3021894 163 /**
elessair 0:f269e3021894 164 * This event was in the past. Set the interrupt as pending, but don't process it here.
elessair 0:f269e3021894 165 * This prevents a recurive loop under heavy load which can lead to a stack overflow.
elessair 0:f269e3021894 166 */
elessair 0:f269e3021894 167 NVIC_SetPendingIRQ(timer3_modinit.irq_n);
elessair 0:f269e3021894 168 }
elessair 0:f269e3021894 169 }
elessair 0:f269e3021894 170
elessair 0:f269e3021894 171 void lp_ticker_disable_interrupt(void)
elessair 0:f269e3021894 172 {
elessair 0:f269e3021894 173 TIMER_DisableInt((TIMER_T *) NU_MODBASE(timer3_modinit.modname));
elessair 0:f269e3021894 174 }
elessair 0:f269e3021894 175
elessair 0:f269e3021894 176 void lp_ticker_clear_interrupt(void)
elessair 0:f269e3021894 177 {
elessair 0:f269e3021894 178 TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(timer3_modinit.modname));
elessair 0:f269e3021894 179 }
elessair 0:f269e3021894 180
elessair 0:f269e3021894 181 static void tmr2_vec(void)
elessair 0:f269e3021894 182 {
elessair 0:f269e3021894 183 TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(timer2_modinit.modname));
elessair 0:f269e3021894 184 TIMER_ClearWakeupFlag((TIMER_T *) NU_MODBASE(timer2_modinit.modname));
elessair 0:f269e3021894 185 counter_major ++;
elessair 0:f269e3021894 186 }
elessair 0:f269e3021894 187
elessair 0:f269e3021894 188 static void tmr3_vec(void)
elessair 0:f269e3021894 189 {
elessair 0:f269e3021894 190 TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(timer3_modinit.modname));
elessair 0:f269e3021894 191 TIMER_ClearWakeupFlag((TIMER_T *) NU_MODBASE(timer3_modinit.modname));
elessair 0:f269e3021894 192 cd_major_minor_clks = (cd_major_minor_clks > cd_minor_clks) ? (cd_major_minor_clks - cd_minor_clks) : 0;
elessair 0:f269e3021894 193 if (cd_major_minor_clks == 0) {
elessair 0:f269e3021894 194 // NOTE: lp_ticker_set_interrupt() may get called in lp_ticker_irq_handler();
elessair 0:f269e3021894 195 lp_ticker_irq_handler();
elessair 0:f269e3021894 196 }
elessair 0:f269e3021894 197 else {
elessair 0:f269e3021894 198 lp_ticker_arm_cd();
elessair 0:f269e3021894 199 }
elessair 0:f269e3021894 200 }
elessair 0:f269e3021894 201
elessair 0:f269e3021894 202 static void lp_ticker_arm_cd(void)
elessair 0:f269e3021894 203 {
elessair 0:f269e3021894 204 TIMER_T * timer3_base = (TIMER_T *) NU_MODBASE(timer3_modinit.modname);
elessair 0:f269e3021894 205
elessair 0:f269e3021894 206 // Reset 8-bit PSC counter, 24-bit up counter value and CNTEN bit
elessair 0:f269e3021894 207 timer3_base->CTL |= TIMER_CTL_RSTCNT_Msk;
elessair 0:f269e3021894 208 // One-shot mode, Clock = 1 KHz
elessair 0:f269e3021894 209 uint32_t clk_timer3 = TIMER_GetModuleClock((TIMER_T *) NU_MODBASE(timer3_modinit.modname));
elessair 0:f269e3021894 210 uint32_t prescale_timer3 = clk_timer3 / TMR3_CLK_PER_SEC - 1;
elessair 0:f269e3021894 211 MBED_ASSERT((prescale_timer3 != (uint32_t) -1) && prescale_timer3 <= 127);
elessair 0:f269e3021894 212 MBED_ASSERT((clk_timer3 % TMR3_CLK_PER_SEC) == 0);
elessair 0:f269e3021894 213 timer3_base->CTL &= ~(TIMER_CTL_OPMODE_Msk | TIMER_CTL_PSC_Msk | TIMER_CTL_CNTDATEN_Msk);
elessair 0:f269e3021894 214 timer3_base->CTL |= TIMER_ONESHOT_MODE | prescale_timer3 | TIMER_CTL_CNTDATEN_Msk;
elessair 0:f269e3021894 215
elessair 0:f269e3021894 216 cd_minor_clks = cd_major_minor_clks;
elessair 0:f269e3021894 217 cd_minor_clks = NU_CLAMP(cd_minor_clks, TMR_CMP_MIN, TMR_CMP_MAX);
elessair 0:f269e3021894 218 timer3_base->CMP = cd_minor_clks;
elessair 0:f269e3021894 219
elessair 0:f269e3021894 220 TIMER_EnableInt(timer3_base);
elessair 0:f269e3021894 221 TIMER_EnableWakeup((TIMER_T *) NU_MODBASE(timer3_modinit.modname));
elessair 0:f269e3021894 222 TIMER_Start(timer3_base);
elessair 0:f269e3021894 223 }
elessair 0:f269e3021894 224 #endif