Lee Kai Xuan / mbed-os

mbed-os

Fork of mbed-os by erkin yucel

targets/TARGET_Maxim/TARGET_MAX32600/rtc_api.c@1:3deb71413561, 2017-07-20 (annotated)

Committer:
xuaner
Date:
Thu Jul 20 14:26:57 2017 +0000
Revision:
1:3deb71413561
Parent:
0:f269e3021894 
mbed_os

Who changed what in which revision?

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elessair 0:f269e3021894 1 /*******************************************************************************
elessair 0:f269e3021894 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Permission is hereby granted, free of charge, to any person obtaining a
elessair 0:f269e3021894 5 * copy of this software and associated documentation files (the "Software"),
elessair 0:f269e3021894 6 * to deal in the Software without restriction, including without limitation
elessair 0:f269e3021894 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
elessair 0:f269e3021894 8 * and/or sell copies of the Software, and to permit persons to whom the
elessair 0:f269e3021894 9 * Software is furnished to do so, subject to the following conditions:
elessair 0:f269e3021894 10 *
elessair 0:f269e3021894 11 * The above copyright notice and this permission notice shall be included
elessair 0:f269e3021894 12 * in all copies or substantial portions of the Software.
elessair 0:f269e3021894 13 *
elessair 0:f269e3021894 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
elessair 0:f269e3021894 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
elessair 0:f269e3021894 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
elessair 0:f269e3021894 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
elessair 0:f269e3021894 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
elessair 0:f269e3021894 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
elessair 0:f269e3021894 20 * OTHER DEALINGS IN THE SOFTWARE.
elessair 0:f269e3021894 21 *
elessair 0:f269e3021894 22 * Except as contained in this notice, the name of Maxim Integrated
elessair 0:f269e3021894 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
elessair 0:f269e3021894 24 * Products, Inc. Branding Policy.
elessair 0:f269e3021894 25 *
elessair 0:f269e3021894 26 * The mere transfer of this software does not imply any licenses
elessair 0:f269e3021894 27 * of trade secrets, proprietary technology, copyrights, patents,
elessair 0:f269e3021894 28 * trademarks, maskwork rights, or any other form of intellectual
elessair 0:f269e3021894 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
elessair 0:f269e3021894 30 * ownership rights.
elessair 0:f269e3021894 31 *******************************************************************************
elessair 0:f269e3021894 32 */
elessair 0:f269e3021894 33
elessair 0:f269e3021894 34 #include "rtc_api.h"
elessair 0:f269e3021894 35 #include "lp_ticker_api.h"
elessair 0:f269e3021894 36 #include "cmsis.h"
elessair 0:f269e3021894 37 #include "rtc_regs.h"
elessair 0:f269e3021894 38 #include "pwrseq_regs.h"
elessair 0:f269e3021894 39 #include "clkman_regs.h"
elessair 0:f269e3021894 40
elessair 0:f269e3021894 41 #define PRESCALE_VAL MXC_E_RTC_PRESCALE_DIV_2_0 // Set the divider for the 4kHz clock
elessair 0:f269e3021894 42 #define SHIFT_AMT (MXC_E_RTC_PRESCALE_DIV_2_12 - PRESCALE_VAL)
elessair 0:f269e3021894 43
elessair 0:f269e3021894 44 #define WINDOW 1000
elessair 0:f269e3021894 45
elessair 0:f269e3021894 46 static int rtc_inited = 0;
elessair 0:f269e3021894 47 static volatile uint32_t overflow_cnt = 0;
elessair 0:f269e3021894 48
elessair 0:f269e3021894 49 static uint64_t rtc_read64(void);
elessair 0:f269e3021894 50
elessair 0:f269e3021894 51 //******************************************************************************
elessair 0:f269e3021894 52 static void overflow_handler(void)
elessair 0:f269e3021894 53 {
elessair 0:f269e3021894 54 MXC_RTCTMR->flags = MXC_F_RTC_FLAGS_OVERFLOW;
elessair 0:f269e3021894 55 MXC_PWRSEQ->flags = MXC_F_PWRSEQ_MSK_FLAGS_RTC_ROLLOVER;
elessair 0:f269e3021894 56 overflow_cnt++;
elessair 0:f269e3021894 57 }
elessair 0:f269e3021894 58
elessair 0:f269e3021894 59 //******************************************************************************
elessair 0:f269e3021894 60 void rtc_init(void)
elessair 0:f269e3021894 61 {
elessair 0:f269e3021894 62 if (rtc_inited) {
elessair 0:f269e3021894 63 return;
elessair 0:f269e3021894 64 }
elessair 0:f269e3021894 65 rtc_inited = 1;
elessair 0:f269e3021894 66
elessair 0:f269e3021894 67 overflow_cnt = 0;
elessair 0:f269e3021894 68
elessair 0:f269e3021894 69 // Enable the clock to the synchronizer
elessair 0:f269e3021894 70 MXC_CLKMAN->clk_ctrl_13_rtc_int_sync = MXC_E_CLKMAN_CLK_SCALE_ENABLED;
elessair 0:f269e3021894 71
elessair 0:f269e3021894 72 // Enable the clock to the RTC
elessair 0:f269e3021894 73 MXC_PWRSEQ->reg0 |= MXC_F_PWRSEQ_REG0_PWR_RTCEN_RUN;
elessair 0:f269e3021894 74
elessair 0:f269e3021894 75 // Prepare interrupt handlers
elessair 0:f269e3021894 76 NVIC_SetVector(RTC0_IRQn, (uint32_t)lp_ticker_irq_handler);
elessair 0:f269e3021894 77 NVIC_EnableIRQ(RTC0_IRQn);
elessair 0:f269e3021894 78 NVIC_SetVector(RTC3_IRQn, (uint32_t)overflow_handler);
elessair 0:f269e3021894 79 NVIC_EnableIRQ(RTC3_IRQn);
elessair 0:f269e3021894 80
elessair 0:f269e3021894 81 // Enable wakeup on RTC rollover
elessair 0:f269e3021894 82 MXC_PWRSEQ->msk_flags &= ~MXC_F_PWRSEQ_MSK_FLAGS_RTC_ROLLOVER;
elessair 0:f269e3021894 83
elessair 0:f269e3021894 84 /* RTC registers are only reset on a power cycle. Do not reconfigure the RTC
elessair 0:f269e3021894 85 * if it is already running.
elessair 0:f269e3021894 86 */
elessair 0:f269e3021894 87 if (!(MXC_RTCTMR->ctrl & MXC_F_RTC_CTRL_ENABLE)) {
elessair 0:f269e3021894 88 // Set the clock divider
elessair 0:f269e3021894 89 MXC_RTCTMR->prescale = PRESCALE_VAL;
elessair 0:f269e3021894 90
elessair 0:f269e3021894 91 // Enable the overflow interrupt
elessair 0:f269e3021894 92 MXC_RTCTMR->inten |= MXC_F_RTC_FLAGS_OVERFLOW;
elessair 0:f269e3021894 93
elessair 0:f269e3021894 94 // Restart the timer from 0
elessair 0:f269e3021894 95 MXC_RTCTMR->timer = 0;
elessair 0:f269e3021894 96
elessair 0:f269e3021894 97 // Enable the RTC
elessair 0:f269e3021894 98 MXC_RTCTMR->ctrl |= MXC_F_RTC_CTRL_ENABLE;
elessair 0:f269e3021894 99 }
elessair 0:f269e3021894 100 }
elessair 0:f269e3021894 101
elessair 0:f269e3021894 102 //******************************************************************************
elessair 0:f269e3021894 103 void lp_ticker_init(void)
elessair 0:f269e3021894 104 {
elessair 0:f269e3021894 105 rtc_init();
elessair 0:f269e3021894 106 }
elessair 0:f269e3021894 107
elessair 0:f269e3021894 108 //******************************************************************************
elessair 0:f269e3021894 109 void rtc_free(void)
elessair 0:f269e3021894 110 {
elessair 0:f269e3021894 111 if (MXC_RTCTMR->ctrl & MXC_F_RTC_CTRL_ENABLE) {
elessair 0:f269e3021894 112 // Clear and disable RTC
elessair 0:f269e3021894 113 MXC_RTCTMR->ctrl |= MXC_F_RTC_CTRL_CLEAR;
elessair 0:f269e3021894 114 MXC_RTCTMR->ctrl &= ~MXC_F_RTC_CTRL_ENABLE;
elessair 0:f269e3021894 115
elessair 0:f269e3021894 116 // Wait for pending transactions
elessair 0:f269e3021894 117 while(MXC_RTCTMR->ctrl & MXC_F_RTC_CTRL_PENDING);
elessair 0:f269e3021894 118 }
elessair 0:f269e3021894 119
elessair 0:f269e3021894 120 // Disable the clock to the RTC
elessair 0:f269e3021894 121 MXC_PWRSEQ->reg0 &= ~(MXC_F_PWRSEQ_REG0_PWR_RTCEN_RUN | MXC_F_PWRSEQ_REG0_PWR_RTCEN_SLP);
elessair 0:f269e3021894 122
elessair 0:f269e3021894 123 // Disable the clock to the synchronizer
elessair 0:f269e3021894 124 MXC_CLKMAN->clk_ctrl_13_rtc_int_sync = MXC_E_CLKMAN_CLK_SCALE_DISABLED;
elessair 0:f269e3021894 125 }
elessair 0:f269e3021894 126
elessair 0:f269e3021894 127 //******************************************************************************
elessair 0:f269e3021894 128 int rtc_isenabled(void)
elessair 0:f269e3021894 129 {
elessair 0:f269e3021894 130 return (MXC_RTCTMR->ctrl & MXC_F_RTC_CTRL_ENABLE);
elessair 0:f269e3021894 131 }
elessair 0:f269e3021894 132
elessair 0:f269e3021894 133 //******************************************************************************
elessair 0:f269e3021894 134 time_t rtc_read(void)
elessair 0:f269e3021894 135 {
elessair 0:f269e3021894 136 uint32_t ovf_cnt_1, ovf_cnt_2, timer_cnt;
elessair 0:f269e3021894 137 uint32_t ovf1, ovf2;
elessair 0:f269e3021894 138
elessair 0:f269e3021894 139 // Ensure coherency between overflow_cnt and timer
elessair 0:f269e3021894 140 do {
elessair 0:f269e3021894 141 ovf_cnt_1 = overflow_cnt;
elessair 0:f269e3021894 142 ovf1 = MXC_RTCTMR->flags & MXC_F_RTC_FLAGS_OVERFLOW;
elessair 0:f269e3021894 143 timer_cnt = MXC_RTCTMR->timer;
elessair 0:f269e3021894 144 ovf2 = MXC_RTCTMR->flags & MXC_F_RTC_FLAGS_OVERFLOW;
elessair 0:f269e3021894 145 ovf_cnt_2 = overflow_cnt;
elessair 0:f269e3021894 146 } while ((ovf_cnt_1 != ovf_cnt_2) || (ovf1 != ovf2));
elessair 0:f269e3021894 147
elessair 0:f269e3021894 148 // Account for an unserviced interrupt
elessair 0:f269e3021894 149 if (ovf1) {
elessair 0:f269e3021894 150 ovf_cnt_1++;
elessair 0:f269e3021894 151 }
elessair 0:f269e3021894 152
elessair 0:f269e3021894 153 return (timer_cnt >> SHIFT_AMT) + (ovf_cnt_1 << (32 - SHIFT_AMT));
elessair 0:f269e3021894 154 }
elessair 0:f269e3021894 155
elessair 0:f269e3021894 156 //******************************************************************************
elessair 0:f269e3021894 157 static uint64_t rtc_read64(void)
elessair 0:f269e3021894 158 {
elessair 0:f269e3021894 159 uint32_t ovf_cnt_1, ovf_cnt_2, timer_cnt;
elessair 0:f269e3021894 160 uint32_t ovf1, ovf2;
elessair 0:f269e3021894 161 uint64_t current_us;
elessair 0:f269e3021894 162
elessair 0:f269e3021894 163 // Ensure coherency between overflow_cnt and timer
elessair 0:f269e3021894 164 do {
elessair 0:f269e3021894 165 ovf_cnt_1 = overflow_cnt;
elessair 0:f269e3021894 166 ovf1 = MXC_RTCTMR->flags & MXC_F_RTC_FLAGS_OVERFLOW;
elessair 0:f269e3021894 167 timer_cnt = MXC_RTCTMR->timer;
elessair 0:f269e3021894 168 ovf2 = MXC_RTCTMR->flags & MXC_F_RTC_FLAGS_OVERFLOW;
elessair 0:f269e3021894 169 ovf_cnt_2 = overflow_cnt;
elessair 0:f269e3021894 170 } while ((ovf_cnt_1 != ovf_cnt_2) || (ovf1 != ovf2));
elessair 0:f269e3021894 171
elessair 0:f269e3021894 172 // Account for an unserviced interrupt
elessair 0:f269e3021894 173 if (ovf1) {
elessair 0:f269e3021894 174 ovf_cnt_1++;
elessair 0:f269e3021894 175 }
elessair 0:f269e3021894 176
elessair 0:f269e3021894 177 current_us = (((uint64_t)timer_cnt * 1000000) >> SHIFT_AMT) + (((uint64_t)ovf_cnt_1 * 1000000) << (32 - SHIFT_AMT));
elessair 0:f269e3021894 178
elessair 0:f269e3021894 179 return current_us;
elessair 0:f269e3021894 180 }
elessair 0:f269e3021894 181
elessair 0:f269e3021894 182 //******************************************************************************
elessair 0:f269e3021894 183 void rtc_write(time_t t)
elessair 0:f269e3021894 184 {
elessair 0:f269e3021894 185 MXC_RTCTMR->ctrl &= ~MXC_F_RTC_CTRL_ENABLE; // disable the timer while updating
elessair 0:f269e3021894 186 MXC_RTCTMR->timer = t << SHIFT_AMT;
elessair 0:f269e3021894 187 overflow_cnt = t >> (32 - SHIFT_AMT);
elessair 0:f269e3021894 188 MXC_RTCTMR->ctrl |= MXC_F_RTC_CTRL_ENABLE; // enable the timer while updating
elessair 0:f269e3021894 189 }
elessair 0:f269e3021894 190
elessair 0:f269e3021894 191 //******************************************************************************
elessair 0:f269e3021894 192 void lp_ticker_set_interrupt(timestamp_t timestamp)
elessair 0:f269e3021894 193 {
elessair 0:f269e3021894 194 uint32_t comp_value;
elessair 0:f269e3021894 195 uint64_t curr_ts64;
elessair 0:f269e3021894 196 uint64_t ts64;
elessair 0:f269e3021894 197
elessair 0:f269e3021894 198 // Note: interrupts are disabled before this function is called.
elessair 0:f269e3021894 199
elessair 0:f269e3021894 200 // Disable the alarm while it is prepared
elessair 0:f269e3021894 201 MXC_RTCTMR->inten &= ~MXC_F_RTC_INTEN_COMP0;
elessair 0:f269e3021894 202
elessair 0:f269e3021894 203 curr_ts64 = rtc_read64();
elessair 0:f269e3021894 204 ts64 = (uint64_t)timestamp | (curr_ts64 & 0xFFFFFFFF00000000ULL);
elessair 0:f269e3021894 205
elessair 0:f269e3021894 206 // If this event is older than a recent window, it must be in the future
elessair 0:f269e3021894 207 if ((ts64 < (curr_ts64 - WINDOW)) && ((curr_ts64 - WINDOW) < curr_ts64)) {
elessair 0:f269e3021894 208 ts64 += 0x100000000ULL;
elessair 0:f269e3021894 209 }
elessair 0:f269e3021894 210
elessair 0:f269e3021894 211 uint32_t timer = MXC_RTCTMR->timer;
elessair 0:f269e3021894 212 if (ts64 <= curr_ts64) {
elessair 0:f269e3021894 213 // This event has already occurred. Set the alarm to expire immediately.
elessair 0:f269e3021894 214 comp_value = timer + 1;
elessair 0:f269e3021894 215 } else {
elessair 0:f269e3021894 216 comp_value = (ts64 << SHIFT_AMT) / 1000000;
elessair 0:f269e3021894 217 }
elessair 0:f269e3021894 218
elessair 0:f269e3021894 219 // Ensure that the compare value is far enough in the future to guarantee the interrupt occurs.
elessair 0:f269e3021894 220 if ((comp_value < (timer + 2)) && (comp_value > (timer - 10))) {
elessair 0:f269e3021894 221 comp_value = timer + 2;
elessair 0:f269e3021894 222 }
elessair 0:f269e3021894 223
elessair 0:f269e3021894 224 MXC_RTCTMR->comp[0] = comp_value;
elessair 0:f269e3021894 225 MXC_RTCTMR->flags = MXC_F_RTC_FLAGS_COMP0; // clear interrupt
elessair 0:f269e3021894 226 MXC_RTCTMR->inten |= MXC_F_RTC_INTEN_COMP0; // enable the interrupt
elessair 0:f269e3021894 227
elessair 0:f269e3021894 228 // Enable wakeup from RTC
elessair 0:f269e3021894 229 MXC_PWRSEQ->msk_flags &= ~MXC_F_PWRSEQ_MSK_FLAGS_RTC_CMPR0;
elessair 0:f269e3021894 230 }
elessair 0:f269e3021894 231
elessair 0:f269e3021894 232 //******************************************************************************
elessair 0:f269e3021894 233 inline void lp_ticker_disable_interrupt(void)
elessair 0:f269e3021894 234 {
elessair 0:f269e3021894 235 MXC_RTCTMR->inten &= ~MXC_F_RTC_INTEN_COMP0;
elessair 0:f269e3021894 236 }
elessair 0:f269e3021894 237
elessair 0:f269e3021894 238 //******************************************************************************
elessair 0:f269e3021894 239 inline void lp_ticker_clear_interrupt(void)
elessair 0:f269e3021894 240 {
elessair 0:f269e3021894 241 MXC_RTCTMR->flags = MXC_F_RTC_FLAGS_ASYNC_CLR_FLAGS;
elessair 0:f269e3021894 242 MXC_PWRSEQ->flags = MXC_F_PWRSEQ_MSK_FLAGS_RTC_CMPR0;
elessair 0:f269e3021894 243 }
elessair 0:f269e3021894 244
elessair 0:f269e3021894 245 //******************************************************************************
elessair 0:f269e3021894 246 inline uint32_t lp_ticker_read(void)
elessair 0:f269e3021894 247 {
elessair 0:f269e3021894 248 return rtc_read64();
elessair 0:f269e3021894 249 }