Shigeki KOMATSU / Mbed 2 deprecated mbeduino_MP3_Shield_MP3Player

mbeduino MP3 Sheild player MP3 player that runs on mebeduin with MP3 Shield. Regarding mbeduino, refer to: http://mbed.org/users/okini3939/notebook/mbeduino/ Regarding MP3 Shiled, refer to: http://www.sparkfun.com/commerce/product_info.php?products_id=9736

Dependencies:   mbed SDFileSystem

VS1053.h@1:c47269f0e9e1, 2010-10-16 (annotated)

Committer:
xshige
Date:
Sat Oct 16 05:14:59 2010 +0000
Revision:
1:c47269f0e9e1
Parent:
0:67cb2f650c15 
2010/10/16 version: (1) Patch loading is supported.  The patch is needed to make FLAC decoder work. (2)MP3,Ogg,MIDI,WMA,FLAC,AAC work correctly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
xshige 0:67cb2f650c15 1 #ifndef VS1053_H
xshige 0:67cb2f650c15 2 #define VS1053_H
xshige 0:67cb2f650c15 3
xshige 0:67cb2f650c15 4 #define FIXED_VOL
xshige 0:67cb2f650c15 5
xshige 1:c47269f0e9e1 6 // the following two is exclusive use
xshige 1:c47269f0e9e1 7 #define VS_PATCH
xshige 1:c47269f0e9e1 8 //#define VS_SPECANA
xshige 1:c47269f0e9e1 9
xshige 0:67cb2f650c15 10 #include "mbed.h"
xshige 0:67cb2f650c15 11 //#include "SDFileSystem.h"
xshige 0:67cb2f650c15 12 #include "string"
xshige 0:67cb2f650c15 13 #include "string.h"
xshige 0:67cb2f650c15 14
xshige 1:c47269f0e9e1 15 // SCI register address assignment
xshige 1:c47269f0e9e1 16 #define SCI_MODE 0x0
xshige 1:c47269f0e9e1 17 #define SCI_STATUS 0x1
xshige 1:c47269f0e9e1 18 #define SCI_BASS 0x2
xshige 1:c47269f0e9e1 19 #define SCI_CLOCKF 0x3
xshige 1:c47269f0e9e1 20 #define SCI_DECODE_TOME 0x4
xshige 1:c47269f0e9e1 21 #define SCI_AUDATA 0x5
xshige 1:c47269f0e9e1 22 #define SCI_WRAM 0x6
xshige 1:c47269f0e9e1 23 #define SCI_WRAMADDR 0x7
xshige 1:c47269f0e9e1 24 #define SCI_HDAT0 0x8
xshige 1:c47269f0e9e1 25 #define SCI_HDAT1 0x9
xshige 1:c47269f0e9e1 26 #define SCI_AIADDR 0xA
xshige 1:c47269f0e9e1 27 #define SCI_VOL 0xB
xshige 1:c47269f0e9e1 28 #define SCI_AICTRL0 0xC
xshige 1:c47269f0e9e1 29 #define SCI_AICTRL1 0xD
xshige 1:c47269f0e9e1 30 #define SCI_AICTRL2 0xE
xshige 1:c47269f0e9e1 31 #define SCI_AICTRL3 0xF
xshige 1:c47269f0e9e1 32
xshige 1:c47269f0e9e1 33
xshige 0:67cb2f650c15 34 //SCI_MODE register bits as of p.38 of the datasheet
xshige 0:67cb2f650c15 35 #define SM_DIFF 0x0001
xshige 0:67cb2f650c15 36 #define SM_LAYER12 0x0002
xshige 0:67cb2f650c15 37 #define SM_RESET 0x0004
xshige 0:67cb2f650c15 38 #define SM_CANCEL 0x0008
xshige 0:67cb2f650c15 39 #define SM_EARSPEAKER_LO 0x0010
xshige 0:67cb2f650c15 40 #define SM_TESTS 0x0020
xshige 0:67cb2f650c15 41 #define SM_STREAM 0x0040
xshige 0:67cb2f650c15 42 #define SM_EARSPEAKER_HI 0x0080
xshige 0:67cb2f650c15 43 #define SM_DACT 0x0100
xshige 0:67cb2f650c15 44 #define SM_SDIORD 0x0200
xshige 0:67cb2f650c15 45 #define SM_SDISHARE 0x0400
xshige 0:67cb2f650c15 46 #define SM_SDINEW 0x0800
xshige 0:67cb2f650c15 47 #define SM_ADPCM 0x1000
xshige 0:67cb2f650c15 48 #define SM_B13 0x2000
xshige 0:67cb2f650c15 49 #define SM_LINE1 0x4000
xshige 1:c47269f0e9e1 50 #define SM_CLK_RANGE 0x8000
xshige 1:c47269f0e9e1 51
xshige 1:c47269f0e9e1 52 //SCI_CLOCKF register bits as of p.42 of the datasheet
xshige 1:c47269f0e9e1 53 #define SC_MULT_XTALI 0x0000
xshige 1:c47269f0e9e1 54 #define SC_MULT_XTALIx20 0x2000
xshige 1:c47269f0e9e1 55 #define SC_MULT_XTALIx25 0x4000
xshige 1:c47269f0e9e1 56 #define SC_MULT_XTALIx30 0x6000
xshige 1:c47269f0e9e1 57 #define SC_MULT_XTALIx35 0x8000
xshige 1:c47269f0e9e1 58 #define SC_MULT_XTALIx40 0xA000
xshige 1:c47269f0e9e1 59 #define SC_MULT_XTALIx45 0xC000
xshige 1:c47269f0e9e1 60 #define SC_MULT_XTALIx50 0xE000
xshige 1:c47269f0e9e1 61 //
xshige 1:c47269f0e9e1 62 #define SC_ADD_NOMOD 0x0000
xshige 1:c47269f0e9e1 63 #define SC_ADD_10x 0x0800
xshige 1:c47269f0e9e1 64 #define SC_ADD_15x 0x1000
xshige 1:c47269f0e9e1 65 #define SC_ADD_20x 0x1800
xshige 1:c47269f0e9e1 66
xshige 1:c47269f0e9e1 67
xshige 1:c47269f0e9e1 68 // Extra Parameter in X memory (refer to p.58 of the datasheet)
xshige 1:c47269f0e9e1 69 #define para_chipID_0 0x1E00
xshige 1:c47269f0e9e1 70 #define para_chipID_1 0x1E01
xshige 1:c47269f0e9e1 71 #define para_version 0x1E02
xshige 1:c47269f0e9e1 72 #define para_config1 0x1E03
xshige 1:c47269f0e9e1 73 #define para_playSpeed 0x1E04
xshige 1:c47269f0e9e1 74 #define para_byteRate 0x1E05
xshige 1:c47269f0e9e1 75 #define para_endFillByte 0x1E06
xshige 1:c47269f0e9e1 76 //
xshige 1:c47269f0e9e1 77 #define para_positionMsec_0 0x1E27
xshige 1:c47269f0e9e1 78 #define para_positionMsec_1 0x1E28
xshige 1:c47269f0e9e1 79 #define para_resync 0x1E29
xshige 1:c47269f0e9e1 80
xshige 0:67cb2f650c15 81
xshige 0:67cb2f650c15 82 class VS1053 {
xshige 0:67cb2f650c15 83
xshige 0:67cb2f650c15 84 public:
xshige 0:67cb2f650c15 85 VS1053(
xshige 0:67cb2f650c15 86 //PinName _mmosi, PinName _mmiso, PinName _ssck, PinName _ccs, const char* _name,
xshige 0:67cb2f650c15 87 PinName _mosi, PinName _miso, PinName _sck, PinName _cs, PinName _rst, PinName _dreq,
xshige 0:67cb2f650c15 88 PinName _dcs, PinName _vol);
xshige 0:67cb2f650c15 89
xshige 0:67cb2f650c15 90 void cs_low(void);
xshige 0:67cb2f650c15 91 void cs_high(void);
xshige 0:67cb2f650c15 92 void dcs_low(void);
xshige 0:67cb2f650c15 93 void dcs_high(void);
xshige 0:67cb2f650c15 94 void sci_en(void);
xshige 0:67cb2f650c15 95 void sci_dis(void);
xshige 0:67cb2f650c15 96 void sdi_en(void);
xshige 0:67cb2f650c15 97 void sdi_dis(void);
xshige 0:67cb2f650c15 98
xshige 0:67cb2f650c15 99 void sci_initialise(void);
xshige 0:67cb2f650c15 100 void sdi_initialise(void);
xshige 0:67cb2f650c15 101 void reset(void);
xshige 0:67cb2f650c15 102 void power_down(void);
xshige 0:67cb2f650c15 103
xshige 0:67cb2f650c15 104 void sci_write(unsigned char, unsigned short int);
xshige 0:67cb2f650c15 105 void sdi_write(unsigned char);
xshige 1:c47269f0e9e1 106 unsigned short int sci_read(unsigned short int);
xshige 0:67cb2f650c15 107 void sine_test_activate(unsigned char);
xshige 0:67cb2f650c15 108 void volume(void);
xshige 0:67cb2f650c15 109 void sine_test_deactivate(void);
xshige 0:67cb2f650c15 110 void writeStream(unsigned char *, int);
xshige 0:67cb2f650c15 111 #if 0
xshige 0:67cb2f650c15 112 void putcStream(unsigned char);
xshige 0:67cb2f650c15 113 #endif
xshige 0:67cb2f650c15 114 void terminateStream(void);
xshige 1:c47269f0e9e1 115 // void write_plugin(const unsigned short *, unsigned int);
xshige 1:c47269f0e9e1 116 void initialize(void);
xshige 1:c47269f0e9e1 117
xshige 0:67cb2f650c15 118 DigitalIn _DREQ;
xshige 0:67cb2f650c15 119 DigitalOut _RST;
xshige 0:67cb2f650c15 120 AnalogIn _VOL;
xshige 0:67cb2f650c15 121
xshige 0:67cb2f650c15 122 protected:
xshige 1:c47269f0e9e1 123 unsigned short int wram_read(unsigned short int);
xshige 1:c47269f0e9e1 124 void wram_write(unsigned short int, unsigned short int);
xshige 1:c47269f0e9e1 125 void write_plugin(const unsigned short *, unsigned int);
xshige 0:67cb2f650c15 126 SPI _spi;
xshige 0:67cb2f650c15 127 DigitalOut _CS;
xshige 0:67cb2f650c15 128 DigitalOut _DCS;
xshige 1:c47269f0e9e1 129 int firstTime;
xshige 0:67cb2f650c15 130
xshige 0:67cb2f650c15 131 };
xshige 0:67cb2f650c15 132 #endif