RIT (Repetitive Interrupt Timer) Demo.
Dependencies: mbed RIT FastAnalogIn
rit_demo.cpp@1:508cd706654a, 2022-01-18 (annotated)
- Committer:
- wvd_vegt
- Date:
- Tue Jan 18 17:16:53 2022 +0000
- Revision:
- 1:508cd706654a
- Parent:
- 0:faa449765bcc
Combined with FastAnalogIn
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
wvd_vegt | 0:faa449765bcc | 1 | /* mbed Repetitive Interrupt Timer Library |
wvd_vegt | 0:faa449765bcc | 2 | * Copyright (c) 2011 wvd_vegt |
wvd_vegt | 0:faa449765bcc | 3 | * |
wvd_vegt | 0:faa449765bcc | 4 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
wvd_vegt | 0:faa449765bcc | 5 | * of this software and associated documentation files (the "Software"), to deal |
wvd_vegt | 0:faa449765bcc | 6 | * in the Software without restriction, including without limitation the rights |
wvd_vegt | 0:faa449765bcc | 7 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
wvd_vegt | 0:faa449765bcc | 8 | * copies of the Software, and to permit persons to whom the Software is |
wvd_vegt | 0:faa449765bcc | 9 | * furnished to do so, subject to the following conditions: |
wvd_vegt | 0:faa449765bcc | 10 | * |
wvd_vegt | 0:faa449765bcc | 11 | * The above copyright notice and this permission notice shall be included in |
wvd_vegt | 0:faa449765bcc | 12 | * all copies or substantial portions of the Software. |
wvd_vegt | 0:faa449765bcc | 13 | * |
wvd_vegt | 0:faa449765bcc | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
wvd_vegt | 0:faa449765bcc | 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
wvd_vegt | 0:faa449765bcc | 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
wvd_vegt | 0:faa449765bcc | 17 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
wvd_vegt | 0:faa449765bcc | 18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
wvd_vegt | 0:faa449765bcc | 19 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
wvd_vegt | 0:faa449765bcc | 20 | * THE SOFTWARE. |
wvd_vegt | 0:faa449765bcc | 21 | */ |
wvd_vegt | 0:faa449765bcc | 22 | |
wvd_vegt | 0:faa449765bcc | 23 | #include "mbed.h" |
wvd_vegt | 0:faa449765bcc | 24 | #include "RIT.h" |
wvd_vegt | 1:508cd706654a | 25 | #include "FastAnalogIn.h" |
wvd_vegt | 0:faa449765bcc | 26 | |
wvd_vegt | 0:faa449765bcc | 27 | //We'll be using the Usb Serial port |
wvd_vegt | 0:faa449765bcc | 28 | Serial serial(USBTX, USBRX); //tx, rx |
wvd_vegt | 0:faa449765bcc | 29 | |
wvd_vegt | 0:faa449765bcc | 30 | DigitalOut rit_led(LED3); |
wvd_vegt | 0:faa449765bcc | 31 | |
wvd_vegt | 1:508cd706654a | 32 | FastAnalogIn a1(p19,true); //Ain1 - Peel Force |
wvd_vegt | 1:508cd706654a | 33 | FastAnalogIn a2(p20,true); //Ain2 - Seal Force |
wvd_vegt | 1:508cd706654a | 34 | |
wvd_vegt | 1:508cd706654a | 35 | #define SAMPLE_BUFFER_LENGTH 1000 |
wvd_vegt | 1:508cd706654a | 36 | |
wvd_vegt | 0:faa449765bcc | 37 | volatile uint32_t rithits = 0; //timer1 stops when timer1hits==imer1loop |
wvd_vegt | 0:faa449765bcc | 38 | |
wvd_vegt | 1:508cd706654a | 39 | volatile bool done = false; |
wvd_vegt | 1:508cd706654a | 40 | volatile short flip = 1; |
wvd_vegt | 1:508cd706654a | 41 | |
wvd_vegt | 0:faa449765bcc | 42 | Timer rit_timing; |
wvd_vegt | 0:faa449765bcc | 43 | |
wvd_vegt | 1:508cd706654a | 44 | static short adc1[SAMPLE_BUFFER_LENGTH] __attribute__ ((aligned (64))); |
wvd_vegt | 1:508cd706654a | 45 | static short adc2[SAMPLE_BUFFER_LENGTH] __attribute__ ((aligned (64))); |
wvd_vegt | 1:508cd706654a | 46 | static int Timing01[SAMPLE_BUFFER_LENGTH]; |
wvd_vegt | 0:faa449765bcc | 47 | |
wvd_vegt | 1:508cd706654a | 48 | void RIT_IRQHandler(void) |
wvd_vegt | 1:508cd706654a | 49 | { |
wvd_vegt | 1:508cd706654a | 50 | if (!done) { |
wvd_vegt | 1:508cd706654a | 51 | Timing01[rithits] = rit_timing.read_us(); |
wvd_vegt | 1:508cd706654a | 52 | if (flip%2) { |
wvd_vegt | 1:508cd706654a | 53 | adc1[rithits]=a1.read_u16(); |
wvd_vegt | 1:508cd706654a | 54 | } else { |
wvd_vegt | 1:508cd706654a | 55 | adc2[rithits]=a2.read_u16(); |
wvd_vegt | 1:508cd706654a | 56 | |
wvd_vegt | 1:508cd706654a | 57 | //Count Hits. |
wvd_vegt | 1:508cd706654a | 58 | rithits++; |
wvd_vegt | 1:508cd706654a | 59 | } |
wvd_vegt | 1:508cd706654a | 60 | |
wvd_vegt | 1:508cd706654a | 61 | flip ++; |
wvd_vegt | 1:508cd706654a | 62 | |
wvd_vegt | 1:508cd706654a | 63 | //Flash Led. |
wvd_vegt | 1:508cd706654a | 64 | //rit_led=!rit_led; |
wvd_vegt | 1:508cd706654a | 65 | done = rithits==SAMPLE_BUFFER_LENGTH; |
wvd_vegt | 1:508cd706654a | 66 | } |
wvd_vegt | 0:faa449765bcc | 67 | } |
wvd_vegt | 0:faa449765bcc | 68 | |
wvd_vegt | 1:508cd706654a | 69 | /* |
wvd_vegt | 1:508cd706654a | 70 | LPC_TIM1->IR = 0x1UL; // Re-enabled |
wvd_vegt | 1:508cd706654a | 71 | |
wvd_vegt | 1:508cd706654a | 72 | Timing01[timer1hits] = adc_stamper.read_us(); |
wvd_vegt | 1:508cd706654a | 73 | |
wvd_vegt | 1:508cd706654a | 74 | //TODO Toggle Channel Mask (01 to 01 in ADCR). |
wvd_vegt | 1:508cd706654a | 75 | // Take twice the number of samples at half the sampling time |
wvd_vegt | 1:508cd706654a | 76 | // So 2000 samples (1000+1000) at 0.5ms -> 1000 pairs in 1 sec. |
wvd_vegt | 1:508cd706654a | 77 | |
wvd_vegt | 1:508cd706654a | 78 | switch (LPC_ADC->ADSTAT & (t_ch0|t_ch1)) |
wvd_vegt | 1:508cd706654a | 79 | { |
wvd_vegt | 1:508cd706654a | 80 | case t_ch0: |
wvd_vegt | 1:508cd706654a | 81 | Samples0[timer1hits] = LPC_ADC->ADDR4; |
wvd_vegt | 1:508cd706654a | 82 | break; |
wvd_vegt | 1:508cd706654a | 83 | } |
wvd_vegt | 1:508cd706654a | 84 | } |
wvd_vegt | 1:508cd706654a | 85 | */ |
wvd_vegt | 1:508cd706654a | 86 | //https://developer.mbed.org/forum/mbed/topic/370/ |
wvd_vegt | 0:faa449765bcc | 87 | RIT rit(1000); |
wvd_vegt | 0:faa449765bcc | 88 | |
wvd_vegt | 1:508cd706654a | 89 | //https://developer.mbed.org/handbook/Ticker |
wvd_vegt | 1:508cd706654a | 90 | //Ticker ticker; |
wvd_vegt | 1:508cd706654a | 91 | |
wvd_vegt | 1:508cd706654a | 92 | //void tock() |
wvd_vegt | 1:508cd706654a | 93 | //{ |
wvd_vegt | 1:508cd706654a | 94 | // Timing01[rithits] = rit_timing.read_us(); |
wvd_vegt | 1:508cd706654a | 95 | //} |
wvd_vegt | 1:508cd706654a | 96 | |
wvd_vegt | 1:508cd706654a | 97 | int main() |
wvd_vegt | 1:508cd706654a | 98 | { |
wvd_vegt | 0:faa449765bcc | 99 | // Set the Baudrate. |
wvd_vegt | 0:faa449765bcc | 100 | serial.baud(115200); |
wvd_vegt | 0:faa449765bcc | 101 | |
wvd_vegt | 1:508cd706654a | 102 | rit.setup_us(10); |
wvd_vegt | 0:faa449765bcc | 103 | |
wvd_vegt | 0:faa449765bcc | 104 | rit.append(RIT_IRQHandler); |
wvd_vegt | 0:faa449765bcc | 105 | |
wvd_vegt | 1:508cd706654a | 106 | rit.enable(); |
wvd_vegt | 0:faa449765bcc | 107 | rit_timing.start(); |
wvd_vegt | 1:508cd706654a | 108 | |
wvd_vegt | 1:508cd706654a | 109 | while (!done) { |
wvd_vegt | 1:508cd706654a | 110 | // wait(0.001); |
wvd_vegt | 0:faa449765bcc | 111 | } |
wvd_vegt | 1:508cd706654a | 112 | |
wvd_vegt | 1:508cd706654a | 113 | rit_timing.stop(); |
wvd_vegt | 0:faa449765bcc | 114 | rit.disable(); |
wvd_vegt | 0:faa449765bcc | 115 | |
wvd_vegt | 0:faa449765bcc | 116 | rit.unappend(); |
wvd_vegt | 1:508cd706654a | 117 | |
wvd_vegt | 1:508cd706654a | 118 | for (int i=0; i<SAMPLE_BUFFER_LENGTH; i++) { |
wvd_vegt | 1:508cd706654a | 119 | serial.printf("%3d %6.3f - %6d - %6d\r\n",i, Timing01[i]/1000.0f, adc1[i], adc2[i]); |
wvd_vegt | 1:508cd706654a | 120 | } |
wvd_vegt | 1:508cd706654a | 121 | serial.printf("%3d %6.3f - %6d - %6d\r\n",0, Timing01[0]/1000.0f, adc1[0], adc2[0]); |
wvd_vegt | 1:508cd706654a | 122 | |
wvd_vegt | 1:508cd706654a | 123 | printf("COMPVAL=%d\r\n", LPC_RIT->RICOMPVAL); // 959 (960-1) |
wvd_vegt | 1:508cd706654a | 124 | printf("COUNTER=%d\r\n", LPC_RIT->RICOUNTER); // 807? |
wvd_vegt | 1:508cd706654a | 125 | printf("HITS=%d\r\n", rithits); |
wvd_vegt | 1:508cd706654a | 126 | printf("ELAPSED=%0.3f ms\r\n", rit_timing.read_us()/1000.0f); |
wvd_vegt | 1:508cd706654a | 127 | printf("ELAPSED=%0.3f ms\r\n", (Timing01[SAMPLE_BUFFER_LENGTH-1]-Timing01[0])/1000.0f); |
wvd_vegt | 1:508cd706654a | 128 | |
wvd_vegt | 1:508cd706654a | 129 | /* |
wvd_vegt | 1:508cd706654a | 130 | // |
wvd_vegt | 1:508cd706654a | 131 | printf("Requested max sample rate is %u, actual max sample rate is %u.\r\n", |
wvd_vegt | 1:508cd706654a | 132 | SAMPLE_RATE, adc.actual_sample_rate()); |
wvd_vegt | 1:508cd706654a | 133 | |
wvd_vegt | 1:508cd706654a | 134 | adc.startmode(0,0); |
wvd_vegt | 1:508cd706654a | 135 | |
wvd_vegt | 1:508cd706654a | 136 | adc.burst(1); |
wvd_vegt | 1:508cd706654a | 137 | |
wvd_vegt | 1:508cd706654a | 138 | adc.setup(p15,1); |
wvd_vegt | 1:508cd706654a | 139 | adc.setup(p16,1); |
wvd_vegt | 1:508cd706654a | 140 | |
wvd_vegt | 1:508cd706654a | 141 | //For burst mode, only one interrupt is required |
wvd_vegt | 1:508cd706654a | 142 | //which can be on any enabled pin. We have enabled all |
wvd_vegt | 1:508cd706654a | 143 | //of them here. |
wvd_vegt | 1:508cd706654a | 144 | adc.interrupt_state(p15,1); |
wvd_vegt | 1:508cd706654a | 145 | adc_timing.reset(); |
wvd_vegt | 1:508cd706654a | 146 | adc_timing.start(); |
wvd_vegt | 1:508cd706654a | 147 | |
wvd_vegt | 1:508cd706654a | 148 | //10 ms sample time. |
wvd_vegt | 1:508cd706654a | 149 | rit.setup_ms(10); |
wvd_vegt | 1:508cd706654a | 150 | |
wvd_vegt | 1:508cd706654a | 151 | //Clear ADC Storage stuff... |
wvd_vegt | 1:508cd706654a | 152 | adchits = 0; |
wvd_vegt | 1:508cd706654a | 153 | memset(Samples0, 0,sizeof(Samples0)); |
wvd_vegt | 1:508cd706654a | 154 | memset(Samples1, 0,sizeof(Samples1)); |
wvd_vegt | 1:508cd706654a | 155 | |
wvd_vegt | 1:508cd706654a | 156 | rit.append(Adc_IRQHandler); |
wvd_vegt | 1:508cd706654a | 157 | |
wvd_vegt | 1:508cd706654a | 158 | rit_timing.reset(); |
wvd_vegt | 1:508cd706654a | 159 | rit_timing.start(); |
wvd_vegt | 1:508cd706654a | 160 | |
wvd_vegt | 1:508cd706654a | 161 | rit.enable(); |
wvd_vegt | 1:508cd706654a | 162 | |
wvd_vegt | 1:508cd706654a | 163 | //To be sure... |
wvd_vegt | 1:508cd706654a | 164 | while (adchits!=MAX_SAMPLES) { |
wvd_vegt | 1:508cd706654a | 165 | wait(0.01); |
wvd_vegt | 1:508cd706654a | 166 | } |
wvd_vegt | 1:508cd706654a | 167 | |
wvd_vegt | 1:508cd706654a | 168 | rit.disable(); |
wvd_vegt | 1:508cd706654a | 169 | |
wvd_vegt | 1:508cd706654a | 170 | rit_timing.stop(); |
wvd_vegt | 1:508cd706654a | 171 | |
wvd_vegt | 1:508cd706654a | 172 | rit.unappend(); |
wvd_vegt | 1:508cd706654a | 173 | |
wvd_vegt | 1:508cd706654a | 174 | for (int i=0; i < MAX_SAMPLES; i++) { |
wvd_vegt | 1:508cd706654a | 175 | printf("%04d=%04d | %04d @ %08d\r\n", i, Samples0[i], Samples1[i], Timing01[i]); |
wvd_vegt | 1:508cd706654a | 176 | } |
wvd_vegt | 1:508cd706654a | 177 | |
wvd_vegt | 1:508cd706654a | 178 | printf("ELAPSED=%0.2f ms\r\n", rit_timing.read_us()/1000); |
wvd_vegt | 1:508cd706654a | 179 | printf("HITS=%d\r\n", adchits); |
wvd_vegt | 1:508cd706654a | 180 | |
wvd_vegt | 1:508cd706654a | 181 | adc.burst(0); |
wvd_vegt | 1:508cd706654a | 182 | |
wvd_vegt | 1:508cd706654a | 183 | adc.setup(p15,0); |
wvd_vegt | 1:508cd706654a | 184 | adc.setup(p16,0); |
wvd_vegt | 1:508cd706654a | 185 | |
wvd_vegt | 1:508cd706654a | 186 | adc.interrupt_state(p15,0); |
wvd_vegt | 1:508cd706654a | 187 | |
wvd_vegt | 1:508cd706654a | 188 | adc_timing.stop(); |
wvd_vegt | 1:508cd706654a | 189 | */ |
wvd_vegt | 0:faa449765bcc | 190 | } |