Witek Ewert / Mbed 2 deprecated KL46Z-Lab2_lodz

Sensor reporting over USB CDC

Dependencies:   MAG3110 MMA8451Q SLCD- TSI USBDevice mbed

USBDevice/USBDevice/USBHAL_KL25Z.cpp@0:7b58cdacf811, 2014-04-16 (annotated)

Committer:
wue
Date:
Wed Apr 16 12:20:12 2014 +0000
Revision:
0:7b58cdacf811
Sensor reporting over USB CDC

Who changed what in which revision?

UserRevisionLine numberNew contents of line
wue 0:7b58cdacf811 1 /* Copyright (c) 2010-2011 mbed.org, MIT License
wue 0:7b58cdacf811 2 *
wue 0:7b58cdacf811 3 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
wue 0:7b58cdacf811 4 * and associated documentation files (the "Software"), to deal in the Software without
wue 0:7b58cdacf811 5 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
wue 0:7b58cdacf811 6 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
wue 0:7b58cdacf811 7 * Software is furnished to do so, subject to the following conditions:
wue 0:7b58cdacf811 8 *
wue 0:7b58cdacf811 9 * The above copyright notice and this permission notice shall be included in all copies or
wue 0:7b58cdacf811 10 * substantial portions of the Software.
wue 0:7b58cdacf811 11 *
wue 0:7b58cdacf811 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
wue 0:7b58cdacf811 13 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
wue 0:7b58cdacf811 14 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
wue 0:7b58cdacf811 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
wue 0:7b58cdacf811 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
wue 0:7b58cdacf811 17 */
wue 0:7b58cdacf811 18
wue 0:7b58cdacf811 19 #if defined(TARGET_KL25Z) | defined(TARGET_KL46Z) | defined(TARGET_K20D5M)
wue 0:7b58cdacf811 20
wue 0:7b58cdacf811 21 #include "USBHAL.h"
wue 0:7b58cdacf811 22
wue 0:7b58cdacf811 23 USBHAL * USBHAL::instance;
wue 0:7b58cdacf811 24
wue 0:7b58cdacf811 25 static volatile int epComplete = 0;
wue 0:7b58cdacf811 26
wue 0:7b58cdacf811 27 // Convert physical endpoint number to register bit
wue 0:7b58cdacf811 28 #define EP(endpoint) (1<<(endpoint))
wue 0:7b58cdacf811 29
wue 0:7b58cdacf811 30 // Convert physical to logical
wue 0:7b58cdacf811 31 #define PHY_TO_LOG(endpoint) ((endpoint)>>1)
wue 0:7b58cdacf811 32
wue 0:7b58cdacf811 33 // Get endpoint direction
wue 0:7b58cdacf811 34 #define IN_EP(endpoint) ((endpoint) & 1U ? true : false)
wue 0:7b58cdacf811 35 #define OUT_EP(endpoint) ((endpoint) & 1U ? false : true)
wue 0:7b58cdacf811 36
wue 0:7b58cdacf811 37 #define BD_OWN_MASK (1<<7)
wue 0:7b58cdacf811 38 #define BD_DATA01_MASK (1<<6)
wue 0:7b58cdacf811 39 #define BD_KEEP_MASK (1<<5)
wue 0:7b58cdacf811 40 #define BD_NINC_MASK (1<<4)
wue 0:7b58cdacf811 41 #define BD_DTS_MASK (1<<3)
wue 0:7b58cdacf811 42 #define BD_STALL_MASK (1<<2)
wue 0:7b58cdacf811 43
wue 0:7b58cdacf811 44 #define TX 1
wue 0:7b58cdacf811 45 #define RX 0
wue 0:7b58cdacf811 46 #define ODD 0
wue 0:7b58cdacf811 47 #define EVEN 1
wue 0:7b58cdacf811 48 // this macro waits a physical endpoint number
wue 0:7b58cdacf811 49 #define EP_BDT_IDX(ep, dir, odd) (((ep * 4) + (2 * dir) + (1 * odd)))
wue 0:7b58cdacf811 50
wue 0:7b58cdacf811 51 #define SETUP_TOKEN 0x0D
wue 0:7b58cdacf811 52 #define IN_TOKEN 0x09
wue 0:7b58cdacf811 53 #define OUT_TOKEN 0x01
wue 0:7b58cdacf811 54 #define TOK_PID(idx) ((bdt[idx].info >> 2) & 0x0F)
wue 0:7b58cdacf811 55
wue 0:7b58cdacf811 56 // for each endpt: 8 bytes
wue 0:7b58cdacf811 57 typedef struct BDT {
wue 0:7b58cdacf811 58 uint8_t info; // BD[0:7]
wue 0:7b58cdacf811 59 uint8_t dummy; // RSVD: BD[8:15]
wue 0:7b58cdacf811 60 uint16_t byte_count; // BD[16:32]
wue 0:7b58cdacf811 61 uint32_t address; // Addr
wue 0:7b58cdacf811 62 } BDT;
wue 0:7b58cdacf811 63
wue 0:7b58cdacf811 64
wue 0:7b58cdacf811 65 // there are:
wue 0:7b58cdacf811 66 // * 16 bidirectionnal endpt -> 32 physical endpt
wue 0:7b58cdacf811 67 // * as there are ODD and EVEN buffer -> 32*2 bdt
wue 0:7b58cdacf811 68 __attribute__((__aligned__(512))) BDT bdt[NUMBER_OF_PHYSICAL_ENDPOINTS * 2];
wue 0:7b58cdacf811 69 uint8_t * endpoint_buffer[(NUMBER_OF_PHYSICAL_ENDPOINTS - 2) * 2];
wue 0:7b58cdacf811 70 uint8_t * endpoint_buffer_iso[2*2];
wue 0:7b58cdacf811 71
wue 0:7b58cdacf811 72 static uint8_t set_addr = 0;
wue 0:7b58cdacf811 73 static uint8_t addr = 0;
wue 0:7b58cdacf811 74
wue 0:7b58cdacf811 75 static uint32_t Data1 = 0x55555555;
wue 0:7b58cdacf811 76
wue 0:7b58cdacf811 77 static uint32_t frameNumber() {
wue 0:7b58cdacf811 78 return((USB0->FRMNUML | (USB0->FRMNUMH << 8)) & 0x07FF);
wue 0:7b58cdacf811 79 }
wue 0:7b58cdacf811 80
wue 0:7b58cdacf811 81 uint32_t USBHAL::endpointReadcore(uint8_t endpoint, uint8_t *buffer) {
wue 0:7b58cdacf811 82 return 0;
wue 0:7b58cdacf811 83 }
wue 0:7b58cdacf811 84
wue 0:7b58cdacf811 85 USBHAL::USBHAL(void) {
wue 0:7b58cdacf811 86 // Disable IRQ
wue 0:7b58cdacf811 87 NVIC_DisableIRQ(USB0_IRQn);
wue 0:7b58cdacf811 88
wue 0:7b58cdacf811 89 // fill in callback array
wue 0:7b58cdacf811 90 epCallback[0] = &USBHAL::EP1_OUT_callback;
wue 0:7b58cdacf811 91 epCallback[1] = &USBHAL::EP1_IN_callback;
wue 0:7b58cdacf811 92 epCallback[2] = &USBHAL::EP2_OUT_callback;
wue 0:7b58cdacf811 93 epCallback[3] = &USBHAL::EP2_IN_callback;
wue 0:7b58cdacf811 94 epCallback[4] = &USBHAL::EP3_OUT_callback;
wue 0:7b58cdacf811 95 epCallback[5] = &USBHAL::EP3_IN_callback;
wue 0:7b58cdacf811 96 epCallback[6] = &USBHAL::EP4_OUT_callback;
wue 0:7b58cdacf811 97 epCallback[7] = &USBHAL::EP4_IN_callback;
wue 0:7b58cdacf811 98 epCallback[8] = &USBHAL::EP5_OUT_callback;
wue 0:7b58cdacf811 99 epCallback[9] = &USBHAL::EP5_IN_callback;
wue 0:7b58cdacf811 100 epCallback[10] = &USBHAL::EP6_OUT_callback;
wue 0:7b58cdacf811 101 epCallback[11] = &USBHAL::EP6_IN_callback;
wue 0:7b58cdacf811 102 epCallback[12] = &USBHAL::EP7_OUT_callback;
wue 0:7b58cdacf811 103 epCallback[13] = &USBHAL::EP7_IN_callback;
wue 0:7b58cdacf811 104 epCallback[14] = &USBHAL::EP8_OUT_callback;
wue 0:7b58cdacf811 105 epCallback[15] = &USBHAL::EP8_IN_callback;
wue 0:7b58cdacf811 106 epCallback[16] = &USBHAL::EP9_OUT_callback;
wue 0:7b58cdacf811 107 epCallback[17] = &USBHAL::EP9_IN_callback;
wue 0:7b58cdacf811 108 epCallback[18] = &USBHAL::EP10_OUT_callback;
wue 0:7b58cdacf811 109 epCallback[19] = &USBHAL::EP10_IN_callback;
wue 0:7b58cdacf811 110 epCallback[20] = &USBHAL::EP11_OUT_callback;
wue 0:7b58cdacf811 111 epCallback[21] = &USBHAL::EP11_IN_callback;
wue 0:7b58cdacf811 112 epCallback[22] = &USBHAL::EP12_OUT_callback;
wue 0:7b58cdacf811 113 epCallback[23] = &USBHAL::EP12_IN_callback;
wue 0:7b58cdacf811 114 epCallback[24] = &USBHAL::EP13_OUT_callback;
wue 0:7b58cdacf811 115 epCallback[25] = &USBHAL::EP13_IN_callback;
wue 0:7b58cdacf811 116 epCallback[26] = &USBHAL::EP14_OUT_callback;
wue 0:7b58cdacf811 117 epCallback[27] = &USBHAL::EP14_IN_callback;
wue 0:7b58cdacf811 118 epCallback[28] = &USBHAL::EP15_OUT_callback;
wue 0:7b58cdacf811 119 epCallback[29] = &USBHAL::EP15_IN_callback;
wue 0:7b58cdacf811 120
wue 0:7b58cdacf811 121
wue 0:7b58cdacf811 122 // choose usb src as PLL
wue 0:7b58cdacf811 123 SIM->SOPT2 |= (SIM_SOPT2_USBSRC_MASK | SIM_SOPT2_PLLFLLSEL_MASK);
wue 0:7b58cdacf811 124
wue 0:7b58cdacf811 125 // enable OTG clock
wue 0:7b58cdacf811 126 SIM->SCGC4 |= SIM_SCGC4_USBOTG_MASK;
wue 0:7b58cdacf811 127
wue 0:7b58cdacf811 128 // Attach IRQ
wue 0:7b58cdacf811 129 instance = this;
wue 0:7b58cdacf811 130 NVIC_SetVector(USB0_IRQn, (uint32_t)&_usbisr);
wue 0:7b58cdacf811 131 NVIC_EnableIRQ(USB0_IRQn);
wue 0:7b58cdacf811 132
wue 0:7b58cdacf811 133 // USB Module Configuration
wue 0:7b58cdacf811 134 // Reset USB Module
wue 0:7b58cdacf811 135 USB0->USBTRC0 |= USB_USBTRC0_USBRESET_MASK;
wue 0:7b58cdacf811 136 while(USB0->USBTRC0 & USB_USBTRC0_USBRESET_MASK);
wue 0:7b58cdacf811 137
wue 0:7b58cdacf811 138 // Set BDT Base Register
wue 0:7b58cdacf811 139 USB0->BDTPAGE1=(uint8_t)((uint32_t)bdt>>8);
wue 0:7b58cdacf811 140 USB0->BDTPAGE2=(uint8_t)((uint32_t)bdt>>16);
wue 0:7b58cdacf811 141 USB0->BDTPAGE3=(uint8_t)((uint32_t)bdt>>24);
wue 0:7b58cdacf811 142
wue 0:7b58cdacf811 143 // Clear interrupt flag
wue 0:7b58cdacf811 144 USB0->ISTAT = 0xff;
wue 0:7b58cdacf811 145
wue 0:7b58cdacf811 146 // USB Interrupt Enablers
wue 0:7b58cdacf811 147 USB0->INTEN |= USB_INTEN_TOKDNEEN_MASK |
wue 0:7b58cdacf811 148 USB_INTEN_SOFTOKEN_MASK |
wue 0:7b58cdacf811 149 USB_INTEN_ERROREN_MASK |
wue 0:7b58cdacf811 150 USB_INTEN_USBRSTEN_MASK;
wue 0:7b58cdacf811 151
wue 0:7b58cdacf811 152 // Disable weak pull downs
wue 0:7b58cdacf811 153 USB0->USBCTRL &= ~(USB_USBCTRL_PDE_MASK | USB_USBCTRL_SUSP_MASK);
wue 0:7b58cdacf811 154
wue 0:7b58cdacf811 155 USB0->USBTRC0 |= 0x40;
wue 0:7b58cdacf811 156 }
wue 0:7b58cdacf811 157
wue 0:7b58cdacf811 158 USBHAL::~USBHAL(void) { }
wue 0:7b58cdacf811 159
wue 0:7b58cdacf811 160 void USBHAL::connect(void) {
wue 0:7b58cdacf811 161 // enable USB
wue 0:7b58cdacf811 162 USB0->CTL |= USB_CTL_USBENSOFEN_MASK;
wue 0:7b58cdacf811 163 // Pull up enable
wue 0:7b58cdacf811 164 USB0->CONTROL |= USB_CONTROL_DPPULLUPNONOTG_MASK;
wue 0:7b58cdacf811 165 }
wue 0:7b58cdacf811 166
wue 0:7b58cdacf811 167 void USBHAL::disconnect(void) {
wue 0:7b58cdacf811 168 // disable USB
wue 0:7b58cdacf811 169 USB0->CTL &= ~USB_CTL_USBENSOFEN_MASK;
wue 0:7b58cdacf811 170 // Pull up disable
wue 0:7b58cdacf811 171 USB0->CONTROL &= ~USB_CONTROL_DPPULLUPNONOTG_MASK;
wue 0:7b58cdacf811 172
wue 0:7b58cdacf811 173 //Free buffers if required:
wue 0:7b58cdacf811 174 for (int i = 0; i<(NUMBER_OF_PHYSICAL_ENDPOINTS - 2) * 2; i++) {
wue 0:7b58cdacf811 175 free(endpoint_buffer[i]);
wue 0:7b58cdacf811 176 endpoint_buffer[i] = NULL;
wue 0:7b58cdacf811 177 }
wue 0:7b58cdacf811 178 free(endpoint_buffer_iso[2]);
wue 0:7b58cdacf811 179 endpoint_buffer_iso[2] = NULL;
wue 0:7b58cdacf811 180 free(endpoint_buffer_iso[0]);
wue 0:7b58cdacf811 181 endpoint_buffer_iso[0] = NULL;
wue 0:7b58cdacf811 182 }
wue 0:7b58cdacf811 183
wue 0:7b58cdacf811 184 void USBHAL::configureDevice(void) {
wue 0:7b58cdacf811 185 // not needed
wue 0:7b58cdacf811 186 }
wue 0:7b58cdacf811 187
wue 0:7b58cdacf811 188 void USBHAL::unconfigureDevice(void) {
wue 0:7b58cdacf811 189 // not needed
wue 0:7b58cdacf811 190 }
wue 0:7b58cdacf811 191
wue 0:7b58cdacf811 192 void USBHAL::setAddress(uint8_t address) {
wue 0:7b58cdacf811 193 // we don't set the address now otherwise the usb controller does not ack
wue 0:7b58cdacf811 194 // we set a flag instead
wue 0:7b58cdacf811 195 // see usbisr when an IN token is received
wue 0:7b58cdacf811 196 set_addr = 1;
wue 0:7b58cdacf811 197 addr = address;
wue 0:7b58cdacf811 198 }
wue 0:7b58cdacf811 199
wue 0:7b58cdacf811 200 bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t flags) {
wue 0:7b58cdacf811 201 uint32_t handshake_flag = 0;
wue 0:7b58cdacf811 202 uint8_t * buf;
wue 0:7b58cdacf811 203
wue 0:7b58cdacf811 204 if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) {
wue 0:7b58cdacf811 205 return false;
wue 0:7b58cdacf811 206 }
wue 0:7b58cdacf811 207
wue 0:7b58cdacf811 208 uint32_t log_endpoint = PHY_TO_LOG(endpoint);
wue 0:7b58cdacf811 209
wue 0:7b58cdacf811 210 if ((flags & ISOCHRONOUS) == 0) {
wue 0:7b58cdacf811 211 handshake_flag = USB_ENDPT_EPHSHK_MASK;
wue 0:7b58cdacf811 212 if (IN_EP(endpoint)) {
wue 0:7b58cdacf811 213 if (endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)] == NULL)
wue 0:7b58cdacf811 214 endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)] = (uint8_t *) malloc (64*2);
wue 0:7b58cdacf811 215 buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)][0];
wue 0:7b58cdacf811 216 } else {
wue 0:7b58cdacf811 217 if (endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)] == NULL)
wue 0:7b58cdacf811 218 endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)] = (uint8_t *) malloc (64*2);
wue 0:7b58cdacf811 219 buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)][0];
wue 0:7b58cdacf811 220 }
wue 0:7b58cdacf811 221 } else {
wue 0:7b58cdacf811 222 if (IN_EP(endpoint)) {
wue 0:7b58cdacf811 223 if (endpoint_buffer_iso[2] == NULL)
wue 0:7b58cdacf811 224 endpoint_buffer_iso[2] = (uint8_t *) malloc (1023*2);
wue 0:7b58cdacf811 225 buf = &endpoint_buffer_iso[2][0];
wue 0:7b58cdacf811 226 } else {
wue 0:7b58cdacf811 227 if (endpoint_buffer_iso[0] == NULL)
wue 0:7b58cdacf811 228 endpoint_buffer_iso[0] = (uint8_t *) malloc (1023*2);
wue 0:7b58cdacf811 229 buf = &endpoint_buffer_iso[0][0];
wue 0:7b58cdacf811 230 }
wue 0:7b58cdacf811 231 }
wue 0:7b58cdacf811 232
wue 0:7b58cdacf811 233 // IN endpt -> device to host (TX)
wue 0:7b58cdacf811 234 if (IN_EP(endpoint)) {
wue 0:7b58cdacf811 235 USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint)
wue 0:7b58cdacf811 236 USB_ENDPT_EPTXEN_MASK; // en TX (IN) tran
wue 0:7b58cdacf811 237 bdt[EP_BDT_IDX(log_endpoint, TX, ODD )].address = (uint32_t) buf;
wue 0:7b58cdacf811 238 bdt[EP_BDT_IDX(log_endpoint, TX, EVEN)].address = 0;
wue 0:7b58cdacf811 239 }
wue 0:7b58cdacf811 240 // OUT endpt -> host to device (RX)
wue 0:7b58cdacf811 241 else {
wue 0:7b58cdacf811 242 USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint)
wue 0:7b58cdacf811 243 USB_ENDPT_EPRXEN_MASK; // en RX (OUT) tran.
wue 0:7b58cdacf811 244 bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].byte_count = maxPacket;
wue 0:7b58cdacf811 245 bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].address = (uint32_t) buf;
wue 0:7b58cdacf811 246 bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info = BD_OWN_MASK | BD_DTS_MASK;
wue 0:7b58cdacf811 247 bdt[EP_BDT_IDX(log_endpoint, RX, EVEN)].info = 0;
wue 0:7b58cdacf811 248 }
wue 0:7b58cdacf811 249
wue 0:7b58cdacf811 250 Data1 |= (1 << endpoint);
wue 0:7b58cdacf811 251
wue 0:7b58cdacf811 252 return true;
wue 0:7b58cdacf811 253 }
wue 0:7b58cdacf811 254
wue 0:7b58cdacf811 255 // read setup packet
wue 0:7b58cdacf811 256 void USBHAL::EP0setup(uint8_t *buffer) {
wue 0:7b58cdacf811 257 uint32_t sz;
wue 0:7b58cdacf811 258 endpointReadResult(EP0OUT, buffer, &sz);
wue 0:7b58cdacf811 259 }
wue 0:7b58cdacf811 260
wue 0:7b58cdacf811 261 void USBHAL::EP0readStage(void) {
wue 0:7b58cdacf811 262 Data1 &= ~1UL; // set DATA0
wue 0:7b58cdacf811 263 bdt[0].info = (BD_DTS_MASK | BD_OWN_MASK);
wue 0:7b58cdacf811 264 }
wue 0:7b58cdacf811 265
wue 0:7b58cdacf811 266 void USBHAL::EP0read(void) {
wue 0:7b58cdacf811 267 uint32_t idx = EP_BDT_IDX(PHY_TO_LOG(EP0OUT), RX, 0);
wue 0:7b58cdacf811 268 bdt[idx].byte_count = MAX_PACKET_SIZE_EP0;
wue 0:7b58cdacf811 269 }
wue 0:7b58cdacf811 270
wue 0:7b58cdacf811 271 uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) {
wue 0:7b58cdacf811 272 uint32_t sz;
wue 0:7b58cdacf811 273 endpointReadResult(EP0OUT, buffer, &sz);
wue 0:7b58cdacf811 274 return sz;
wue 0:7b58cdacf811 275 }
wue 0:7b58cdacf811 276
wue 0:7b58cdacf811 277 void USBHAL::EP0write(uint8_t *buffer, uint32_t size) {
wue 0:7b58cdacf811 278 endpointWrite(EP0IN, buffer, size);
wue 0:7b58cdacf811 279 }
wue 0:7b58cdacf811 280
wue 0:7b58cdacf811 281 void USBHAL::EP0getWriteResult(void) {
wue 0:7b58cdacf811 282 }
wue 0:7b58cdacf811 283
wue 0:7b58cdacf811 284 void USBHAL::EP0stall(void) {
wue 0:7b58cdacf811 285 stallEndpoint(EP0OUT);
wue 0:7b58cdacf811 286 }
wue 0:7b58cdacf811 287
wue 0:7b58cdacf811 288 EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) {
wue 0:7b58cdacf811 289 endpoint = PHY_TO_LOG(endpoint);
wue 0:7b58cdacf811 290 uint32_t idx = EP_BDT_IDX(endpoint, RX, 0);
wue 0:7b58cdacf811 291 bdt[idx].byte_count = maximumSize;
wue 0:7b58cdacf811 292 return EP_PENDING;
wue 0:7b58cdacf811 293 }
wue 0:7b58cdacf811 294
wue 0:7b58cdacf811 295 EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_t *bytesRead) {
wue 0:7b58cdacf811 296 uint32_t n, sz, idx, setup = 0;
wue 0:7b58cdacf811 297 uint8_t not_iso;
wue 0:7b58cdacf811 298 uint8_t * ep_buf;
wue 0:7b58cdacf811 299
wue 0:7b58cdacf811 300 uint32_t log_endpoint = PHY_TO_LOG(endpoint);
wue 0:7b58cdacf811 301
wue 0:7b58cdacf811 302 if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) {
wue 0:7b58cdacf811 303 return EP_INVALID;
wue 0:7b58cdacf811 304 }
wue 0:7b58cdacf811 305
wue 0:7b58cdacf811 306 // if read on a IN endpoint -> error
wue 0:7b58cdacf811 307 if (IN_EP(endpoint)) {
wue 0:7b58cdacf811 308 return EP_INVALID;
wue 0:7b58cdacf811 309 }
wue 0:7b58cdacf811 310
wue 0:7b58cdacf811 311 idx = EP_BDT_IDX(log_endpoint, RX, 0);
wue 0:7b58cdacf811 312 sz = bdt[idx].byte_count;
wue 0:7b58cdacf811 313 not_iso = USB0->ENDPOINT[log_endpoint].ENDPT & USB_ENDPT_EPHSHK_MASK;
wue 0:7b58cdacf811 314
wue 0:7b58cdacf811 315 //for isochronous endpoint, we don't wait an interrupt
wue 0:7b58cdacf811 316 if ((log_endpoint != 0) && not_iso && !(epComplete & EP(endpoint))) {
wue 0:7b58cdacf811 317 return EP_PENDING;
wue 0:7b58cdacf811 318 }
wue 0:7b58cdacf811 319
wue 0:7b58cdacf811 320 if ((log_endpoint == 0) && (TOK_PID(idx) == SETUP_TOKEN)) {
wue 0:7b58cdacf811 321 setup = 1;
wue 0:7b58cdacf811 322 }
wue 0:7b58cdacf811 323
wue 0:7b58cdacf811 324 // non iso endpoint
wue 0:7b58cdacf811 325 if (not_iso) {
wue 0:7b58cdacf811 326 ep_buf = endpoint_buffer[idx];
wue 0:7b58cdacf811 327 } else {
wue 0:7b58cdacf811 328 ep_buf = endpoint_buffer_iso[0];
wue 0:7b58cdacf811 329 }
wue 0:7b58cdacf811 330
wue 0:7b58cdacf811 331 for (n = 0; n < sz; n++) {
wue 0:7b58cdacf811 332 buffer[n] = ep_buf[n];
wue 0:7b58cdacf811 333 }
wue 0:7b58cdacf811 334
wue 0:7b58cdacf811 335 if (((Data1 >> endpoint) & 1) == ((bdt[idx].info >> 6) & 1)) {
wue 0:7b58cdacf811 336 if (setup && (buffer[6] == 0)) // if no setup data stage,
wue 0:7b58cdacf811 337 Data1 &= ~1UL; // set DATA0
wue 0:7b58cdacf811 338 else
wue 0:7b58cdacf811 339 Data1 ^= (1 << endpoint);
wue 0:7b58cdacf811 340 }
wue 0:7b58cdacf811 341
wue 0:7b58cdacf811 342 if (((Data1 >> endpoint) & 1)) {
wue 0:7b58cdacf811 343 bdt[idx].info = BD_DTS_MASK | BD_DATA01_MASK | BD_OWN_MASK;
wue 0:7b58cdacf811 344 }
wue 0:7b58cdacf811 345 else {
wue 0:7b58cdacf811 346 bdt[idx].info = BD_DTS_MASK | BD_OWN_MASK;
wue 0:7b58cdacf811 347 }
wue 0:7b58cdacf811 348
wue 0:7b58cdacf811 349 USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK;
wue 0:7b58cdacf811 350 *bytesRead = sz;
wue 0:7b58cdacf811 351
wue 0:7b58cdacf811 352 epComplete &= ~EP(endpoint);
wue 0:7b58cdacf811 353 return EP_COMPLETED;
wue 0:7b58cdacf811 354 }
wue 0:7b58cdacf811 355
wue 0:7b58cdacf811 356 EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) {
wue 0:7b58cdacf811 357 uint32_t idx, n;
wue 0:7b58cdacf811 358 uint8_t * ep_buf;
wue 0:7b58cdacf811 359
wue 0:7b58cdacf811 360 if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) {
wue 0:7b58cdacf811 361 return EP_INVALID;
wue 0:7b58cdacf811 362 }
wue 0:7b58cdacf811 363
wue 0:7b58cdacf811 364 // if write on a OUT endpoint -> error
wue 0:7b58cdacf811 365 if (OUT_EP(endpoint)) {
wue 0:7b58cdacf811 366 return EP_INVALID;
wue 0:7b58cdacf811 367 }
wue 0:7b58cdacf811 368
wue 0:7b58cdacf811 369 idx = EP_BDT_IDX(PHY_TO_LOG(endpoint), TX, 0);
wue 0:7b58cdacf811 370 bdt[idx].byte_count = size;
wue 0:7b58cdacf811 371
wue 0:7b58cdacf811 372
wue 0:7b58cdacf811 373 // non iso endpoint
wue 0:7b58cdacf811 374 if (USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT & USB_ENDPT_EPHSHK_MASK) {
wue 0:7b58cdacf811 375 ep_buf = endpoint_buffer[idx];
wue 0:7b58cdacf811 376 } else {
wue 0:7b58cdacf811 377 ep_buf = endpoint_buffer_iso[2];
wue 0:7b58cdacf811 378 }
wue 0:7b58cdacf811 379
wue 0:7b58cdacf811 380 for (n = 0; n < size; n++) {
wue 0:7b58cdacf811 381 ep_buf[n] = data[n];
wue 0:7b58cdacf811 382 }
wue 0:7b58cdacf811 383
wue 0:7b58cdacf811 384 if ((Data1 >> endpoint) & 1) {
wue 0:7b58cdacf811 385 bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK;
wue 0:7b58cdacf811 386 } else {
wue 0:7b58cdacf811 387 bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK | BD_DATA01_MASK;
wue 0:7b58cdacf811 388 }
wue 0:7b58cdacf811 389
wue 0:7b58cdacf811 390 Data1 ^= (1 << endpoint);
wue 0:7b58cdacf811 391
wue 0:7b58cdacf811 392 return EP_PENDING;
wue 0:7b58cdacf811 393 }
wue 0:7b58cdacf811 394
wue 0:7b58cdacf811 395 EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) {
wue 0:7b58cdacf811 396 if (epComplete & EP(endpoint)) {
wue 0:7b58cdacf811 397 epComplete &= ~EP(endpoint);
wue 0:7b58cdacf811 398 return EP_COMPLETED;
wue 0:7b58cdacf811 399 }
wue 0:7b58cdacf811 400
wue 0:7b58cdacf811 401 return EP_PENDING;
wue 0:7b58cdacf811 402 }
wue 0:7b58cdacf811 403
wue 0:7b58cdacf811 404 void USBHAL::stallEndpoint(uint8_t endpoint) {
wue 0:7b58cdacf811 405 USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK;
wue 0:7b58cdacf811 406 }
wue 0:7b58cdacf811 407
wue 0:7b58cdacf811 408 void USBHAL::unstallEndpoint(uint8_t endpoint) {
wue 0:7b58cdacf811 409 USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK;
wue 0:7b58cdacf811 410 }
wue 0:7b58cdacf811 411
wue 0:7b58cdacf811 412 bool USBHAL::getEndpointStallState(uint8_t endpoint) {
wue 0:7b58cdacf811 413 uint8_t stall = (USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT & USB_ENDPT_EPSTALL_MASK);
wue 0:7b58cdacf811 414 return (stall) ? true : false;
wue 0:7b58cdacf811 415 }
wue 0:7b58cdacf811 416
wue 0:7b58cdacf811 417 void USBHAL::remoteWakeup(void) {
wue 0:7b58cdacf811 418 // [TODO]
wue 0:7b58cdacf811 419 }
wue 0:7b58cdacf811 420
wue 0:7b58cdacf811 421
wue 0:7b58cdacf811 422 void USBHAL::_usbisr(void) {
wue 0:7b58cdacf811 423 instance->usbisr();
wue 0:7b58cdacf811 424 }
wue 0:7b58cdacf811 425
wue 0:7b58cdacf811 426
wue 0:7b58cdacf811 427 void USBHAL::usbisr(void) {
wue 0:7b58cdacf811 428 uint8_t i;
wue 0:7b58cdacf811 429 uint8_t istat = USB0->ISTAT;
wue 0:7b58cdacf811 430
wue 0:7b58cdacf811 431 // reset interrupt
wue 0:7b58cdacf811 432 if (istat & USB_ISTAT_USBRST_MASK) {
wue 0:7b58cdacf811 433 // disable all endpt
wue 0:7b58cdacf811 434 for(i = 0; i < 16; i++) {
wue 0:7b58cdacf811 435 USB0->ENDPOINT[i].ENDPT = 0x00;
wue 0:7b58cdacf811 436 }
wue 0:7b58cdacf811 437
wue 0:7b58cdacf811 438 // enable control endpoint
wue 0:7b58cdacf811 439 realiseEndpoint(EP0OUT, MAX_PACKET_SIZE_EP0, 0);
wue 0:7b58cdacf811 440 realiseEndpoint(EP0IN, MAX_PACKET_SIZE_EP0, 0);
wue 0:7b58cdacf811 441
wue 0:7b58cdacf811 442 Data1 = 0x55555555;
wue 0:7b58cdacf811 443 USB0->CTL |= USB_CTL_ODDRST_MASK;
wue 0:7b58cdacf811 444
wue 0:7b58cdacf811 445 USB0->ISTAT = 0xFF; // clear all interrupt status flags
wue 0:7b58cdacf811 446 USB0->ERRSTAT = 0xFF; // clear all error flags
wue 0:7b58cdacf811 447 USB0->ERREN = 0xFF; // enable error interrupt sources
wue 0:7b58cdacf811 448 USB0->ADDR = 0x00; // set default address
wue 0:7b58cdacf811 449
wue 0:7b58cdacf811 450 return;
wue 0:7b58cdacf811 451 }
wue 0:7b58cdacf811 452
wue 0:7b58cdacf811 453 // resume interrupt
wue 0:7b58cdacf811 454 if (istat & USB_ISTAT_RESUME_MASK) {
wue 0:7b58cdacf811 455 USB0->ISTAT = USB_ISTAT_RESUME_MASK;
wue 0:7b58cdacf811 456 }
wue 0:7b58cdacf811 457
wue 0:7b58cdacf811 458 // SOF interrupt
wue 0:7b58cdacf811 459 if (istat & USB_ISTAT_SOFTOK_MASK) {
wue 0:7b58cdacf811 460 USB0->ISTAT = USB_ISTAT_SOFTOK_MASK;
wue 0:7b58cdacf811 461 // SOF event, read frame number
wue 0:7b58cdacf811 462 SOF(frameNumber());
wue 0:7b58cdacf811 463 }
wue 0:7b58cdacf811 464
wue 0:7b58cdacf811 465 // stall interrupt
wue 0:7b58cdacf811 466 if (istat & 1<<7) {
wue 0:7b58cdacf811 467 if (USB0->ENDPOINT[0].ENDPT & USB_ENDPT_EPSTALL_MASK)
wue 0:7b58cdacf811 468 USB0->ENDPOINT[0].ENDPT &= ~USB_ENDPT_EPSTALL_MASK;
wue 0:7b58cdacf811 469 USB0->ISTAT |= USB_ISTAT_STALL_MASK;
wue 0:7b58cdacf811 470 }
wue 0:7b58cdacf811 471
wue 0:7b58cdacf811 472 // token interrupt
wue 0:7b58cdacf811 473 if (istat & 1<<3) {
wue 0:7b58cdacf811 474 uint32_t num = (USB0->STAT >> 4) & 0x0F;
wue 0:7b58cdacf811 475 uint32_t dir = (USB0->STAT >> 3) & 0x01;
wue 0:7b58cdacf811 476 uint32_t ev_odd = (USB0->STAT >> 2) & 0x01;
wue 0:7b58cdacf811 477
wue 0:7b58cdacf811 478 // setup packet
wue 0:7b58cdacf811 479 if ((num == 0) && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == SETUP_TOKEN)) {
wue 0:7b58cdacf811 480 Data1 &= ~0x02;
wue 0:7b58cdacf811 481 bdt[EP_BDT_IDX(0, TX, EVEN)].info &= ~BD_OWN_MASK;
wue 0:7b58cdacf811 482 bdt[EP_BDT_IDX(0, TX, ODD)].info &= ~BD_OWN_MASK;
wue 0:7b58cdacf811 483
wue 0:7b58cdacf811 484 // EP0 SETUP event (SETUP data received)
wue 0:7b58cdacf811 485 EP0setupCallback();
wue 0:7b58cdacf811 486
wue 0:7b58cdacf811 487 } else {
wue 0:7b58cdacf811 488 // OUT packet
wue 0:7b58cdacf811 489 if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == OUT_TOKEN) {
wue 0:7b58cdacf811 490 if (num == 0)
wue 0:7b58cdacf811 491 EP0out();
wue 0:7b58cdacf811 492 else {
wue 0:7b58cdacf811 493 epComplete |= (1 << EP(num));
wue 0:7b58cdacf811 494 if ((instance->*(epCallback[EP(num) - 2]))()) {
wue 0:7b58cdacf811 495 epComplete &= ~(1 << EP(num));
wue 0:7b58cdacf811 496 }
wue 0:7b58cdacf811 497 }
wue 0:7b58cdacf811 498 }
wue 0:7b58cdacf811 499
wue 0:7b58cdacf811 500 // IN packet
wue 0:7b58cdacf811 501 if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == IN_TOKEN) {
wue 0:7b58cdacf811 502 if (num == 0) {
wue 0:7b58cdacf811 503 EP0in();
wue 0:7b58cdacf811 504 if (set_addr == 1) {
wue 0:7b58cdacf811 505 USB0->ADDR = addr & 0x7F;
wue 0:7b58cdacf811 506 set_addr = 0;
wue 0:7b58cdacf811 507 }
wue 0:7b58cdacf811 508 }
wue 0:7b58cdacf811 509 else {
wue 0:7b58cdacf811 510 epComplete |= (1 << (EP(num) + 1));
wue 0:7b58cdacf811 511 if ((instance->*(epCallback[EP(num) + 1 - 2]))()) {
wue 0:7b58cdacf811 512 epComplete &= ~(1 << (EP(num) + 1));
wue 0:7b58cdacf811 513 }
wue 0:7b58cdacf811 514 }
wue 0:7b58cdacf811 515 }
wue 0:7b58cdacf811 516 }
wue 0:7b58cdacf811 517
wue 0:7b58cdacf811 518 USB0->ISTAT = USB_ISTAT_TOKDNE_MASK;
wue 0:7b58cdacf811 519 }
wue 0:7b58cdacf811 520
wue 0:7b58cdacf811 521 // sleep interrupt
wue 0:7b58cdacf811 522 if (istat & 1<<4) {
wue 0:7b58cdacf811 523 USB0->ISTAT |= USB_ISTAT_SLEEP_MASK;
wue 0:7b58cdacf811 524 }
wue 0:7b58cdacf811 525
wue 0:7b58cdacf811 526 // error interrupt
wue 0:7b58cdacf811 527 if (istat & USB_ISTAT_ERROR_MASK) {
wue 0:7b58cdacf811 528 USB0->ERRSTAT = 0xFF;
wue 0:7b58cdacf811 529 USB0->ISTAT |= USB_ISTAT_ERROR_MASK;
wue 0:7b58cdacf811 530 }
wue 0:7b58cdacf811 531 }
wue 0:7b58cdacf811 532
wue 0:7b58cdacf811 533
wue 0:7b58cdacf811 534 #endif