SPI or I2C to UART Bridge
Dependents: SC16IS750_Test mbed_SC16IS750 Xadow_SC16IS750_Test Xadow_MPU9150AHRS
SC16IS750.cpp@0:d64854a60f95, 2014-01-22 (annotated)
- Committer:
- wim
- Date:
- Wed Jan 22 16:39:37 2014 +0000
- Revision:
- 0:d64854a60f95
- Child:
- 1:0440152c5387
First Test Version
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
wim | 0:d64854a60f95 | 1 | /* SC16IS750 interface |
wim | 0:d64854a60f95 | 2 | * /////////////////////v1.0 Tedd OKANO, 18 Jul 2012, I2C I/F only, MIT License |
wim | 0:d64854a60f95 | 3 | * v1.1 WH, Nov 2013, Added SPI I/F and more methods, MIT License |
wim | 0:d64854a60f95 | 4 | * |
wim | 0:d64854a60f95 | 5 | * Permission is hereby granted, free of charge, to any person obtaining a copy of this software |
wim | 0:d64854a60f95 | 6 | * and associated documentation files (the "Software"), to deal in the Software without restriction, |
wim | 0:d64854a60f95 | 7 | * including without limitation the rights to use, copy, modify, merge, publish, distribute, |
wim | 0:d64854a60f95 | 8 | * sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is |
wim | 0:d64854a60f95 | 9 | * furnished to do so, subject to the following conditions: |
wim | 0:d64854a60f95 | 10 | * |
wim | 0:d64854a60f95 | 11 | * The above copyright notice and this permission notice shall be included in all copies or |
wim | 0:d64854a60f95 | 12 | * substantial portions of the Software. |
wim | 0:d64854a60f95 | 13 | * |
wim | 0:d64854a60f95 | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING |
wim | 0:d64854a60f95 | 15 | * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
wim | 0:d64854a60f95 | 16 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, |
wim | 0:d64854a60f95 | 17 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
wim | 0:d64854a60f95 | 18 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
wim | 0:d64854a60f95 | 19 | */ |
wim | 0:d64854a60f95 | 20 | #include "mbed.h" |
wim | 0:d64854a60f95 | 21 | #include "SC16IS750.h" |
wim | 0:d64854a60f95 | 22 | |
wim | 0:d64854a60f95 | 23 | |
wim | 0:d64854a60f95 | 24 | /** Abstract class SC16IS750 for converter between either SPI or I2C and a Serial port |
wim | 0:d64854a60f95 | 25 | * |
wim | 0:d64854a60f95 | 26 | * Supports both SPI and I2C interfaces through derived classes |
wim | 0:d64854a60f95 | 27 | * |
wim | 0:d64854a60f95 | 28 | * @code |
wim | 0:d64854a60f95 | 29 | * |
wim | 0:d64854a60f95 | 30 | * @endcode |
wim | 0:d64854a60f95 | 31 | */ |
wim | 0:d64854a60f95 | 32 | //SC16IS750::SC16IS750() : Serial(NC, NC) { //Fout ??? |
wim | 0:d64854a60f95 | 33 | SC16IS750::SC16IS750() { |
wim | 0:d64854a60f95 | 34 | init(); // initialise UART registers |
wim | 0:d64854a60f95 | 35 | } |
wim | 0:d64854a60f95 | 36 | |
wim | 0:d64854a60f95 | 37 | |
wim | 0:d64854a60f95 | 38 | /** Set baudrate of the serial port. |
wim | 0:d64854a60f95 | 39 | * @param baud integer baudrate (4800, 9600 etc) |
wim | 0:d64854a60f95 | 40 | * @return none |
wim | 0:d64854a60f95 | 41 | */ |
wim | 0:d64854a60f95 | 42 | void SC16IS750::baud(int baudrate) { |
wim | 0:d64854a60f95 | 43 | unsigned long divisor = BAUD_RATE_DIVISOR(baudrate); |
wim | 0:d64854a60f95 | 44 | char lcr_tmp; |
wim | 0:d64854a60f95 | 45 | |
wim | 0:d64854a60f95 | 46 | _config.baudrate = baudrate; // Save baudrate |
wim | 0:d64854a60f95 | 47 | |
wim | 0:d64854a60f95 | 48 | lcr_tmp = this->readRegister(LCR); // Read current LCR register |
wim | 0:d64854a60f95 | 49 | this->writeRegister(LCR, lcr_tmp | LCR_DIV_ENA); // Enable Divisor registers |
wim | 0:d64854a60f95 | 50 | this->writeRegister(DLL, ( divisor & 0xFF)); // write divisor LSB |
wim | 0:d64854a60f95 | 51 | this->writeRegister(DLH, ((divisor >> 8) & 0xFF)); // write divisor MSB |
wim | 0:d64854a60f95 | 52 | this->writeRegister(LCR, lcr_tmp); // Restore LCR register, activate regular RBR, THR and IER registers |
wim | 0:d64854a60f95 | 53 | } |
wim | 0:d64854a60f95 | 54 | |
wim | 0:d64854a60f95 | 55 | |
wim | 0:d64854a60f95 | 56 | /** Set the transmission format used by the serial port. |
wim | 0:d64854a60f95 | 57 | * @param bits The number of bits in a word (5-8; default = 8) |
wim | 0:d64854a60f95 | 58 | * @param parity The parity used (Serial::None, Serial::Odd, Serial::Even, Serial::Forced1, Serial::Forced0; default = Serial::None) |
wim | 0:d64854a60f95 | 59 | * @param stop_bits The number of stop bits (1 or 2; default = 1) |
wim | 0:d64854a60f95 | 60 | */ |
wim | 0:d64854a60f95 | 61 | void SC16IS750::format(int bits, Serial::Parity parity, int stop_bits) { |
wim | 0:d64854a60f95 | 62 | char lcr_tmp = 0x00; |
wim | 0:d64854a60f95 | 63 | |
wim | 0:d64854a60f95 | 64 | switch (bits) { |
wim | 0:d64854a60f95 | 65 | case 5: lcr_tmp |= LCR_BITS5; |
wim | 0:d64854a60f95 | 66 | break; |
wim | 0:d64854a60f95 | 67 | case 6: lcr_tmp |= LCR_BITS6; |
wim | 0:d64854a60f95 | 68 | break; |
wim | 0:d64854a60f95 | 69 | case 7: lcr_tmp |= LCR_BITS7; |
wim | 0:d64854a60f95 | 70 | break; |
wim | 0:d64854a60f95 | 71 | case 8: lcr_tmp |= LCR_BITS8; |
wim | 0:d64854a60f95 | 72 | break; |
wim | 0:d64854a60f95 | 73 | default: lcr_tmp |= LCR_BITS8; |
wim | 0:d64854a60f95 | 74 | } |
wim | 0:d64854a60f95 | 75 | |
wim | 0:d64854a60f95 | 76 | switch (parity) { |
wim | 0:d64854a60f95 | 77 | case Serial::None: lcr_tmp |= LCR_NONE; |
wim | 0:d64854a60f95 | 78 | break; |
wim | 0:d64854a60f95 | 79 | case Serial::Odd: lcr_tmp |= LCR_ODD; |
wim | 0:d64854a60f95 | 80 | break; |
wim | 0:d64854a60f95 | 81 | case Serial::Even: lcr_tmp |= LCR_EVEN; |
wim | 0:d64854a60f95 | 82 | break; |
wim | 0:d64854a60f95 | 83 | case Serial::Forced1: lcr_tmp |= LCR_FORCED1; |
wim | 0:d64854a60f95 | 84 | break; |
wim | 0:d64854a60f95 | 85 | case Serial::Forced0: lcr_tmp |= LCR_FORCED0; |
wim | 0:d64854a60f95 | 86 | break; |
wim | 0:d64854a60f95 | 87 | default: lcr_tmp |= LCR_NONE; |
wim | 0:d64854a60f95 | 88 | } |
wim | 0:d64854a60f95 | 89 | |
wim | 0:d64854a60f95 | 90 | switch (stop_bits) { |
wim | 0:d64854a60f95 | 91 | case 1: lcr_tmp |= LCR_BITS1; |
wim | 0:d64854a60f95 | 92 | break; |
wim | 0:d64854a60f95 | 93 | case 2: lcr_tmp |= LCR_BITS2; |
wim | 0:d64854a60f95 | 94 | break; |
wim | 0:d64854a60f95 | 95 | default: lcr_tmp |= LCR_BITS1; |
wim | 0:d64854a60f95 | 96 | } |
wim | 0:d64854a60f95 | 97 | |
wim | 0:d64854a60f95 | 98 | _config.dataformat = lcr_tmp; // Save dataformat |
wim | 0:d64854a60f95 | 99 | |
wim | 0:d64854a60f95 | 100 | this->writeRegister(LCR, lcr_tmp); // Set LCR register, activate regular RBR, THR and IER registers |
wim | 0:d64854a60f95 | 101 | |
wim | 0:d64854a60f95 | 102 | }; |
wim | 0:d64854a60f95 | 103 | |
wim | 0:d64854a60f95 | 104 | |
wim | 0:d64854a60f95 | 105 | /** |
wim | 0:d64854a60f95 | 106 | * Initialise the UART. |
wim | 0:d64854a60f95 | 107 | * |
wim | 0:d64854a60f95 | 108 | * If initialisation fails this method does not return. |
wim | 0:d64854a60f95 | 109 | */ |
wim | 0:d64854a60f95 | 110 | void SC16IS750::init() { |
wim | 0:d64854a60f95 | 111 | |
wim | 0:d64854a60f95 | 112 | // Initialise SC16IS750 |
wim | 0:d64854a60f95 | 113 | |
wim | 0:d64854a60f95 | 114 | // Set default baudrate and save in _config |
wim | 0:d64854a60f95 | 115 | baud(); |
wim | 0:d64854a60f95 | 116 | |
wim | 0:d64854a60f95 | 117 | // Set dataflow and save in _config |
wim | 0:d64854a60f95 | 118 | // We need to enable flow control or we overflow buffers and |
wim | 0:d64854a60f95 | 119 | // lose data when used with the WiFly. Note that flow control |
wim | 0:d64854a60f95 | 120 | // needs to be enabled on the WiFly for this to work but it's |
wim | 0:d64854a60f95 | 121 | // possible to do that with flow control enabled here but not there. |
wim | 0:d64854a60f95 | 122 | // TODO: Make this able to be configured externally? |
wim | 0:d64854a60f95 | 123 | _config.flowctrl = EFR_ENABLE_CTS | EFR_ENABLE_RTS | EFR_ENABLE_ENHANCED_FUNCTIONS, |
wim | 0:d64854a60f95 | 124 | |
wim | 0:d64854a60f95 | 125 | this->writeRegister(LCR, 0xBF); // access EFR register |
wim | 0:d64854a60f95 | 126 | this->writeRegister(EFR, _config.flowctrl); // enable enhanced registers |
wim | 0:d64854a60f95 | 127 | |
wim | 0:d64854a60f95 | 128 | // Set default dataformat and save in _config |
wim | 0:d64854a60f95 | 129 | format(); |
wim | 0:d64854a60f95 | 130 | |
wim | 0:d64854a60f95 | 131 | // Set default fifoformat and save in _config |
wim | 0:d64854a60f95 | 132 | this->writeRegister(FCR, 0x06); // reset TXFIFO, reset RXFIFO, non FIFO mode |
wim | 0:d64854a60f95 | 133 | this->writeRegister(FCR, 0x01); // enable FIFO mode |
wim | 0:d64854a60f95 | 134 | |
wim | 0:d64854a60f95 | 135 | // The UART bridge should now be successfully initialised. |
wim | 0:d64854a60f95 | 136 | |
wim | 0:d64854a60f95 | 137 | |
wim | 0:d64854a60f95 | 138 | // Test if UART bridge is present and initialised |
wim | 0:d64854a60f95 | 139 | if(!connected()){ |
wim | 0:d64854a60f95 | 140 | #if(0) |
wim | 0:d64854a60f95 | 141 | // Lock up if we fail to initialise UART bridge. |
wim | 0:d64854a60f95 | 142 | while(1) { |
wim | 0:d64854a60f95 | 143 | }; |
wim | 0:d64854a60f95 | 144 | #else |
wim | 0:d64854a60f95 | 145 | printf("Failed to initialise UART bridge\r\n"); |
wim | 0:d64854a60f95 | 146 | } |
wim | 0:d64854a60f95 | 147 | #endif |
wim | 0:d64854a60f95 | 148 | |
wim | 0:d64854a60f95 | 149 | } |
wim | 0:d64854a60f95 | 150 | |
wim | 0:d64854a60f95 | 151 | |
wim | 0:d64854a60f95 | 152 | /** |
wim | 0:d64854a60f95 | 153 | * Check that UART is connected and operational. |
wim | 0:d64854a60f95 | 154 | * @param none |
wim | 0:d64854a60f95 | 155 | * @return bool true when connected, false otherwise |
wim | 0:d64854a60f95 | 156 | */ |
wim | 0:d64854a60f95 | 157 | bool SC16IS750::connected() { |
wim | 0:d64854a60f95 | 158 | // Perform read/write test to check if UART is working |
wim | 0:d64854a60f95 | 159 | const char TEST_CHARACTER = 'H'; |
wim | 0:d64854a60f95 | 160 | |
wim | 0:d64854a60f95 | 161 | this->writeRegister(SPR, TEST_CHARACTER); |
wim | 0:d64854a60f95 | 162 | |
wim | 0:d64854a60f95 | 163 | return (this->readRegister(SPR) == TEST_CHARACTER); |
wim | 0:d64854a60f95 | 164 | } |
wim | 0:d64854a60f95 | 165 | |
wim | 0:d64854a60f95 | 166 | |
wim | 0:d64854a60f95 | 167 | |
wim | 0:d64854a60f95 | 168 | /** Determine if there is a character available to read. |
wim | 0:d64854a60f95 | 169 | * @return 1 if there is a character available to read, 0 otherwise |
wim | 0:d64854a60f95 | 170 | */ |
wim | 0:d64854a60f95 | 171 | int SC16IS750::readable() { |
wim | 0:d64854a60f95 | 172 | /** |
wim | 0:d64854a60f95 | 173 | * Get the number of chars (characters) available for reading. |
wim | 0:d64854a60f95 | 174 | * |
wim | 0:d64854a60f95 | 175 | * This is data that's already arrived and stored in the receive |
wim | 0:d64854a60f95 | 176 | * buffer (which holds 64 chars). |
wim | 0:d64854a60f95 | 177 | * This alternative just checks if there's data but doesn't |
wim | 0:d64854a60f95 | 178 | * return how many characters are in the buffer: |
wim | 0:d64854a60f95 | 179 | */ |
wim | 0:d64854a60f95 | 180 | return (this->readRegister(LSR) & 0x01); |
wim | 0:d64854a60f95 | 181 | } |
wim | 0:d64854a60f95 | 182 | |
wim | 0:d64854a60f95 | 183 | /** Determine if how many characters available to read. |
wim | 0:d64854a60f95 | 184 | * @return int Characters available to read |
wim | 0:d64854a60f95 | 185 | */ |
wim | 0:d64854a60f95 | 186 | int SC16IS750::readableCount() { |
wim | 0:d64854a60f95 | 187 | /* |
wim | 0:d64854a60f95 | 188 | * Get the number of chars (characters) available for reading. |
wim | 0:d64854a60f95 | 189 | * |
wim | 0:d64854a60f95 | 190 | * This is data that's already arrived and stored in the receive |
wim | 0:d64854a60f95 | 191 | * buffer (which holds 64 chars). |
wim | 0:d64854a60f95 | 192 | */ |
wim | 0:d64854a60f95 | 193 | |
wim | 0:d64854a60f95 | 194 | return (this->readRegister(RXLVL)); |
wim | 0:d64854a60f95 | 195 | } |
wim | 0:d64854a60f95 | 196 | |
wim | 0:d64854a60f95 | 197 | /** Determine if there is space available to write a character. |
wim | 0:d64854a60f95 | 198 | * @return 1 if there is a space for a character to write, 0 otherwise |
wim | 0:d64854a60f95 | 199 | */ |
wim | 0:d64854a60f95 | 200 | int SC16IS750::writable() { |
wim | 0:d64854a60f95 | 201 | return (this->writableCount() > 0); // Check datasheet for faster version |
wim | 0:d64854a60f95 | 202 | } |
wim | 0:d64854a60f95 | 203 | |
wim | 0:d64854a60f95 | 204 | /** Determine if how many characters available to write. |
wim | 0:d64854a60f95 | 205 | * @return int Characters available to write |
wim | 0:d64854a60f95 | 206 | */ |
wim | 0:d64854a60f95 | 207 | int SC16IS750::writableCount() { |
wim | 0:d64854a60f95 | 208 | /* |
wim | 0:d64854a60f95 | 209 | * Get the number of chars (characters) available for reading. |
wim | 0:d64854a60f95 | 210 | * |
wim | 0:d64854a60f95 | 211 | * This is data that's already stored in the transmit |
wim | 0:d64854a60f95 | 212 | * buffer (which holds 64 chars). |
wim | 0:d64854a60f95 | 213 | */ |
wim | 0:d64854a60f95 | 214 | |
wim | 0:d64854a60f95 | 215 | return (this->readRegister(TXLVL)); |
wim | 0:d64854a60f95 | 216 | // return (readRegister(64 - TXLVL)); //Check datasheet |
wim | 0:d64854a60f95 | 217 | } |
wim | 0:d64854a60f95 | 218 | |
wim | 0:d64854a60f95 | 219 | |
wim | 0:d64854a60f95 | 220 | |
wim | 0:d64854a60f95 | 221 | char SC16IS750::getc() { |
wim | 0:d64854a60f95 | 222 | /* |
wim | 0:d64854a60f95 | 223 | * Read char from UART. |
wim | 0:d64854a60f95 | 224 | * |
wim | 0:d64854a60f95 | 225 | * Returns char read or or -1 if no data available. |
wim | 0:d64854a60f95 | 226 | * |
wim | 0:d64854a60f95 | 227 | * Acts in the same manner as 'Serial.read()'. |
wim | 0:d64854a60f95 | 228 | */ |
wim | 0:d64854a60f95 | 229 | |
wim | 0:d64854a60f95 | 230 | if (!readable()) { |
wim | 0:d64854a60f95 | 231 | return -1; |
wim | 0:d64854a60f95 | 232 | } |
wim | 0:d64854a60f95 | 233 | |
wim | 0:d64854a60f95 | 234 | return this->readRegister(RHR); |
wim | 0:d64854a60f95 | 235 | } |
wim | 0:d64854a60f95 | 236 | |
wim | 0:d64854a60f95 | 237 | |
wim | 0:d64854a60f95 | 238 | void SC16IS750::putc(char value) { |
wim | 0:d64854a60f95 | 239 | /* |
wim | 0:d64854a60f95 | 240 | * Write char to UART. |
wim | 0:d64854a60f95 | 241 | */ |
wim | 0:d64854a60f95 | 242 | |
wim | 0:d64854a60f95 | 243 | while (this->readRegister(TXLVL) == 0) { |
wim | 0:d64854a60f95 | 244 | // Wait for space in TX buffer |
wim | 0:d64854a60f95 | 245 | }; |
wim | 0:d64854a60f95 | 246 | this->writeRegister(THR, value); |
wim | 0:d64854a60f95 | 247 | } |
wim | 0:d64854a60f95 | 248 | |
wim | 0:d64854a60f95 | 249 | |
wim | 0:d64854a60f95 | 250 | void SC16IS750::write(const char *str) { |
wim | 0:d64854a60f95 | 251 | /* |
wim | 0:d64854a60f95 | 252 | * Write string to UART. |
wim | 0:d64854a60f95 | 253 | */ |
wim | 0:d64854a60f95 | 254 | write((const uint8_t *) str, strlen(str)); |
wim | 0:d64854a60f95 | 255 | while (this->readRegister(TXLVL) < 64) { |
wim | 0:d64854a60f95 | 256 | // Wait for empty TX buffer (slow) |
wim | 0:d64854a60f95 | 257 | // (But apparently still not slow enough to ensure delivery.) |
wim | 0:d64854a60f95 | 258 | }; |
wim | 0:d64854a60f95 | 259 | } |
wim | 0:d64854a60f95 | 260 | |
wim | 0:d64854a60f95 | 261 | #if ENABLE_BULK_TRANSFERS |
wim | 0:d64854a60f95 | 262 | void SC16IS750::write(const uint8_t *buffer, size_t size) { |
wim | 0:d64854a60f95 | 263 | /* |
wim | 0:d64854a60f95 | 264 | |
wim | 0:d64854a60f95 | 265 | Write buffer to UART. |
wim | 0:d64854a60f95 | 266 | |
wim | 0:d64854a60f95 | 267 | */ |
wim | 0:d64854a60f95 | 268 | //select(); |
wim | 0:d64854a60f95 | 269 | //transfer(THR); // TODO: Change this when we modify register addresses? (Even though it's 0x00.) |
wim | 0:d64854a60f95 | 270 | |
wim | 0:d64854a60f95 | 271 | while(size > 16) { |
wim | 0:d64854a60f95 | 272 | //transfer_bulk(buffer, 16); //ringbuffer? |
wim | 0:d64854a60f95 | 273 | size -= 16; |
wim | 0:d64854a60f95 | 274 | buffer += 16; |
wim | 0:d64854a60f95 | 275 | } |
wim | 0:d64854a60f95 | 276 | //transfer_bulk(buffer, size); |
wim | 0:d64854a60f95 | 277 | |
wim | 0:d64854a60f95 | 278 | //deselect(); |
wim | 0:d64854a60f95 | 279 | } |
wim | 0:d64854a60f95 | 280 | #endif |
wim | 0:d64854a60f95 | 281 | |
wim | 0:d64854a60f95 | 282 | void SC16IS750::flush() { |
wim | 0:d64854a60f95 | 283 | /* |
wim | 0:d64854a60f95 | 284 | * Flush characters from SC16IS750 receive buffer. |
wim | 0:d64854a60f95 | 285 | */ |
wim | 0:d64854a60f95 | 286 | |
wim | 0:d64854a60f95 | 287 | // Note: This may not be the most appropriate flush approach. |
wim | 0:d64854a60f95 | 288 | // It might be better to just flush the UART's buffer |
wim | 0:d64854a60f95 | 289 | // rather than the buffer of the connected device |
wim | 0:d64854a60f95 | 290 | // which is essentially what this does. |
wim | 0:d64854a60f95 | 291 | while(readable() > 0) { |
wim | 0:d64854a60f95 | 292 | getc(); |
wim | 0:d64854a60f95 | 293 | } |
wim | 0:d64854a60f95 | 294 | } |
wim | 0:d64854a60f95 | 295 | |
wim | 0:d64854a60f95 | 296 | |
wim | 0:d64854a60f95 | 297 | void SC16IS750::ioSetDirection(unsigned char bits) { |
wim | 0:d64854a60f95 | 298 | this->writeRegister(IODIR, bits); |
wim | 0:d64854a60f95 | 299 | } |
wim | 0:d64854a60f95 | 300 | |
wim | 0:d64854a60f95 | 301 | |
wim | 0:d64854a60f95 | 302 | void SC16IS750::ioSetState(unsigned char bits) { |
wim | 0:d64854a60f95 | 303 | this->writeRegister(IOSTATE, bits); |
wim | 0:d64854a60f95 | 304 | } |
wim | 0:d64854a60f95 | 305 | |
wim | 0:d64854a60f95 | 306 | |
wim | 0:d64854a60f95 | 307 | |
wim | 0:d64854a60f95 | 308 | // Begin SPI Implementation |
wim | 0:d64854a60f95 | 309 | // |
wim | 0:d64854a60f95 | 310 | |
wim | 0:d64854a60f95 | 311 | /** Class SC16IS750_SPI for a converter between SPI and a Serial port |
wim | 0:d64854a60f95 | 312 | * |
wim | 0:d64854a60f95 | 313 | */ |
wim | 0:d64854a60f95 | 314 | SC16IS750_SPI::SC16IS750_SPI (SPI *spi, PinName cs) : _spi(spi), _cs(cs) { |
wim | 0:d64854a60f95 | 315 | _cs = 1; // deselect |
wim | 0:d64854a60f95 | 316 | |
wim | 0:d64854a60f95 | 317 | _spi->format(8, 0); |
wim | 0:d64854a60f95 | 318 | _spi->frequency(1000000); |
wim | 0:d64854a60f95 | 319 | |
wim | 0:d64854a60f95 | 320 | }; |
wim | 0:d64854a60f95 | 321 | |
wim | 0:d64854a60f95 | 322 | /** Write value to internal register. |
wim | 0:d64854a60f95 | 323 | * Pure virtual, must be declared in derived class. |
wim | 0:d64854a60f95 | 324 | * @param register_address The address of the Register (enum RegisterName) |
wim | 0:d64854a60f95 | 325 | * @param data The 8bit value to write |
wim | 0:d64854a60f95 | 326 | * @return none |
wim | 0:d64854a60f95 | 327 | */ |
wim | 0:d64854a60f95 | 328 | void SC16IS750_SPI::writeRegister(RegisterName registerAddress, char data) { |
wim | 0:d64854a60f95 | 329 | /* |
wim | 0:d64854a60f95 | 330 | * Write <data> char to the SC16IS750 register <registerAddress> |
wim | 0:d64854a60f95 | 331 | */ |
wim | 0:d64854a60f95 | 332 | |
wim | 0:d64854a60f95 | 333 | _cs = 0; // select; |
wim | 0:d64854a60f95 | 334 | _spi->write(registerAddress); |
wim | 0:d64854a60f95 | 335 | _spi->write(data); |
wim | 0:d64854a60f95 | 336 | _cs = 1; // deselect; |
wim | 0:d64854a60f95 | 337 | |
wim | 0:d64854a60f95 | 338 | |
wim | 0:d64854a60f95 | 339 | //Test only |
wim | 0:d64854a60f95 | 340 | DigitalOut myled2(LED_GREEN); |
wim | 0:d64854a60f95 | 341 | myled2 = 0; //LED On |
wim | 0:d64854a60f95 | 342 | wait(0.2); |
wim | 0:d64854a60f95 | 343 | myled2 = 1; //LED Off |
wim | 0:d64854a60f95 | 344 | wait(0.6); |
wim | 0:d64854a60f95 | 345 | } |
wim | 0:d64854a60f95 | 346 | |
wim | 0:d64854a60f95 | 347 | |
wim | 0:d64854a60f95 | 348 | /** Read value from internal register. |
wim | 0:d64854a60f95 | 349 | * @param register_address The address of the Register (enum RegisterName) |
wim | 0:d64854a60f95 | 350 | * @return char The 8bit value read from the register |
wim | 0:d64854a60f95 | 351 | */ |
wim | 0:d64854a60f95 | 352 | char SC16IS750_SPI::readRegister(RegisterName registerAddress) { |
wim | 0:d64854a60f95 | 353 | /* |
wim | 0:d64854a60f95 | 354 | * Read char from SC16IS750 register at <registerAddress>. |
wim | 0:d64854a60f95 | 355 | */ |
wim | 0:d64854a60f95 | 356 | |
wim | 0:d64854a60f95 | 357 | // Used in SPI read operations to flush slave's shift register |
wim | 0:d64854a60f95 | 358 | const char SPI_DUMMY_char = 0xFF; |
wim | 0:d64854a60f95 | 359 | |
wim | 0:d64854a60f95 | 360 | char result; |
wim | 0:d64854a60f95 | 361 | |
wim | 0:d64854a60f95 | 362 | _cs = 0; // select; |
wim | 0:d64854a60f95 | 363 | _spi->write(SPI_READ_MODE_FLAG | registerAddress); |
wim | 0:d64854a60f95 | 364 | result = _spi->write(SPI_DUMMY_char); |
wim | 0:d64854a60f95 | 365 | _cs = 1; // deselect; |
wim | 0:d64854a60f95 | 366 | |
wim | 0:d64854a60f95 | 367 | return result; |
wim | 0:d64854a60f95 | 368 | } |
wim | 0:d64854a60f95 | 369 | |
wim | 0:d64854a60f95 | 370 | // |
wim | 0:d64854a60f95 | 371 | // End SPI Implementation |
wim | 0:d64854a60f95 | 372 | |
wim | 0:d64854a60f95 | 373 | |
wim | 0:d64854a60f95 | 374 | // Begin I2C Implementation |
wim | 0:d64854a60f95 | 375 | // |
wim | 0:d64854a60f95 | 376 | |
wim | 0:d64854a60f95 | 377 | /** Class SC16IS750_I2C for a converter between I2C and a Serial port |
wim | 0:d64854a60f95 | 378 | * |
wim | 0:d64854a60f95 | 379 | */ |
wim | 0:d64854a60f95 | 380 | SC16IS750_I2C::SC16IS750_I2C(I2C *i2c, uint8_t deviceAddress) : _i2c(i2c), _slaveAddress(deviceAddress) { |
wim | 0:d64854a60f95 | 381 | |
wim | 0:d64854a60f95 | 382 | _i2c->frequency(400000); |
wim | 0:d64854a60f95 | 383 | |
wim | 0:d64854a60f95 | 384 | } |
wim | 0:d64854a60f95 | 385 | |
wim | 0:d64854a60f95 | 386 | |
wim | 0:d64854a60f95 | 387 | /** Write value to internal register. |
wim | 0:d64854a60f95 | 388 | * @param register_address The address of the Register (enum RegisterName) |
wim | 0:d64854a60f95 | 389 | * @param data The 8bit value to write |
wim | 0:d64854a60f95 | 390 | * @return none |
wim | 0:d64854a60f95 | 391 | */ |
wim | 0:d64854a60f95 | 392 | void SC16IS750_I2C::writeRegister(RegisterName registerAddress, char data) { |
wim | 0:d64854a60f95 | 393 | char w[2]; |
wim | 0:d64854a60f95 | 394 | |
wim | 0:d64854a60f95 | 395 | w[0] = registerAddress; |
wim | 0:d64854a60f95 | 396 | w[1] = data; |
wim | 0:d64854a60f95 | 397 | |
wim | 0:d64854a60f95 | 398 | _i2c->write( _slaveAddress, w, 2 ); |
wim | 0:d64854a60f95 | 399 | } |
wim | 0:d64854a60f95 | 400 | |
wim | 0:d64854a60f95 | 401 | |
wim | 0:d64854a60f95 | 402 | /** Read value from internal register. |
wim | 0:d64854a60f95 | 403 | * @param register_address The address of the Register (enum RegisterName) |
wim | 0:d64854a60f95 | 404 | * @return char The 8bit value read from the register |
wim | 0:d64854a60f95 | 405 | */ |
wim | 0:d64854a60f95 | 406 | char SC16IS750_I2C::readRegister(RegisterName registerAddress) { |
wim | 0:d64854a60f95 | 407 | /* |
wim | 0:d64854a60f95 | 408 | * Read char from SC16IS750 register at <registerAddress>. |
wim | 0:d64854a60f95 | 409 | */ |
wim | 0:d64854a60f95 | 410 | char w[1]; |
wim | 0:d64854a60f95 | 411 | char r[1]; |
wim | 0:d64854a60f95 | 412 | |
wim | 0:d64854a60f95 | 413 | w[0] = registerAddress; |
wim | 0:d64854a60f95 | 414 | |
wim | 0:d64854a60f95 | 415 | _i2c->write( _slaveAddress, w, 1 ); |
wim | 0:d64854a60f95 | 416 | _i2c->read( _slaveAddress, r, 1 ); |
wim | 0:d64854a60f95 | 417 | |
wim | 0:d64854a60f95 | 418 | return ( r[0] ); |
wim | 0:d64854a60f95 | 419 | } |
wim | 0:d64854a60f95 | 420 | |
wim | 0:d64854a60f95 | 421 | |
wim | 0:d64854a60f95 | 422 | // |
wim | 0:d64854a60f95 | 423 | // End I2C Implementation |