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easy-connect/stm-spirit1-rf-driver/source/libs/spirit1/SPIRIT1_Library/Src/SPIRIT_Qi.c@0:f1d3878b8dd9, 2017-04-08 (annotated)

Committer:
vpcola
Date:
Sat Apr 08 14:45:51 2017 +0000
Revision:
0:f1d3878b8dd9
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
vpcola 0:f1d3878b8dd9 1 /**
vpcola 0:f1d3878b8dd9 2 ******************************************************************************
vpcola 0:f1d3878b8dd9 3 * @file SPIRIT_Qi.c
vpcola 0:f1d3878b8dd9 4 * @author VMA division - AMS
vpcola 0:f1d3878b8dd9 5 * @version 3.2.2
vpcola 0:f1d3878b8dd9 6 * @date 08-July-2015
vpcola 0:f1d3878b8dd9 7 * @brief Configuration and management of SPIRIT QI.
vpcola 0:f1d3878b8dd9 8 * @details
vpcola 0:f1d3878b8dd9 9 *
vpcola 0:f1d3878b8dd9 10 * @attention
vpcola 0:f1d3878b8dd9 11 *
vpcola 0:f1d3878b8dd9 12 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
vpcola 0:f1d3878b8dd9 13 *
vpcola 0:f1d3878b8dd9 14 * Redistribution and use in source and binary forms, with or without modification,
vpcola 0:f1d3878b8dd9 15 * are permitted provided that the following conditions are met:
vpcola 0:f1d3878b8dd9 16 * 1. Redistributions of source code must retain the above copyright notice,
vpcola 0:f1d3878b8dd9 17 * this list of conditions and the following disclaimer.
vpcola 0:f1d3878b8dd9 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
vpcola 0:f1d3878b8dd9 19 * this list of conditions and the following disclaimer in the documentation
vpcola 0:f1d3878b8dd9 20 * and/or other materials provided with the distribution.
vpcola 0:f1d3878b8dd9 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
vpcola 0:f1d3878b8dd9 22 * may be used to endorse or promote products derived from this software
vpcola 0:f1d3878b8dd9 23 * without specific prior written permission.
vpcola 0:f1d3878b8dd9 24 *
vpcola 0:f1d3878b8dd9 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
vpcola 0:f1d3878b8dd9 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
vpcola 0:f1d3878b8dd9 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
vpcola 0:f1d3878b8dd9 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
vpcola 0:f1d3878b8dd9 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
vpcola 0:f1d3878b8dd9 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
vpcola 0:f1d3878b8dd9 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
vpcola 0:f1d3878b8dd9 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
vpcola 0:f1d3878b8dd9 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
vpcola 0:f1d3878b8dd9 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
vpcola 0:f1d3878b8dd9 35 *
vpcola 0:f1d3878b8dd9 36 ******************************************************************************
vpcola 0:f1d3878b8dd9 37 */
vpcola 0:f1d3878b8dd9 38
vpcola 0:f1d3878b8dd9 39 /* Includes ------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 40 #include "SPIRIT_Qi.h"
vpcola 0:f1d3878b8dd9 41 #include "MCU_Interface.h"
vpcola 0:f1d3878b8dd9 42
vpcola 0:f1d3878b8dd9 43
vpcola 0:f1d3878b8dd9 44
vpcola 0:f1d3878b8dd9 45 /**
vpcola 0:f1d3878b8dd9 46 * @addtogroup SPIRIT_Libraries
vpcola 0:f1d3878b8dd9 47 * @{
vpcola 0:f1d3878b8dd9 48 */
vpcola 0:f1d3878b8dd9 49
vpcola 0:f1d3878b8dd9 50
vpcola 0:f1d3878b8dd9 51 /**
vpcola 0:f1d3878b8dd9 52 * @addtogroup SPIRIT_Qi
vpcola 0:f1d3878b8dd9 53 * @{
vpcola 0:f1d3878b8dd9 54 */
vpcola 0:f1d3878b8dd9 55
vpcola 0:f1d3878b8dd9 56
vpcola 0:f1d3878b8dd9 57 /**
vpcola 0:f1d3878b8dd9 58 * @defgroup Qi_Private_TypesDefinitions QI Private Types Definitions
vpcola 0:f1d3878b8dd9 59 * @{
vpcola 0:f1d3878b8dd9 60 */
vpcola 0:f1d3878b8dd9 61
vpcola 0:f1d3878b8dd9 62 /**
vpcola 0:f1d3878b8dd9 63 *@}
vpcola 0:f1d3878b8dd9 64 */
vpcola 0:f1d3878b8dd9 65
vpcola 0:f1d3878b8dd9 66
vpcola 0:f1d3878b8dd9 67 /**
vpcola 0:f1d3878b8dd9 68 * @defgroup Qi_Private_Defines QI Private Defines
vpcola 0:f1d3878b8dd9 69 * @{
vpcola 0:f1d3878b8dd9 70 */
vpcola 0:f1d3878b8dd9 71
vpcola 0:f1d3878b8dd9 72 /**
vpcola 0:f1d3878b8dd9 73 *@}
vpcola 0:f1d3878b8dd9 74 */
vpcola 0:f1d3878b8dd9 75
vpcola 0:f1d3878b8dd9 76
vpcola 0:f1d3878b8dd9 77 /**
vpcola 0:f1d3878b8dd9 78 * @defgroup Qi_Private_Macros QI Private Macros
vpcola 0:f1d3878b8dd9 79 * @{
vpcola 0:f1d3878b8dd9 80 */
vpcola 0:f1d3878b8dd9 81
vpcola 0:f1d3878b8dd9 82 /**
vpcola 0:f1d3878b8dd9 83 *@}
vpcola 0:f1d3878b8dd9 84 */
vpcola 0:f1d3878b8dd9 85
vpcola 0:f1d3878b8dd9 86
vpcola 0:f1d3878b8dd9 87 /**
vpcola 0:f1d3878b8dd9 88 * @defgroup Qi_Private_Variables QI Private Variables
vpcola 0:f1d3878b8dd9 89 * @{
vpcola 0:f1d3878b8dd9 90 */
vpcola 0:f1d3878b8dd9 91
vpcola 0:f1d3878b8dd9 92 /**
vpcola 0:f1d3878b8dd9 93 *@}
vpcola 0:f1d3878b8dd9 94 */
vpcola 0:f1d3878b8dd9 95
vpcola 0:f1d3878b8dd9 96
vpcola 0:f1d3878b8dd9 97 /**
vpcola 0:f1d3878b8dd9 98 * @defgroup Qi_Private_FunctionPrototypes QI Private Function Prototypes
vpcola 0:f1d3878b8dd9 99 * @{
vpcola 0:f1d3878b8dd9 100 */
vpcola 0:f1d3878b8dd9 101
vpcola 0:f1d3878b8dd9 102 /**
vpcola 0:f1d3878b8dd9 103 *@}
vpcola 0:f1d3878b8dd9 104 */
vpcola 0:f1d3878b8dd9 105
vpcola 0:f1d3878b8dd9 106
vpcola 0:f1d3878b8dd9 107 /**
vpcola 0:f1d3878b8dd9 108 * @defgroup Qi_Private_Functions QI Private Functions
vpcola 0:f1d3878b8dd9 109 * @{
vpcola 0:f1d3878b8dd9 110 */
vpcola 0:f1d3878b8dd9 111
vpcola 0:f1d3878b8dd9 112 /**
vpcola 0:f1d3878b8dd9 113 * @brief Enables/Disables the PQI Preamble Quality Indicator check. The running peak PQI is
vpcola 0:f1d3878b8dd9 114 * compared to a threshold value and the preamble valid IRQ is asserted as soon as the threshold is passed.
vpcola 0:f1d3878b8dd9 115 * @param xNewState new state for PQI check.
vpcola 0:f1d3878b8dd9 116 * This parameter can be: S_ENABLE or S_DISABLE.
vpcola 0:f1d3878b8dd9 117 * @retval None.
vpcola 0:f1d3878b8dd9 118 */
vpcola 0:f1d3878b8dd9 119 void SpiritQiPqiCheck(SpiritFunctionalState xNewState)
vpcola 0:f1d3878b8dd9 120 {
vpcola 0:f1d3878b8dd9 121 uint8_t tempRegValue;
vpcola 0:f1d3878b8dd9 122
vpcola 0:f1d3878b8dd9 123 /* Check the parameters */
vpcola 0:f1d3878b8dd9 124 s_assert_param(IS_SPIRIT_FUNCTIONAL_STATE(xNewState));
vpcola 0:f1d3878b8dd9 125
vpcola 0:f1d3878b8dd9 126 /* Reads the QI register value */
vpcola 0:f1d3878b8dd9 127 g_xStatus = SpiritSpiReadRegisters(QI_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 128
vpcola 0:f1d3878b8dd9 129 /* Enables or disables the PQI Check bit on the QI_BASE register */
vpcola 0:f1d3878b8dd9 130 if(xNewState == S_ENABLE)
vpcola 0:f1d3878b8dd9 131 {
vpcola 0:f1d3878b8dd9 132 tempRegValue |= QI_PQI_MASK;
vpcola 0:f1d3878b8dd9 133 }
vpcola 0:f1d3878b8dd9 134 else
vpcola 0:f1d3878b8dd9 135 {
vpcola 0:f1d3878b8dd9 136 tempRegValue &= ~QI_PQI_MASK;
vpcola 0:f1d3878b8dd9 137 }
vpcola 0:f1d3878b8dd9 138
vpcola 0:f1d3878b8dd9 139 /* Writes value on the QI register */
vpcola 0:f1d3878b8dd9 140 g_xStatus = SpiritSpiWriteRegisters(QI_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 141
vpcola 0:f1d3878b8dd9 142 }
vpcola 0:f1d3878b8dd9 143
vpcola 0:f1d3878b8dd9 144
vpcola 0:f1d3878b8dd9 145 /**
vpcola 0:f1d3878b8dd9 146 * @brief Enables/Disables the Synchronization Quality Indicator check. The running peak SQI is
vpcola 0:f1d3878b8dd9 147 * compared to a threshold value and the sync valid IRQ is asserted as soon as the threshold is passed.
vpcola 0:f1d3878b8dd9 148 * @param xNewState new state for SQI check.
vpcola 0:f1d3878b8dd9 149 * This parameter can be: S_ENABLE or S_DISABLE.
vpcola 0:f1d3878b8dd9 150 * @retval None.
vpcola 0:f1d3878b8dd9 151 */
vpcola 0:f1d3878b8dd9 152 void SpiritQiSqiCheck(SpiritFunctionalState xNewState)
vpcola 0:f1d3878b8dd9 153 {
vpcola 0:f1d3878b8dd9 154 uint8_t tempRegValue;
vpcola 0:f1d3878b8dd9 155
vpcola 0:f1d3878b8dd9 156 /* Check the parameters */
vpcola 0:f1d3878b8dd9 157 s_assert_param(IS_SPIRIT_FUNCTIONAL_STATE(xNewState));
vpcola 0:f1d3878b8dd9 158
vpcola 0:f1d3878b8dd9 159 /* Reads the QI register value */
vpcola 0:f1d3878b8dd9 160 g_xStatus = SpiritSpiReadRegisters(QI_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 161
vpcola 0:f1d3878b8dd9 162 /* Enables or disables the SQI Check bit on the QI_BASE register */
vpcola 0:f1d3878b8dd9 163 if(xNewState == S_ENABLE)
vpcola 0:f1d3878b8dd9 164 {
vpcola 0:f1d3878b8dd9 165 tempRegValue |= QI_SQI_MASK;
vpcola 0:f1d3878b8dd9 166 }
vpcola 0:f1d3878b8dd9 167 else
vpcola 0:f1d3878b8dd9 168 {
vpcola 0:f1d3878b8dd9 169 tempRegValue &= ~QI_SQI_MASK;
vpcola 0:f1d3878b8dd9 170 }
vpcola 0:f1d3878b8dd9 171
vpcola 0:f1d3878b8dd9 172 /* Writes value on the QI register */
vpcola 0:f1d3878b8dd9 173 g_xStatus = SpiritSpiWriteRegisters(QI_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 174
vpcola 0:f1d3878b8dd9 175 }
vpcola 0:f1d3878b8dd9 176
vpcola 0:f1d3878b8dd9 177
vpcola 0:f1d3878b8dd9 178 /**
vpcola 0:f1d3878b8dd9 179 * @brief Sets the PQI threshold. The preamble quality threshold is 4*PQI_TH (PQI_TH = 0..15).
vpcola 0:f1d3878b8dd9 180 * @param xPqiThr parameter of the formula above.
vpcola 0:f1d3878b8dd9 181 * This variable is a @ref PqiThreshold.
vpcola 0:f1d3878b8dd9 182 * @retval None.
vpcola 0:f1d3878b8dd9 183 */
vpcola 0:f1d3878b8dd9 184 void SpiritQiSetPqiThreshold(PqiThreshold xPqiThr)
vpcola 0:f1d3878b8dd9 185 {
vpcola 0:f1d3878b8dd9 186 uint8_t tempRegValue;
vpcola 0:f1d3878b8dd9 187
vpcola 0:f1d3878b8dd9 188 /* Check the parameters */
vpcola 0:f1d3878b8dd9 189 s_assert_param(IS_PQI_THR(xPqiThr));
vpcola 0:f1d3878b8dd9 190
vpcola 0:f1d3878b8dd9 191 /* Reads the QI register value */
vpcola 0:f1d3878b8dd9 192 g_xStatus = SpiritSpiReadRegisters(QI_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 193
vpcola 0:f1d3878b8dd9 194 /* Build the PQI threshold value to be written */
vpcola 0:f1d3878b8dd9 195 tempRegValue &= 0xC3;
vpcola 0:f1d3878b8dd9 196 tempRegValue |= ((uint8_t)xPqiThr);
vpcola 0:f1d3878b8dd9 197
vpcola 0:f1d3878b8dd9 198 /* Writes value on the QI register */
vpcola 0:f1d3878b8dd9 199 g_xStatus = SpiritSpiWriteRegisters(QI_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 200
vpcola 0:f1d3878b8dd9 201 }
vpcola 0:f1d3878b8dd9 202
vpcola 0:f1d3878b8dd9 203
vpcola 0:f1d3878b8dd9 204 /**
vpcola 0:f1d3878b8dd9 205 * @brief Returns the PQI threshold. The preamble quality threshold is 4*PQI_TH (PQI_TH = 0..15).
vpcola 0:f1d3878b8dd9 206 * @param None.
vpcola 0:f1d3878b8dd9 207 * @retval PqiThreshold PQI threshold (PQI_TH of the formula above).
vpcola 0:f1d3878b8dd9 208 */
vpcola 0:f1d3878b8dd9 209 PqiThreshold SpiritQiGetPqiThreshold(void)
vpcola 0:f1d3878b8dd9 210 {
vpcola 0:f1d3878b8dd9 211 uint8_t tempRegValue;
vpcola 0:f1d3878b8dd9 212
vpcola 0:f1d3878b8dd9 213 /* Reads the QI register value */
vpcola 0:f1d3878b8dd9 214 g_xStatus = SpiritSpiReadRegisters(QI_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 215
vpcola 0:f1d3878b8dd9 216 /* Rebuild and return the PQI threshold value */
vpcola 0:f1d3878b8dd9 217 return (PqiThreshold)(tempRegValue & 0x3C);
vpcola 0:f1d3878b8dd9 218
vpcola 0:f1d3878b8dd9 219 }
vpcola 0:f1d3878b8dd9 220
vpcola 0:f1d3878b8dd9 221
vpcola 0:f1d3878b8dd9 222 /**
vpcola 0:f1d3878b8dd9 223 * @brief Sets the SQI threshold. The synchronization quality
vpcola 0:f1d3878b8dd9 224 * threshold is equal to 8 * SYNC_LEN - 2 * SQI_TH with SQI_TH = 0..3. When SQI_TH is 0 perfect match is required; when
vpcola 0:f1d3878b8dd9 225 * SQI_TH = 1, 2, 3 then 1, 2, or 3 bit errors are respectively accepted. It is recommended that the SQI check is always
vpcola 0:f1d3878b8dd9 226 * enabled.
vpcola 0:f1d3878b8dd9 227 * @param xSqiThr parameter of the formula above.
vpcola 0:f1d3878b8dd9 228 * This parameter is a @ref SqiThreshold.
vpcola 0:f1d3878b8dd9 229 * @retval None.
vpcola 0:f1d3878b8dd9 230 */
vpcola 0:f1d3878b8dd9 231 void SpiritQiSetSqiThreshold(SqiThreshold xSqiThr)
vpcola 0:f1d3878b8dd9 232 {
vpcola 0:f1d3878b8dd9 233 uint8_t tempRegValue;
vpcola 0:f1d3878b8dd9 234
vpcola 0:f1d3878b8dd9 235 /* Check the parameters */
vpcola 0:f1d3878b8dd9 236 s_assert_param(IS_SQI_THR(xSqiThr));
vpcola 0:f1d3878b8dd9 237
vpcola 0:f1d3878b8dd9 238 /* Reads the QI register value */
vpcola 0:f1d3878b8dd9 239 g_xStatus = SpiritSpiReadRegisters(QI_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 240
vpcola 0:f1d3878b8dd9 241 /* Build the SQI threshold value to be written */
vpcola 0:f1d3878b8dd9 242 tempRegValue &= 0x3F;
vpcola 0:f1d3878b8dd9 243 tempRegValue |= ((uint8_t)xSqiThr);
vpcola 0:f1d3878b8dd9 244
vpcola 0:f1d3878b8dd9 245 /* Writes the new value on the QI register */
vpcola 0:f1d3878b8dd9 246 g_xStatus = SpiritSpiWriteRegisters(QI_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 247
vpcola 0:f1d3878b8dd9 248 }
vpcola 0:f1d3878b8dd9 249
vpcola 0:f1d3878b8dd9 250
vpcola 0:f1d3878b8dd9 251 /**
vpcola 0:f1d3878b8dd9 252 * @brief Returns the SQI threshold. The synchronization quality threshold is equal to 8 * SYNC_LEN - 2 * SQI_TH with SQI_TH = 0..3.
vpcola 0:f1d3878b8dd9 253 * @param None.
vpcola 0:f1d3878b8dd9 254 * @retval SqiThreshold SQI threshold (SQI_TH of the formula above).
vpcola 0:f1d3878b8dd9 255 */
vpcola 0:f1d3878b8dd9 256 SqiThreshold SpiritQiGetSqiThreshold(void)
vpcola 0:f1d3878b8dd9 257 {
vpcola 0:f1d3878b8dd9 258 uint8_t tempRegValue;
vpcola 0:f1d3878b8dd9 259
vpcola 0:f1d3878b8dd9 260 /* Reads the QI register value */
vpcola 0:f1d3878b8dd9 261 g_xStatus = SpiritSpiReadRegisters(QI_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 262
vpcola 0:f1d3878b8dd9 263 /* Rebuild and return the SQI threshold value */
vpcola 0:f1d3878b8dd9 264 return (SqiThreshold)(tempRegValue & 0xC0);
vpcola 0:f1d3878b8dd9 265
vpcola 0:f1d3878b8dd9 266 }
vpcola 0:f1d3878b8dd9 267
vpcola 0:f1d3878b8dd9 268
vpcola 0:f1d3878b8dd9 269 /**
vpcola 0:f1d3878b8dd9 270 * @brief Returns the PQI value.
vpcola 0:f1d3878b8dd9 271 * @param None.
vpcola 0:f1d3878b8dd9 272 * @retval uint8_t PQI value.
vpcola 0:f1d3878b8dd9 273 */
vpcola 0:f1d3878b8dd9 274 uint8_t SpiritQiGetPqi(void)
vpcola 0:f1d3878b8dd9 275 {
vpcola 0:f1d3878b8dd9 276 uint8_t tempRegValue;
vpcola 0:f1d3878b8dd9 277
vpcola 0:f1d3878b8dd9 278 /* Reads the LINK_QUALIF2 register value */
vpcola 0:f1d3878b8dd9 279 g_xStatus = SpiritSpiReadRegisters(LINK_QUALIF2_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 280
vpcola 0:f1d3878b8dd9 281 /* Returns the PQI value */
vpcola 0:f1d3878b8dd9 282 return tempRegValue;
vpcola 0:f1d3878b8dd9 283
vpcola 0:f1d3878b8dd9 284 }
vpcola 0:f1d3878b8dd9 285
vpcola 0:f1d3878b8dd9 286
vpcola 0:f1d3878b8dd9 287 /**
vpcola 0:f1d3878b8dd9 288 * @brief Returns the SQI value.
vpcola 0:f1d3878b8dd9 289 * @param None.
vpcola 0:f1d3878b8dd9 290 * @retval uint8_t SQI value.
vpcola 0:f1d3878b8dd9 291 */
vpcola 0:f1d3878b8dd9 292 uint8_t SpiritQiGetSqi(void)
vpcola 0:f1d3878b8dd9 293 {
vpcola 0:f1d3878b8dd9 294 uint8_t tempRegValue;
vpcola 0:f1d3878b8dd9 295
vpcola 0:f1d3878b8dd9 296 /* Reads the register LINK_QUALIF1 value */
vpcola 0:f1d3878b8dd9 297 g_xStatus = SpiritSpiReadRegisters(LINK_QUALIF1_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 298
vpcola 0:f1d3878b8dd9 299 /* Rebuild and return the SQI value */
vpcola 0:f1d3878b8dd9 300 return (tempRegValue & 0x7F);
vpcola 0:f1d3878b8dd9 301
vpcola 0:f1d3878b8dd9 302 }
vpcola 0:f1d3878b8dd9 303
vpcola 0:f1d3878b8dd9 304
vpcola 0:f1d3878b8dd9 305 /**
vpcola 0:f1d3878b8dd9 306 * @brief Returns the LQI value.
vpcola 0:f1d3878b8dd9 307 * @param None.
vpcola 0:f1d3878b8dd9 308 * @retval uint8_t LQI value.
vpcola 0:f1d3878b8dd9 309 */
vpcola 0:f1d3878b8dd9 310 uint8_t SpiritQiGetLqi(void)
vpcola 0:f1d3878b8dd9 311 {
vpcola 0:f1d3878b8dd9 312 uint8_t tempRegValue;
vpcola 0:f1d3878b8dd9 313
vpcola 0:f1d3878b8dd9 314 /* Reads the LINK_QUALIF0 register value */
vpcola 0:f1d3878b8dd9 315 g_xStatus = SpiritSpiReadRegisters(LINK_QUALIF0_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 316
vpcola 0:f1d3878b8dd9 317 /* Rebuild and return the LQI value */
vpcola 0:f1d3878b8dd9 318 return ((tempRegValue & 0xF0)>> 4);
vpcola 0:f1d3878b8dd9 319
vpcola 0:f1d3878b8dd9 320 }
vpcola 0:f1d3878b8dd9 321
vpcola 0:f1d3878b8dd9 322
vpcola 0:f1d3878b8dd9 323 /**
vpcola 0:f1d3878b8dd9 324 * @brief Returns the CS status.
vpcola 0:f1d3878b8dd9 325 * @param None.
vpcola 0:f1d3878b8dd9 326 * @retval SpiritFlagStatus CS value (S_SET or S_RESET).
vpcola 0:f1d3878b8dd9 327 */
vpcola 0:f1d3878b8dd9 328 SpiritFlagStatus SpiritQiGetCs(void)
vpcola 0:f1d3878b8dd9 329 {
vpcola 0:f1d3878b8dd9 330 uint8_t tempRegValue;
vpcola 0:f1d3878b8dd9 331
vpcola 0:f1d3878b8dd9 332 /* Reads the LINK_QUALIF1 register value */
vpcola 0:f1d3878b8dd9 333 g_xStatus = SpiritSpiReadRegisters(LINK_QUALIF1_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 334
vpcola 0:f1d3878b8dd9 335 /* Rebuild and returns the CS status value */
vpcola 0:f1d3878b8dd9 336 if((tempRegValue & 0x80) == 0)
vpcola 0:f1d3878b8dd9 337 {
vpcola 0:f1d3878b8dd9 338 return S_RESET;
vpcola 0:f1d3878b8dd9 339 }
vpcola 0:f1d3878b8dd9 340 else
vpcola 0:f1d3878b8dd9 341 {
vpcola 0:f1d3878b8dd9 342 return S_SET;
vpcola 0:f1d3878b8dd9 343 }
vpcola 0:f1d3878b8dd9 344
vpcola 0:f1d3878b8dd9 345 }
vpcola 0:f1d3878b8dd9 346
vpcola 0:f1d3878b8dd9 347
vpcola 0:f1d3878b8dd9 348 /**
vpcola 0:f1d3878b8dd9 349 * @brief Returns the RSSI value. The measured power is reported in steps of half a dB from 0 to 255 and is offset in such a way that -120 dBm corresponds
vpcola 0:f1d3878b8dd9 350 * to 20.
vpcola 0:f1d3878b8dd9 351 * @param None.
vpcola 0:f1d3878b8dd9 352 * @retval uint8_t RSSI value.
vpcola 0:f1d3878b8dd9 353 */
vpcola 0:f1d3878b8dd9 354 uint8_t SpiritQiGetRssi(void)
vpcola 0:f1d3878b8dd9 355 {
vpcola 0:f1d3878b8dd9 356 uint8_t tempRegValue;
vpcola 0:f1d3878b8dd9 357
vpcola 0:f1d3878b8dd9 358 /* Reads the RSSI_LEVEL register value */
vpcola 0:f1d3878b8dd9 359 g_xStatus = SpiritSpiReadRegisters(RSSI_LEVEL_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 360
vpcola 0:f1d3878b8dd9 361 /* Returns the RSSI value */
vpcola 0:f1d3878b8dd9 362 return tempRegValue;
vpcola 0:f1d3878b8dd9 363
vpcola 0:f1d3878b8dd9 364 }
vpcola 0:f1d3878b8dd9 365
vpcola 0:f1d3878b8dd9 366
vpcola 0:f1d3878b8dd9 367 /**
vpcola 0:f1d3878b8dd9 368 * @brief Sets the RSSI threshold.
vpcola 0:f1d3878b8dd9 369 * @param cRssiThr RSSI threshold reported in steps of half a dBm with a -130 dBm offset.
vpcola 0:f1d3878b8dd9 370 * This parameter must be a uint8_t.
vpcola 0:f1d3878b8dd9 371 * @retval None.
vpcola 0:f1d3878b8dd9 372 */
vpcola 0:f1d3878b8dd9 373 void SpiritQiSetRssiThreshold(uint8_t cRssiThr)
vpcola 0:f1d3878b8dd9 374 {
vpcola 0:f1d3878b8dd9 375 /* Writes the new value on the RSSI_TH register */
vpcola 0:f1d3878b8dd9 376 g_xStatus = SpiritSpiWriteRegisters(RSSI_TH_BASE, 1, &cRssiThr);
vpcola 0:f1d3878b8dd9 377
vpcola 0:f1d3878b8dd9 378 }
vpcola 0:f1d3878b8dd9 379
vpcola 0:f1d3878b8dd9 380
vpcola 0:f1d3878b8dd9 381 /**
vpcola 0:f1d3878b8dd9 382 * @brief Returns the RSSI threshold.
vpcola 0:f1d3878b8dd9 383 * @param None.
vpcola 0:f1d3878b8dd9 384 * @retval uint8_t RSSI threshold.
vpcola 0:f1d3878b8dd9 385 */
vpcola 0:f1d3878b8dd9 386 uint8_t SpiritQiGetRssiThreshold(void)
vpcola 0:f1d3878b8dd9 387 {
vpcola 0:f1d3878b8dd9 388 uint8_t tempRegValue;
vpcola 0:f1d3878b8dd9 389
vpcola 0:f1d3878b8dd9 390 /* Reads the RSSI_TH register value */
vpcola 0:f1d3878b8dd9 391 g_xStatus = SpiritSpiReadRegisters(RSSI_TH_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 392
vpcola 0:f1d3878b8dd9 393 /* Returns RSSI threshold */
vpcola 0:f1d3878b8dd9 394 return tempRegValue;
vpcola 0:f1d3878b8dd9 395
vpcola 0:f1d3878b8dd9 396 }
vpcola 0:f1d3878b8dd9 397
vpcola 0:f1d3878b8dd9 398
vpcola 0:f1d3878b8dd9 399 /**
vpcola 0:f1d3878b8dd9 400 * @brief Computes the RSSI threshold from its dBm value according to the formula: (RSSI[Dbm] + 130)/0.5
vpcola 0:f1d3878b8dd9 401 * @param nDbmValue RSSI threshold reported in dBm.
vpcola 0:f1d3878b8dd9 402 * This parameter must be a sint16_t.
vpcola 0:f1d3878b8dd9 403 * @retval uint8_t RSSI threshold corresponding to dBm value.
vpcola 0:f1d3878b8dd9 404 */
vpcola 0:f1d3878b8dd9 405 uint8_t SpiritQiComputeRssiThreshold(int nDbmValue)
vpcola 0:f1d3878b8dd9 406 {
vpcola 0:f1d3878b8dd9 407 /* Check the parameters */
vpcola 0:f1d3878b8dd9 408 s_assert_param(IS_RSSI_THR_DBM(nDbmValue));
vpcola 0:f1d3878b8dd9 409
vpcola 0:f1d3878b8dd9 410 /* Computes the RSSI threshold for register */
vpcola 0:f1d3878b8dd9 411 return 2*(nDbmValue+130);
vpcola 0:f1d3878b8dd9 412
vpcola 0:f1d3878b8dd9 413 }
vpcola 0:f1d3878b8dd9 414
vpcola 0:f1d3878b8dd9 415 /**
vpcola 0:f1d3878b8dd9 416 * @brief Sets the RSSI threshold from its dBm value according to the formula: (RSSI[Dbm] + 130)/0.5.
vpcola 0:f1d3878b8dd9 417 * @param nDbmValue RSSI threshold reported in dBm.
vpcola 0:f1d3878b8dd9 418 * This parameter must be a sint16_t.
vpcola 0:f1d3878b8dd9 419 * @retval None.
vpcola 0:f1d3878b8dd9 420 */
vpcola 0:f1d3878b8dd9 421 void SpiritQiSetRssiThresholddBm(int nDbmValue)
vpcola 0:f1d3878b8dd9 422 {
vpcola 0:f1d3878b8dd9 423 uint8_t tempRegValue=2*(nDbmValue+130);
vpcola 0:f1d3878b8dd9 424
vpcola 0:f1d3878b8dd9 425 /* Check the parameters */
vpcola 0:f1d3878b8dd9 426 s_assert_param(IS_RSSI_THR_DBM(nDbmValue));
vpcola 0:f1d3878b8dd9 427
vpcola 0:f1d3878b8dd9 428 /* Writes the new value on the RSSI_TH register */
vpcola 0:f1d3878b8dd9 429 g_xStatus = SpiritSpiWriteRegisters(RSSI_TH_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 430
vpcola 0:f1d3878b8dd9 431 }
vpcola 0:f1d3878b8dd9 432
vpcola 0:f1d3878b8dd9 433 /**
vpcola 0:f1d3878b8dd9 434 * @brief Sets the RSSI filter gain. This parameter sets the bandwidth of a low pass IIR filter (RSSI_FLT register, allowed values 0..15), a
vpcola 0:f1d3878b8dd9 435 * lower values gives a faster settling of the measurements but lower precision. The recommended value for such parameter is 14.
vpcola 0:f1d3878b8dd9 436 * @param xRssiFg RSSI filter gain value.
vpcola 0:f1d3878b8dd9 437 * This parameter can be any value of @ref RssiFilterGain.
vpcola 0:f1d3878b8dd9 438 * @retval None.
vpcola 0:f1d3878b8dd9 439 */
vpcola 0:f1d3878b8dd9 440 void SpiritQiSetRssiFilterGain(RssiFilterGain xRssiFg)
vpcola 0:f1d3878b8dd9 441 {
vpcola 0:f1d3878b8dd9 442 uint8_t tempRegValue;
vpcola 0:f1d3878b8dd9 443
vpcola 0:f1d3878b8dd9 444 /* Check the parameters */
vpcola 0:f1d3878b8dd9 445 s_assert_param(IS_RSSI_FILTER_GAIN(xRssiFg));
vpcola 0:f1d3878b8dd9 446
vpcola 0:f1d3878b8dd9 447 /* Reads the RSSI_FLT register */
vpcola 0:f1d3878b8dd9 448 g_xStatus = SpiritSpiReadRegisters(RSSI_FLT_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 449
vpcola 0:f1d3878b8dd9 450 /* Sets the specified filter gain */
vpcola 0:f1d3878b8dd9 451 tempRegValue &= 0x0F;
vpcola 0:f1d3878b8dd9 452 tempRegValue |= ((uint8_t)xRssiFg);
vpcola 0:f1d3878b8dd9 453
vpcola 0:f1d3878b8dd9 454 /* Writes the new value on the RSSI_FLT register */
vpcola 0:f1d3878b8dd9 455 g_xStatus = SpiritSpiWriteRegisters(RSSI_FLT_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 456
vpcola 0:f1d3878b8dd9 457 }
vpcola 0:f1d3878b8dd9 458
vpcola 0:f1d3878b8dd9 459
vpcola 0:f1d3878b8dd9 460 /**
vpcola 0:f1d3878b8dd9 461 * @brief Returns the RSSI filter gain.
vpcola 0:f1d3878b8dd9 462 * @param None.
vpcola 0:f1d3878b8dd9 463 * @retval RssiFilterGain RSSI filter gain.
vpcola 0:f1d3878b8dd9 464 */
vpcola 0:f1d3878b8dd9 465 RssiFilterGain SpiritQiGetRssiFilterGain(void)
vpcola 0:f1d3878b8dd9 466 {
vpcola 0:f1d3878b8dd9 467 uint8_t tempRegValue;
vpcola 0:f1d3878b8dd9 468
vpcola 0:f1d3878b8dd9 469 /* Reads the RSSI_FLT register */
vpcola 0:f1d3878b8dd9 470 g_xStatus = SpiritSpiReadRegisters(RSSI_FLT_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 471
vpcola 0:f1d3878b8dd9 472 /* Rebuild and returns the filter gain value */
vpcola 0:f1d3878b8dd9 473 return (RssiFilterGain)(tempRegValue & 0xF0);
vpcola 0:f1d3878b8dd9 474
vpcola 0:f1d3878b8dd9 475 }
vpcola 0:f1d3878b8dd9 476
vpcola 0:f1d3878b8dd9 477
vpcola 0:f1d3878b8dd9 478 /**
vpcola 0:f1d3878b8dd9 479 * @brief Sets the CS Mode. When static carrier sensing is used (cs_mode = 0), the carrier sense signal is asserted when the measured RSSI is above the
vpcola 0:f1d3878b8dd9 480 * value specified in the RSSI_TH register and is deasserted when the RSSI falls 3 dB below the same threshold.
vpcola 0:f1d3878b8dd9 481 * When dynamic carrier sense is used (cs_mode = 1, 2, 3), the carrier sense signal is asserted if the signal is above the
vpcola 0:f1d3878b8dd9 482 * threshold and a fast power increase of 6, 12 or 18 dB is detected; it is deasserted if a power fall of the same amplitude is
vpcola 0:f1d3878b8dd9 483 * detected.
vpcola 0:f1d3878b8dd9 484 * @param xCsMode CS mode selector.
vpcola 0:f1d3878b8dd9 485 * This parameter can be any value of @ref CSMode.
vpcola 0:f1d3878b8dd9 486 * @retval None.
vpcola 0:f1d3878b8dd9 487 */
vpcola 0:f1d3878b8dd9 488 void SpiritQiSetCsMode(CSMode xCsMode)
vpcola 0:f1d3878b8dd9 489 {
vpcola 0:f1d3878b8dd9 490 uint8_t tempRegValue;
vpcola 0:f1d3878b8dd9 491
vpcola 0:f1d3878b8dd9 492 /* Check the parameters */
vpcola 0:f1d3878b8dd9 493 s_assert_param(IS_CS_MODE(xCsMode));
vpcola 0:f1d3878b8dd9 494
vpcola 0:f1d3878b8dd9 495 /* Reads the RSSI_FLT register */
vpcola 0:f1d3878b8dd9 496 g_xStatus = SpiritSpiReadRegisters(RSSI_FLT_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 497
vpcola 0:f1d3878b8dd9 498 /* Sets bit to select the CS mode */
vpcola 0:f1d3878b8dd9 499 tempRegValue &= ~0x0C;
vpcola 0:f1d3878b8dd9 500 tempRegValue |= ((uint8_t)xCsMode);
vpcola 0:f1d3878b8dd9 501
vpcola 0:f1d3878b8dd9 502 /* Writes the new value on the RSSI_FLT register */
vpcola 0:f1d3878b8dd9 503 g_xStatus = SpiritSpiWriteRegisters(RSSI_FLT_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 504
vpcola 0:f1d3878b8dd9 505 }
vpcola 0:f1d3878b8dd9 506
vpcola 0:f1d3878b8dd9 507
vpcola 0:f1d3878b8dd9 508 /**
vpcola 0:f1d3878b8dd9 509 * @brief Returns the CS Mode.
vpcola 0:f1d3878b8dd9 510 * @param None.
vpcola 0:f1d3878b8dd9 511 * @retval CSMode CS mode.
vpcola 0:f1d3878b8dd9 512 */
vpcola 0:f1d3878b8dd9 513 CSMode SpiritQiGetCsMode(void)
vpcola 0:f1d3878b8dd9 514 {
vpcola 0:f1d3878b8dd9 515 uint8_t tempRegValue;
vpcola 0:f1d3878b8dd9 516
vpcola 0:f1d3878b8dd9 517 /* Reads the RSSI_FLT register */
vpcola 0:f1d3878b8dd9 518 g_xStatus = SpiritSpiReadRegisters(RSSI_FLT_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 519
vpcola 0:f1d3878b8dd9 520 /* Rebuild and returns the CS mode value */
vpcola 0:f1d3878b8dd9 521 return (CSMode)(tempRegValue & 0x0C);
vpcola 0:f1d3878b8dd9 522
vpcola 0:f1d3878b8dd9 523 }
vpcola 0:f1d3878b8dd9 524
vpcola 0:f1d3878b8dd9 525 /**
vpcola 0:f1d3878b8dd9 526 * @brief Enables/Disables the CS Timeout Mask. If enabled CS value contributes to timeout disabling.
vpcola 0:f1d3878b8dd9 527 * @param xNewState new state for CS Timeout Mask.
vpcola 0:f1d3878b8dd9 528 * This parameter can be S_ENABLE or S_DISABLE.
vpcola 0:f1d3878b8dd9 529 * @retval None.
vpcola 0:f1d3878b8dd9 530 */
vpcola 0:f1d3878b8dd9 531 void SpiritQiCsTimeoutMask(SpiritFunctionalState xNewState)
vpcola 0:f1d3878b8dd9 532 {
vpcola 0:f1d3878b8dd9 533 uint8_t tempRegValue;
vpcola 0:f1d3878b8dd9 534
vpcola 0:f1d3878b8dd9 535 /* Check the parameters */
vpcola 0:f1d3878b8dd9 536 s_assert_param(IS_SPIRIT_FUNCTIONAL_STATE(xNewState));
vpcola 0:f1d3878b8dd9 537
vpcola 0:f1d3878b8dd9 538 /* Reads the PROTOCOL2 register value */
vpcola 0:f1d3878b8dd9 539 g_xStatus = SpiritSpiReadRegisters(PROTOCOL2_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 540
vpcola 0:f1d3878b8dd9 541 /* Enables or disables the CS timeout mask */
vpcola 0:f1d3878b8dd9 542 if(xNewState == S_ENABLE)
vpcola 0:f1d3878b8dd9 543 {
vpcola 0:f1d3878b8dd9 544 tempRegValue |= PROTOCOL2_CS_TIMEOUT_MASK;
vpcola 0:f1d3878b8dd9 545 }
vpcola 0:f1d3878b8dd9 546 else
vpcola 0:f1d3878b8dd9 547 {
vpcola 0:f1d3878b8dd9 548 tempRegValue &= ~PROTOCOL2_CS_TIMEOUT_MASK;
vpcola 0:f1d3878b8dd9 549 }
vpcola 0:f1d3878b8dd9 550
vpcola 0:f1d3878b8dd9 551 /* Writes the new value on the PROTOCOL2 register */
vpcola 0:f1d3878b8dd9 552 g_xStatus = SpiritSpiWriteRegisters(PROTOCOL2_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 553
vpcola 0:f1d3878b8dd9 554 }
vpcola 0:f1d3878b8dd9 555
vpcola 0:f1d3878b8dd9 556
vpcola 0:f1d3878b8dd9 557 /**
vpcola 0:f1d3878b8dd9 558 * @brief Enables/Disables the PQI Timeout Mask. If enabled PQI value contributes to timeout disabling.
vpcola 0:f1d3878b8dd9 559 * @param xNewState new state for PQI Timeout Mask.
vpcola 0:f1d3878b8dd9 560 * This parameter can be S_ENABLE or S_DISABLE.
vpcola 0:f1d3878b8dd9 561 * @retval None.
vpcola 0:f1d3878b8dd9 562 */
vpcola 0:f1d3878b8dd9 563 void SpiritQiPqiTimeoutMask(SpiritFunctionalState xNewState)
vpcola 0:f1d3878b8dd9 564 {
vpcola 0:f1d3878b8dd9 565 uint8_t tempRegValue;
vpcola 0:f1d3878b8dd9 566
vpcola 0:f1d3878b8dd9 567 /* Check the parameters */
vpcola 0:f1d3878b8dd9 568 s_assert_param(IS_SPIRIT_FUNCTIONAL_STATE(xNewState));
vpcola 0:f1d3878b8dd9 569
vpcola 0:f1d3878b8dd9 570 /* Reads the PROTOCOL2 register */
vpcola 0:f1d3878b8dd9 571 g_xStatus = SpiritSpiReadRegisters(PROTOCOL2_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 572
vpcola 0:f1d3878b8dd9 573 /* Enables or disables the PQI timeout mask */
vpcola 0:f1d3878b8dd9 574 if(xNewState == S_ENABLE)
vpcola 0:f1d3878b8dd9 575 {
vpcola 0:f1d3878b8dd9 576 tempRegValue |= PROTOCOL2_PQI_TIMEOUT_MASK;
vpcola 0:f1d3878b8dd9 577 }
vpcola 0:f1d3878b8dd9 578 else
vpcola 0:f1d3878b8dd9 579 {
vpcola 0:f1d3878b8dd9 580 tempRegValue &= ~PROTOCOL2_PQI_TIMEOUT_MASK;
vpcola 0:f1d3878b8dd9 581 }
vpcola 0:f1d3878b8dd9 582
vpcola 0:f1d3878b8dd9 583 /* Writes the new value on the PROTOCOL2 register */
vpcola 0:f1d3878b8dd9 584 g_xStatus = SpiritSpiWriteRegisters(PROTOCOL2_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 585
vpcola 0:f1d3878b8dd9 586 }
vpcola 0:f1d3878b8dd9 587
vpcola 0:f1d3878b8dd9 588
vpcola 0:f1d3878b8dd9 589 /**
vpcola 0:f1d3878b8dd9 590 * @brief Enables/Disables the SQI Timeout Mask. If enabled SQI value contributes to timeout disabling.
vpcola 0:f1d3878b8dd9 591 * @param xNewState new state for SQI Timeout Mask.
vpcola 0:f1d3878b8dd9 592 * This parameter can be S_ENABLE or S_DISABLE.
vpcola 0:f1d3878b8dd9 593 * @retval None.
vpcola 0:f1d3878b8dd9 594 */
vpcola 0:f1d3878b8dd9 595 void SpiritQiSqiTimeoutMask(SpiritFunctionalState xNewState)
vpcola 0:f1d3878b8dd9 596 {
vpcola 0:f1d3878b8dd9 597 uint8_t tempRegValue;
vpcola 0:f1d3878b8dd9 598
vpcola 0:f1d3878b8dd9 599 /* Check the parameters */
vpcola 0:f1d3878b8dd9 600 s_assert_param(IS_SPIRIT_FUNCTIONAL_STATE(xNewState));
vpcola 0:f1d3878b8dd9 601
vpcola 0:f1d3878b8dd9 602 /* Reads the PROTOCOL2 register */
vpcola 0:f1d3878b8dd9 603 g_xStatus = SpiritSpiReadRegisters(PROTOCOL2_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 604
vpcola 0:f1d3878b8dd9 605 /* Enables or disables the SQI timeout mask */
vpcola 0:f1d3878b8dd9 606 if(xNewState == S_ENABLE)
vpcola 0:f1d3878b8dd9 607 {
vpcola 0:f1d3878b8dd9 608 tempRegValue |= PROTOCOL2_SQI_TIMEOUT_MASK;
vpcola 0:f1d3878b8dd9 609 }
vpcola 0:f1d3878b8dd9 610 else
vpcola 0:f1d3878b8dd9 611 {
vpcola 0:f1d3878b8dd9 612 tempRegValue &= ~PROTOCOL2_SQI_TIMEOUT_MASK;
vpcola 0:f1d3878b8dd9 613 }
vpcola 0:f1d3878b8dd9 614
vpcola 0:f1d3878b8dd9 615 /* Writes the new value on the PROTOCOL2 register */
vpcola 0:f1d3878b8dd9 616 g_xStatus = SpiritSpiWriteRegisters(PROTOCOL2_BASE, 1, &tempRegValue);
vpcola 0:f1d3878b8dd9 617
vpcola 0:f1d3878b8dd9 618 }
vpcola 0:f1d3878b8dd9 619
vpcola 0:f1d3878b8dd9 620
vpcola 0:f1d3878b8dd9 621 /**
vpcola 0:f1d3878b8dd9 622 *@}
vpcola 0:f1d3878b8dd9 623 */
vpcola 0:f1d3878b8dd9 624
vpcola 0:f1d3878b8dd9 625 /**
vpcola 0:f1d3878b8dd9 626 *@}
vpcola 0:f1d3878b8dd9 627 */
vpcola 0:f1d3878b8dd9 628
vpcola 0:f1d3878b8dd9 629
vpcola 0:f1d3878b8dd9 630 /**
vpcola 0:f1d3878b8dd9 631 *@}
vpcola 0:f1d3878b8dd9 632 */
vpcola 0:f1d3878b8dd9 633
vpcola 0:f1d3878b8dd9 634
vpcola 0:f1d3878b8dd9 635
vpcola 0:f1d3878b8dd9 636 /******************* (C) COPYRIGHT 2015 STMicroelectronics *****END OF FILE****/