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vpcola
Date:
Sat Apr 08 14:45:51 2017 +0000
Revision:
0:f1d3878b8dd9
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vpcola 0:f1d3878b8dd9 1 /**
vpcola 0:f1d3878b8dd9 2 ******************************************************************************
vpcola 0:f1d3878b8dd9 3 * @file SPIRIT_Irq.c
vpcola 0:f1d3878b8dd9 4 * @author VMA division - AMS
vpcola 0:f1d3878b8dd9 5 * @version 3.2.2
vpcola 0:f1d3878b8dd9 6 * @date 08-July-2015
vpcola 0:f1d3878b8dd9 7 * @brief Configuration and management of SPIRIT IRQs.
vpcola 0:f1d3878b8dd9 8 * @details
vpcola 0:f1d3878b8dd9 9 *
vpcola 0:f1d3878b8dd9 10 * @attention
vpcola 0:f1d3878b8dd9 11 *
vpcola 0:f1d3878b8dd9 12 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
vpcola 0:f1d3878b8dd9 13 *
vpcola 0:f1d3878b8dd9 14 * Redistribution and use in source and binary forms, with or without modification,
vpcola 0:f1d3878b8dd9 15 * are permitted provided that the following conditions are met:
vpcola 0:f1d3878b8dd9 16 * 1. Redistributions of source code must retain the above copyright notice,
vpcola 0:f1d3878b8dd9 17 * this list of conditions and the following disclaimer.
vpcola 0:f1d3878b8dd9 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
vpcola 0:f1d3878b8dd9 19 * this list of conditions and the following disclaimer in the documentation
vpcola 0:f1d3878b8dd9 20 * and/or other materials provided with the distribution.
vpcola 0:f1d3878b8dd9 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
vpcola 0:f1d3878b8dd9 22 * may be used to endorse or promote products derived from this software
vpcola 0:f1d3878b8dd9 23 * without specific prior written permission.
vpcola 0:f1d3878b8dd9 24 *
vpcola 0:f1d3878b8dd9 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
vpcola 0:f1d3878b8dd9 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
vpcola 0:f1d3878b8dd9 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
vpcola 0:f1d3878b8dd9 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
vpcola 0:f1d3878b8dd9 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
vpcola 0:f1d3878b8dd9 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
vpcola 0:f1d3878b8dd9 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
vpcola 0:f1d3878b8dd9 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
vpcola 0:f1d3878b8dd9 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
vpcola 0:f1d3878b8dd9 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
vpcola 0:f1d3878b8dd9 35 *
vpcola 0:f1d3878b8dd9 36 ******************************************************************************
vpcola 0:f1d3878b8dd9 37 */
vpcola 0:f1d3878b8dd9 38
vpcola 0:f1d3878b8dd9 39 /* Includes ------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 40 #include "SPIRIT_Irq.h"
vpcola 0:f1d3878b8dd9 41 #include "MCU_Interface.h"
vpcola 0:f1d3878b8dd9 42
vpcola 0:f1d3878b8dd9 43
vpcola 0:f1d3878b8dd9 44
vpcola 0:f1d3878b8dd9 45 /**
vpcola 0:f1d3878b8dd9 46 * @addtogroup SPIRIT_Libraries
vpcola 0:f1d3878b8dd9 47 * @{
vpcola 0:f1d3878b8dd9 48 */
vpcola 0:f1d3878b8dd9 49
vpcola 0:f1d3878b8dd9 50
vpcola 0:f1d3878b8dd9 51 /**
vpcola 0:f1d3878b8dd9 52 * @addtogroup SPIRIT_Irq
vpcola 0:f1d3878b8dd9 53 * @{
vpcola 0:f1d3878b8dd9 54 */
vpcola 0:f1d3878b8dd9 55
vpcola 0:f1d3878b8dd9 56
vpcola 0:f1d3878b8dd9 57 /**
vpcola 0:f1d3878b8dd9 58 * @defgroup Irq_Private_TypesDefinitions IRQ Private Types Definitions
vpcola 0:f1d3878b8dd9 59 * @{
vpcola 0:f1d3878b8dd9 60 */
vpcola 0:f1d3878b8dd9 61
vpcola 0:f1d3878b8dd9 62 /**
vpcola 0:f1d3878b8dd9 63 *@}
vpcola 0:f1d3878b8dd9 64 */
vpcola 0:f1d3878b8dd9 65
vpcola 0:f1d3878b8dd9 66
vpcola 0:f1d3878b8dd9 67 /**
vpcola 0:f1d3878b8dd9 68 * @defgroup Irq_Private_Defines IRQ Private Defines
vpcola 0:f1d3878b8dd9 69 * @{
vpcola 0:f1d3878b8dd9 70 */
vpcola 0:f1d3878b8dd9 71
vpcola 0:f1d3878b8dd9 72 /**
vpcola 0:f1d3878b8dd9 73 *@}
vpcola 0:f1d3878b8dd9 74 */
vpcola 0:f1d3878b8dd9 75
vpcola 0:f1d3878b8dd9 76
vpcola 0:f1d3878b8dd9 77 /**
vpcola 0:f1d3878b8dd9 78 * @defgroup Irq_Private_Macros IRQ Private Macros
vpcola 0:f1d3878b8dd9 79 * @{
vpcola 0:f1d3878b8dd9 80 */
vpcola 0:f1d3878b8dd9 81
vpcola 0:f1d3878b8dd9 82 /**
vpcola 0:f1d3878b8dd9 83 *@}
vpcola 0:f1d3878b8dd9 84 */
vpcola 0:f1d3878b8dd9 85
vpcola 0:f1d3878b8dd9 86
vpcola 0:f1d3878b8dd9 87 /**
vpcola 0:f1d3878b8dd9 88 * @defgroup Irq_Private_Variables IRQ Private Variables
vpcola 0:f1d3878b8dd9 89 * @{
vpcola 0:f1d3878b8dd9 90 */
vpcola 0:f1d3878b8dd9 91
vpcola 0:f1d3878b8dd9 92
vpcola 0:f1d3878b8dd9 93 /**
vpcola 0:f1d3878b8dd9 94 *@}
vpcola 0:f1d3878b8dd9 95 */
vpcola 0:f1d3878b8dd9 96
vpcola 0:f1d3878b8dd9 97
vpcola 0:f1d3878b8dd9 98 /**
vpcola 0:f1d3878b8dd9 99 * @defgroup Irq_Private_FunctionPrototypes IRQ Private Function Prototypes
vpcola 0:f1d3878b8dd9 100 * @{
vpcola 0:f1d3878b8dd9 101 */
vpcola 0:f1d3878b8dd9 102
vpcola 0:f1d3878b8dd9 103 /**
vpcola 0:f1d3878b8dd9 104 *@}
vpcola 0:f1d3878b8dd9 105 */
vpcola 0:f1d3878b8dd9 106
vpcola 0:f1d3878b8dd9 107
vpcola 0:f1d3878b8dd9 108 /**
vpcola 0:f1d3878b8dd9 109 * @defgroup Irq_Private_Functions IRQ Private Functions
vpcola 0:f1d3878b8dd9 110 * @{
vpcola 0:f1d3878b8dd9 111 */
vpcola 0:f1d3878b8dd9 112
vpcola 0:f1d3878b8dd9 113
vpcola 0:f1d3878b8dd9 114 /**
vpcola 0:f1d3878b8dd9 115 * @brief De initializate the SpiritIrqs structure setting all the bitfield to 0.
vpcola 0:f1d3878b8dd9 116 * Moreover, it sets the IRQ mask registers to 0x00000000, disabling all IRQs.
vpcola 0:f1d3878b8dd9 117 * @param pxIrqInit pointer to a variable of type @ref SpiritIrqs, in which all the
vpcola 0:f1d3878b8dd9 118 * bitfields will be settled to zero.
vpcola 0:f1d3878b8dd9 119 * @retval None.
vpcola 0:f1d3878b8dd9 120 */
vpcola 0:f1d3878b8dd9 121 void SpiritIrqDeInit(SpiritIrqs* pxIrqInit)
vpcola 0:f1d3878b8dd9 122 {
vpcola 0:f1d3878b8dd9 123 uint8_t tempRegValue[4]={0x00,0x00,0x00,0x00};
vpcola 0:f1d3878b8dd9 124
vpcola 0:f1d3878b8dd9 125 if(pxIrqInit!=NULL)
vpcola 0:f1d3878b8dd9 126 {
vpcola 0:f1d3878b8dd9 127 /* Sets the bitfields of passed structure to one */
vpcola 0:f1d3878b8dd9 128 *(uint32_t*)pxIrqInit = 0x0;
vpcola 0:f1d3878b8dd9 129 }
vpcola 0:f1d3878b8dd9 130
vpcola 0:f1d3878b8dd9 131 /* Writes the IRQ_MASK registers */
vpcola 0:f1d3878b8dd9 132 g_xStatus = SpiritSpiWriteRegisters(IRQ_MASK3_BASE, 4, tempRegValue);
vpcola 0:f1d3878b8dd9 133 }
vpcola 0:f1d3878b8dd9 134
vpcola 0:f1d3878b8dd9 135
vpcola 0:f1d3878b8dd9 136 /**
vpcola 0:f1d3878b8dd9 137 * @brief Enables all the IRQs according to the user defined pxIrqInit structure.
vpcola 0:f1d3878b8dd9 138 * @param pxIrqInit pointer to a variable of type @ref SpiritIrqs, through which the
vpcola 0:f1d3878b8dd9 139 * user enable specific IRQs. This parameter is a pointer to a SpiritIrqs.
vpcola 0:f1d3878b8dd9 140 * For example suppose to enable only the two IRQ Low Battery Level and Tx Data Sent:
vpcola 0:f1d3878b8dd9 141 * @code
vpcola 0:f1d3878b8dd9 142 * SpiritIrqs myIrqInit = {0};
vpcola 0:f1d3878b8dd9 143 * myIrqInit.IRQ_LOW_BATT_LVL = 1;
vpcola 0:f1d3878b8dd9 144 * myIrqInit.IRQ_TX_DATA_SENT = 1;
vpcola 0:f1d3878b8dd9 145 * SpiritIrqInit(&myIrqInit);
vpcola 0:f1d3878b8dd9 146 * @endcode
vpcola 0:f1d3878b8dd9 147 * @retval None.
vpcola 0:f1d3878b8dd9 148 */
vpcola 0:f1d3878b8dd9 149 void SpiritIrqInit(SpiritIrqs* pxIrqInit)
vpcola 0:f1d3878b8dd9 150 {
vpcola 0:f1d3878b8dd9 151 /* Writes the IRQ_MASK registers */
vpcola 0:f1d3878b8dd9 152 g_xStatus = SpiritSpiWriteRegisters(IRQ_MASK3_BASE, 4, (uint8_t*)pxIrqInit);
vpcola 0:f1d3878b8dd9 153
vpcola 0:f1d3878b8dd9 154 }
vpcola 0:f1d3878b8dd9 155
vpcola 0:f1d3878b8dd9 156
vpcola 0:f1d3878b8dd9 157 /**
vpcola 0:f1d3878b8dd9 158 * @brief Enables or disables a specific IRQ.
vpcola 0:f1d3878b8dd9 159 * @param xIrq IRQ to enable or disable.
vpcola 0:f1d3878b8dd9 160 * This parameter can be any value of @ref IrqList.
vpcola 0:f1d3878b8dd9 161 * @param xNewState new state for the IRQ.
vpcola 0:f1d3878b8dd9 162 * This parameter can be: S_ENABLE or S_DISABLE.
vpcola 0:f1d3878b8dd9 163 * @retval None.
vpcola 0:f1d3878b8dd9 164 */
vpcola 0:f1d3878b8dd9 165 void SpiritIrq(IrqList xIrq, SpiritFunctionalState xNewState)
vpcola 0:f1d3878b8dd9 166 {
vpcola 0:f1d3878b8dd9 167 uint8_t tempRegValue[4];
vpcola 0:f1d3878b8dd9 168 uint32_t tempValue = 0;
vpcola 0:f1d3878b8dd9 169
vpcola 0:f1d3878b8dd9 170 /* Check the parameters */
vpcola 0:f1d3878b8dd9 171 s_assert_param(IS_SPIRIT_IRQ_LIST(xIrq));
vpcola 0:f1d3878b8dd9 172 s_assert_param(IS_SPIRIT_FUNCTIONAL_STATE(xNewState));
vpcola 0:f1d3878b8dd9 173
vpcola 0:f1d3878b8dd9 174 /* Reads the IRQ_MASK registers */
vpcola 0:f1d3878b8dd9 175 g_xStatus = SpiritSpiReadRegisters(IRQ_MASK3_BASE, 4, tempRegValue);
vpcola 0:f1d3878b8dd9 176
vpcola 0:f1d3878b8dd9 177 /* Build the IRQ mask word */
vpcola 0:f1d3878b8dd9 178 for(uint8_t i=0; i<4; i++)
vpcola 0:f1d3878b8dd9 179 {
vpcola 0:f1d3878b8dd9 180 tempValue += ((uint32_t)tempRegValue[i])<<(8*(3-i));
vpcola 0:f1d3878b8dd9 181 }
vpcola 0:f1d3878b8dd9 182
vpcola 0:f1d3878b8dd9 183 /* Rebuild the new mask according to user request */
vpcola 0:f1d3878b8dd9 184 if(xNewState == S_DISABLE)
vpcola 0:f1d3878b8dd9 185 {
vpcola 0:f1d3878b8dd9 186 tempValue &= (~xIrq);
vpcola 0:f1d3878b8dd9 187 }
vpcola 0:f1d3878b8dd9 188 else
vpcola 0:f1d3878b8dd9 189 {
vpcola 0:f1d3878b8dd9 190 tempValue |= (xIrq);
vpcola 0:f1d3878b8dd9 191 }
vpcola 0:f1d3878b8dd9 192
vpcola 0:f1d3878b8dd9 193 /* Build the array of bytes to write in the IRQ_MASK registers */
vpcola 0:f1d3878b8dd9 194 for(uint8_t j=0; j<4; j++)
vpcola 0:f1d3878b8dd9 195 {
vpcola 0:f1d3878b8dd9 196 tempRegValue[j] = (uint8_t)(tempValue>>(8*(3-j)));
vpcola 0:f1d3878b8dd9 197 }
vpcola 0:f1d3878b8dd9 198
vpcola 0:f1d3878b8dd9 199 /* Writes the new IRQ mask in the corresponding registers */
vpcola 0:f1d3878b8dd9 200 g_xStatus = SpiritSpiWriteRegisters(IRQ_MASK3_BASE, 4, tempRegValue);
vpcola 0:f1d3878b8dd9 201
vpcola 0:f1d3878b8dd9 202 }
vpcola 0:f1d3878b8dd9 203
vpcola 0:f1d3878b8dd9 204
vpcola 0:f1d3878b8dd9 205 /**
vpcola 0:f1d3878b8dd9 206 * @brief Fills a pointer to a structure of SpiritIrqs type reading the IRQ_MASK registers.
vpcola 0:f1d3878b8dd9 207 * @param pxIrqMask pointer to a variable of type @ref SpiritIrqs, through which the
vpcola 0:f1d3878b8dd9 208 * user can read which IRQs are enabled. All the bitfields equals to zero correspond
vpcola 0:f1d3878b8dd9 209 * to enabled IRQs, while all the bitfields equals to one correspond to disabled IRQs.
vpcola 0:f1d3878b8dd9 210 * This parameter is a pointer to a SpiritIrqs.
vpcola 0:f1d3878b8dd9 211 * For example suppose that the Power On Reset and RX Data ready are the only enabled IRQs.
vpcola 0:f1d3878b8dd9 212 * @code
vpcola 0:f1d3878b8dd9 213 * SpiritIrqs myIrqMask;
vpcola 0:f1d3878b8dd9 214 * SpiritIrqGetStatus(&myIrqMask);
vpcola 0:f1d3878b8dd9 215 * @endcode
vpcola 0:f1d3878b8dd9 216 * Then
vpcola 0:f1d3878b8dd9 217 * myIrqMask.IRQ_POR and myIrqMask.IRQ_RX_DATA_READY are equal to 0
vpcola 0:f1d3878b8dd9 218 * while all the other bitfields are equal to one.
vpcola 0:f1d3878b8dd9 219 * @retval None.
vpcola 0:f1d3878b8dd9 220 */
vpcola 0:f1d3878b8dd9 221 void SpiritIrqGetMask(SpiritIrqs* pxIrqMask)
vpcola 0:f1d3878b8dd9 222 {
vpcola 0:f1d3878b8dd9 223 /* Reads IRQ_MASK registers */
vpcola 0:f1d3878b8dd9 224 g_xStatus = SpiritSpiReadRegisters(IRQ_MASK3_BASE, 4, (uint8_t*)pxIrqMask);
vpcola 0:f1d3878b8dd9 225 }
vpcola 0:f1d3878b8dd9 226
vpcola 0:f1d3878b8dd9 227
vpcola 0:f1d3878b8dd9 228 /**
vpcola 0:f1d3878b8dd9 229 * @brief Filla a pointer to a structure of SpiritIrqs type reading the IRQ_STATUS registers.
vpcola 0:f1d3878b8dd9 230 * @param pxIrqStatus pointer to a variable of type @ref SpiritIrqs, through which the
vpcola 0:f1d3878b8dd9 231 * user can read the status of all the IRQs. All the bitfields equals to one correspond
vpcola 0:f1d3878b8dd9 232 * to the raised interrupts. This parameter is a pointer to a SpiritIrqs.
vpcola 0:f1d3878b8dd9 233 * For example suppose that the XO settling timeout is raised as well as the Sync word
vpcola 0:f1d3878b8dd9 234 * detection.
vpcola 0:f1d3878b8dd9 235 * @code
vpcola 0:f1d3878b8dd9 236 * SpiritIrqs myIrqStatus;
vpcola 0:f1d3878b8dd9 237 * SpiritIrqGetStatus(&myIrqStatus);
vpcola 0:f1d3878b8dd9 238 * @endcode
vpcola 0:f1d3878b8dd9 239 * Then
vpcola 0:f1d3878b8dd9 240 * myIrqStatus.IRQ_XO_COUNT_EXPIRED and myIrqStatus.IRQ_VALID_SYNC are equals to 1
vpcola 0:f1d3878b8dd9 241 * while all the other bitfields are equals to zero.
vpcola 0:f1d3878b8dd9 242 * @retval None.
vpcola 0:f1d3878b8dd9 243 */
vpcola 0:f1d3878b8dd9 244 void SpiritIrqGetStatus(SpiritIrqs* pxIrqStatus)
vpcola 0:f1d3878b8dd9 245 {
vpcola 0:f1d3878b8dd9 246 /* Reads IRQ_STATUS registers */
vpcola 0:f1d3878b8dd9 247 g_xStatus = SpiritSpiReadRegisters(IRQ_STATUS3_BASE, 4, (uint8_t*)pxIrqStatus);
vpcola 0:f1d3878b8dd9 248 }
vpcola 0:f1d3878b8dd9 249
vpcola 0:f1d3878b8dd9 250
vpcola 0:f1d3878b8dd9 251 /**
vpcola 0:f1d3878b8dd9 252 * @brief Clear the IRQ status registers.
vpcola 0:f1d3878b8dd9 253 * @param None.
vpcola 0:f1d3878b8dd9 254 * @retval None.
vpcola 0:f1d3878b8dd9 255 */
vpcola 0:f1d3878b8dd9 256 void SpiritIrqClearStatus(void)
vpcola 0:f1d3878b8dd9 257 {
vpcola 0:f1d3878b8dd9 258 uint8_t tempRegValue[4];
vpcola 0:f1d3878b8dd9 259
vpcola 0:f1d3878b8dd9 260 /* Reads the IRQ_STATUS registers clearing all the flags */
vpcola 0:f1d3878b8dd9 261 g_xStatus = SpiritSpiReadRegisters(IRQ_STATUS3_BASE, 4, tempRegValue);
vpcola 0:f1d3878b8dd9 262
vpcola 0:f1d3878b8dd9 263 }
vpcola 0:f1d3878b8dd9 264
vpcola 0:f1d3878b8dd9 265
vpcola 0:f1d3878b8dd9 266 /**
vpcola 0:f1d3878b8dd9 267 * @brief Verifies if a specific IRQ has been generated.
vpcola 0:f1d3878b8dd9 268 * The call resets all the IRQ status, so it can't be used in case of multiple raising interrupts.
vpcola 0:f1d3878b8dd9 269 * @param xFlag IRQ flag to be checked.
vpcola 0:f1d3878b8dd9 270 * This parameter can be any value of @ref IrqList.
vpcola 0:f1d3878b8dd9 271 * @retval SpiritBool S_TRUE or S_FALSE.
vpcola 0:f1d3878b8dd9 272 */
vpcola 0:f1d3878b8dd9 273 SpiritBool SpiritIrqCheckFlag(IrqList xFlag)
vpcola 0:f1d3878b8dd9 274 {
vpcola 0:f1d3878b8dd9 275 uint8_t tempRegValue[4];
vpcola 0:f1d3878b8dd9 276 uint32_t tempValue = 0;
vpcola 0:f1d3878b8dd9 277 SpiritBool flag;
vpcola 0:f1d3878b8dd9 278
vpcola 0:f1d3878b8dd9 279 /* Check the parameters */
vpcola 0:f1d3878b8dd9 280 s_assert_param(IS_SPIRIT_IRQ_LIST(xFlag));
vpcola 0:f1d3878b8dd9 281
vpcola 0:f1d3878b8dd9 282 /* Reads registers and build the status word */
vpcola 0:f1d3878b8dd9 283 g_xStatus = SpiritSpiReadRegisters(IRQ_STATUS3_BASE, 4, tempRegValue);
vpcola 0:f1d3878b8dd9 284 for(uint8_t i=0; i<4; i++)
vpcola 0:f1d3878b8dd9 285 {
vpcola 0:f1d3878b8dd9 286 tempValue += ((uint32_t)tempRegValue[i])<<(8*(3-i));
vpcola 0:f1d3878b8dd9 287 }
vpcola 0:f1d3878b8dd9 288
vpcola 0:f1d3878b8dd9 289 if(tempValue & xFlag)
vpcola 0:f1d3878b8dd9 290 {
vpcola 0:f1d3878b8dd9 291 flag = S_TRUE;
vpcola 0:f1d3878b8dd9 292 }
vpcola 0:f1d3878b8dd9 293 else
vpcola 0:f1d3878b8dd9 294 {
vpcola 0:f1d3878b8dd9 295 flag = S_FALSE;
vpcola 0:f1d3878b8dd9 296 }
vpcola 0:f1d3878b8dd9 297
vpcola 0:f1d3878b8dd9 298 return flag;
vpcola 0:f1d3878b8dd9 299
vpcola 0:f1d3878b8dd9 300 }
vpcola 0:f1d3878b8dd9 301
vpcola 0:f1d3878b8dd9 302
vpcola 0:f1d3878b8dd9 303 /**
vpcola 0:f1d3878b8dd9 304 *@}
vpcola 0:f1d3878b8dd9 305 */
vpcola 0:f1d3878b8dd9 306
vpcola 0:f1d3878b8dd9 307
vpcola 0:f1d3878b8dd9 308 /**
vpcola 0:f1d3878b8dd9 309 *@}
vpcola 0:f1d3878b8dd9 310 */
vpcola 0:f1d3878b8dd9 311
vpcola 0:f1d3878b8dd9 312
vpcola 0:f1d3878b8dd9 313 /**
vpcola 0:f1d3878b8dd9 314 *@}
vpcola 0:f1d3878b8dd9 315 */
vpcola 0:f1d3878b8dd9 316
vpcola 0:f1d3878b8dd9 317
vpcola 0:f1d3878b8dd9 318
vpcola 0:f1d3878b8dd9 319
vpcola 0:f1d3878b8dd9 320 /******************* (C) COPYRIGHT 2015 STMicroelectronics *****END OF FILE****/