Vergil Cola / Mbed OS MQTTGatewayK64

Fork of my MQTTGateway

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easy-connect/stm-spirit1-rf-driver/source/libs/spirit1/SPIRIT1_Library/Inc/SPIRIT_Gpio.h@0:f1d3878b8dd9, 2017-04-08 (annotated)

Committer:
vpcola
Date:
Sat Apr 08 14:45:51 2017 +0000
Revision:
0:f1d3878b8dd9
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
vpcola 0:f1d3878b8dd9 1 /**
vpcola 0:f1d3878b8dd9 2 ******************************************************************************
vpcola 0:f1d3878b8dd9 3 * @file SPIRIT_Gpio.h
vpcola 0:f1d3878b8dd9 4 * @author VMA division - AMS
vpcola 0:f1d3878b8dd9 5 * @version 3.2.2
vpcola 0:f1d3878b8dd9 6 * @date 08-July-2015
vpcola 0:f1d3878b8dd9 7 * @brief This file provides all the low level API to manage SPIRIT GPIO.
vpcola 0:f1d3878b8dd9 8 *
vpcola 0:f1d3878b8dd9 9 * @details
vpcola 0:f1d3878b8dd9 10 *
vpcola 0:f1d3878b8dd9 11 * This module can be used to configure the Spirit GPIO pins to perform
vpcola 0:f1d3878b8dd9 12 * specific functions.
vpcola 0:f1d3878b8dd9 13 * The structure <i>@ref gpioIRQ</i> can be used to specify these features for
vpcola 0:f1d3878b8dd9 14 * one of the four Spirit Gpio pin.
vpcola 0:f1d3878b8dd9 15 * The following example shows how to configure a pin (GPIO 3) to be used as an IRQ source
vpcola 0:f1d3878b8dd9 16 * for a microcontroller using the <i>@ref SpiritGpioInit()</i> function.
vpcola 0:f1d3878b8dd9 17 *
vpcola 0:f1d3878b8dd9 18 * <b>Example:</b>
vpcola 0:f1d3878b8dd9 19 * @code
vpcola 0:f1d3878b8dd9 20 *
vpcola 0:f1d3878b8dd9 21 * SGpioInit gpioIRQ={
vpcola 0:f1d3878b8dd9 22 * SPIRIT_GPIO_3,
vpcola 0:f1d3878b8dd9 23 * SPIRIT_GPIO_MODE_DIGITAL_OUTPUT_LP,
vpcola 0:f1d3878b8dd9 24 * SPIRIT_GPIO_DIG_OUT_IRQ
vpcola 0:f1d3878b8dd9 25 * };
vpcola 0:f1d3878b8dd9 26 *
vpcola 0:f1d3878b8dd9 27 * ...
vpcola 0:f1d3878b8dd9 28 *
vpcola 0:f1d3878b8dd9 29 * SpiritGpioInit(&gpioIRQ);
vpcola 0:f1d3878b8dd9 30 *
vpcola 0:f1d3878b8dd9 31 * @endcode
vpcola 0:f1d3878b8dd9 32 *
vpcola 0:f1d3878b8dd9 33 * @note Please read the functions documentation for the other GPIO features.
vpcola 0:f1d3878b8dd9 34 *
vpcola 0:f1d3878b8dd9 35 *
vpcola 0:f1d3878b8dd9 36 * @attention
vpcola 0:f1d3878b8dd9 37 *
vpcola 0:f1d3878b8dd9 38 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
vpcola 0:f1d3878b8dd9 39 *
vpcola 0:f1d3878b8dd9 40 * Redistribution and use in source and binary forms, with or without modification,
vpcola 0:f1d3878b8dd9 41 * are permitted provided that the following conditions are met:
vpcola 0:f1d3878b8dd9 42 * 1. Redistributions of source code must retain the above copyright notice,
vpcola 0:f1d3878b8dd9 43 * this list of conditions and the following disclaimer.
vpcola 0:f1d3878b8dd9 44 * 2. Redistributions in binary form must reproduce the above copyright notice,
vpcola 0:f1d3878b8dd9 45 * this list of conditions and the following disclaimer in the documentation
vpcola 0:f1d3878b8dd9 46 * and/or other materials provided with the distribution.
vpcola 0:f1d3878b8dd9 47 * 3. Neither the name of STMicroelectronics nor the names of its contributors
vpcola 0:f1d3878b8dd9 48 * may be used to endorse or promote products derived from this software
vpcola 0:f1d3878b8dd9 49 * without specific prior written permission.
vpcola 0:f1d3878b8dd9 50 *
vpcola 0:f1d3878b8dd9 51 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
vpcola 0:f1d3878b8dd9 52 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
vpcola 0:f1d3878b8dd9 53 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
vpcola 0:f1d3878b8dd9 54 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
vpcola 0:f1d3878b8dd9 55 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
vpcola 0:f1d3878b8dd9 56 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
vpcola 0:f1d3878b8dd9 57 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
vpcola 0:f1d3878b8dd9 58 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
vpcola 0:f1d3878b8dd9 59 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
vpcola 0:f1d3878b8dd9 60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
vpcola 0:f1d3878b8dd9 61 *
vpcola 0:f1d3878b8dd9 62 ******************************************************************************
vpcola 0:f1d3878b8dd9 63 */
vpcola 0:f1d3878b8dd9 64
vpcola 0:f1d3878b8dd9 65 /* Define to prevent recursive inclusion -------------------------------------*/
vpcola 0:f1d3878b8dd9 66 #ifndef __SPIRIT_GPIO_H
vpcola 0:f1d3878b8dd9 67 #define __SPIRIT_GPIO_H
vpcola 0:f1d3878b8dd9 68
vpcola 0:f1d3878b8dd9 69
vpcola 0:f1d3878b8dd9 70 /* Includes ------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 71
vpcola 0:f1d3878b8dd9 72 #include "SPIRIT_Regs.h"
vpcola 0:f1d3878b8dd9 73 #include "SPIRIT_Types.h"
vpcola 0:f1d3878b8dd9 74
vpcola 0:f1d3878b8dd9 75
vpcola 0:f1d3878b8dd9 76 #ifdef __cplusplus
vpcola 0:f1d3878b8dd9 77 extern "C" {
vpcola 0:f1d3878b8dd9 78 #endif
vpcola 0:f1d3878b8dd9 79
vpcola 0:f1d3878b8dd9 80
vpcola 0:f1d3878b8dd9 81 /** @addtogroup SPIRIT_Libraries
vpcola 0:f1d3878b8dd9 82 * @{
vpcola 0:f1d3878b8dd9 83 */
vpcola 0:f1d3878b8dd9 84
vpcola 0:f1d3878b8dd9 85
vpcola 0:f1d3878b8dd9 86 /** @defgroup SPIRIT_Gpio GPIO
vpcola 0:f1d3878b8dd9 87 * @brief Configuration and management of SPIRIT GPIO.
vpcola 0:f1d3878b8dd9 88 * @details See the file <i>@ref SPIRIT_Gpio.h</i> for more details.
vpcola 0:f1d3878b8dd9 89 * @{
vpcola 0:f1d3878b8dd9 90 */
vpcola 0:f1d3878b8dd9 91
vpcola 0:f1d3878b8dd9 92
vpcola 0:f1d3878b8dd9 93
vpcola 0:f1d3878b8dd9 94 /** @defgroup Gpio_Exported_Types GPIO Exported Types
vpcola 0:f1d3878b8dd9 95 * @{
vpcola 0:f1d3878b8dd9 96 */
vpcola 0:f1d3878b8dd9 97
vpcola 0:f1d3878b8dd9 98 /**
vpcola 0:f1d3878b8dd9 99 * @brief SPIRIT GPIO pin enumeration.
vpcola 0:f1d3878b8dd9 100 */
vpcola 0:f1d3878b8dd9 101 typedef enum
vpcola 0:f1d3878b8dd9 102 {
vpcola 0:f1d3878b8dd9 103 SPIRIT_GPIO_0 = GPIO0_CONF_BASE, /*!< GPIO_0 selected */
vpcola 0:f1d3878b8dd9 104 SPIRIT_GPIO_1 = GPIO1_CONF_BASE, /*!< GPIO_1 selected */
vpcola 0:f1d3878b8dd9 105 SPIRIT_GPIO_2 = GPIO2_CONF_BASE, /*!< GPIO_2 selected */
vpcola 0:f1d3878b8dd9 106 SPIRIT_GPIO_3 = GPIO3_CONF_BASE /*!< GPIO_3 selected */
vpcola 0:f1d3878b8dd9 107 }SpiritGpioPin;
vpcola 0:f1d3878b8dd9 108
vpcola 0:f1d3878b8dd9 109
vpcola 0:f1d3878b8dd9 110 #define IS_SPIRIT_GPIO(PIN) ((PIN == SPIRIT_GPIO_0) || \
vpcola 0:f1d3878b8dd9 111 (PIN == SPIRIT_GPIO_1) || \
vpcola 0:f1d3878b8dd9 112 (PIN == SPIRIT_GPIO_2) || \
vpcola 0:f1d3878b8dd9 113 (PIN == SPIRIT_GPIO_3))
vpcola 0:f1d3878b8dd9 114
vpcola 0:f1d3878b8dd9 115
vpcola 0:f1d3878b8dd9 116 /**
vpcola 0:f1d3878b8dd9 117 * @brief SPIRIT GPIO mode enumeration.
vpcola 0:f1d3878b8dd9 118 */
vpcola 0:f1d3878b8dd9 119 typedef enum
vpcola 0:f1d3878b8dd9 120 {
vpcola 0:f1d3878b8dd9 121 SPIRIT_GPIO_MODE_DIGITAL_INPUT = 0x01, /*!< Digital Input on GPIO */
vpcola 0:f1d3878b8dd9 122 SPIRIT_GPIO_MODE_DIGITAL_OUTPUT_LP = 0x02, /*!< Digital Output on GPIO (low current) */
vpcola 0:f1d3878b8dd9 123 SPIRIT_GPIO_MODE_DIGITAL_OUTPUT_HP = 0x03 /*!< Digital Output on GPIO (high current) */
vpcola 0:f1d3878b8dd9 124 }SpiritGpioMode;
vpcola 0:f1d3878b8dd9 125
vpcola 0:f1d3878b8dd9 126 #define IS_SPIRIT_GPIO_MODE(MODE) ((MODE == SPIRIT_GPIO_MODE_DIGITAL_INPUT) || \
vpcola 0:f1d3878b8dd9 127 (MODE == SPIRIT_GPIO_MODE_DIGITAL_OUTPUT_LP) || \
vpcola 0:f1d3878b8dd9 128 (MODE == SPIRIT_GPIO_MODE_DIGITAL_OUTPUT_HP))
vpcola 0:f1d3878b8dd9 129
vpcola 0:f1d3878b8dd9 130
vpcola 0:f1d3878b8dd9 131
vpcola 0:f1d3878b8dd9 132 /**
vpcola 0:f1d3878b8dd9 133 * @brief SPIRIT I/O selection enumeration.
vpcola 0:f1d3878b8dd9 134 */
vpcola 0:f1d3878b8dd9 135 typedef enum
vpcola 0:f1d3878b8dd9 136 {
vpcola 0:f1d3878b8dd9 137 SPIRIT_GPIO_DIG_OUT_IRQ = 0x00, /*!< nIRQ (Interrupt Request, active low) , default configuration after POR */
vpcola 0:f1d3878b8dd9 138 SPIRIT_GPIO_DIG_OUT_POR_INV = 0x08, /*!< POR inverted (active low) */
vpcola 0:f1d3878b8dd9 139 SPIRIT_GPIO_DIG_OUT_WUT_EXP = 0x10, /*!< Wake-Up Timer expiration: "1" when WUT has expired */
vpcola 0:f1d3878b8dd9 140 SPIRIT_GPIO_DIG_OUT_LBD = 0x18, /*!< Low battery detection: "1" when battery is below threshold setting */
vpcola 0:f1d3878b8dd9 141 SPIRIT_GPIO_DIG_OUT_TX_DATA = 0x20, /*!< TX data internal clock output (TX data are sampled on the rising edge of it) */
vpcola 0:f1d3878b8dd9 142 SPIRIT_GPIO_DIG_OUT_TX_STATE = 0x28, /*!< TX state indication: "1" when Spirit1 is passing in the TX state */
vpcola 0:f1d3878b8dd9 143 SPIRIT_GPIO_DIG_OUT_TX_FIFO_ALMOST_EMPTY = 0x30, /*!< TX FIFO Almost Empty Flag */
vpcola 0:f1d3878b8dd9 144 SPIRIT_GPIO_DIG_OUT_TX_FIFO_ALMOST_FULL = 0x38, /*!< TX FIFO Almost Full Flag */
vpcola 0:f1d3878b8dd9 145 SPIRIT_GPIO_DIG_OUT_RX_DATA = 0x40, /*!< RX data output */
vpcola 0:f1d3878b8dd9 146 SPIRIT_GPIO_DIG_OUT_RX_CLOCK = 0x48, /*!< RX clock output (recovered from received data) */
vpcola 0:f1d3878b8dd9 147 SPIRIT_GPIO_DIG_OUT_RX_STATE = 0x50, /*!< RX state indication: "1" when Spirit1 is passing in the RX state */
vpcola 0:f1d3878b8dd9 148 SPIRIT_GPIO_DIG_OUT_RX_FIFO_ALMOST_FULL = 0x58, /*!< RX FIFO Almost Full Flag */
vpcola 0:f1d3878b8dd9 149 SPIRIT_GPIO_DIG_OUT_RX_FIFO_ALMOST_EMPTY = 0x60, /*!< RX FIFO Almost Empty Flag */
vpcola 0:f1d3878b8dd9 150 SPIRIT_GPIO_DIG_OUT_ANTENNA_SWITCH = 0x68, /*!< Antenna switch used for antenna diversity */
vpcola 0:f1d3878b8dd9 151 SPIRIT_GPIO_DIG_OUT_VALID_PREAMBLE = 0x70, /*!< Valid Preamble Detected Flag */
vpcola 0:f1d3878b8dd9 152 SPIRIT_GPIO_DIG_OUT_SYNC_DETECTED = 0x78, /*!< Sync WordSync Word Detected Flag */
vpcola 0:f1d3878b8dd9 153 SPIRIT_GPIO_DIG_OUT_RSSI_THRESHOLD = 0x80, /*!< RSSI above threshold */
vpcola 0:f1d3878b8dd9 154 SPIRIT_GPIO_DIG_OUT_MCU_CLOCK = 0x88, /*!< MCU Clock */
vpcola 0:f1d3878b8dd9 155 SPIRIT_GPIO_DIG_OUT_TX_RX_MODE = 0x90, /*!< TX or RX mode indicator (to enable an external range extender) */
vpcola 0:f1d3878b8dd9 156 SPIRIT_GPIO_DIG_OUT_VDD = 0x98, /*!< VDD (to emulate an additional GPIO of the MCU, programmable by SPI) */
vpcola 0:f1d3878b8dd9 157 SPIRIT_GPIO_DIG_OUT_GND = 0xA0, /*!< GND (to emulate an additional GPIO of the MCU, programmable by SPI) */
vpcola 0:f1d3878b8dd9 158 SPIRIT_GPIO_DIG_OUT_SMPS_EXT = 0xA8, /*!< External SMPS enable signal (active high) */
vpcola 0:f1d3878b8dd9 159 SPIRIT_GPIO_DIG_OUT_SLEEP_OR_STANDBY = 0xB0,
vpcola 0:f1d3878b8dd9 160 SPIRIT_GPIO_DIG_OUT_READY = 0xB8,
vpcola 0:f1d3878b8dd9 161 SPIRIT_GPIO_DIG_OUT_LOCK = 0xC0,
vpcola 0:f1d3878b8dd9 162 SPIRIT_GPIO_DIG_OUT_WAIT_FOR_LOCK_SIG = 0xC8,
vpcola 0:f1d3878b8dd9 163 SPIRIT_GPIO_DIG_OUT_WAIT_FOR_TIMER_FOR_LOCK = 0xD0,
vpcola 0:f1d3878b8dd9 164 SPIRIT_GPIO_DIG_OUT_WAIT_FOR_READY2_SIG = 0xD8,
vpcola 0:f1d3878b8dd9 165 SPIRIT_GPIO_DIG_OUT_WAIT_FOR_TIMER_FOR_PM_SET = 0xE0,
vpcola 0:f1d3878b8dd9 166 SPIRIT_GPIO_DIG_OUT_WAIT_VCO_CALIBRATION = 0xE8,
vpcola 0:f1d3878b8dd9 167 SPIRIT_GPIO_DIG_OUT_ENABLE_SYNTH_FULL_CIRCUIT = 0xF0,
vpcola 0:f1d3878b8dd9 168 SPIRIT_GPIO_DIG_OUT_WAIT_FOR_RCCAL_OK_SIG = 0xFF,
vpcola 0:f1d3878b8dd9 169
vpcola 0:f1d3878b8dd9 170 SPIRIT_GPIO_DIG_IN_TX_COMMAND = 0x00,
vpcola 0:f1d3878b8dd9 171 SPIRIT_GPIO_DIG_IN_RX_COMMAND = 0x08,
vpcola 0:f1d3878b8dd9 172 SPIRIT_GPIO_DIG_IN_TX_DATA_INPUT_FOR_DIRECTRF = 0x10,
vpcola 0:f1d3878b8dd9 173 SPIRIT_GPIO_DIG_IN_DATA_WAKEUP = 0x18,
vpcola 0:f1d3878b8dd9 174 SPIRIT_GPIO_DIG_IN_EXT_CLOCK_AT_34_7KHZ = 0x20
vpcola 0:f1d3878b8dd9 175
vpcola 0:f1d3878b8dd9 176 }SpiritGpioIO;
vpcola 0:f1d3878b8dd9 177
vpcola 0:f1d3878b8dd9 178 #define IS_SPIRIT_GPIO_IO(IO_SEL) ((IO_SEL == SPIRIT_GPIO_DIG_OUT_IRQ) || \
vpcola 0:f1d3878b8dd9 179 (IO_SEL == SPIRIT_GPIO_DIG_OUT_POR_INV) || \
vpcola 0:f1d3878b8dd9 180 (IO_SEL == SPIRIT_GPIO_DIG_OUT_WUT_EXP) || \
vpcola 0:f1d3878b8dd9 181 (IO_SEL == SPIRIT_GPIO_DIG_OUT_LBD) || \
vpcola 0:f1d3878b8dd9 182 (IO_SEL == SPIRIT_GPIO_DIG_OUT_TX_DATA) || \
vpcola 0:f1d3878b8dd9 183 (IO_SEL == SPIRIT_GPIO_DIG_OUT_TX_STATE) || \
vpcola 0:f1d3878b8dd9 184 (IO_SEL == SPIRIT_GPIO_DIG_OUT_TX_FIFO_ALMOST_EMPTY) || \
vpcola 0:f1d3878b8dd9 185 (IO_SEL == SPIRIT_GPIO_DIG_OUT_TX_FIFO_ALMOST_FULL) || \
vpcola 0:f1d3878b8dd9 186 (IO_SEL == SPIRIT_GPIO_DIG_OUT_RX_DATA) || \
vpcola 0:f1d3878b8dd9 187 (IO_SEL == SPIRIT_GPIO_DIG_OUT_RX_CLOCK) || \
vpcola 0:f1d3878b8dd9 188 (IO_SEL == SPIRIT_GPIO_DIG_OUT_RX_STATE) || \
vpcola 0:f1d3878b8dd9 189 (IO_SEL == SPIRIT_GPIO_DIG_OUT_RX_FIFO_ALMOST_FULL) || \
vpcola 0:f1d3878b8dd9 190 (IO_SEL == SPIRIT_GPIO_DIG_OUT_RX_FIFO_ALMOST_EMPTY) || \
vpcola 0:f1d3878b8dd9 191 (IO_SEL == SPIRIT_GPIO_DIG_OUT_ANTENNA_SWITCH) || \
vpcola 0:f1d3878b8dd9 192 (IO_SEL == SPIRIT_GPIO_DIG_OUT_VALID_PREAMBLE) || \
vpcola 0:f1d3878b8dd9 193 (IO_SEL == SPIRIT_GPIO_DIG_OUT_SYNC_DETECTED) || \
vpcola 0:f1d3878b8dd9 194 (IO_SEL == SPIRIT_GPIO_DIG_OUT_RSSI_THRESHOLD) || \
vpcola 0:f1d3878b8dd9 195 (IO_SEL == SPIRIT_GPIO_DIG_OUT_MCU_CLOCK) || \
vpcola 0:f1d3878b8dd9 196 (IO_SEL == SPIRIT_GPIO_DIG_OUT_TX_RX_MODE) || \
vpcola 0:f1d3878b8dd9 197 (IO_SEL == SPIRIT_GPIO_DIG_OUT_VDD) || \
vpcola 0:f1d3878b8dd9 198 (IO_SEL == SPIRIT_GPIO_DIG_OUT_GND) || \
vpcola 0:f1d3878b8dd9 199 (IO_SEL == SPIRIT_GPIO_DIG_OUT_SMPS_EXT) ||\
vpcola 0:f1d3878b8dd9 200 (IO_SEL == SPIRIT_GPIO_DIG_OUT_SLEEP_OR_STANDBY) ||\
vpcola 0:f1d3878b8dd9 201 (IO_SEL == SPIRIT_GPIO_DIG_OUT_READY) ||\
vpcola 0:f1d3878b8dd9 202 (IO_SEL == SPIRIT_GPIO_DIG_OUT_LOCK) ||\
vpcola 0:f1d3878b8dd9 203 (IO_SEL == SPIRIT_GPIO_DIG_OUT_WAIT_FOR_LOCK_SIG) ||\
vpcola 0:f1d3878b8dd9 204 (IO_SEL == SPIRIT_GPIO_DIG_OUT_WAIT_FOR_TIMER_FOR_LOCK) ||\
vpcola 0:f1d3878b8dd9 205 (IO_SEL == SPIRIT_GPIO_DIG_OUT_WAIT_FOR_READY2_SIG) ||\
vpcola 0:f1d3878b8dd9 206 (IO_SEL == SPIRIT_GPIO_DIG_OUT_WAIT_FOR_TIMER_FOR_PM_SET) ||\
vpcola 0:f1d3878b8dd9 207 (IO_SEL == SPIRIT_GPIO_DIG_OUT_WAIT_VCO_CALIBRATION) ||\
vpcola 0:f1d3878b8dd9 208 (IO_SEL == SPIRIT_GPIO_DIG_OUT_ENABLE_SYNTH_FULL_CIRCUIT) ||\
vpcola 0:f1d3878b8dd9 209 (IO_SEL == SPIRIT_GPIO_DIG_OUT_WAIT_FOR_RCCAL_OK_SIG) ||\
vpcola 0:f1d3878b8dd9 210 (IO_SEL == SPIRIT_GPIO_DIG_IN_TX_COMMAND) ||\
vpcola 0:f1d3878b8dd9 211 (IO_SEL == SPIRIT_GPIO_DIG_IN_RX_COMMAND) ||\
vpcola 0:f1d3878b8dd9 212 (IO_SEL == SPIRIT_GPIO_DIG_IN_TX_DATA_INPUT_FOR_DIRECTRF) ||\
vpcola 0:f1d3878b8dd9 213 (IO_SEL == SPIRIT_GPIO_DIG_IN_DATA_WAKEUP) ||\
vpcola 0:f1d3878b8dd9 214 (IO_SEL == SPIRIT_GPIO_DIG_IN_EXT_CLOCK_AT_34_7KHZ))
vpcola 0:f1d3878b8dd9 215
vpcola 0:f1d3878b8dd9 216 /**
vpcola 0:f1d3878b8dd9 217 * @brief SPIRIT OutputLevel enumeration.
vpcola 0:f1d3878b8dd9 218 */
vpcola 0:f1d3878b8dd9 219
vpcola 0:f1d3878b8dd9 220 typedef enum
vpcola 0:f1d3878b8dd9 221 {
vpcola 0:f1d3878b8dd9 222 LOW = 0,
vpcola 0:f1d3878b8dd9 223 HIGH = !LOW
vpcola 0:f1d3878b8dd9 224 }OutputLevel;
vpcola 0:f1d3878b8dd9 225
vpcola 0:f1d3878b8dd9 226 #define IS_SPIRIT_GPIO_LEVEL(LEVEL) ((LEVEL == LOW) || \
vpcola 0:f1d3878b8dd9 227 (LEVEL == HIGH))
vpcola 0:f1d3878b8dd9 228
vpcola 0:f1d3878b8dd9 229
vpcola 0:f1d3878b8dd9 230 /**
vpcola 0:f1d3878b8dd9 231 * @brief SPIRIT GPIO Init structure definition.
vpcola 0:f1d3878b8dd9 232 */
vpcola 0:f1d3878b8dd9 233 typedef struct
vpcola 0:f1d3878b8dd9 234 {
vpcola 0:f1d3878b8dd9 235 SpiritGpioPin xSpiritGpioPin; /*!< Specifies the GPIO pins to be configured.
vpcola 0:f1d3878b8dd9 236 This parameter can be any value of @ref SpiritGpioPin */
vpcola 0:f1d3878b8dd9 237
vpcola 0:f1d3878b8dd9 238 SpiritGpioMode xSpiritGpioMode; /*!< Specifies the operating mode for the selected pins.
vpcola 0:f1d3878b8dd9 239 This parameter can be a value of @ref SpiritGpioMode */
vpcola 0:f1d3878b8dd9 240
vpcola 0:f1d3878b8dd9 241 SpiritGpioIO xSpiritGpioIO; /*!< Specifies the I/O selection for the selected pins.
vpcola 0:f1d3878b8dd9 242 This parameter can be a value of @ref SpiritGpioIO */
vpcola 0:f1d3878b8dd9 243
vpcola 0:f1d3878b8dd9 244 }SGpioInit;
vpcola 0:f1d3878b8dd9 245
vpcola 0:f1d3878b8dd9 246
vpcola 0:f1d3878b8dd9 247
vpcola 0:f1d3878b8dd9 248 /**
vpcola 0:f1d3878b8dd9 249 * @brief SPIRIT clock output XO prescaler enumeration.
vpcola 0:f1d3878b8dd9 250 */
vpcola 0:f1d3878b8dd9 251
vpcola 0:f1d3878b8dd9 252 typedef enum
vpcola 0:f1d3878b8dd9 253 {
vpcola 0:f1d3878b8dd9 254 XO_RATIO_1 = 0x00, /*!< XO Clock signal available on the GPIO divided by 1 */
vpcola 0:f1d3878b8dd9 255 XO_RATIO_2_3 = 0x02, /*!< XO Clock signal available on the GPIO divided by 2/3 */
vpcola 0:f1d3878b8dd9 256 XO_RATIO_1_2 = 0x04, /*!< XO Clock signal available on the GPIO divided by 1/2 */
vpcola 0:f1d3878b8dd9 257 XO_RATIO_1_3 = 0x06, /*!< XO Clock signal available on the GPIO divided by 1/3 */
vpcola 0:f1d3878b8dd9 258 XO_RATIO_1_4 = 0x08, /*!< XO Clock signal available on the GPIO divided by 1/4 */
vpcola 0:f1d3878b8dd9 259 XO_RATIO_1_6 = 0x0A, /*!< XO Clock signal available on the GPIO divided by 1/6 */
vpcola 0:f1d3878b8dd9 260 XO_RATIO_1_8 = 0x0C, /*!< XO Clock signal available on the GPIO divided by 1/8 */
vpcola 0:f1d3878b8dd9 261 XO_RATIO_1_12 = 0x0E, /*!< XO Clock signal available on the GPIO divided by 1/12 */
vpcola 0:f1d3878b8dd9 262 XO_RATIO_1_16 = 0x10, /*!< XO Clock signal available on the GPIO divided by 1/16 */
vpcola 0:f1d3878b8dd9 263 XO_RATIO_1_24 = 0x12, /*!< XO Clock signal available on the GPIO divided by 1/24 */
vpcola 0:f1d3878b8dd9 264 XO_RATIO_1_36 = 0x14, /*!< XO Clock signal available on the GPIO divided by 1/36 */
vpcola 0:f1d3878b8dd9 265 XO_RATIO_1_48 = 0x16, /*!< XO Clock signal available on the GPIO divided by 1/48 */
vpcola 0:f1d3878b8dd9 266 XO_RATIO_1_64 = 0x18, /*!< XO Clock signal available on the GPIO divided by 1/64 */
vpcola 0:f1d3878b8dd9 267 XO_RATIO_1_96 = 0x1A, /*!< XO Clock signal available on the GPIO divided by 1/96 */
vpcola 0:f1d3878b8dd9 268 XO_RATIO_1_128 = 0x1C, /*!< XO Clock signal available on the GPIO divided by 1/128 */
vpcola 0:f1d3878b8dd9 269 XO_RATIO_1_192 = 0x1E /*!< XO Clock signal available on the GPIO divided by 1/196 */
vpcola 0:f1d3878b8dd9 270 }ClockOutputXOPrescaler;
vpcola 0:f1d3878b8dd9 271
vpcola 0:f1d3878b8dd9 272 #define IS_SPIRIT_CLOCK_OUTPUT_XO(RATIO) ((RATIO == XO_RATIO_1) || \
vpcola 0:f1d3878b8dd9 273 (RATIO == XO_RATIO_2_3) || \
vpcola 0:f1d3878b8dd9 274 (RATIO == XO_RATIO_1_2) || \
vpcola 0:f1d3878b8dd9 275 (RATIO == XO_RATIO_1_3) || \
vpcola 0:f1d3878b8dd9 276 (RATIO == XO_RATIO_1_4) || \
vpcola 0:f1d3878b8dd9 277 (RATIO == XO_RATIO_1_6) || \
vpcola 0:f1d3878b8dd9 278 (RATIO == XO_RATIO_1_8) || \
vpcola 0:f1d3878b8dd9 279 (RATIO == XO_RATIO_1_12) || \
vpcola 0:f1d3878b8dd9 280 (RATIO == XO_RATIO_1_16) || \
vpcola 0:f1d3878b8dd9 281 (RATIO == XO_RATIO_1_24) || \
vpcola 0:f1d3878b8dd9 282 (RATIO == XO_RATIO_1_36) || \
vpcola 0:f1d3878b8dd9 283 (RATIO == XO_RATIO_1_48) || \
vpcola 0:f1d3878b8dd9 284 (RATIO == XO_RATIO_1_64) || \
vpcola 0:f1d3878b8dd9 285 (RATIO == XO_RATIO_1_96) || \
vpcola 0:f1d3878b8dd9 286 (RATIO == XO_RATIO_1_128) || \
vpcola 0:f1d3878b8dd9 287 (RATIO == XO_RATIO_1_192))
vpcola 0:f1d3878b8dd9 288
vpcola 0:f1d3878b8dd9 289 /**
vpcola 0:f1d3878b8dd9 290 * @brief SPIRIT Clock Output RCO prescaler enumeration.
vpcola 0:f1d3878b8dd9 291 */
vpcola 0:f1d3878b8dd9 292
vpcola 0:f1d3878b8dd9 293 typedef enum
vpcola 0:f1d3878b8dd9 294 {
vpcola 0:f1d3878b8dd9 295 RCO_RATIO_1 = 0x00, /*!< RCO Clock signal available on the GPIO divided by 1 */
vpcola 0:f1d3878b8dd9 296 RCO_RATIO_1_128 = 0x01 /*!< RCO Clock signal available on the GPIO divided by 1/128 */
vpcola 0:f1d3878b8dd9 297 }ClockOutputRCOPrescaler;
vpcola 0:f1d3878b8dd9 298
vpcola 0:f1d3878b8dd9 299 #define IS_SPIRIT_CLOCK_OUTPUT_RCO(RATIO) ((RATIO == RCO_RATIO_1) || \
vpcola 0:f1d3878b8dd9 300 (RATIO == RCO_RATIO_1_128))
vpcola 0:f1d3878b8dd9 301
vpcola 0:f1d3878b8dd9 302 /**
vpcola 0:f1d3878b8dd9 303 * @brief SPIRIT ExtraClockCycles enumeration.
vpcola 0:f1d3878b8dd9 304 */
vpcola 0:f1d3878b8dd9 305
vpcola 0:f1d3878b8dd9 306 typedef enum
vpcola 0:f1d3878b8dd9 307 {
vpcola 0:f1d3878b8dd9 308 EXTRA_CLOCK_CYCLES_0 = 0x00, /*!< 0 extra clock cycles provided to the MCU before switching to STANDBY state */
vpcola 0:f1d3878b8dd9 309 EXTRA_CLOCK_CYCLES_64 = 0x20, /*!< 64 extra clock cycles provided to the MCU before switching to STANDBY state */
vpcola 0:f1d3878b8dd9 310 EXTRA_CLOCK_CYCLES_256 = 0x40, /*!< 256 extra clock cycles provided to the MCU before switching to STANDBY state */
vpcola 0:f1d3878b8dd9 311 EXTRA_CLOCK_CYCLES_512 = 0x60 /*!< 512 extra clock cycles provided to the MCU before switching to STANDBY state */
vpcola 0:f1d3878b8dd9 312 }ExtraClockCycles;
vpcola 0:f1d3878b8dd9 313
vpcola 0:f1d3878b8dd9 314 #define IS_SPIRIT_CLOCK_OUTPUT_EXTRA_CYCLES(CYCLES) ((CYCLES == EXTRA_CLOCK_CYCLES_0) || \
vpcola 0:f1d3878b8dd9 315 (CYCLES == EXTRA_CLOCK_CYCLES_64) || \
vpcola 0:f1d3878b8dd9 316 (CYCLES == EXTRA_CLOCK_CYCLES_256) || \
vpcola 0:f1d3878b8dd9 317 (CYCLES == EXTRA_CLOCK_CYCLES_512))
vpcola 0:f1d3878b8dd9 318
vpcola 0:f1d3878b8dd9 319
vpcola 0:f1d3878b8dd9 320 /**
vpcola 0:f1d3878b8dd9 321 * @brief SPIRIT Clock Output initialization structure definition.
vpcola 0:f1d3878b8dd9 322 */
vpcola 0:f1d3878b8dd9 323 typedef struct
vpcola 0:f1d3878b8dd9 324 {
vpcola 0:f1d3878b8dd9 325 ClockOutputXOPrescaler xClockOutputXOPrescaler; /*!< Specifies the XO Ratio as clock output.
vpcola 0:f1d3878b8dd9 326 This parameter can be any value of @ref ClockOutputXOPrescaler */
vpcola 0:f1d3878b8dd9 327
vpcola 0:f1d3878b8dd9 328 ClockOutputRCOPrescaler xClockOutputRCOPrescaler; /*!< Specifies the RCO Ratio as clock output.
vpcola 0:f1d3878b8dd9 329 This parameter can be a value of @ref ClockOutputRCOPrescaler */
vpcola 0:f1d3878b8dd9 330
vpcola 0:f1d3878b8dd9 331 ExtraClockCycles xExtraClockCycles; /*!< Specifies the Extra Clock Cycles provided before entering in Standby State.
vpcola 0:f1d3878b8dd9 332 This parameter can be a value of @ref ExtraClockCycles */
vpcola 0:f1d3878b8dd9 333
vpcola 0:f1d3878b8dd9 334 }ClockOutputInit;
vpcola 0:f1d3878b8dd9 335
vpcola 0:f1d3878b8dd9 336
vpcola 0:f1d3878b8dd9 337
vpcola 0:f1d3878b8dd9 338 /**
vpcola 0:f1d3878b8dd9 339 * @}
vpcola 0:f1d3878b8dd9 340 */
vpcola 0:f1d3878b8dd9 341
vpcola 0:f1d3878b8dd9 342
vpcola 0:f1d3878b8dd9 343
vpcola 0:f1d3878b8dd9 344 /** @defgroup Gpio_Exported_Constants GPIO Exported Constants
vpcola 0:f1d3878b8dd9 345 * @{
vpcola 0:f1d3878b8dd9 346 */
vpcola 0:f1d3878b8dd9 347
vpcola 0:f1d3878b8dd9 348
vpcola 0:f1d3878b8dd9 349 /**
vpcola 0:f1d3878b8dd9 350 * @}
vpcola 0:f1d3878b8dd9 351 */
vpcola 0:f1d3878b8dd9 352
vpcola 0:f1d3878b8dd9 353
vpcola 0:f1d3878b8dd9 354
vpcola 0:f1d3878b8dd9 355 /** @defgroup Gpio_Exported_Macros GPIO Exported Macros
vpcola 0:f1d3878b8dd9 356 * @{
vpcola 0:f1d3878b8dd9 357 */
vpcola 0:f1d3878b8dd9 358
vpcola 0:f1d3878b8dd9 359
vpcola 0:f1d3878b8dd9 360 /**
vpcola 0:f1d3878b8dd9 361 * @}
vpcola 0:f1d3878b8dd9 362 */
vpcola 0:f1d3878b8dd9 363
vpcola 0:f1d3878b8dd9 364
vpcola 0:f1d3878b8dd9 365
vpcola 0:f1d3878b8dd9 366 /** @defgroup Gpio_Exported_Functions GPIO Exported Functions
vpcola 0:f1d3878b8dd9 367 * @{
vpcola 0:f1d3878b8dd9 368 */
vpcola 0:f1d3878b8dd9 369
vpcola 0:f1d3878b8dd9 370 void SpiritGpioInit(SGpioInit* pxGpioInitStruct);
vpcola 0:f1d3878b8dd9 371 void SpiritGpioTemperatureSensor(SpiritFunctionalState xNewState);
vpcola 0:f1d3878b8dd9 372 void SpiritGpioSetLevel(SpiritGpioPin xGpioX, OutputLevel xLevel);
vpcola 0:f1d3878b8dd9 373 OutputLevel SpiritGpioGetLevel(SpiritGpioPin xGpioX);
vpcola 0:f1d3878b8dd9 374 void SpiritGpioClockOutput(SpiritFunctionalState xNewState);
vpcola 0:f1d3878b8dd9 375 void SpiritGpioClockOutputInit(ClockOutputInit* pxClockOutputInitStruct);
vpcola 0:f1d3878b8dd9 376 void SpiritGpioSetXOPrescaler(ClockOutputXOPrescaler xXOPrescaler);
vpcola 0:f1d3878b8dd9 377 ClockOutputXOPrescaler SpiritGpioGetXOPrescaler(void);
vpcola 0:f1d3878b8dd9 378 void SpiritGpioSetRCOPrescaler(ClockOutputRCOPrescaler xRCOPrescaler);
vpcola 0:f1d3878b8dd9 379 ClockOutputRCOPrescaler SpiritGpioGetRCOPrescaler(void);
vpcola 0:f1d3878b8dd9 380 void SpiritGpioSetExtraClockCycles(ExtraClockCycles xExtraCycles);
vpcola 0:f1d3878b8dd9 381 ExtraClockCycles SpiritGpioGetExtraClockCycles(void);
vpcola 0:f1d3878b8dd9 382
vpcola 0:f1d3878b8dd9 383
vpcola 0:f1d3878b8dd9 384 /**
vpcola 0:f1d3878b8dd9 385 * @}
vpcola 0:f1d3878b8dd9 386 */
vpcola 0:f1d3878b8dd9 387
vpcola 0:f1d3878b8dd9 388 /**
vpcola 0:f1d3878b8dd9 389 * @}
vpcola 0:f1d3878b8dd9 390 */
vpcola 0:f1d3878b8dd9 391
vpcola 0:f1d3878b8dd9 392
vpcola 0:f1d3878b8dd9 393 /**
vpcola 0:f1d3878b8dd9 394 * @}
vpcola 0:f1d3878b8dd9 395 */
vpcola 0:f1d3878b8dd9 396
vpcola 0:f1d3878b8dd9 397
vpcola 0:f1d3878b8dd9 398
vpcola 0:f1d3878b8dd9 399 #ifdef __cplusplus
vpcola 0:f1d3878b8dd9 400 }
vpcola 0:f1d3878b8dd9 401 #endif
vpcola 0:f1d3878b8dd9 402
vpcola 0:f1d3878b8dd9 403 #endif
vpcola 0:f1d3878b8dd9 404
vpcola 0:f1d3878b8dd9 405 /******************* (C) COPYRIGHT 2015 STMicroelectronics *****END OF FILE****/