Vergil Cola / Mbed OS MQTTGateway2

Fork of my original MQTTGateway

Dependencies:   mbed-http

easy-connect/stm-spirit1-rf-driver/source/libs/spirit1/SPIRIT1_Library/Src/SPIRIT_LinearFifo.c@0:a1734fe1ec4b, 2017-04-08 (annotated)

Committer:
vpcola
Date:
Sat Apr 08 14:43:14 2017 +0000
Revision:
0:a1734fe1ec4b
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
vpcola 0:a1734fe1ec4b 1 /**
vpcola 0:a1734fe1ec4b 2 ******************************************************************************
vpcola 0:a1734fe1ec4b 3 * @file SPIRIT_LinearFifo.c
vpcola 0:a1734fe1ec4b 4 * @author VMA division - AMS
vpcola 0:a1734fe1ec4b 5 * @version 3.2.2
vpcola 0:a1734fe1ec4b 6 * @date 08-July-2015
vpcola 0:a1734fe1ec4b 7 * @brief Configuration and management of SPIRIT Fifo.
vpcola 0:a1734fe1ec4b 8 * @details
vpcola 0:a1734fe1ec4b 9 *
vpcola 0:a1734fe1ec4b 10 * @attention
vpcola 0:a1734fe1ec4b 11 *
vpcola 0:a1734fe1ec4b 12 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
vpcola 0:a1734fe1ec4b 13 *
vpcola 0:a1734fe1ec4b 14 * Redistribution and use in source and binary forms, with or without modification,
vpcola 0:a1734fe1ec4b 15 * are permitted provided that the following conditions are met:
vpcola 0:a1734fe1ec4b 16 * 1. Redistributions of source code must retain the above copyright notice,
vpcola 0:a1734fe1ec4b 17 * this list of conditions and the following disclaimer.
vpcola 0:a1734fe1ec4b 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
vpcola 0:a1734fe1ec4b 19 * this list of conditions and the following disclaimer in the documentation
vpcola 0:a1734fe1ec4b 20 * and/or other materials provided with the distribution.
vpcola 0:a1734fe1ec4b 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
vpcola 0:a1734fe1ec4b 22 * may be used to endorse or promote products derived from this software
vpcola 0:a1734fe1ec4b 23 * without specific prior written permission.
vpcola 0:a1734fe1ec4b 24 *
vpcola 0:a1734fe1ec4b 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
vpcola 0:a1734fe1ec4b 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
vpcola 0:a1734fe1ec4b 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
vpcola 0:a1734fe1ec4b 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
vpcola 0:a1734fe1ec4b 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
vpcola 0:a1734fe1ec4b 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
vpcola 0:a1734fe1ec4b 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
vpcola 0:a1734fe1ec4b 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
vpcola 0:a1734fe1ec4b 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
vpcola 0:a1734fe1ec4b 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
vpcola 0:a1734fe1ec4b 35 *
vpcola 0:a1734fe1ec4b 36 ******************************************************************************
vpcola 0:a1734fe1ec4b 37 */
vpcola 0:a1734fe1ec4b 38
vpcola 0:a1734fe1ec4b 39 /* Includes ------------------------------------------------------------------*/
vpcola 0:a1734fe1ec4b 40 #include "SPIRIT_LinearFifo.h"
vpcola 0:a1734fe1ec4b 41 #include "MCU_Interface.h"
vpcola 0:a1734fe1ec4b 42
vpcola 0:a1734fe1ec4b 43
vpcola 0:a1734fe1ec4b 44 /**
vpcola 0:a1734fe1ec4b 45 * @addtogroup SPIRIT_Libraries
vpcola 0:a1734fe1ec4b 46 * @{
vpcola 0:a1734fe1ec4b 47 */
vpcola 0:a1734fe1ec4b 48
vpcola 0:a1734fe1ec4b 49
vpcola 0:a1734fe1ec4b 50 /**
vpcola 0:a1734fe1ec4b 51 * @addtogroup SPIRIT_LinearFifo
vpcola 0:a1734fe1ec4b 52 * @{
vpcola 0:a1734fe1ec4b 53 */
vpcola 0:a1734fe1ec4b 54
vpcola 0:a1734fe1ec4b 55
vpcola 0:a1734fe1ec4b 56 /**
vpcola 0:a1734fe1ec4b 57 * @defgroup LinearFifo_Private_TypesDefinitions Linear FIFO Private Types Definitions
vpcola 0:a1734fe1ec4b 58 * @{
vpcola 0:a1734fe1ec4b 59 */
vpcola 0:a1734fe1ec4b 60
vpcola 0:a1734fe1ec4b 61 /**
vpcola 0:a1734fe1ec4b 62 *@}
vpcola 0:a1734fe1ec4b 63 */
vpcola 0:a1734fe1ec4b 64
vpcola 0:a1734fe1ec4b 65
vpcola 0:a1734fe1ec4b 66 /**
vpcola 0:a1734fe1ec4b 67 * @defgroup LinearFifo_Private_Defines Linear FIFO Private Defines
vpcola 0:a1734fe1ec4b 68 * @{
vpcola 0:a1734fe1ec4b 69 */
vpcola 0:a1734fe1ec4b 70
vpcola 0:a1734fe1ec4b 71 /**
vpcola 0:a1734fe1ec4b 72 *@}
vpcola 0:a1734fe1ec4b 73 */
vpcola 0:a1734fe1ec4b 74
vpcola 0:a1734fe1ec4b 75
vpcola 0:a1734fe1ec4b 76 /**
vpcola 0:a1734fe1ec4b 77 * @defgroup LinearFifo_Private_Macros Linear FIFO Private Macros
vpcola 0:a1734fe1ec4b 78 * @{
vpcola 0:a1734fe1ec4b 79 */
vpcola 0:a1734fe1ec4b 80
vpcola 0:a1734fe1ec4b 81 /**
vpcola 0:a1734fe1ec4b 82 *@}
vpcola 0:a1734fe1ec4b 83 */
vpcola 0:a1734fe1ec4b 84
vpcola 0:a1734fe1ec4b 85
vpcola 0:a1734fe1ec4b 86 /**
vpcola 0:a1734fe1ec4b 87 * @defgroup LinearFifo_Private_Variables Linear FIFO Private Variables
vpcola 0:a1734fe1ec4b 88 * @{
vpcola 0:a1734fe1ec4b 89 */
vpcola 0:a1734fe1ec4b 90
vpcola 0:a1734fe1ec4b 91 /**
vpcola 0:a1734fe1ec4b 92 *@}
vpcola 0:a1734fe1ec4b 93 */
vpcola 0:a1734fe1ec4b 94
vpcola 0:a1734fe1ec4b 95
vpcola 0:a1734fe1ec4b 96 /**
vpcola 0:a1734fe1ec4b 97 * @defgroup LinearFifo_Private_FunctionPrototypes Linear FIFO Private Function Prototypes
vpcola 0:a1734fe1ec4b 98 * @{
vpcola 0:a1734fe1ec4b 99 */
vpcola 0:a1734fe1ec4b 100
vpcola 0:a1734fe1ec4b 101 /**
vpcola 0:a1734fe1ec4b 102 *@}
vpcola 0:a1734fe1ec4b 103 */
vpcola 0:a1734fe1ec4b 104
vpcola 0:a1734fe1ec4b 105
vpcola 0:a1734fe1ec4b 106 /**
vpcola 0:a1734fe1ec4b 107 * @defgroup LinearFifo_Private_Functions Linear FIFO Private Functions
vpcola 0:a1734fe1ec4b 108 * @{
vpcola 0:a1734fe1ec4b 109 */
vpcola 0:a1734fe1ec4b 110
vpcola 0:a1734fe1ec4b 111 /**
vpcola 0:a1734fe1ec4b 112 * @brief Returns the number of elements in the Rx FIFO.
vpcola 0:a1734fe1ec4b 113 * @param None.
vpcola 0:a1734fe1ec4b 114 * @retval uint8_t Number of elements in the Rx FIFO.
vpcola 0:a1734fe1ec4b 115 */
vpcola 0:a1734fe1ec4b 116 uint8_t SpiritLinearFifoReadNumElementsRxFifo(void)
vpcola 0:a1734fe1ec4b 117 {
vpcola 0:a1734fe1ec4b 118 uint8_t tempRegValue;
vpcola 0:a1734fe1ec4b 119
vpcola 0:a1734fe1ec4b 120 /* Reads the register value */
vpcola 0:a1734fe1ec4b 121 g_xStatus = SpiritSpiReadRegisters(LINEAR_FIFO_STATUS0_BASE, 1, &tempRegValue);
vpcola 0:a1734fe1ec4b 122
vpcola 0:a1734fe1ec4b 123 /* Build and return value */
vpcola 0:a1734fe1ec4b 124 return (tempRegValue & 0x7F);
vpcola 0:a1734fe1ec4b 125
vpcola 0:a1734fe1ec4b 126 }
vpcola 0:a1734fe1ec4b 127
vpcola 0:a1734fe1ec4b 128
vpcola 0:a1734fe1ec4b 129 /**
vpcola 0:a1734fe1ec4b 130 * @brief Returns the number of elements in the Tx FIFO.
vpcola 0:a1734fe1ec4b 131 * @param None.
vpcola 0:a1734fe1ec4b 132 * @retval uint8_t Number of elements in the Tx FIFO.
vpcola 0:a1734fe1ec4b 133 */
vpcola 0:a1734fe1ec4b 134 uint8_t SpiritLinearFifoReadNumElementsTxFifo(void)
vpcola 0:a1734fe1ec4b 135 {
vpcola 0:a1734fe1ec4b 136 uint8_t tempRegValue;
vpcola 0:a1734fe1ec4b 137
vpcola 0:a1734fe1ec4b 138 /* Reads the number of elements in TX FIFO and return the value */
vpcola 0:a1734fe1ec4b 139 g_xStatus = SpiritSpiReadRegisters(LINEAR_FIFO_STATUS1_BASE, 1, &tempRegValue);
vpcola 0:a1734fe1ec4b 140
vpcola 0:a1734fe1ec4b 141 /* Build and return value */
vpcola 0:a1734fe1ec4b 142 return (tempRegValue & 0x7F);
vpcola 0:a1734fe1ec4b 143 }
vpcola 0:a1734fe1ec4b 144
vpcola 0:a1734fe1ec4b 145
vpcola 0:a1734fe1ec4b 146 /**
vpcola 0:a1734fe1ec4b 147 * @brief Sets the almost full threshold for the Rx FIFO. When the number of elements in RX FIFO reaches this value an interrupt can be generated to the MCU.
vpcola 0:a1734fe1ec4b 148 * @note The almost full threshold is encountered from the top of the FIFO. For example, if it is set to 7 the almost
vpcola 0:a1734fe1ec4b 149 * full FIFO irq will be raised when the number of elements is equals to 96-7 = 89.
vpcola 0:a1734fe1ec4b 150 * @param cThrRxFifo almost full threshold.
vpcola 0:a1734fe1ec4b 151 * This parameter is an uint8_t.
vpcola 0:a1734fe1ec4b 152 * @retval None.
vpcola 0:a1734fe1ec4b 153 */
vpcola 0:a1734fe1ec4b 154 void SpiritLinearFifoSetAlmostFullThresholdRx(uint8_t cThrRxFifo)
vpcola 0:a1734fe1ec4b 155 {
vpcola 0:a1734fe1ec4b 156 uint8_t tempRegValue;
vpcola 0:a1734fe1ec4b 157
vpcola 0:a1734fe1ec4b 158 /* Check the parameters */
vpcola 0:a1734fe1ec4b 159 s_assert_param(IS_FIFO_THR(cThrRxFifo));
vpcola 0:a1734fe1ec4b 160
vpcola 0:a1734fe1ec4b 161 /* Build the register value */
vpcola 0:a1734fe1ec4b 162 tempRegValue = cThrRxFifo & 0x7F;
vpcola 0:a1734fe1ec4b 163
vpcola 0:a1734fe1ec4b 164 /* Writes the Almost Full threshold for RX in the corresponding register */
vpcola 0:a1734fe1ec4b 165 g_xStatus = SpiritSpiWriteRegisters(FIFO_CONFIG3_RXAFTHR_BASE, 1, &tempRegValue);
vpcola 0:a1734fe1ec4b 166
vpcola 0:a1734fe1ec4b 167 }
vpcola 0:a1734fe1ec4b 168
vpcola 0:a1734fe1ec4b 169
vpcola 0:a1734fe1ec4b 170 /**
vpcola 0:a1734fe1ec4b 171 * @brief Returns the almost full threshold for RX FIFO.
vpcola 0:a1734fe1ec4b 172 * @note The almost full threshold is encountered from the top of the FIFO. For example, if it is 7 the almost
vpcola 0:a1734fe1ec4b 173 * full FIFO irq will be raised when the number of elements is equals to 96-7 = 89.
vpcola 0:a1734fe1ec4b 174 * @param None.
vpcola 0:a1734fe1ec4b 175 * @retval uint8_t Almost full threshold for Rx FIFO.
vpcola 0:a1734fe1ec4b 176 */
vpcola 0:a1734fe1ec4b 177 uint8_t SpiritLinearFifoGetAlmostFullThresholdRx(void)
vpcola 0:a1734fe1ec4b 178 {
vpcola 0:a1734fe1ec4b 179 uint8_t tempRegValue;
vpcola 0:a1734fe1ec4b 180
vpcola 0:a1734fe1ec4b 181 /* Reads the almost full threshold for RX FIFO and return the value */
vpcola 0:a1734fe1ec4b 182 g_xStatus = SpiritSpiReadRegisters(FIFO_CONFIG3_RXAFTHR_BASE, 1, &tempRegValue);
vpcola 0:a1734fe1ec4b 183
vpcola 0:a1734fe1ec4b 184 /* Build and return value */
vpcola 0:a1734fe1ec4b 185 return (tempRegValue & 0x7F);
vpcola 0:a1734fe1ec4b 186
vpcola 0:a1734fe1ec4b 187 }
vpcola 0:a1734fe1ec4b 188
vpcola 0:a1734fe1ec4b 189
vpcola 0:a1734fe1ec4b 190 /**
vpcola 0:a1734fe1ec4b 191 * @brief Sets the almost empty threshold for the Rx FIFO. When the number of elements in RX FIFO reaches this value an interrupt can be generated to the MCU.
vpcola 0:a1734fe1ec4b 192 * @param cThrRxFifo almost empty threshold.
vpcola 0:a1734fe1ec4b 193 * This parameter is an uint8_t.
vpcola 0:a1734fe1ec4b 194 * @retval None.
vpcola 0:a1734fe1ec4b 195 */
vpcola 0:a1734fe1ec4b 196 void SpiritLinearFifoSetAlmostEmptyThresholdRx(uint8_t cThrRxFifo)
vpcola 0:a1734fe1ec4b 197 {
vpcola 0:a1734fe1ec4b 198 uint8_t tempRegValue;
vpcola 0:a1734fe1ec4b 199
vpcola 0:a1734fe1ec4b 200 /* Check the parameters */
vpcola 0:a1734fe1ec4b 201 s_assert_param(IS_FIFO_THR(cThrRxFifo));
vpcola 0:a1734fe1ec4b 202
vpcola 0:a1734fe1ec4b 203 /* Build the register value */
vpcola 0:a1734fe1ec4b 204 tempRegValue = cThrRxFifo & 0x7F;
vpcola 0:a1734fe1ec4b 205
vpcola 0:a1734fe1ec4b 206 /* Writes the Almost Empty threshold for RX in the corresponding register */
vpcola 0:a1734fe1ec4b 207 g_xStatus = SpiritSpiWriteRegisters(FIFO_CONFIG2_RXAETHR_BASE, 1, &tempRegValue);
vpcola 0:a1734fe1ec4b 208
vpcola 0:a1734fe1ec4b 209 }
vpcola 0:a1734fe1ec4b 210
vpcola 0:a1734fe1ec4b 211
vpcola 0:a1734fe1ec4b 212 /**
vpcola 0:a1734fe1ec4b 213 * @brief Returns the almost empty threshold for Rx FIFO.
vpcola 0:a1734fe1ec4b 214 * @param None.
vpcola 0:a1734fe1ec4b 215 * @retval uint8_t Almost empty threshold for Rx FIFO.
vpcola 0:a1734fe1ec4b 216 */
vpcola 0:a1734fe1ec4b 217 uint8_t SpiritLinearFifoGetAlmostEmptyThresholdRx(void)
vpcola 0:a1734fe1ec4b 218 {
vpcola 0:a1734fe1ec4b 219 uint8_t tempRegValue;
vpcola 0:a1734fe1ec4b 220
vpcola 0:a1734fe1ec4b 221 /* Reads the almost empty threshold for RX FIFO and returns the value */
vpcola 0:a1734fe1ec4b 222 g_xStatus = SpiritSpiReadRegisters(FIFO_CONFIG2_RXAETHR_BASE, 1, &tempRegValue);
vpcola 0:a1734fe1ec4b 223
vpcola 0:a1734fe1ec4b 224 /* Build and return value */
vpcola 0:a1734fe1ec4b 225 return (tempRegValue & 0x7F);
vpcola 0:a1734fe1ec4b 226
vpcola 0:a1734fe1ec4b 227 }
vpcola 0:a1734fe1ec4b 228
vpcola 0:a1734fe1ec4b 229
vpcola 0:a1734fe1ec4b 230 /**
vpcola 0:a1734fe1ec4b 231 * @brief Sets the almost full threshold for the Tx FIFO. When the number of elements in TX FIFO reaches this value an interrupt can be generated to the MCU.
vpcola 0:a1734fe1ec4b 232 * @note The almost full threshold is encountered from the top of the FIFO. For example, if it is set to 7 the almost
vpcola 0:a1734fe1ec4b 233 * full FIFO irq will be raised when the number of elements is equals to 96-7 = 89.
vpcola 0:a1734fe1ec4b 234 * @param cThrTxFifo almost full threshold.
vpcola 0:a1734fe1ec4b 235 * This parameter is an uint8_t.
vpcola 0:a1734fe1ec4b 236 * @retval None.
vpcola 0:a1734fe1ec4b 237 */
vpcola 0:a1734fe1ec4b 238 void SpiritLinearFifoSetAlmostFullThresholdTx(uint8_t cThrTxFifo)
vpcola 0:a1734fe1ec4b 239 {
vpcola 0:a1734fe1ec4b 240 uint8_t tempRegValue;
vpcola 0:a1734fe1ec4b 241
vpcola 0:a1734fe1ec4b 242 /* Check the parameters */
vpcola 0:a1734fe1ec4b 243 s_assert_param(IS_FIFO_THR(cThrTxFifo));
vpcola 0:a1734fe1ec4b 244
vpcola 0:a1734fe1ec4b 245 /* Reads the register value */
vpcola 0:a1734fe1ec4b 246 g_xStatus = SpiritSpiReadRegisters(FIFO_CONFIG1_TXAFTHR_BASE, 1, &tempRegValue);
vpcola 0:a1734fe1ec4b 247
vpcola 0:a1734fe1ec4b 248 /* Build the register value */
vpcola 0:a1734fe1ec4b 249 tempRegValue &= 0x80;
vpcola 0:a1734fe1ec4b 250 tempRegValue |= cThrTxFifo;
vpcola 0:a1734fe1ec4b 251
vpcola 0:a1734fe1ec4b 252 /* Writes the Almost Full threshold for Tx in the corresponding register */
vpcola 0:a1734fe1ec4b 253 g_xStatus = SpiritSpiWriteRegisters(FIFO_CONFIG1_TXAFTHR_BASE, 1, &tempRegValue);
vpcola 0:a1734fe1ec4b 254
vpcola 0:a1734fe1ec4b 255 }
vpcola 0:a1734fe1ec4b 256
vpcola 0:a1734fe1ec4b 257
vpcola 0:a1734fe1ec4b 258 /**
vpcola 0:a1734fe1ec4b 259 * @brief Returns the almost full threshold for Tx FIFO.
vpcola 0:a1734fe1ec4b 260 * @note The almost full threshold is encountered from the top of the FIFO. For example, if it is set to 7 the almost
vpcola 0:a1734fe1ec4b 261 * full FIFO irq will be raised when the number of elements is equals to 96-7 = 89.
vpcola 0:a1734fe1ec4b 262 * @param None.
vpcola 0:a1734fe1ec4b 263 * @retval uint8_t Almost full threshold for Tx FIFO.
vpcola 0:a1734fe1ec4b 264 */
vpcola 0:a1734fe1ec4b 265 uint8_t SpiritLinearFifoGetAlmostFullThresholdTx(void)
vpcola 0:a1734fe1ec4b 266 {
vpcola 0:a1734fe1ec4b 267 uint8_t tempRegValue;
vpcola 0:a1734fe1ec4b 268
vpcola 0:a1734fe1ec4b 269 /* Reads the almost full threshold for Tx FIFO and returns the value */
vpcola 0:a1734fe1ec4b 270 g_xStatus = SpiritSpiReadRegisters(FIFO_CONFIG1_TXAFTHR_BASE, 1, &tempRegValue);
vpcola 0:a1734fe1ec4b 271
vpcola 0:a1734fe1ec4b 272 /* Build and returns value */
vpcola 0:a1734fe1ec4b 273 return (tempRegValue & 0x7F);
vpcola 0:a1734fe1ec4b 274
vpcola 0:a1734fe1ec4b 275 }
vpcola 0:a1734fe1ec4b 276
vpcola 0:a1734fe1ec4b 277
vpcola 0:a1734fe1ec4b 278 /**
vpcola 0:a1734fe1ec4b 279 * @brief Sets the almost empty threshold for the Tx FIFO. When the number of elements in Tx FIFO reaches this value an interrupt can can be generated to the MCU.
vpcola 0:a1734fe1ec4b 280 * @param cThrTxFifo: almost empty threshold.
vpcola 0:a1734fe1ec4b 281 * This parameter is an uint8_t.
vpcola 0:a1734fe1ec4b 282 * @retval None.
vpcola 0:a1734fe1ec4b 283 */
vpcola 0:a1734fe1ec4b 284 void SpiritLinearFifoSetAlmostEmptyThresholdTx(uint8_t cThrTxFifo)
vpcola 0:a1734fe1ec4b 285 {
vpcola 0:a1734fe1ec4b 286 uint8_t tempRegValue;
vpcola 0:a1734fe1ec4b 287
vpcola 0:a1734fe1ec4b 288 /* Check the parameters */
vpcola 0:a1734fe1ec4b 289 s_assert_param(IS_FIFO_THR(cThrTxFifo));
vpcola 0:a1734fe1ec4b 290
vpcola 0:a1734fe1ec4b 291 /* Reads the register value */
vpcola 0:a1734fe1ec4b 292 g_xStatus = SpiritSpiReadRegisters(FIFO_CONFIG0_TXAETHR_BASE, 1, &tempRegValue);
vpcola 0:a1734fe1ec4b 293
vpcola 0:a1734fe1ec4b 294 /* Build the register value */
vpcola 0:a1734fe1ec4b 295 tempRegValue &= 0x80;
vpcola 0:a1734fe1ec4b 296 tempRegValue |= cThrTxFifo;
vpcola 0:a1734fe1ec4b 297
vpcola 0:a1734fe1ec4b 298 /* Writes the Almost Empty threshold for Tx in the corresponding register */
vpcola 0:a1734fe1ec4b 299 g_xStatus = SpiritSpiWriteRegisters(FIFO_CONFIG0_TXAETHR_BASE, 1, &tempRegValue);
vpcola 0:a1734fe1ec4b 300
vpcola 0:a1734fe1ec4b 301 }
vpcola 0:a1734fe1ec4b 302
vpcola 0:a1734fe1ec4b 303
vpcola 0:a1734fe1ec4b 304 /**
vpcola 0:a1734fe1ec4b 305 * @brief Returns the almost empty threshold for Tx FIFO.
vpcola 0:a1734fe1ec4b 306 * @param None.
vpcola 0:a1734fe1ec4b 307 * @retval uint8_t Almost empty threshold for Tx FIFO.
vpcola 0:a1734fe1ec4b 308 */
vpcola 0:a1734fe1ec4b 309 uint8_t SpiritLinearFifoGetAlmostEmptyThresholdTx(void)
vpcola 0:a1734fe1ec4b 310 {
vpcola 0:a1734fe1ec4b 311 uint8_t tempRegValue;
vpcola 0:a1734fe1ec4b 312
vpcola 0:a1734fe1ec4b 313 /* Reads the almost empty threshold for TX FIFO and returns the value */
vpcola 0:a1734fe1ec4b 314 g_xStatus = SpiritSpiReadRegisters(FIFO_CONFIG0_TXAETHR_BASE, 1, &tempRegValue);
vpcola 0:a1734fe1ec4b 315
vpcola 0:a1734fe1ec4b 316 /* Build and return value */
vpcola 0:a1734fe1ec4b 317 return (tempRegValue & 0x7F);
vpcola 0:a1734fe1ec4b 318
vpcola 0:a1734fe1ec4b 319 }
vpcola 0:a1734fe1ec4b 320
vpcola 0:a1734fe1ec4b 321
vpcola 0:a1734fe1ec4b 322 /**
vpcola 0:a1734fe1ec4b 323 *@}
vpcola 0:a1734fe1ec4b 324 */
vpcola 0:a1734fe1ec4b 325
vpcola 0:a1734fe1ec4b 326 /**
vpcola 0:a1734fe1ec4b 327 *@}
vpcola 0:a1734fe1ec4b 328 */
vpcola 0:a1734fe1ec4b 329
vpcola 0:a1734fe1ec4b 330
vpcola 0:a1734fe1ec4b 331 /**
vpcola 0:a1734fe1ec4b 332 *@}
vpcola 0:a1734fe1ec4b 333 */
vpcola 0:a1734fe1ec4b 334
vpcola 0:a1734fe1ec4b 335
vpcola 0:a1734fe1ec4b 336
vpcola 0:a1734fe1ec4b 337 /******************* (C) COPYRIGHT 2015 STMicroelectronics *****END OF FILE****/