Vergil Cola
/
MQTTGateway2
Fork of my original MQTTGateway
easy-connect/stm-spirit1-rf-driver/source/libs/spirit1/SPIRIT1_Library/Src/SPIRIT_Qi.c@0:a1734fe1ec4b, 2017-04-08 (annotated)
- Committer:
- vpcola
- Date:
- Sat Apr 08 14:43:14 2017 +0000
- Revision:
- 0:a1734fe1ec4b
Initial commit
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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vpcola | 0:a1734fe1ec4b | 1 | /** |
vpcola | 0:a1734fe1ec4b | 2 | ****************************************************************************** |
vpcola | 0:a1734fe1ec4b | 3 | * @file SPIRIT_Qi.c |
vpcola | 0:a1734fe1ec4b | 4 | * @author VMA division - AMS |
vpcola | 0:a1734fe1ec4b | 5 | * @version 3.2.2 |
vpcola | 0:a1734fe1ec4b | 6 | * @date 08-July-2015 |
vpcola | 0:a1734fe1ec4b | 7 | * @brief Configuration and management of SPIRIT QI. |
vpcola | 0:a1734fe1ec4b | 8 | * @details |
vpcola | 0:a1734fe1ec4b | 9 | * |
vpcola | 0:a1734fe1ec4b | 10 | * @attention |
vpcola | 0:a1734fe1ec4b | 11 | * |
vpcola | 0:a1734fe1ec4b | 12 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
vpcola | 0:a1734fe1ec4b | 13 | * |
vpcola | 0:a1734fe1ec4b | 14 | * Redistribution and use in source and binary forms, with or without modification, |
vpcola | 0:a1734fe1ec4b | 15 | * are permitted provided that the following conditions are met: |
vpcola | 0:a1734fe1ec4b | 16 | * 1. Redistributions of source code must retain the above copyright notice, |
vpcola | 0:a1734fe1ec4b | 17 | * this list of conditions and the following disclaimer. |
vpcola | 0:a1734fe1ec4b | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
vpcola | 0:a1734fe1ec4b | 19 | * this list of conditions and the following disclaimer in the documentation |
vpcola | 0:a1734fe1ec4b | 20 | * and/or other materials provided with the distribution. |
vpcola | 0:a1734fe1ec4b | 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
vpcola | 0:a1734fe1ec4b | 22 | * may be used to endorse or promote products derived from this software |
vpcola | 0:a1734fe1ec4b | 23 | * without specific prior written permission. |
vpcola | 0:a1734fe1ec4b | 24 | * |
vpcola | 0:a1734fe1ec4b | 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
vpcola | 0:a1734fe1ec4b | 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
vpcola | 0:a1734fe1ec4b | 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
vpcola | 0:a1734fe1ec4b | 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
vpcola | 0:a1734fe1ec4b | 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
vpcola | 0:a1734fe1ec4b | 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
vpcola | 0:a1734fe1ec4b | 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
vpcola | 0:a1734fe1ec4b | 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
vpcola | 0:a1734fe1ec4b | 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
vpcola | 0:a1734fe1ec4b | 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
vpcola | 0:a1734fe1ec4b | 35 | * |
vpcola | 0:a1734fe1ec4b | 36 | ****************************************************************************** |
vpcola | 0:a1734fe1ec4b | 37 | */ |
vpcola | 0:a1734fe1ec4b | 38 | |
vpcola | 0:a1734fe1ec4b | 39 | /* Includes ------------------------------------------------------------------*/ |
vpcola | 0:a1734fe1ec4b | 40 | #include "SPIRIT_Qi.h" |
vpcola | 0:a1734fe1ec4b | 41 | #include "MCU_Interface.h" |
vpcola | 0:a1734fe1ec4b | 42 | |
vpcola | 0:a1734fe1ec4b | 43 | |
vpcola | 0:a1734fe1ec4b | 44 | |
vpcola | 0:a1734fe1ec4b | 45 | /** |
vpcola | 0:a1734fe1ec4b | 46 | * @addtogroup SPIRIT_Libraries |
vpcola | 0:a1734fe1ec4b | 47 | * @{ |
vpcola | 0:a1734fe1ec4b | 48 | */ |
vpcola | 0:a1734fe1ec4b | 49 | |
vpcola | 0:a1734fe1ec4b | 50 | |
vpcola | 0:a1734fe1ec4b | 51 | /** |
vpcola | 0:a1734fe1ec4b | 52 | * @addtogroup SPIRIT_Qi |
vpcola | 0:a1734fe1ec4b | 53 | * @{ |
vpcola | 0:a1734fe1ec4b | 54 | */ |
vpcola | 0:a1734fe1ec4b | 55 | |
vpcola | 0:a1734fe1ec4b | 56 | |
vpcola | 0:a1734fe1ec4b | 57 | /** |
vpcola | 0:a1734fe1ec4b | 58 | * @defgroup Qi_Private_TypesDefinitions QI Private Types Definitions |
vpcola | 0:a1734fe1ec4b | 59 | * @{ |
vpcola | 0:a1734fe1ec4b | 60 | */ |
vpcola | 0:a1734fe1ec4b | 61 | |
vpcola | 0:a1734fe1ec4b | 62 | /** |
vpcola | 0:a1734fe1ec4b | 63 | *@} |
vpcola | 0:a1734fe1ec4b | 64 | */ |
vpcola | 0:a1734fe1ec4b | 65 | |
vpcola | 0:a1734fe1ec4b | 66 | |
vpcola | 0:a1734fe1ec4b | 67 | /** |
vpcola | 0:a1734fe1ec4b | 68 | * @defgroup Qi_Private_Defines QI Private Defines |
vpcola | 0:a1734fe1ec4b | 69 | * @{ |
vpcola | 0:a1734fe1ec4b | 70 | */ |
vpcola | 0:a1734fe1ec4b | 71 | |
vpcola | 0:a1734fe1ec4b | 72 | /** |
vpcola | 0:a1734fe1ec4b | 73 | *@} |
vpcola | 0:a1734fe1ec4b | 74 | */ |
vpcola | 0:a1734fe1ec4b | 75 | |
vpcola | 0:a1734fe1ec4b | 76 | |
vpcola | 0:a1734fe1ec4b | 77 | /** |
vpcola | 0:a1734fe1ec4b | 78 | * @defgroup Qi_Private_Macros QI Private Macros |
vpcola | 0:a1734fe1ec4b | 79 | * @{ |
vpcola | 0:a1734fe1ec4b | 80 | */ |
vpcola | 0:a1734fe1ec4b | 81 | |
vpcola | 0:a1734fe1ec4b | 82 | /** |
vpcola | 0:a1734fe1ec4b | 83 | *@} |
vpcola | 0:a1734fe1ec4b | 84 | */ |
vpcola | 0:a1734fe1ec4b | 85 | |
vpcola | 0:a1734fe1ec4b | 86 | |
vpcola | 0:a1734fe1ec4b | 87 | /** |
vpcola | 0:a1734fe1ec4b | 88 | * @defgroup Qi_Private_Variables QI Private Variables |
vpcola | 0:a1734fe1ec4b | 89 | * @{ |
vpcola | 0:a1734fe1ec4b | 90 | */ |
vpcola | 0:a1734fe1ec4b | 91 | |
vpcola | 0:a1734fe1ec4b | 92 | /** |
vpcola | 0:a1734fe1ec4b | 93 | *@} |
vpcola | 0:a1734fe1ec4b | 94 | */ |
vpcola | 0:a1734fe1ec4b | 95 | |
vpcola | 0:a1734fe1ec4b | 96 | |
vpcola | 0:a1734fe1ec4b | 97 | /** |
vpcola | 0:a1734fe1ec4b | 98 | * @defgroup Qi_Private_FunctionPrototypes QI Private Function Prototypes |
vpcola | 0:a1734fe1ec4b | 99 | * @{ |
vpcola | 0:a1734fe1ec4b | 100 | */ |
vpcola | 0:a1734fe1ec4b | 101 | |
vpcola | 0:a1734fe1ec4b | 102 | /** |
vpcola | 0:a1734fe1ec4b | 103 | *@} |
vpcola | 0:a1734fe1ec4b | 104 | */ |
vpcola | 0:a1734fe1ec4b | 105 | |
vpcola | 0:a1734fe1ec4b | 106 | |
vpcola | 0:a1734fe1ec4b | 107 | /** |
vpcola | 0:a1734fe1ec4b | 108 | * @defgroup Qi_Private_Functions QI Private Functions |
vpcola | 0:a1734fe1ec4b | 109 | * @{ |
vpcola | 0:a1734fe1ec4b | 110 | */ |
vpcola | 0:a1734fe1ec4b | 111 | |
vpcola | 0:a1734fe1ec4b | 112 | /** |
vpcola | 0:a1734fe1ec4b | 113 | * @brief Enables/Disables the PQI Preamble Quality Indicator check. The running peak PQI is |
vpcola | 0:a1734fe1ec4b | 114 | * compared to a threshold value and the preamble valid IRQ is asserted as soon as the threshold is passed. |
vpcola | 0:a1734fe1ec4b | 115 | * @param xNewState new state for PQI check. |
vpcola | 0:a1734fe1ec4b | 116 | * This parameter can be: S_ENABLE or S_DISABLE. |
vpcola | 0:a1734fe1ec4b | 117 | * @retval None. |
vpcola | 0:a1734fe1ec4b | 118 | */ |
vpcola | 0:a1734fe1ec4b | 119 | void SpiritQiPqiCheck(SpiritFunctionalState xNewState) |
vpcola | 0:a1734fe1ec4b | 120 | { |
vpcola | 0:a1734fe1ec4b | 121 | uint8_t tempRegValue; |
vpcola | 0:a1734fe1ec4b | 122 | |
vpcola | 0:a1734fe1ec4b | 123 | /* Check the parameters */ |
vpcola | 0:a1734fe1ec4b | 124 | s_assert_param(IS_SPIRIT_FUNCTIONAL_STATE(xNewState)); |
vpcola | 0:a1734fe1ec4b | 125 | |
vpcola | 0:a1734fe1ec4b | 126 | /* Reads the QI register value */ |
vpcola | 0:a1734fe1ec4b | 127 | g_xStatus = SpiritSpiReadRegisters(QI_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 128 | |
vpcola | 0:a1734fe1ec4b | 129 | /* Enables or disables the PQI Check bit on the QI_BASE register */ |
vpcola | 0:a1734fe1ec4b | 130 | if(xNewState == S_ENABLE) |
vpcola | 0:a1734fe1ec4b | 131 | { |
vpcola | 0:a1734fe1ec4b | 132 | tempRegValue |= QI_PQI_MASK; |
vpcola | 0:a1734fe1ec4b | 133 | } |
vpcola | 0:a1734fe1ec4b | 134 | else |
vpcola | 0:a1734fe1ec4b | 135 | { |
vpcola | 0:a1734fe1ec4b | 136 | tempRegValue &= ~QI_PQI_MASK; |
vpcola | 0:a1734fe1ec4b | 137 | } |
vpcola | 0:a1734fe1ec4b | 138 | |
vpcola | 0:a1734fe1ec4b | 139 | /* Writes value on the QI register */ |
vpcola | 0:a1734fe1ec4b | 140 | g_xStatus = SpiritSpiWriteRegisters(QI_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 141 | |
vpcola | 0:a1734fe1ec4b | 142 | } |
vpcola | 0:a1734fe1ec4b | 143 | |
vpcola | 0:a1734fe1ec4b | 144 | |
vpcola | 0:a1734fe1ec4b | 145 | /** |
vpcola | 0:a1734fe1ec4b | 146 | * @brief Enables/Disables the Synchronization Quality Indicator check. The running peak SQI is |
vpcola | 0:a1734fe1ec4b | 147 | * compared to a threshold value and the sync valid IRQ is asserted as soon as the threshold is passed. |
vpcola | 0:a1734fe1ec4b | 148 | * @param xNewState new state for SQI check. |
vpcola | 0:a1734fe1ec4b | 149 | * This parameter can be: S_ENABLE or S_DISABLE. |
vpcola | 0:a1734fe1ec4b | 150 | * @retval None. |
vpcola | 0:a1734fe1ec4b | 151 | */ |
vpcola | 0:a1734fe1ec4b | 152 | void SpiritQiSqiCheck(SpiritFunctionalState xNewState) |
vpcola | 0:a1734fe1ec4b | 153 | { |
vpcola | 0:a1734fe1ec4b | 154 | uint8_t tempRegValue; |
vpcola | 0:a1734fe1ec4b | 155 | |
vpcola | 0:a1734fe1ec4b | 156 | /* Check the parameters */ |
vpcola | 0:a1734fe1ec4b | 157 | s_assert_param(IS_SPIRIT_FUNCTIONAL_STATE(xNewState)); |
vpcola | 0:a1734fe1ec4b | 158 | |
vpcola | 0:a1734fe1ec4b | 159 | /* Reads the QI register value */ |
vpcola | 0:a1734fe1ec4b | 160 | g_xStatus = SpiritSpiReadRegisters(QI_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 161 | |
vpcola | 0:a1734fe1ec4b | 162 | /* Enables or disables the SQI Check bit on the QI_BASE register */ |
vpcola | 0:a1734fe1ec4b | 163 | if(xNewState == S_ENABLE) |
vpcola | 0:a1734fe1ec4b | 164 | { |
vpcola | 0:a1734fe1ec4b | 165 | tempRegValue |= QI_SQI_MASK; |
vpcola | 0:a1734fe1ec4b | 166 | } |
vpcola | 0:a1734fe1ec4b | 167 | else |
vpcola | 0:a1734fe1ec4b | 168 | { |
vpcola | 0:a1734fe1ec4b | 169 | tempRegValue &= ~QI_SQI_MASK; |
vpcola | 0:a1734fe1ec4b | 170 | } |
vpcola | 0:a1734fe1ec4b | 171 | |
vpcola | 0:a1734fe1ec4b | 172 | /* Writes value on the QI register */ |
vpcola | 0:a1734fe1ec4b | 173 | g_xStatus = SpiritSpiWriteRegisters(QI_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 174 | |
vpcola | 0:a1734fe1ec4b | 175 | } |
vpcola | 0:a1734fe1ec4b | 176 | |
vpcola | 0:a1734fe1ec4b | 177 | |
vpcola | 0:a1734fe1ec4b | 178 | /** |
vpcola | 0:a1734fe1ec4b | 179 | * @brief Sets the PQI threshold. The preamble quality threshold is 4*PQI_TH (PQI_TH = 0..15). |
vpcola | 0:a1734fe1ec4b | 180 | * @param xPqiThr parameter of the formula above. |
vpcola | 0:a1734fe1ec4b | 181 | * This variable is a @ref PqiThreshold. |
vpcola | 0:a1734fe1ec4b | 182 | * @retval None. |
vpcola | 0:a1734fe1ec4b | 183 | */ |
vpcola | 0:a1734fe1ec4b | 184 | void SpiritQiSetPqiThreshold(PqiThreshold xPqiThr) |
vpcola | 0:a1734fe1ec4b | 185 | { |
vpcola | 0:a1734fe1ec4b | 186 | uint8_t tempRegValue; |
vpcola | 0:a1734fe1ec4b | 187 | |
vpcola | 0:a1734fe1ec4b | 188 | /* Check the parameters */ |
vpcola | 0:a1734fe1ec4b | 189 | s_assert_param(IS_PQI_THR(xPqiThr)); |
vpcola | 0:a1734fe1ec4b | 190 | |
vpcola | 0:a1734fe1ec4b | 191 | /* Reads the QI register value */ |
vpcola | 0:a1734fe1ec4b | 192 | g_xStatus = SpiritSpiReadRegisters(QI_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 193 | |
vpcola | 0:a1734fe1ec4b | 194 | /* Build the PQI threshold value to be written */ |
vpcola | 0:a1734fe1ec4b | 195 | tempRegValue &= 0xC3; |
vpcola | 0:a1734fe1ec4b | 196 | tempRegValue |= ((uint8_t)xPqiThr); |
vpcola | 0:a1734fe1ec4b | 197 | |
vpcola | 0:a1734fe1ec4b | 198 | /* Writes value on the QI register */ |
vpcola | 0:a1734fe1ec4b | 199 | g_xStatus = SpiritSpiWriteRegisters(QI_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 200 | |
vpcola | 0:a1734fe1ec4b | 201 | } |
vpcola | 0:a1734fe1ec4b | 202 | |
vpcola | 0:a1734fe1ec4b | 203 | |
vpcola | 0:a1734fe1ec4b | 204 | /** |
vpcola | 0:a1734fe1ec4b | 205 | * @brief Returns the PQI threshold. The preamble quality threshold is 4*PQI_TH (PQI_TH = 0..15). |
vpcola | 0:a1734fe1ec4b | 206 | * @param None. |
vpcola | 0:a1734fe1ec4b | 207 | * @retval PqiThreshold PQI threshold (PQI_TH of the formula above). |
vpcola | 0:a1734fe1ec4b | 208 | */ |
vpcola | 0:a1734fe1ec4b | 209 | PqiThreshold SpiritQiGetPqiThreshold(void) |
vpcola | 0:a1734fe1ec4b | 210 | { |
vpcola | 0:a1734fe1ec4b | 211 | uint8_t tempRegValue; |
vpcola | 0:a1734fe1ec4b | 212 | |
vpcola | 0:a1734fe1ec4b | 213 | /* Reads the QI register value */ |
vpcola | 0:a1734fe1ec4b | 214 | g_xStatus = SpiritSpiReadRegisters(QI_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 215 | |
vpcola | 0:a1734fe1ec4b | 216 | /* Rebuild and return the PQI threshold value */ |
vpcola | 0:a1734fe1ec4b | 217 | return (PqiThreshold)(tempRegValue & 0x3C); |
vpcola | 0:a1734fe1ec4b | 218 | |
vpcola | 0:a1734fe1ec4b | 219 | } |
vpcola | 0:a1734fe1ec4b | 220 | |
vpcola | 0:a1734fe1ec4b | 221 | |
vpcola | 0:a1734fe1ec4b | 222 | /** |
vpcola | 0:a1734fe1ec4b | 223 | * @brief Sets the SQI threshold. The synchronization quality |
vpcola | 0:a1734fe1ec4b | 224 | * threshold is equal to 8 * SYNC_LEN - 2 * SQI_TH with SQI_TH = 0..3. When SQI_TH is 0 perfect match is required; when |
vpcola | 0:a1734fe1ec4b | 225 | * SQI_TH = 1, 2, 3 then 1, 2, or 3 bit errors are respectively accepted. It is recommended that the SQI check is always |
vpcola | 0:a1734fe1ec4b | 226 | * enabled. |
vpcola | 0:a1734fe1ec4b | 227 | * @param xSqiThr parameter of the formula above. |
vpcola | 0:a1734fe1ec4b | 228 | * This parameter is a @ref SqiThreshold. |
vpcola | 0:a1734fe1ec4b | 229 | * @retval None. |
vpcola | 0:a1734fe1ec4b | 230 | */ |
vpcola | 0:a1734fe1ec4b | 231 | void SpiritQiSetSqiThreshold(SqiThreshold xSqiThr) |
vpcola | 0:a1734fe1ec4b | 232 | { |
vpcola | 0:a1734fe1ec4b | 233 | uint8_t tempRegValue; |
vpcola | 0:a1734fe1ec4b | 234 | |
vpcola | 0:a1734fe1ec4b | 235 | /* Check the parameters */ |
vpcola | 0:a1734fe1ec4b | 236 | s_assert_param(IS_SQI_THR(xSqiThr)); |
vpcola | 0:a1734fe1ec4b | 237 | |
vpcola | 0:a1734fe1ec4b | 238 | /* Reads the QI register value */ |
vpcola | 0:a1734fe1ec4b | 239 | g_xStatus = SpiritSpiReadRegisters(QI_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 240 | |
vpcola | 0:a1734fe1ec4b | 241 | /* Build the SQI threshold value to be written */ |
vpcola | 0:a1734fe1ec4b | 242 | tempRegValue &= 0x3F; |
vpcola | 0:a1734fe1ec4b | 243 | tempRegValue |= ((uint8_t)xSqiThr); |
vpcola | 0:a1734fe1ec4b | 244 | |
vpcola | 0:a1734fe1ec4b | 245 | /* Writes the new value on the QI register */ |
vpcola | 0:a1734fe1ec4b | 246 | g_xStatus = SpiritSpiWriteRegisters(QI_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 247 | |
vpcola | 0:a1734fe1ec4b | 248 | } |
vpcola | 0:a1734fe1ec4b | 249 | |
vpcola | 0:a1734fe1ec4b | 250 | |
vpcola | 0:a1734fe1ec4b | 251 | /** |
vpcola | 0:a1734fe1ec4b | 252 | * @brief Returns the SQI threshold. The synchronization quality threshold is equal to 8 * SYNC_LEN - 2 * SQI_TH with SQI_TH = 0..3. |
vpcola | 0:a1734fe1ec4b | 253 | * @param None. |
vpcola | 0:a1734fe1ec4b | 254 | * @retval SqiThreshold SQI threshold (SQI_TH of the formula above). |
vpcola | 0:a1734fe1ec4b | 255 | */ |
vpcola | 0:a1734fe1ec4b | 256 | SqiThreshold SpiritQiGetSqiThreshold(void) |
vpcola | 0:a1734fe1ec4b | 257 | { |
vpcola | 0:a1734fe1ec4b | 258 | uint8_t tempRegValue; |
vpcola | 0:a1734fe1ec4b | 259 | |
vpcola | 0:a1734fe1ec4b | 260 | /* Reads the QI register value */ |
vpcola | 0:a1734fe1ec4b | 261 | g_xStatus = SpiritSpiReadRegisters(QI_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 262 | |
vpcola | 0:a1734fe1ec4b | 263 | /* Rebuild and return the SQI threshold value */ |
vpcola | 0:a1734fe1ec4b | 264 | return (SqiThreshold)(tempRegValue & 0xC0); |
vpcola | 0:a1734fe1ec4b | 265 | |
vpcola | 0:a1734fe1ec4b | 266 | } |
vpcola | 0:a1734fe1ec4b | 267 | |
vpcola | 0:a1734fe1ec4b | 268 | |
vpcola | 0:a1734fe1ec4b | 269 | /** |
vpcola | 0:a1734fe1ec4b | 270 | * @brief Returns the PQI value. |
vpcola | 0:a1734fe1ec4b | 271 | * @param None. |
vpcola | 0:a1734fe1ec4b | 272 | * @retval uint8_t PQI value. |
vpcola | 0:a1734fe1ec4b | 273 | */ |
vpcola | 0:a1734fe1ec4b | 274 | uint8_t SpiritQiGetPqi(void) |
vpcola | 0:a1734fe1ec4b | 275 | { |
vpcola | 0:a1734fe1ec4b | 276 | uint8_t tempRegValue; |
vpcola | 0:a1734fe1ec4b | 277 | |
vpcola | 0:a1734fe1ec4b | 278 | /* Reads the LINK_QUALIF2 register value */ |
vpcola | 0:a1734fe1ec4b | 279 | g_xStatus = SpiritSpiReadRegisters(LINK_QUALIF2_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 280 | |
vpcola | 0:a1734fe1ec4b | 281 | /* Returns the PQI value */ |
vpcola | 0:a1734fe1ec4b | 282 | return tempRegValue; |
vpcola | 0:a1734fe1ec4b | 283 | |
vpcola | 0:a1734fe1ec4b | 284 | } |
vpcola | 0:a1734fe1ec4b | 285 | |
vpcola | 0:a1734fe1ec4b | 286 | |
vpcola | 0:a1734fe1ec4b | 287 | /** |
vpcola | 0:a1734fe1ec4b | 288 | * @brief Returns the SQI value. |
vpcola | 0:a1734fe1ec4b | 289 | * @param None. |
vpcola | 0:a1734fe1ec4b | 290 | * @retval uint8_t SQI value. |
vpcola | 0:a1734fe1ec4b | 291 | */ |
vpcola | 0:a1734fe1ec4b | 292 | uint8_t SpiritQiGetSqi(void) |
vpcola | 0:a1734fe1ec4b | 293 | { |
vpcola | 0:a1734fe1ec4b | 294 | uint8_t tempRegValue; |
vpcola | 0:a1734fe1ec4b | 295 | |
vpcola | 0:a1734fe1ec4b | 296 | /* Reads the register LINK_QUALIF1 value */ |
vpcola | 0:a1734fe1ec4b | 297 | g_xStatus = SpiritSpiReadRegisters(LINK_QUALIF1_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 298 | |
vpcola | 0:a1734fe1ec4b | 299 | /* Rebuild and return the SQI value */ |
vpcola | 0:a1734fe1ec4b | 300 | return (tempRegValue & 0x7F); |
vpcola | 0:a1734fe1ec4b | 301 | |
vpcola | 0:a1734fe1ec4b | 302 | } |
vpcola | 0:a1734fe1ec4b | 303 | |
vpcola | 0:a1734fe1ec4b | 304 | |
vpcola | 0:a1734fe1ec4b | 305 | /** |
vpcola | 0:a1734fe1ec4b | 306 | * @brief Returns the LQI value. |
vpcola | 0:a1734fe1ec4b | 307 | * @param None. |
vpcola | 0:a1734fe1ec4b | 308 | * @retval uint8_t LQI value. |
vpcola | 0:a1734fe1ec4b | 309 | */ |
vpcola | 0:a1734fe1ec4b | 310 | uint8_t SpiritQiGetLqi(void) |
vpcola | 0:a1734fe1ec4b | 311 | { |
vpcola | 0:a1734fe1ec4b | 312 | uint8_t tempRegValue; |
vpcola | 0:a1734fe1ec4b | 313 | |
vpcola | 0:a1734fe1ec4b | 314 | /* Reads the LINK_QUALIF0 register value */ |
vpcola | 0:a1734fe1ec4b | 315 | g_xStatus = SpiritSpiReadRegisters(LINK_QUALIF0_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 316 | |
vpcola | 0:a1734fe1ec4b | 317 | /* Rebuild and return the LQI value */ |
vpcola | 0:a1734fe1ec4b | 318 | return ((tempRegValue & 0xF0)>> 4); |
vpcola | 0:a1734fe1ec4b | 319 | |
vpcola | 0:a1734fe1ec4b | 320 | } |
vpcola | 0:a1734fe1ec4b | 321 | |
vpcola | 0:a1734fe1ec4b | 322 | |
vpcola | 0:a1734fe1ec4b | 323 | /** |
vpcola | 0:a1734fe1ec4b | 324 | * @brief Returns the CS status. |
vpcola | 0:a1734fe1ec4b | 325 | * @param None. |
vpcola | 0:a1734fe1ec4b | 326 | * @retval SpiritFlagStatus CS value (S_SET or S_RESET). |
vpcola | 0:a1734fe1ec4b | 327 | */ |
vpcola | 0:a1734fe1ec4b | 328 | SpiritFlagStatus SpiritQiGetCs(void) |
vpcola | 0:a1734fe1ec4b | 329 | { |
vpcola | 0:a1734fe1ec4b | 330 | uint8_t tempRegValue; |
vpcola | 0:a1734fe1ec4b | 331 | |
vpcola | 0:a1734fe1ec4b | 332 | /* Reads the LINK_QUALIF1 register value */ |
vpcola | 0:a1734fe1ec4b | 333 | g_xStatus = SpiritSpiReadRegisters(LINK_QUALIF1_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 334 | |
vpcola | 0:a1734fe1ec4b | 335 | /* Rebuild and returns the CS status value */ |
vpcola | 0:a1734fe1ec4b | 336 | if((tempRegValue & 0x80) == 0) |
vpcola | 0:a1734fe1ec4b | 337 | { |
vpcola | 0:a1734fe1ec4b | 338 | return S_RESET; |
vpcola | 0:a1734fe1ec4b | 339 | } |
vpcola | 0:a1734fe1ec4b | 340 | else |
vpcola | 0:a1734fe1ec4b | 341 | { |
vpcola | 0:a1734fe1ec4b | 342 | return S_SET; |
vpcola | 0:a1734fe1ec4b | 343 | } |
vpcola | 0:a1734fe1ec4b | 344 | |
vpcola | 0:a1734fe1ec4b | 345 | } |
vpcola | 0:a1734fe1ec4b | 346 | |
vpcola | 0:a1734fe1ec4b | 347 | |
vpcola | 0:a1734fe1ec4b | 348 | /** |
vpcola | 0:a1734fe1ec4b | 349 | * @brief Returns the RSSI value. The measured power is reported in steps of half a dB from 0 to 255 and is offset in such a way that -120 dBm corresponds |
vpcola | 0:a1734fe1ec4b | 350 | * to 20. |
vpcola | 0:a1734fe1ec4b | 351 | * @param None. |
vpcola | 0:a1734fe1ec4b | 352 | * @retval uint8_t RSSI value. |
vpcola | 0:a1734fe1ec4b | 353 | */ |
vpcola | 0:a1734fe1ec4b | 354 | uint8_t SpiritQiGetRssi(void) |
vpcola | 0:a1734fe1ec4b | 355 | { |
vpcola | 0:a1734fe1ec4b | 356 | uint8_t tempRegValue; |
vpcola | 0:a1734fe1ec4b | 357 | |
vpcola | 0:a1734fe1ec4b | 358 | /* Reads the RSSI_LEVEL register value */ |
vpcola | 0:a1734fe1ec4b | 359 | g_xStatus = SpiritSpiReadRegisters(RSSI_LEVEL_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 360 | |
vpcola | 0:a1734fe1ec4b | 361 | /* Returns the RSSI value */ |
vpcola | 0:a1734fe1ec4b | 362 | return tempRegValue; |
vpcola | 0:a1734fe1ec4b | 363 | |
vpcola | 0:a1734fe1ec4b | 364 | } |
vpcola | 0:a1734fe1ec4b | 365 | |
vpcola | 0:a1734fe1ec4b | 366 | |
vpcola | 0:a1734fe1ec4b | 367 | /** |
vpcola | 0:a1734fe1ec4b | 368 | * @brief Sets the RSSI threshold. |
vpcola | 0:a1734fe1ec4b | 369 | * @param cRssiThr RSSI threshold reported in steps of half a dBm with a -130 dBm offset. |
vpcola | 0:a1734fe1ec4b | 370 | * This parameter must be a uint8_t. |
vpcola | 0:a1734fe1ec4b | 371 | * @retval None. |
vpcola | 0:a1734fe1ec4b | 372 | */ |
vpcola | 0:a1734fe1ec4b | 373 | void SpiritQiSetRssiThreshold(uint8_t cRssiThr) |
vpcola | 0:a1734fe1ec4b | 374 | { |
vpcola | 0:a1734fe1ec4b | 375 | /* Writes the new value on the RSSI_TH register */ |
vpcola | 0:a1734fe1ec4b | 376 | g_xStatus = SpiritSpiWriteRegisters(RSSI_TH_BASE, 1, &cRssiThr); |
vpcola | 0:a1734fe1ec4b | 377 | |
vpcola | 0:a1734fe1ec4b | 378 | } |
vpcola | 0:a1734fe1ec4b | 379 | |
vpcola | 0:a1734fe1ec4b | 380 | |
vpcola | 0:a1734fe1ec4b | 381 | /** |
vpcola | 0:a1734fe1ec4b | 382 | * @brief Returns the RSSI threshold. |
vpcola | 0:a1734fe1ec4b | 383 | * @param None. |
vpcola | 0:a1734fe1ec4b | 384 | * @retval uint8_t RSSI threshold. |
vpcola | 0:a1734fe1ec4b | 385 | */ |
vpcola | 0:a1734fe1ec4b | 386 | uint8_t SpiritQiGetRssiThreshold(void) |
vpcola | 0:a1734fe1ec4b | 387 | { |
vpcola | 0:a1734fe1ec4b | 388 | uint8_t tempRegValue; |
vpcola | 0:a1734fe1ec4b | 389 | |
vpcola | 0:a1734fe1ec4b | 390 | /* Reads the RSSI_TH register value */ |
vpcola | 0:a1734fe1ec4b | 391 | g_xStatus = SpiritSpiReadRegisters(RSSI_TH_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 392 | |
vpcola | 0:a1734fe1ec4b | 393 | /* Returns RSSI threshold */ |
vpcola | 0:a1734fe1ec4b | 394 | return tempRegValue; |
vpcola | 0:a1734fe1ec4b | 395 | |
vpcola | 0:a1734fe1ec4b | 396 | } |
vpcola | 0:a1734fe1ec4b | 397 | |
vpcola | 0:a1734fe1ec4b | 398 | |
vpcola | 0:a1734fe1ec4b | 399 | /** |
vpcola | 0:a1734fe1ec4b | 400 | * @brief Computes the RSSI threshold from its dBm value according to the formula: (RSSI[Dbm] + 130)/0.5 |
vpcola | 0:a1734fe1ec4b | 401 | * @param nDbmValue RSSI threshold reported in dBm. |
vpcola | 0:a1734fe1ec4b | 402 | * This parameter must be a sint16_t. |
vpcola | 0:a1734fe1ec4b | 403 | * @retval uint8_t RSSI threshold corresponding to dBm value. |
vpcola | 0:a1734fe1ec4b | 404 | */ |
vpcola | 0:a1734fe1ec4b | 405 | uint8_t SpiritQiComputeRssiThreshold(int nDbmValue) |
vpcola | 0:a1734fe1ec4b | 406 | { |
vpcola | 0:a1734fe1ec4b | 407 | /* Check the parameters */ |
vpcola | 0:a1734fe1ec4b | 408 | s_assert_param(IS_RSSI_THR_DBM(nDbmValue)); |
vpcola | 0:a1734fe1ec4b | 409 | |
vpcola | 0:a1734fe1ec4b | 410 | /* Computes the RSSI threshold for register */ |
vpcola | 0:a1734fe1ec4b | 411 | return 2*(nDbmValue+130); |
vpcola | 0:a1734fe1ec4b | 412 | |
vpcola | 0:a1734fe1ec4b | 413 | } |
vpcola | 0:a1734fe1ec4b | 414 | |
vpcola | 0:a1734fe1ec4b | 415 | /** |
vpcola | 0:a1734fe1ec4b | 416 | * @brief Sets the RSSI threshold from its dBm value according to the formula: (RSSI[Dbm] + 130)/0.5. |
vpcola | 0:a1734fe1ec4b | 417 | * @param nDbmValue RSSI threshold reported in dBm. |
vpcola | 0:a1734fe1ec4b | 418 | * This parameter must be a sint16_t. |
vpcola | 0:a1734fe1ec4b | 419 | * @retval None. |
vpcola | 0:a1734fe1ec4b | 420 | */ |
vpcola | 0:a1734fe1ec4b | 421 | void SpiritQiSetRssiThresholddBm(int nDbmValue) |
vpcola | 0:a1734fe1ec4b | 422 | { |
vpcola | 0:a1734fe1ec4b | 423 | uint8_t tempRegValue=2*(nDbmValue+130); |
vpcola | 0:a1734fe1ec4b | 424 | |
vpcola | 0:a1734fe1ec4b | 425 | /* Check the parameters */ |
vpcola | 0:a1734fe1ec4b | 426 | s_assert_param(IS_RSSI_THR_DBM(nDbmValue)); |
vpcola | 0:a1734fe1ec4b | 427 | |
vpcola | 0:a1734fe1ec4b | 428 | /* Writes the new value on the RSSI_TH register */ |
vpcola | 0:a1734fe1ec4b | 429 | g_xStatus = SpiritSpiWriteRegisters(RSSI_TH_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 430 | |
vpcola | 0:a1734fe1ec4b | 431 | } |
vpcola | 0:a1734fe1ec4b | 432 | |
vpcola | 0:a1734fe1ec4b | 433 | /** |
vpcola | 0:a1734fe1ec4b | 434 | * @brief Sets the RSSI filter gain. This parameter sets the bandwidth of a low pass IIR filter (RSSI_FLT register, allowed values 0..15), a |
vpcola | 0:a1734fe1ec4b | 435 | * lower values gives a faster settling of the measurements but lower precision. The recommended value for such parameter is 14. |
vpcola | 0:a1734fe1ec4b | 436 | * @param xRssiFg RSSI filter gain value. |
vpcola | 0:a1734fe1ec4b | 437 | * This parameter can be any value of @ref RssiFilterGain. |
vpcola | 0:a1734fe1ec4b | 438 | * @retval None. |
vpcola | 0:a1734fe1ec4b | 439 | */ |
vpcola | 0:a1734fe1ec4b | 440 | void SpiritQiSetRssiFilterGain(RssiFilterGain xRssiFg) |
vpcola | 0:a1734fe1ec4b | 441 | { |
vpcola | 0:a1734fe1ec4b | 442 | uint8_t tempRegValue; |
vpcola | 0:a1734fe1ec4b | 443 | |
vpcola | 0:a1734fe1ec4b | 444 | /* Check the parameters */ |
vpcola | 0:a1734fe1ec4b | 445 | s_assert_param(IS_RSSI_FILTER_GAIN(xRssiFg)); |
vpcola | 0:a1734fe1ec4b | 446 | |
vpcola | 0:a1734fe1ec4b | 447 | /* Reads the RSSI_FLT register */ |
vpcola | 0:a1734fe1ec4b | 448 | g_xStatus = SpiritSpiReadRegisters(RSSI_FLT_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 449 | |
vpcola | 0:a1734fe1ec4b | 450 | /* Sets the specified filter gain */ |
vpcola | 0:a1734fe1ec4b | 451 | tempRegValue &= 0x0F; |
vpcola | 0:a1734fe1ec4b | 452 | tempRegValue |= ((uint8_t)xRssiFg); |
vpcola | 0:a1734fe1ec4b | 453 | |
vpcola | 0:a1734fe1ec4b | 454 | /* Writes the new value on the RSSI_FLT register */ |
vpcola | 0:a1734fe1ec4b | 455 | g_xStatus = SpiritSpiWriteRegisters(RSSI_FLT_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 456 | |
vpcola | 0:a1734fe1ec4b | 457 | } |
vpcola | 0:a1734fe1ec4b | 458 | |
vpcola | 0:a1734fe1ec4b | 459 | |
vpcola | 0:a1734fe1ec4b | 460 | /** |
vpcola | 0:a1734fe1ec4b | 461 | * @brief Returns the RSSI filter gain. |
vpcola | 0:a1734fe1ec4b | 462 | * @param None. |
vpcola | 0:a1734fe1ec4b | 463 | * @retval RssiFilterGain RSSI filter gain. |
vpcola | 0:a1734fe1ec4b | 464 | */ |
vpcola | 0:a1734fe1ec4b | 465 | RssiFilterGain SpiritQiGetRssiFilterGain(void) |
vpcola | 0:a1734fe1ec4b | 466 | { |
vpcola | 0:a1734fe1ec4b | 467 | uint8_t tempRegValue; |
vpcola | 0:a1734fe1ec4b | 468 | |
vpcola | 0:a1734fe1ec4b | 469 | /* Reads the RSSI_FLT register */ |
vpcola | 0:a1734fe1ec4b | 470 | g_xStatus = SpiritSpiReadRegisters(RSSI_FLT_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 471 | |
vpcola | 0:a1734fe1ec4b | 472 | /* Rebuild and returns the filter gain value */ |
vpcola | 0:a1734fe1ec4b | 473 | return (RssiFilterGain)(tempRegValue & 0xF0); |
vpcola | 0:a1734fe1ec4b | 474 | |
vpcola | 0:a1734fe1ec4b | 475 | } |
vpcola | 0:a1734fe1ec4b | 476 | |
vpcola | 0:a1734fe1ec4b | 477 | |
vpcola | 0:a1734fe1ec4b | 478 | /** |
vpcola | 0:a1734fe1ec4b | 479 | * @brief Sets the CS Mode. When static carrier sensing is used (cs_mode = 0), the carrier sense signal is asserted when the measured RSSI is above the |
vpcola | 0:a1734fe1ec4b | 480 | * value specified in the RSSI_TH register and is deasserted when the RSSI falls 3 dB below the same threshold. |
vpcola | 0:a1734fe1ec4b | 481 | * When dynamic carrier sense is used (cs_mode = 1, 2, 3), the carrier sense signal is asserted if the signal is above the |
vpcola | 0:a1734fe1ec4b | 482 | * threshold and a fast power increase of 6, 12 or 18 dB is detected; it is deasserted if a power fall of the same amplitude is |
vpcola | 0:a1734fe1ec4b | 483 | * detected. |
vpcola | 0:a1734fe1ec4b | 484 | * @param xCsMode CS mode selector. |
vpcola | 0:a1734fe1ec4b | 485 | * This parameter can be any value of @ref CSMode. |
vpcola | 0:a1734fe1ec4b | 486 | * @retval None. |
vpcola | 0:a1734fe1ec4b | 487 | */ |
vpcola | 0:a1734fe1ec4b | 488 | void SpiritQiSetCsMode(CSMode xCsMode) |
vpcola | 0:a1734fe1ec4b | 489 | { |
vpcola | 0:a1734fe1ec4b | 490 | uint8_t tempRegValue; |
vpcola | 0:a1734fe1ec4b | 491 | |
vpcola | 0:a1734fe1ec4b | 492 | /* Check the parameters */ |
vpcola | 0:a1734fe1ec4b | 493 | s_assert_param(IS_CS_MODE(xCsMode)); |
vpcola | 0:a1734fe1ec4b | 494 | |
vpcola | 0:a1734fe1ec4b | 495 | /* Reads the RSSI_FLT register */ |
vpcola | 0:a1734fe1ec4b | 496 | g_xStatus = SpiritSpiReadRegisters(RSSI_FLT_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 497 | |
vpcola | 0:a1734fe1ec4b | 498 | /* Sets bit to select the CS mode */ |
vpcola | 0:a1734fe1ec4b | 499 | tempRegValue &= ~0x0C; |
vpcola | 0:a1734fe1ec4b | 500 | tempRegValue |= ((uint8_t)xCsMode); |
vpcola | 0:a1734fe1ec4b | 501 | |
vpcola | 0:a1734fe1ec4b | 502 | /* Writes the new value on the RSSI_FLT register */ |
vpcola | 0:a1734fe1ec4b | 503 | g_xStatus = SpiritSpiWriteRegisters(RSSI_FLT_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 504 | |
vpcola | 0:a1734fe1ec4b | 505 | } |
vpcola | 0:a1734fe1ec4b | 506 | |
vpcola | 0:a1734fe1ec4b | 507 | |
vpcola | 0:a1734fe1ec4b | 508 | /** |
vpcola | 0:a1734fe1ec4b | 509 | * @brief Returns the CS Mode. |
vpcola | 0:a1734fe1ec4b | 510 | * @param None. |
vpcola | 0:a1734fe1ec4b | 511 | * @retval CSMode CS mode. |
vpcola | 0:a1734fe1ec4b | 512 | */ |
vpcola | 0:a1734fe1ec4b | 513 | CSMode SpiritQiGetCsMode(void) |
vpcola | 0:a1734fe1ec4b | 514 | { |
vpcola | 0:a1734fe1ec4b | 515 | uint8_t tempRegValue; |
vpcola | 0:a1734fe1ec4b | 516 | |
vpcola | 0:a1734fe1ec4b | 517 | /* Reads the RSSI_FLT register */ |
vpcola | 0:a1734fe1ec4b | 518 | g_xStatus = SpiritSpiReadRegisters(RSSI_FLT_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 519 | |
vpcola | 0:a1734fe1ec4b | 520 | /* Rebuild and returns the CS mode value */ |
vpcola | 0:a1734fe1ec4b | 521 | return (CSMode)(tempRegValue & 0x0C); |
vpcola | 0:a1734fe1ec4b | 522 | |
vpcola | 0:a1734fe1ec4b | 523 | } |
vpcola | 0:a1734fe1ec4b | 524 | |
vpcola | 0:a1734fe1ec4b | 525 | /** |
vpcola | 0:a1734fe1ec4b | 526 | * @brief Enables/Disables the CS Timeout Mask. If enabled CS value contributes to timeout disabling. |
vpcola | 0:a1734fe1ec4b | 527 | * @param xNewState new state for CS Timeout Mask. |
vpcola | 0:a1734fe1ec4b | 528 | * This parameter can be S_ENABLE or S_DISABLE. |
vpcola | 0:a1734fe1ec4b | 529 | * @retval None. |
vpcola | 0:a1734fe1ec4b | 530 | */ |
vpcola | 0:a1734fe1ec4b | 531 | void SpiritQiCsTimeoutMask(SpiritFunctionalState xNewState) |
vpcola | 0:a1734fe1ec4b | 532 | { |
vpcola | 0:a1734fe1ec4b | 533 | uint8_t tempRegValue; |
vpcola | 0:a1734fe1ec4b | 534 | |
vpcola | 0:a1734fe1ec4b | 535 | /* Check the parameters */ |
vpcola | 0:a1734fe1ec4b | 536 | s_assert_param(IS_SPIRIT_FUNCTIONAL_STATE(xNewState)); |
vpcola | 0:a1734fe1ec4b | 537 | |
vpcola | 0:a1734fe1ec4b | 538 | /* Reads the PROTOCOL2 register value */ |
vpcola | 0:a1734fe1ec4b | 539 | g_xStatus = SpiritSpiReadRegisters(PROTOCOL2_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 540 | |
vpcola | 0:a1734fe1ec4b | 541 | /* Enables or disables the CS timeout mask */ |
vpcola | 0:a1734fe1ec4b | 542 | if(xNewState == S_ENABLE) |
vpcola | 0:a1734fe1ec4b | 543 | { |
vpcola | 0:a1734fe1ec4b | 544 | tempRegValue |= PROTOCOL2_CS_TIMEOUT_MASK; |
vpcola | 0:a1734fe1ec4b | 545 | } |
vpcola | 0:a1734fe1ec4b | 546 | else |
vpcola | 0:a1734fe1ec4b | 547 | { |
vpcola | 0:a1734fe1ec4b | 548 | tempRegValue &= ~PROTOCOL2_CS_TIMEOUT_MASK; |
vpcola | 0:a1734fe1ec4b | 549 | } |
vpcola | 0:a1734fe1ec4b | 550 | |
vpcola | 0:a1734fe1ec4b | 551 | /* Writes the new value on the PROTOCOL2 register */ |
vpcola | 0:a1734fe1ec4b | 552 | g_xStatus = SpiritSpiWriteRegisters(PROTOCOL2_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 553 | |
vpcola | 0:a1734fe1ec4b | 554 | } |
vpcola | 0:a1734fe1ec4b | 555 | |
vpcola | 0:a1734fe1ec4b | 556 | |
vpcola | 0:a1734fe1ec4b | 557 | /** |
vpcola | 0:a1734fe1ec4b | 558 | * @brief Enables/Disables the PQI Timeout Mask. If enabled PQI value contributes to timeout disabling. |
vpcola | 0:a1734fe1ec4b | 559 | * @param xNewState new state for PQI Timeout Mask. |
vpcola | 0:a1734fe1ec4b | 560 | * This parameter can be S_ENABLE or S_DISABLE. |
vpcola | 0:a1734fe1ec4b | 561 | * @retval None. |
vpcola | 0:a1734fe1ec4b | 562 | */ |
vpcola | 0:a1734fe1ec4b | 563 | void SpiritQiPqiTimeoutMask(SpiritFunctionalState xNewState) |
vpcola | 0:a1734fe1ec4b | 564 | { |
vpcola | 0:a1734fe1ec4b | 565 | uint8_t tempRegValue; |
vpcola | 0:a1734fe1ec4b | 566 | |
vpcola | 0:a1734fe1ec4b | 567 | /* Check the parameters */ |
vpcola | 0:a1734fe1ec4b | 568 | s_assert_param(IS_SPIRIT_FUNCTIONAL_STATE(xNewState)); |
vpcola | 0:a1734fe1ec4b | 569 | |
vpcola | 0:a1734fe1ec4b | 570 | /* Reads the PROTOCOL2 register */ |
vpcola | 0:a1734fe1ec4b | 571 | g_xStatus = SpiritSpiReadRegisters(PROTOCOL2_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 572 | |
vpcola | 0:a1734fe1ec4b | 573 | /* Enables or disables the PQI timeout mask */ |
vpcola | 0:a1734fe1ec4b | 574 | if(xNewState == S_ENABLE) |
vpcola | 0:a1734fe1ec4b | 575 | { |
vpcola | 0:a1734fe1ec4b | 576 | tempRegValue |= PROTOCOL2_PQI_TIMEOUT_MASK; |
vpcola | 0:a1734fe1ec4b | 577 | } |
vpcola | 0:a1734fe1ec4b | 578 | else |
vpcola | 0:a1734fe1ec4b | 579 | { |
vpcola | 0:a1734fe1ec4b | 580 | tempRegValue &= ~PROTOCOL2_PQI_TIMEOUT_MASK; |
vpcola | 0:a1734fe1ec4b | 581 | } |
vpcola | 0:a1734fe1ec4b | 582 | |
vpcola | 0:a1734fe1ec4b | 583 | /* Writes the new value on the PROTOCOL2 register */ |
vpcola | 0:a1734fe1ec4b | 584 | g_xStatus = SpiritSpiWriteRegisters(PROTOCOL2_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 585 | |
vpcola | 0:a1734fe1ec4b | 586 | } |
vpcola | 0:a1734fe1ec4b | 587 | |
vpcola | 0:a1734fe1ec4b | 588 | |
vpcola | 0:a1734fe1ec4b | 589 | /** |
vpcola | 0:a1734fe1ec4b | 590 | * @brief Enables/Disables the SQI Timeout Mask. If enabled SQI value contributes to timeout disabling. |
vpcola | 0:a1734fe1ec4b | 591 | * @param xNewState new state for SQI Timeout Mask. |
vpcola | 0:a1734fe1ec4b | 592 | * This parameter can be S_ENABLE or S_DISABLE. |
vpcola | 0:a1734fe1ec4b | 593 | * @retval None. |
vpcola | 0:a1734fe1ec4b | 594 | */ |
vpcola | 0:a1734fe1ec4b | 595 | void SpiritQiSqiTimeoutMask(SpiritFunctionalState xNewState) |
vpcola | 0:a1734fe1ec4b | 596 | { |
vpcola | 0:a1734fe1ec4b | 597 | uint8_t tempRegValue; |
vpcola | 0:a1734fe1ec4b | 598 | |
vpcola | 0:a1734fe1ec4b | 599 | /* Check the parameters */ |
vpcola | 0:a1734fe1ec4b | 600 | s_assert_param(IS_SPIRIT_FUNCTIONAL_STATE(xNewState)); |
vpcola | 0:a1734fe1ec4b | 601 | |
vpcola | 0:a1734fe1ec4b | 602 | /* Reads the PROTOCOL2 register */ |
vpcola | 0:a1734fe1ec4b | 603 | g_xStatus = SpiritSpiReadRegisters(PROTOCOL2_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 604 | |
vpcola | 0:a1734fe1ec4b | 605 | /* Enables or disables the SQI timeout mask */ |
vpcola | 0:a1734fe1ec4b | 606 | if(xNewState == S_ENABLE) |
vpcola | 0:a1734fe1ec4b | 607 | { |
vpcola | 0:a1734fe1ec4b | 608 | tempRegValue |= PROTOCOL2_SQI_TIMEOUT_MASK; |
vpcola | 0:a1734fe1ec4b | 609 | } |
vpcola | 0:a1734fe1ec4b | 610 | else |
vpcola | 0:a1734fe1ec4b | 611 | { |
vpcola | 0:a1734fe1ec4b | 612 | tempRegValue &= ~PROTOCOL2_SQI_TIMEOUT_MASK; |
vpcola | 0:a1734fe1ec4b | 613 | } |
vpcola | 0:a1734fe1ec4b | 614 | |
vpcola | 0:a1734fe1ec4b | 615 | /* Writes the new value on the PROTOCOL2 register */ |
vpcola | 0:a1734fe1ec4b | 616 | g_xStatus = SpiritSpiWriteRegisters(PROTOCOL2_BASE, 1, &tempRegValue); |
vpcola | 0:a1734fe1ec4b | 617 | |
vpcola | 0:a1734fe1ec4b | 618 | } |
vpcola | 0:a1734fe1ec4b | 619 | |
vpcola | 0:a1734fe1ec4b | 620 | |
vpcola | 0:a1734fe1ec4b | 621 | /** |
vpcola | 0:a1734fe1ec4b | 622 | *@} |
vpcola | 0:a1734fe1ec4b | 623 | */ |
vpcola | 0:a1734fe1ec4b | 624 | |
vpcola | 0:a1734fe1ec4b | 625 | /** |
vpcola | 0:a1734fe1ec4b | 626 | *@} |
vpcola | 0:a1734fe1ec4b | 627 | */ |
vpcola | 0:a1734fe1ec4b | 628 | |
vpcola | 0:a1734fe1ec4b | 629 | |
vpcola | 0:a1734fe1ec4b | 630 | /** |
vpcola | 0:a1734fe1ec4b | 631 | *@} |
vpcola | 0:a1734fe1ec4b | 632 | */ |
vpcola | 0:a1734fe1ec4b | 633 | |
vpcola | 0:a1734fe1ec4b | 634 | |
vpcola | 0:a1734fe1ec4b | 635 | |
vpcola | 0:a1734fe1ec4b | 636 | /******************* (C) COPYRIGHT 2015 STMicroelectronics *****END OF FILE****/ |