Vergil Cola / Mbed OS MQTTGateway2

Fork of my original MQTTGateway

Dependencies:   mbed-http

easy-connect/stm-spirit1-rf-driver/source/libs/spirit1/SPIRIT1_Library/Src/SPIRIT_Irq.c@0:a1734fe1ec4b, 2017-04-08 (annotated)

Committer:
vpcola
Date:
Sat Apr 08 14:43:14 2017 +0000
Revision:
0:a1734fe1ec4b
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
vpcola 0:a1734fe1ec4b 1 /**
vpcola 0:a1734fe1ec4b 2 ******************************************************************************
vpcola 0:a1734fe1ec4b 3 * @file SPIRIT_Irq.c
vpcola 0:a1734fe1ec4b 4 * @author VMA division - AMS
vpcola 0:a1734fe1ec4b 5 * @version 3.2.2
vpcola 0:a1734fe1ec4b 6 * @date 08-July-2015
vpcola 0:a1734fe1ec4b 7 * @brief Configuration and management of SPIRIT IRQs.
vpcola 0:a1734fe1ec4b 8 * @details
vpcola 0:a1734fe1ec4b 9 *
vpcola 0:a1734fe1ec4b 10 * @attention
vpcola 0:a1734fe1ec4b 11 *
vpcola 0:a1734fe1ec4b 12 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
vpcola 0:a1734fe1ec4b 13 *
vpcola 0:a1734fe1ec4b 14 * Redistribution and use in source and binary forms, with or without modification,
vpcola 0:a1734fe1ec4b 15 * are permitted provided that the following conditions are met:
vpcola 0:a1734fe1ec4b 16 * 1. Redistributions of source code must retain the above copyright notice,
vpcola 0:a1734fe1ec4b 17 * this list of conditions and the following disclaimer.
vpcola 0:a1734fe1ec4b 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
vpcola 0:a1734fe1ec4b 19 * this list of conditions and the following disclaimer in the documentation
vpcola 0:a1734fe1ec4b 20 * and/or other materials provided with the distribution.
vpcola 0:a1734fe1ec4b 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
vpcola 0:a1734fe1ec4b 22 * may be used to endorse or promote products derived from this software
vpcola 0:a1734fe1ec4b 23 * without specific prior written permission.
vpcola 0:a1734fe1ec4b 24 *
vpcola 0:a1734fe1ec4b 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
vpcola 0:a1734fe1ec4b 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
vpcola 0:a1734fe1ec4b 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
vpcola 0:a1734fe1ec4b 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
vpcola 0:a1734fe1ec4b 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
vpcola 0:a1734fe1ec4b 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
vpcola 0:a1734fe1ec4b 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
vpcola 0:a1734fe1ec4b 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
vpcola 0:a1734fe1ec4b 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
vpcola 0:a1734fe1ec4b 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
vpcola 0:a1734fe1ec4b 35 *
vpcola 0:a1734fe1ec4b 36 ******************************************************************************
vpcola 0:a1734fe1ec4b 37 */
vpcola 0:a1734fe1ec4b 38
vpcola 0:a1734fe1ec4b 39 /* Includes ------------------------------------------------------------------*/
vpcola 0:a1734fe1ec4b 40 #include "SPIRIT_Irq.h"
vpcola 0:a1734fe1ec4b 41 #include "MCU_Interface.h"
vpcola 0:a1734fe1ec4b 42
vpcola 0:a1734fe1ec4b 43
vpcola 0:a1734fe1ec4b 44
vpcola 0:a1734fe1ec4b 45 /**
vpcola 0:a1734fe1ec4b 46 * @addtogroup SPIRIT_Libraries
vpcola 0:a1734fe1ec4b 47 * @{
vpcola 0:a1734fe1ec4b 48 */
vpcola 0:a1734fe1ec4b 49
vpcola 0:a1734fe1ec4b 50
vpcola 0:a1734fe1ec4b 51 /**
vpcola 0:a1734fe1ec4b 52 * @addtogroup SPIRIT_Irq
vpcola 0:a1734fe1ec4b 53 * @{
vpcola 0:a1734fe1ec4b 54 */
vpcola 0:a1734fe1ec4b 55
vpcola 0:a1734fe1ec4b 56
vpcola 0:a1734fe1ec4b 57 /**
vpcola 0:a1734fe1ec4b 58 * @defgroup Irq_Private_TypesDefinitions IRQ Private Types Definitions
vpcola 0:a1734fe1ec4b 59 * @{
vpcola 0:a1734fe1ec4b 60 */
vpcola 0:a1734fe1ec4b 61
vpcola 0:a1734fe1ec4b 62 /**
vpcola 0:a1734fe1ec4b 63 *@}
vpcola 0:a1734fe1ec4b 64 */
vpcola 0:a1734fe1ec4b 65
vpcola 0:a1734fe1ec4b 66
vpcola 0:a1734fe1ec4b 67 /**
vpcola 0:a1734fe1ec4b 68 * @defgroup Irq_Private_Defines IRQ Private Defines
vpcola 0:a1734fe1ec4b 69 * @{
vpcola 0:a1734fe1ec4b 70 */
vpcola 0:a1734fe1ec4b 71
vpcola 0:a1734fe1ec4b 72 /**
vpcola 0:a1734fe1ec4b 73 *@}
vpcola 0:a1734fe1ec4b 74 */
vpcola 0:a1734fe1ec4b 75
vpcola 0:a1734fe1ec4b 76
vpcola 0:a1734fe1ec4b 77 /**
vpcola 0:a1734fe1ec4b 78 * @defgroup Irq_Private_Macros IRQ Private Macros
vpcola 0:a1734fe1ec4b 79 * @{
vpcola 0:a1734fe1ec4b 80 */
vpcola 0:a1734fe1ec4b 81
vpcola 0:a1734fe1ec4b 82 /**
vpcola 0:a1734fe1ec4b 83 *@}
vpcola 0:a1734fe1ec4b 84 */
vpcola 0:a1734fe1ec4b 85
vpcola 0:a1734fe1ec4b 86
vpcola 0:a1734fe1ec4b 87 /**
vpcola 0:a1734fe1ec4b 88 * @defgroup Irq_Private_Variables IRQ Private Variables
vpcola 0:a1734fe1ec4b 89 * @{
vpcola 0:a1734fe1ec4b 90 */
vpcola 0:a1734fe1ec4b 91
vpcola 0:a1734fe1ec4b 92
vpcola 0:a1734fe1ec4b 93 /**
vpcola 0:a1734fe1ec4b 94 *@}
vpcola 0:a1734fe1ec4b 95 */
vpcola 0:a1734fe1ec4b 96
vpcola 0:a1734fe1ec4b 97
vpcola 0:a1734fe1ec4b 98 /**
vpcola 0:a1734fe1ec4b 99 * @defgroup Irq_Private_FunctionPrototypes IRQ Private Function Prototypes
vpcola 0:a1734fe1ec4b 100 * @{
vpcola 0:a1734fe1ec4b 101 */
vpcola 0:a1734fe1ec4b 102
vpcola 0:a1734fe1ec4b 103 /**
vpcola 0:a1734fe1ec4b 104 *@}
vpcola 0:a1734fe1ec4b 105 */
vpcola 0:a1734fe1ec4b 106
vpcola 0:a1734fe1ec4b 107
vpcola 0:a1734fe1ec4b 108 /**
vpcola 0:a1734fe1ec4b 109 * @defgroup Irq_Private_Functions IRQ Private Functions
vpcola 0:a1734fe1ec4b 110 * @{
vpcola 0:a1734fe1ec4b 111 */
vpcola 0:a1734fe1ec4b 112
vpcola 0:a1734fe1ec4b 113
vpcola 0:a1734fe1ec4b 114 /**
vpcola 0:a1734fe1ec4b 115 * @brief De initializate the SpiritIrqs structure setting all the bitfield to 0.
vpcola 0:a1734fe1ec4b 116 * Moreover, it sets the IRQ mask registers to 0x00000000, disabling all IRQs.
vpcola 0:a1734fe1ec4b 117 * @param pxIrqInit pointer to a variable of type @ref SpiritIrqs, in which all the
vpcola 0:a1734fe1ec4b 118 * bitfields will be settled to zero.
vpcola 0:a1734fe1ec4b 119 * @retval None.
vpcola 0:a1734fe1ec4b 120 */
vpcola 0:a1734fe1ec4b 121 void SpiritIrqDeInit(SpiritIrqs* pxIrqInit)
vpcola 0:a1734fe1ec4b 122 {
vpcola 0:a1734fe1ec4b 123 uint8_t tempRegValue[4]={0x00,0x00,0x00,0x00};
vpcola 0:a1734fe1ec4b 124
vpcola 0:a1734fe1ec4b 125 if(pxIrqInit!=NULL)
vpcola 0:a1734fe1ec4b 126 {
vpcola 0:a1734fe1ec4b 127 /* Sets the bitfields of passed structure to one */
vpcola 0:a1734fe1ec4b 128 *(uint32_t*)pxIrqInit = 0x0;
vpcola 0:a1734fe1ec4b 129 }
vpcola 0:a1734fe1ec4b 130
vpcola 0:a1734fe1ec4b 131 /* Writes the IRQ_MASK registers */
vpcola 0:a1734fe1ec4b 132 g_xStatus = SpiritSpiWriteRegisters(IRQ_MASK3_BASE, 4, tempRegValue);
vpcola 0:a1734fe1ec4b 133 }
vpcola 0:a1734fe1ec4b 134
vpcola 0:a1734fe1ec4b 135
vpcola 0:a1734fe1ec4b 136 /**
vpcola 0:a1734fe1ec4b 137 * @brief Enables all the IRQs according to the user defined pxIrqInit structure.
vpcola 0:a1734fe1ec4b 138 * @param pxIrqInit pointer to a variable of type @ref SpiritIrqs, through which the
vpcola 0:a1734fe1ec4b 139 * user enable specific IRQs. This parameter is a pointer to a SpiritIrqs.
vpcola 0:a1734fe1ec4b 140 * For example suppose to enable only the two IRQ Low Battery Level and Tx Data Sent:
vpcola 0:a1734fe1ec4b 141 * @code
vpcola 0:a1734fe1ec4b 142 * SpiritIrqs myIrqInit = {0};
vpcola 0:a1734fe1ec4b 143 * myIrqInit.IRQ_LOW_BATT_LVL = 1;
vpcola 0:a1734fe1ec4b 144 * myIrqInit.IRQ_TX_DATA_SENT = 1;
vpcola 0:a1734fe1ec4b 145 * SpiritIrqInit(&myIrqInit);
vpcola 0:a1734fe1ec4b 146 * @endcode
vpcola 0:a1734fe1ec4b 147 * @retval None.
vpcola 0:a1734fe1ec4b 148 */
vpcola 0:a1734fe1ec4b 149 void SpiritIrqInit(SpiritIrqs* pxIrqInit)
vpcola 0:a1734fe1ec4b 150 {
vpcola 0:a1734fe1ec4b 151 /* Writes the IRQ_MASK registers */
vpcola 0:a1734fe1ec4b 152 g_xStatus = SpiritSpiWriteRegisters(IRQ_MASK3_BASE, 4, (uint8_t*)pxIrqInit);
vpcola 0:a1734fe1ec4b 153
vpcola 0:a1734fe1ec4b 154 }
vpcola 0:a1734fe1ec4b 155
vpcola 0:a1734fe1ec4b 156
vpcola 0:a1734fe1ec4b 157 /**
vpcola 0:a1734fe1ec4b 158 * @brief Enables or disables a specific IRQ.
vpcola 0:a1734fe1ec4b 159 * @param xIrq IRQ to enable or disable.
vpcola 0:a1734fe1ec4b 160 * This parameter can be any value of @ref IrqList.
vpcola 0:a1734fe1ec4b 161 * @param xNewState new state for the IRQ.
vpcola 0:a1734fe1ec4b 162 * This parameter can be: S_ENABLE or S_DISABLE.
vpcola 0:a1734fe1ec4b 163 * @retval None.
vpcola 0:a1734fe1ec4b 164 */
vpcola 0:a1734fe1ec4b 165 void SpiritIrq(IrqList xIrq, SpiritFunctionalState xNewState)
vpcola 0:a1734fe1ec4b 166 {
vpcola 0:a1734fe1ec4b 167 uint8_t tempRegValue[4];
vpcola 0:a1734fe1ec4b 168 uint32_t tempValue = 0;
vpcola 0:a1734fe1ec4b 169
vpcola 0:a1734fe1ec4b 170 /* Check the parameters */
vpcola 0:a1734fe1ec4b 171 s_assert_param(IS_SPIRIT_IRQ_LIST(xIrq));
vpcola 0:a1734fe1ec4b 172 s_assert_param(IS_SPIRIT_FUNCTIONAL_STATE(xNewState));
vpcola 0:a1734fe1ec4b 173
vpcola 0:a1734fe1ec4b 174 /* Reads the IRQ_MASK registers */
vpcola 0:a1734fe1ec4b 175 g_xStatus = SpiritSpiReadRegisters(IRQ_MASK3_BASE, 4, tempRegValue);
vpcola 0:a1734fe1ec4b 176
vpcola 0:a1734fe1ec4b 177 /* Build the IRQ mask word */
vpcola 0:a1734fe1ec4b 178 for(uint8_t i=0; i<4; i++)
vpcola 0:a1734fe1ec4b 179 {
vpcola 0:a1734fe1ec4b 180 tempValue += ((uint32_t)tempRegValue[i])<<(8*(3-i));
vpcola 0:a1734fe1ec4b 181 }
vpcola 0:a1734fe1ec4b 182
vpcola 0:a1734fe1ec4b 183 /* Rebuild the new mask according to user request */
vpcola 0:a1734fe1ec4b 184 if(xNewState == S_DISABLE)
vpcola 0:a1734fe1ec4b 185 {
vpcola 0:a1734fe1ec4b 186 tempValue &= (~xIrq);
vpcola 0:a1734fe1ec4b 187 }
vpcola 0:a1734fe1ec4b 188 else
vpcola 0:a1734fe1ec4b 189 {
vpcola 0:a1734fe1ec4b 190 tempValue |= (xIrq);
vpcola 0:a1734fe1ec4b 191 }
vpcola 0:a1734fe1ec4b 192
vpcola 0:a1734fe1ec4b 193 /* Build the array of bytes to write in the IRQ_MASK registers */
vpcola 0:a1734fe1ec4b 194 for(uint8_t j=0; j<4; j++)
vpcola 0:a1734fe1ec4b 195 {
vpcola 0:a1734fe1ec4b 196 tempRegValue[j] = (uint8_t)(tempValue>>(8*(3-j)));
vpcola 0:a1734fe1ec4b 197 }
vpcola 0:a1734fe1ec4b 198
vpcola 0:a1734fe1ec4b 199 /* Writes the new IRQ mask in the corresponding registers */
vpcola 0:a1734fe1ec4b 200 g_xStatus = SpiritSpiWriteRegisters(IRQ_MASK3_BASE, 4, tempRegValue);
vpcola 0:a1734fe1ec4b 201
vpcola 0:a1734fe1ec4b 202 }
vpcola 0:a1734fe1ec4b 203
vpcola 0:a1734fe1ec4b 204
vpcola 0:a1734fe1ec4b 205 /**
vpcola 0:a1734fe1ec4b 206 * @brief Fills a pointer to a structure of SpiritIrqs type reading the IRQ_MASK registers.
vpcola 0:a1734fe1ec4b 207 * @param pxIrqMask pointer to a variable of type @ref SpiritIrqs, through which the
vpcola 0:a1734fe1ec4b 208 * user can read which IRQs are enabled. All the bitfields equals to zero correspond
vpcola 0:a1734fe1ec4b 209 * to enabled IRQs, while all the bitfields equals to one correspond to disabled IRQs.
vpcola 0:a1734fe1ec4b 210 * This parameter is a pointer to a SpiritIrqs.
vpcola 0:a1734fe1ec4b 211 * For example suppose that the Power On Reset and RX Data ready are the only enabled IRQs.
vpcola 0:a1734fe1ec4b 212 * @code
vpcola 0:a1734fe1ec4b 213 * SpiritIrqs myIrqMask;
vpcola 0:a1734fe1ec4b 214 * SpiritIrqGetStatus(&myIrqMask);
vpcola 0:a1734fe1ec4b 215 * @endcode
vpcola 0:a1734fe1ec4b 216 * Then
vpcola 0:a1734fe1ec4b 217 * myIrqMask.IRQ_POR and myIrqMask.IRQ_RX_DATA_READY are equal to 0
vpcola 0:a1734fe1ec4b 218 * while all the other bitfields are equal to one.
vpcola 0:a1734fe1ec4b 219 * @retval None.
vpcola 0:a1734fe1ec4b 220 */
vpcola 0:a1734fe1ec4b 221 void SpiritIrqGetMask(SpiritIrqs* pxIrqMask)
vpcola 0:a1734fe1ec4b 222 {
vpcola 0:a1734fe1ec4b 223 /* Reads IRQ_MASK registers */
vpcola 0:a1734fe1ec4b 224 g_xStatus = SpiritSpiReadRegisters(IRQ_MASK3_BASE, 4, (uint8_t*)pxIrqMask);
vpcola 0:a1734fe1ec4b 225 }
vpcola 0:a1734fe1ec4b 226
vpcola 0:a1734fe1ec4b 227
vpcola 0:a1734fe1ec4b 228 /**
vpcola 0:a1734fe1ec4b 229 * @brief Filla a pointer to a structure of SpiritIrqs type reading the IRQ_STATUS registers.
vpcola 0:a1734fe1ec4b 230 * @param pxIrqStatus pointer to a variable of type @ref SpiritIrqs, through which the
vpcola 0:a1734fe1ec4b 231 * user can read the status of all the IRQs. All the bitfields equals to one correspond
vpcola 0:a1734fe1ec4b 232 * to the raised interrupts. This parameter is a pointer to a SpiritIrqs.
vpcola 0:a1734fe1ec4b 233 * For example suppose that the XO settling timeout is raised as well as the Sync word
vpcola 0:a1734fe1ec4b 234 * detection.
vpcola 0:a1734fe1ec4b 235 * @code
vpcola 0:a1734fe1ec4b 236 * SpiritIrqs myIrqStatus;
vpcola 0:a1734fe1ec4b 237 * SpiritIrqGetStatus(&myIrqStatus);
vpcola 0:a1734fe1ec4b 238 * @endcode
vpcola 0:a1734fe1ec4b 239 * Then
vpcola 0:a1734fe1ec4b 240 * myIrqStatus.IRQ_XO_COUNT_EXPIRED and myIrqStatus.IRQ_VALID_SYNC are equals to 1
vpcola 0:a1734fe1ec4b 241 * while all the other bitfields are equals to zero.
vpcola 0:a1734fe1ec4b 242 * @retval None.
vpcola 0:a1734fe1ec4b 243 */
vpcola 0:a1734fe1ec4b 244 void SpiritIrqGetStatus(SpiritIrqs* pxIrqStatus)
vpcola 0:a1734fe1ec4b 245 {
vpcola 0:a1734fe1ec4b 246 /* Reads IRQ_STATUS registers */
vpcola 0:a1734fe1ec4b 247 g_xStatus = SpiritSpiReadRegisters(IRQ_STATUS3_BASE, 4, (uint8_t*)pxIrqStatus);
vpcola 0:a1734fe1ec4b 248 }
vpcola 0:a1734fe1ec4b 249
vpcola 0:a1734fe1ec4b 250
vpcola 0:a1734fe1ec4b 251 /**
vpcola 0:a1734fe1ec4b 252 * @brief Clear the IRQ status registers.
vpcola 0:a1734fe1ec4b 253 * @param None.
vpcola 0:a1734fe1ec4b 254 * @retval None.
vpcola 0:a1734fe1ec4b 255 */
vpcola 0:a1734fe1ec4b 256 void SpiritIrqClearStatus(void)
vpcola 0:a1734fe1ec4b 257 {
vpcola 0:a1734fe1ec4b 258 uint8_t tempRegValue[4];
vpcola 0:a1734fe1ec4b 259
vpcola 0:a1734fe1ec4b 260 /* Reads the IRQ_STATUS registers clearing all the flags */
vpcola 0:a1734fe1ec4b 261 g_xStatus = SpiritSpiReadRegisters(IRQ_STATUS3_BASE, 4, tempRegValue);
vpcola 0:a1734fe1ec4b 262
vpcola 0:a1734fe1ec4b 263 }
vpcola 0:a1734fe1ec4b 264
vpcola 0:a1734fe1ec4b 265
vpcola 0:a1734fe1ec4b 266 /**
vpcola 0:a1734fe1ec4b 267 * @brief Verifies if a specific IRQ has been generated.
vpcola 0:a1734fe1ec4b 268 * The call resets all the IRQ status, so it can't be used in case of multiple raising interrupts.
vpcola 0:a1734fe1ec4b 269 * @param xFlag IRQ flag to be checked.
vpcola 0:a1734fe1ec4b 270 * This parameter can be any value of @ref IrqList.
vpcola 0:a1734fe1ec4b 271 * @retval SpiritBool S_TRUE or S_FALSE.
vpcola 0:a1734fe1ec4b 272 */
vpcola 0:a1734fe1ec4b 273 SpiritBool SpiritIrqCheckFlag(IrqList xFlag)
vpcola 0:a1734fe1ec4b 274 {
vpcola 0:a1734fe1ec4b 275 uint8_t tempRegValue[4];
vpcola 0:a1734fe1ec4b 276 uint32_t tempValue = 0;
vpcola 0:a1734fe1ec4b 277 SpiritBool flag;
vpcola 0:a1734fe1ec4b 278
vpcola 0:a1734fe1ec4b 279 /* Check the parameters */
vpcola 0:a1734fe1ec4b 280 s_assert_param(IS_SPIRIT_IRQ_LIST(xFlag));
vpcola 0:a1734fe1ec4b 281
vpcola 0:a1734fe1ec4b 282 /* Reads registers and build the status word */
vpcola 0:a1734fe1ec4b 283 g_xStatus = SpiritSpiReadRegisters(IRQ_STATUS3_BASE, 4, tempRegValue);
vpcola 0:a1734fe1ec4b 284 for(uint8_t i=0; i<4; i++)
vpcola 0:a1734fe1ec4b 285 {
vpcola 0:a1734fe1ec4b 286 tempValue += ((uint32_t)tempRegValue[i])<<(8*(3-i));
vpcola 0:a1734fe1ec4b 287 }
vpcola 0:a1734fe1ec4b 288
vpcola 0:a1734fe1ec4b 289 if(tempValue & xFlag)
vpcola 0:a1734fe1ec4b 290 {
vpcola 0:a1734fe1ec4b 291 flag = S_TRUE;
vpcola 0:a1734fe1ec4b 292 }
vpcola 0:a1734fe1ec4b 293 else
vpcola 0:a1734fe1ec4b 294 {
vpcola 0:a1734fe1ec4b 295 flag = S_FALSE;
vpcola 0:a1734fe1ec4b 296 }
vpcola 0:a1734fe1ec4b 297
vpcola 0:a1734fe1ec4b 298 return flag;
vpcola 0:a1734fe1ec4b 299
vpcola 0:a1734fe1ec4b 300 }
vpcola 0:a1734fe1ec4b 301
vpcola 0:a1734fe1ec4b 302
vpcola 0:a1734fe1ec4b 303 /**
vpcola 0:a1734fe1ec4b 304 *@}
vpcola 0:a1734fe1ec4b 305 */
vpcola 0:a1734fe1ec4b 306
vpcola 0:a1734fe1ec4b 307
vpcola 0:a1734fe1ec4b 308 /**
vpcola 0:a1734fe1ec4b 309 *@}
vpcola 0:a1734fe1ec4b 310 */
vpcola 0:a1734fe1ec4b 311
vpcola 0:a1734fe1ec4b 312
vpcola 0:a1734fe1ec4b 313 /**
vpcola 0:a1734fe1ec4b 314 *@}
vpcola 0:a1734fe1ec4b 315 */
vpcola 0:a1734fe1ec4b 316
vpcola 0:a1734fe1ec4b 317
vpcola 0:a1734fe1ec4b 318
vpcola 0:a1734fe1ec4b 319
vpcola 0:a1734fe1ec4b 320 /******************* (C) COPYRIGHT 2015 STMicroelectronics *****END OF FILE****/