Denislam Valeev / Mbed OS Nucleo_rtos_basic

1

mbed-os/drivers/SPI.cpp@0:e056ac8fecf8, 2018-03-13 (annotated)

Committer:
valeyev
Date:
Tue Mar 13 07:17:50 2018 +0000
Revision:
0:e056ac8fecf8
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valeyev 0:e056ac8fecf8 1 /* mbed Microcontroller Library
valeyev 0:e056ac8fecf8 2 * Copyright (c) 2006-2013 ARM Limited
valeyev 0:e056ac8fecf8 3 *
valeyev 0:e056ac8fecf8 4 * Licensed under the Apache License, Version 2.0 (the "License");
valeyev 0:e056ac8fecf8 5 * you may not use this file except in compliance with the License.
valeyev 0:e056ac8fecf8 6 * You may obtain a copy of the License at
valeyev 0:e056ac8fecf8 7 *
valeyev 0:e056ac8fecf8 8 * http://www.apache.org/licenses/LICENSE-2.0
valeyev 0:e056ac8fecf8 9 *
valeyev 0:e056ac8fecf8 10 * Unless required by applicable law or agreed to in writing, software
valeyev 0:e056ac8fecf8 11 * distributed under the License is distributed on an "AS IS" BASIS,
valeyev 0:e056ac8fecf8 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
valeyev 0:e056ac8fecf8 13 * See the License for the specific language governing permissions and
valeyev 0:e056ac8fecf8 14 * limitations under the License.
valeyev 0:e056ac8fecf8 15 */
valeyev 0:e056ac8fecf8 16 #include "drivers/SPI.h"
valeyev 0:e056ac8fecf8 17 #include "platform/mbed_critical.h"
valeyev 0:e056ac8fecf8 18
valeyev 0:e056ac8fecf8 19 #if DEVICE_SPI_ASYNCH
valeyev 0:e056ac8fecf8 20 #include "platform/mbed_power_mgmt.h"
valeyev 0:e056ac8fecf8 21 #endif
valeyev 0:e056ac8fecf8 22
valeyev 0:e056ac8fecf8 23 #if DEVICE_SPI
valeyev 0:e056ac8fecf8 24
valeyev 0:e056ac8fecf8 25 namespace mbed {
valeyev 0:e056ac8fecf8 26
valeyev 0:e056ac8fecf8 27 #if DEVICE_SPI_ASYNCH && TRANSACTION_QUEUE_SIZE_SPI
valeyev 0:e056ac8fecf8 28 CircularBuffer<Transaction<SPI>, TRANSACTION_QUEUE_SIZE_SPI> SPI::_transaction_buffer;
valeyev 0:e056ac8fecf8 29 #endif
valeyev 0:e056ac8fecf8 30
valeyev 0:e056ac8fecf8 31 SPI::SPI(PinName mosi, PinName miso, PinName sclk, PinName ssel) :
valeyev 0:e056ac8fecf8 32 _spi(),
valeyev 0:e056ac8fecf8 33 #if DEVICE_SPI_ASYNCH
valeyev 0:e056ac8fecf8 34 _irq(this),
valeyev 0:e056ac8fecf8 35 _usage(DMA_USAGE_NEVER),
valeyev 0:e056ac8fecf8 36 _deep_sleep_locked(false),
valeyev 0:e056ac8fecf8 37 #endif
valeyev 0:e056ac8fecf8 38 _bits(8),
valeyev 0:e056ac8fecf8 39 _mode(0),
valeyev 0:e056ac8fecf8 40 _hz(1000000),
valeyev 0:e056ac8fecf8 41 _write_fill(SPI_FILL_CHAR) {
valeyev 0:e056ac8fecf8 42 // No lock needed in the constructor
valeyev 0:e056ac8fecf8 43
valeyev 0:e056ac8fecf8 44 spi_init(&_spi, mosi, miso, sclk, ssel);
valeyev 0:e056ac8fecf8 45 _acquire();
valeyev 0:e056ac8fecf8 46 }
valeyev 0:e056ac8fecf8 47
valeyev 0:e056ac8fecf8 48 void SPI::format(int bits, int mode) {
valeyev 0:e056ac8fecf8 49 lock();
valeyev 0:e056ac8fecf8 50 _bits = bits;
valeyev 0:e056ac8fecf8 51 _mode = mode;
valeyev 0:e056ac8fecf8 52 // If changing format while you are the owner than just
valeyev 0:e056ac8fecf8 53 // update format, but if owner is changed than even frequency should be
valeyev 0:e056ac8fecf8 54 // updated which is done by acquire.
valeyev 0:e056ac8fecf8 55 if (_owner == this) {
valeyev 0:e056ac8fecf8 56 spi_format(&_spi, _bits, _mode, 0);
valeyev 0:e056ac8fecf8 57 } else {
valeyev 0:e056ac8fecf8 58 _acquire();
valeyev 0:e056ac8fecf8 59 }
valeyev 0:e056ac8fecf8 60 unlock();
valeyev 0:e056ac8fecf8 61 }
valeyev 0:e056ac8fecf8 62
valeyev 0:e056ac8fecf8 63 void SPI::frequency(int hz) {
valeyev 0:e056ac8fecf8 64 lock();
valeyev 0:e056ac8fecf8 65 _hz = hz;
valeyev 0:e056ac8fecf8 66 // If changing format while you are the owner than just
valeyev 0:e056ac8fecf8 67 // update frequency, but if owner is changed than even frequency should be
valeyev 0:e056ac8fecf8 68 // updated which is done by acquire.
valeyev 0:e056ac8fecf8 69 if (_owner == this) {
valeyev 0:e056ac8fecf8 70 spi_frequency(&_spi, _hz);
valeyev 0:e056ac8fecf8 71 } else {
valeyev 0:e056ac8fecf8 72 _acquire();
valeyev 0:e056ac8fecf8 73 }
valeyev 0:e056ac8fecf8 74 unlock();
valeyev 0:e056ac8fecf8 75 }
valeyev 0:e056ac8fecf8 76
valeyev 0:e056ac8fecf8 77 SPI* SPI::_owner = NULL;
valeyev 0:e056ac8fecf8 78 SingletonPtr<PlatformMutex> SPI::_mutex;
valeyev 0:e056ac8fecf8 79
valeyev 0:e056ac8fecf8 80 // ignore the fact there are multiple physical spis, and always update if it wasnt us last
valeyev 0:e056ac8fecf8 81 void SPI::aquire() {
valeyev 0:e056ac8fecf8 82 lock();
valeyev 0:e056ac8fecf8 83 if (_owner != this) {
valeyev 0:e056ac8fecf8 84 spi_format(&_spi, _bits, _mode, 0);
valeyev 0:e056ac8fecf8 85 spi_frequency(&_spi, _hz);
valeyev 0:e056ac8fecf8 86 _owner = this;
valeyev 0:e056ac8fecf8 87 }
valeyev 0:e056ac8fecf8 88 unlock();
valeyev 0:e056ac8fecf8 89 }
valeyev 0:e056ac8fecf8 90
valeyev 0:e056ac8fecf8 91 // Note: Private function with no locking
valeyev 0:e056ac8fecf8 92 void SPI::_acquire() {
valeyev 0:e056ac8fecf8 93 if (_owner != this) {
valeyev 0:e056ac8fecf8 94 spi_format(&_spi, _bits, _mode, 0);
valeyev 0:e056ac8fecf8 95 spi_frequency(&_spi, _hz);
valeyev 0:e056ac8fecf8 96 _owner = this;
valeyev 0:e056ac8fecf8 97 }
valeyev 0:e056ac8fecf8 98 }
valeyev 0:e056ac8fecf8 99
valeyev 0:e056ac8fecf8 100 int SPI::write(int value) {
valeyev 0:e056ac8fecf8 101 lock();
valeyev 0:e056ac8fecf8 102 _acquire();
valeyev 0:e056ac8fecf8 103 int ret = spi_master_write(&_spi, value);
valeyev 0:e056ac8fecf8 104 unlock();
valeyev 0:e056ac8fecf8 105 return ret;
valeyev 0:e056ac8fecf8 106 }
valeyev 0:e056ac8fecf8 107
valeyev 0:e056ac8fecf8 108 int SPI::write(const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length) {
valeyev 0:e056ac8fecf8 109 lock();
valeyev 0:e056ac8fecf8 110 _acquire();
valeyev 0:e056ac8fecf8 111 int ret = spi_master_block_write(&_spi, tx_buffer, tx_length, rx_buffer, rx_length, _write_fill);
valeyev 0:e056ac8fecf8 112 unlock();
valeyev 0:e056ac8fecf8 113 return ret;
valeyev 0:e056ac8fecf8 114 }
valeyev 0:e056ac8fecf8 115
valeyev 0:e056ac8fecf8 116 void SPI::lock() {
valeyev 0:e056ac8fecf8 117 _mutex->lock();
valeyev 0:e056ac8fecf8 118 }
valeyev 0:e056ac8fecf8 119
valeyev 0:e056ac8fecf8 120 void SPI::unlock() {
valeyev 0:e056ac8fecf8 121 _mutex->unlock();
valeyev 0:e056ac8fecf8 122 }
valeyev 0:e056ac8fecf8 123
valeyev 0:e056ac8fecf8 124 void SPI::set_default_write_value(char data) {
valeyev 0:e056ac8fecf8 125 lock();
valeyev 0:e056ac8fecf8 126 _write_fill = data;
valeyev 0:e056ac8fecf8 127 unlock();
valeyev 0:e056ac8fecf8 128 }
valeyev 0:e056ac8fecf8 129
valeyev 0:e056ac8fecf8 130 #if DEVICE_SPI_ASYNCH
valeyev 0:e056ac8fecf8 131
valeyev 0:e056ac8fecf8 132 int SPI::transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
valeyev 0:e056ac8fecf8 133 {
valeyev 0:e056ac8fecf8 134 if (spi_active(&_spi)) {
valeyev 0:e056ac8fecf8 135 return queue_transfer(tx_buffer, tx_length, rx_buffer, rx_length, bit_width, callback, event);
valeyev 0:e056ac8fecf8 136 }
valeyev 0:e056ac8fecf8 137 start_transfer(tx_buffer, tx_length, rx_buffer, rx_length, bit_width, callback, event);
valeyev 0:e056ac8fecf8 138 return 0;
valeyev 0:e056ac8fecf8 139 }
valeyev 0:e056ac8fecf8 140
valeyev 0:e056ac8fecf8 141 void SPI::abort_transfer()
valeyev 0:e056ac8fecf8 142 {
valeyev 0:e056ac8fecf8 143 spi_abort_asynch(&_spi);
valeyev 0:e056ac8fecf8 144 unlock_deep_sleep();
valeyev 0:e056ac8fecf8 145 #if TRANSACTION_QUEUE_SIZE_SPI
valeyev 0:e056ac8fecf8 146 dequeue_transaction();
valeyev 0:e056ac8fecf8 147 #endif
valeyev 0:e056ac8fecf8 148 }
valeyev 0:e056ac8fecf8 149
valeyev 0:e056ac8fecf8 150
valeyev 0:e056ac8fecf8 151 void SPI::clear_transfer_buffer()
valeyev 0:e056ac8fecf8 152 {
valeyev 0:e056ac8fecf8 153 #if TRANSACTION_QUEUE_SIZE_SPI
valeyev 0:e056ac8fecf8 154 _transaction_buffer.reset();
valeyev 0:e056ac8fecf8 155 #endif
valeyev 0:e056ac8fecf8 156 }
valeyev 0:e056ac8fecf8 157
valeyev 0:e056ac8fecf8 158 void SPI::abort_all_transfers()
valeyev 0:e056ac8fecf8 159 {
valeyev 0:e056ac8fecf8 160 clear_transfer_buffer();
valeyev 0:e056ac8fecf8 161 abort_transfer();
valeyev 0:e056ac8fecf8 162 }
valeyev 0:e056ac8fecf8 163
valeyev 0:e056ac8fecf8 164 int SPI::set_dma_usage(DMAUsage usage)
valeyev 0:e056ac8fecf8 165 {
valeyev 0:e056ac8fecf8 166 if (spi_active(&_spi)) {
valeyev 0:e056ac8fecf8 167 return -1;
valeyev 0:e056ac8fecf8 168 }
valeyev 0:e056ac8fecf8 169 _usage = usage;
valeyev 0:e056ac8fecf8 170 return 0;
valeyev 0:e056ac8fecf8 171 }
valeyev 0:e056ac8fecf8 172
valeyev 0:e056ac8fecf8 173 int SPI::queue_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
valeyev 0:e056ac8fecf8 174 {
valeyev 0:e056ac8fecf8 175 #if TRANSACTION_QUEUE_SIZE_SPI
valeyev 0:e056ac8fecf8 176 transaction_t t;
valeyev 0:e056ac8fecf8 177
valeyev 0:e056ac8fecf8 178 t.tx_buffer = const_cast<void *>(tx_buffer);
valeyev 0:e056ac8fecf8 179 t.tx_length = tx_length;
valeyev 0:e056ac8fecf8 180 t.rx_buffer = rx_buffer;
valeyev 0:e056ac8fecf8 181 t.rx_length = rx_length;
valeyev 0:e056ac8fecf8 182 t.event = event;
valeyev 0:e056ac8fecf8 183 t.callback = callback;
valeyev 0:e056ac8fecf8 184 t.width = bit_width;
valeyev 0:e056ac8fecf8 185 Transaction<SPI> transaction(this, t);
valeyev 0:e056ac8fecf8 186 if (_transaction_buffer.full()) {
valeyev 0:e056ac8fecf8 187 return -1; // the buffer is full
valeyev 0:e056ac8fecf8 188 } else {
valeyev 0:e056ac8fecf8 189 core_util_critical_section_enter();
valeyev 0:e056ac8fecf8 190 _transaction_buffer.push(transaction);
valeyev 0:e056ac8fecf8 191 if (!spi_active(&_spi)) {
valeyev 0:e056ac8fecf8 192 dequeue_transaction();
valeyev 0:e056ac8fecf8 193 }
valeyev 0:e056ac8fecf8 194 core_util_critical_section_exit();
valeyev 0:e056ac8fecf8 195 return 0;
valeyev 0:e056ac8fecf8 196 }
valeyev 0:e056ac8fecf8 197 #else
valeyev 0:e056ac8fecf8 198 return -1;
valeyev 0:e056ac8fecf8 199 #endif
valeyev 0:e056ac8fecf8 200 }
valeyev 0:e056ac8fecf8 201
valeyev 0:e056ac8fecf8 202 void SPI::start_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
valeyev 0:e056ac8fecf8 203 {
valeyev 0:e056ac8fecf8 204 lock_deep_sleep();
valeyev 0:e056ac8fecf8 205 _acquire();
valeyev 0:e056ac8fecf8 206 _callback = callback;
valeyev 0:e056ac8fecf8 207 _irq.callback(&SPI::irq_handler_asynch);
valeyev 0:e056ac8fecf8 208 spi_master_transfer(&_spi, tx_buffer, tx_length, rx_buffer, rx_length, bit_width, _irq.entry(), event , _usage);
valeyev 0:e056ac8fecf8 209 }
valeyev 0:e056ac8fecf8 210
valeyev 0:e056ac8fecf8 211 void SPI::lock_deep_sleep()
valeyev 0:e056ac8fecf8 212 {
valeyev 0:e056ac8fecf8 213 if (_deep_sleep_locked == false) {
valeyev 0:e056ac8fecf8 214 sleep_manager_lock_deep_sleep();
valeyev 0:e056ac8fecf8 215 _deep_sleep_locked = true;
valeyev 0:e056ac8fecf8 216 }
valeyev 0:e056ac8fecf8 217 }
valeyev 0:e056ac8fecf8 218
valeyev 0:e056ac8fecf8 219 void SPI::unlock_deep_sleep()
valeyev 0:e056ac8fecf8 220 {
valeyev 0:e056ac8fecf8 221 if (_deep_sleep_locked == true) {
valeyev 0:e056ac8fecf8 222 sleep_manager_unlock_deep_sleep();
valeyev 0:e056ac8fecf8 223 _deep_sleep_locked = false;
valeyev 0:e056ac8fecf8 224 }
valeyev 0:e056ac8fecf8 225 }
valeyev 0:e056ac8fecf8 226
valeyev 0:e056ac8fecf8 227 #if TRANSACTION_QUEUE_SIZE_SPI
valeyev 0:e056ac8fecf8 228
valeyev 0:e056ac8fecf8 229 void SPI::start_transaction(transaction_t *data)
valeyev 0:e056ac8fecf8 230 {
valeyev 0:e056ac8fecf8 231 start_transfer(data->tx_buffer, data->tx_length, data->rx_buffer, data->rx_length, data->width, data->callback, data->event);
valeyev 0:e056ac8fecf8 232 }
valeyev 0:e056ac8fecf8 233
valeyev 0:e056ac8fecf8 234 void SPI::dequeue_transaction()
valeyev 0:e056ac8fecf8 235 {
valeyev 0:e056ac8fecf8 236 Transaction<SPI> t;
valeyev 0:e056ac8fecf8 237 if (_transaction_buffer.pop(t)) {
valeyev 0:e056ac8fecf8 238 SPI* obj = t.get_object();
valeyev 0:e056ac8fecf8 239 transaction_t* data = t.get_transaction();
valeyev 0:e056ac8fecf8 240 obj->start_transaction(data);
valeyev 0:e056ac8fecf8 241 }
valeyev 0:e056ac8fecf8 242 }
valeyev 0:e056ac8fecf8 243
valeyev 0:e056ac8fecf8 244 #endif
valeyev 0:e056ac8fecf8 245
valeyev 0:e056ac8fecf8 246 void SPI::irq_handler_asynch(void)
valeyev 0:e056ac8fecf8 247 {
valeyev 0:e056ac8fecf8 248 int event = spi_irq_handler_asynch(&_spi);
valeyev 0:e056ac8fecf8 249 if (_callback && (event & SPI_EVENT_ALL)) {
valeyev 0:e056ac8fecf8 250 unlock_deep_sleep();
valeyev 0:e056ac8fecf8 251 _callback.call(event & SPI_EVENT_ALL);
valeyev 0:e056ac8fecf8 252 }
valeyev 0:e056ac8fecf8 253 #if TRANSACTION_QUEUE_SIZE_SPI
valeyev 0:e056ac8fecf8 254 if (event & (SPI_EVENT_ALL | SPI_EVENT_INTERNAL_TRANSFER_COMPLETE)) {
valeyev 0:e056ac8fecf8 255 // SPI peripheral is free (event happend), dequeue transaction
valeyev 0:e056ac8fecf8 256 dequeue_transaction();
valeyev 0:e056ac8fecf8 257 }
valeyev 0:e056ac8fecf8 258 #endif
valeyev 0:e056ac8fecf8 259 }
valeyev 0:e056ac8fecf8 260
valeyev 0:e056ac8fecf8 261 #endif
valeyev 0:e056ac8fecf8 262
valeyev 0:e056ac8fecf8 263 } // namespace mbed
valeyev 0:e056ac8fecf8 264
valeyev 0:e056ac8fecf8 265 #endif