Norimasa Okamoto
W5200(WIZ820io) network interface
w5100.h@2:a8df39b4f3aa, 2012-04-19 (annotated)
- Committer:
- va009039
- Date:
- Thu Apr 19 11:14:43 2012 +0000
- Revision:
- 2:a8df39b4f3aa
- Parent:
- 1:803123933c5a
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| va009039 | 0:61831b843b44 | 1 | /* |
| va009039 | 0:61831b843b44 | 2 | * Copyright (c) 2010 by Cristian Maglie <c.maglie@bug.st> |
| va009039 | 0:61831b843b44 | 3 | * |
| va009039 | 0:61831b843b44 | 4 | * This file is free software; you can redistribute it and/or modify |
| va009039 | 0:61831b843b44 | 5 | * it under the terms of either the GNU General Public License version 2 |
| va009039 | 0:61831b843b44 | 6 | * or the GNU Lesser General Public License version 2.1, both as |
| va009039 | 0:61831b843b44 | 7 | * published by the Free Software Foundation. |
| va009039 | 0:61831b843b44 | 8 | */ |
| va009039 | 0:61831b843b44 | 9 | |
| va009039 | 0:61831b843b44 | 10 | #ifndef W5100_H_INCLUDED |
| va009039 | 0:61831b843b44 | 11 | #define W5100_H_INCLUDED |
| va009039 | 0:61831b843b44 | 12 | #define MBED |
| va009039 | 0:61831b843b44 | 13 | #ifdef MBED |
| va009039 | 0:61831b843b44 | 14 | #include "mbed.h" |
| va009039 | 0:61831b843b44 | 15 | typedef unsigned char uint8_t; |
| va009039 | 0:61831b843b44 | 16 | typedef unsigned short uint16_t; |
| va009039 | 0:61831b843b44 | 17 | #else //MBED |
| va009039 | 0:61831b843b44 | 18 | #include <avr/pgmspace.h> |
| va009039 | 0:61831b843b44 | 19 | #include <SPI.h> |
| va009039 | 0:61831b843b44 | 20 | #endif //MBED |
| va009039 | 0:61831b843b44 | 21 | #define W5200 |
| va009039 | 0:61831b843b44 | 22 | |
| va009039 | 0:61831b843b44 | 23 | #ifdef W5200 |
| va009039 | 0:61831b843b44 | 24 | #define MAX_SOCK_NUM 8 |
| va009039 | 0:61831b843b44 | 25 | #else |
| va009039 | 0:61831b843b44 | 26 | #define MAX_SOCK_NUM 4 |
| va009039 | 0:61831b843b44 | 27 | #endif |
| va009039 | 0:61831b843b44 | 28 | |
| va009039 | 0:61831b843b44 | 29 | |
| va009039 | 0:61831b843b44 | 30 | typedef uint8_t SOCKET; |
| va009039 | 0:61831b843b44 | 31 | |
| va009039 | 0:61831b843b44 | 32 | #ifndef W5200 |
| va009039 | 0:61831b843b44 | 33 | #define IDM_OR 0x8000 |
| va009039 | 0:61831b843b44 | 34 | #define IDM_AR0 0x8001 |
| va009039 | 0:61831b843b44 | 35 | #define IDM_AR1 0x8002 |
| va009039 | 0:61831b843b44 | 36 | #define IDM_DR 0x8003 |
| va009039 | 0:61831b843b44 | 37 | #endif |
| va009039 | 0:61831b843b44 | 38 | |
| va009039 | 0:61831b843b44 | 39 | /* |
| va009039 | 0:61831b843b44 | 40 | class MR { |
| va009039 | 0:61831b843b44 | 41 | public: |
| va009039 | 0:61831b843b44 | 42 | static const uint8_t RST = 0x80; |
| va009039 | 0:61831b843b44 | 43 | static const uint8_t PB = 0x10; |
| va009039 | 0:61831b843b44 | 44 | static const uint8_t PPPOE = 0x08; |
| va009039 | 0:61831b843b44 | 45 | static const uint8_t LB = 0x04; |
| va009039 | 0:61831b843b44 | 46 | static const uint8_t AI = 0x02; |
| va009039 | 0:61831b843b44 | 47 | static const uint8_t IND = 0x01; |
| va009039 | 0:61831b843b44 | 48 | }; |
| va009039 | 0:61831b843b44 | 49 | */ |
| va009039 | 0:61831b843b44 | 50 | /* |
| va009039 | 0:61831b843b44 | 51 | class IR { |
| va009039 | 0:61831b843b44 | 52 | public: |
| va009039 | 0:61831b843b44 | 53 | static const uint8_t CONFLICT = 0x80; |
| va009039 | 0:61831b843b44 | 54 | static const uint8_t UNREACH = 0x40; |
| va009039 | 0:61831b843b44 | 55 | static const uint8_t PPPoE = 0x20; |
| va009039 | 0:61831b843b44 | 56 | static const uint8_t SOCK0 = 0x01; |
| va009039 | 0:61831b843b44 | 57 | static const uint8_t SOCK1 = 0x02; |
| va009039 | 0:61831b843b44 | 58 | static const uint8_t SOCK2 = 0x04; |
| va009039 | 0:61831b843b44 | 59 | static const uint8_t SOCK3 = 0x08; |
| va009039 | 0:61831b843b44 | 60 | static inline uint8_t SOCK(SOCKET ch) { return (0x01 << ch); }; |
| va009039 | 0:61831b843b44 | 61 | }; |
| va009039 | 0:61831b843b44 | 62 | */ |
| va009039 | 0:61831b843b44 | 63 | |
| va009039 | 0:61831b843b44 | 64 | class SnMR { |
| va009039 | 0:61831b843b44 | 65 | public: |
| va009039 | 0:61831b843b44 | 66 | static const uint8_t CLOSE = 0x00; |
| va009039 | 0:61831b843b44 | 67 | static const uint8_t TCP = 0x01; |
| va009039 | 0:61831b843b44 | 68 | static const uint8_t UDP = 0x02; |
| va009039 | 0:61831b843b44 | 69 | static const uint8_t IPRAW = 0x03; |
| va009039 | 0:61831b843b44 | 70 | static const uint8_t MACRAW = 0x04; |
| va009039 | 0:61831b843b44 | 71 | static const uint8_t PPPOE = 0x05; |
| va009039 | 0:61831b843b44 | 72 | static const uint8_t ND = 0x20; |
| va009039 | 0:61831b843b44 | 73 | static const uint8_t MULTI = 0x80; |
| va009039 | 0:61831b843b44 | 74 | }; |
| va009039 | 0:61831b843b44 | 75 | |
| va009039 | 0:61831b843b44 | 76 | enum SockCMD { |
| va009039 | 0:61831b843b44 | 77 | Sock_OPEN = 0x01, |
| va009039 | 0:61831b843b44 | 78 | Sock_LISTEN = 0x02, |
| va009039 | 0:61831b843b44 | 79 | Sock_CONNECT = 0x04, |
| va009039 | 0:61831b843b44 | 80 | Sock_DISCON = 0x08, |
| va009039 | 0:61831b843b44 | 81 | Sock_CLOSE = 0x10, |
| va009039 | 0:61831b843b44 | 82 | Sock_SEND = 0x20, |
| va009039 | 0:61831b843b44 | 83 | Sock_SEND_MAC = 0x21, |
| va009039 | 0:61831b843b44 | 84 | Sock_SEND_KEEP = 0x22, |
| va009039 | 0:61831b843b44 | 85 | Sock_RECV = 0x40 |
| va009039 | 0:61831b843b44 | 86 | }; |
| va009039 | 0:61831b843b44 | 87 | |
| va009039 | 0:61831b843b44 | 88 | /*class SnCmd { |
| va009039 | 0:61831b843b44 | 89 | public: |
| va009039 | 0:61831b843b44 | 90 | static const uint8_t OPEN = 0x01; |
| va009039 | 0:61831b843b44 | 91 | static const uint8_t LISTEN = 0x02; |
| va009039 | 0:61831b843b44 | 92 | static const uint8_t CONNECT = 0x04; |
| va009039 | 0:61831b843b44 | 93 | static const uint8_t DISCON = 0x08; |
| va009039 | 0:61831b843b44 | 94 | static const uint8_t CLOSE = 0x10; |
| va009039 | 0:61831b843b44 | 95 | static const uint8_t SEND = 0x20; |
| va009039 | 0:61831b843b44 | 96 | static const uint8_t SEND_MAC = 0x21; |
| va009039 | 0:61831b843b44 | 97 | static const uint8_t SEND_KEEP = 0x22; |
| va009039 | 0:61831b843b44 | 98 | static const uint8_t RECV = 0x40; |
| va009039 | 0:61831b843b44 | 99 | }; |
| va009039 | 0:61831b843b44 | 100 | */ |
| va009039 | 0:61831b843b44 | 101 | |
| va009039 | 0:61831b843b44 | 102 | class SnIR { |
| va009039 | 0:61831b843b44 | 103 | public: |
| va009039 | 0:61831b843b44 | 104 | static const uint8_t SEND_OK = 0x10; |
| va009039 | 0:61831b843b44 | 105 | static const uint8_t TIMEOUT = 0x08; |
| va009039 | 0:61831b843b44 | 106 | static const uint8_t RECV = 0x04; |
| va009039 | 0:61831b843b44 | 107 | static const uint8_t DISCON = 0x02; |
| va009039 | 0:61831b843b44 | 108 | static const uint8_t CON = 0x01; |
| va009039 | 0:61831b843b44 | 109 | }; |
| va009039 | 0:61831b843b44 | 110 | |
| va009039 | 0:61831b843b44 | 111 | class SnSR { |
| va009039 | 0:61831b843b44 | 112 | public: |
| va009039 | 0:61831b843b44 | 113 | static const uint8_t CLOSED = 0x00; |
| va009039 | 0:61831b843b44 | 114 | static const uint8_t INIT = 0x13; |
| va009039 | 0:61831b843b44 | 115 | static const uint8_t LISTEN = 0x14; |
| va009039 | 0:61831b843b44 | 116 | static const uint8_t SYNSENT = 0x15; |
| va009039 | 0:61831b843b44 | 117 | static const uint8_t SYNRECV = 0x16; |
| va009039 | 0:61831b843b44 | 118 | static const uint8_t ESTABLISHED = 0x17; |
| va009039 | 0:61831b843b44 | 119 | static const uint8_t FIN_WAIT = 0x18; |
| va009039 | 0:61831b843b44 | 120 | static const uint8_t CLOSING = 0x1A; |
| va009039 | 0:61831b843b44 | 121 | static const uint8_t TIME_WAIT = 0x1B; |
| va009039 | 0:61831b843b44 | 122 | static const uint8_t CLOSE_WAIT = 0x1C; |
| va009039 | 0:61831b843b44 | 123 | static const uint8_t LAST_ACK = 0x1D; |
| va009039 | 0:61831b843b44 | 124 | static const uint8_t UDP = 0x22; |
| va009039 | 0:61831b843b44 | 125 | static const uint8_t IPRAW = 0x32; |
| va009039 | 0:61831b843b44 | 126 | static const uint8_t MACRAW = 0x42; |
| va009039 | 0:61831b843b44 | 127 | static const uint8_t PPPOE = 0x5F; |
| va009039 | 0:61831b843b44 | 128 | }; |
| va009039 | 0:61831b843b44 | 129 | |
| va009039 | 0:61831b843b44 | 130 | class IPPROTO { |
| va009039 | 0:61831b843b44 | 131 | public: |
| va009039 | 0:61831b843b44 | 132 | static const uint8_t IP = 0; |
| va009039 | 0:61831b843b44 | 133 | static const uint8_t ICMP = 1; |
| va009039 | 0:61831b843b44 | 134 | static const uint8_t IGMP = 2; |
| va009039 | 0:61831b843b44 | 135 | static const uint8_t GGP = 3; |
| va009039 | 0:61831b843b44 | 136 | static const uint8_t TCP = 6; |
| va009039 | 0:61831b843b44 | 137 | static const uint8_t PUP = 12; |
| va009039 | 0:61831b843b44 | 138 | static const uint8_t UDP = 17; |
| va009039 | 0:61831b843b44 | 139 | static const uint8_t IDP = 22; |
| va009039 | 0:61831b843b44 | 140 | static const uint8_t ND = 77; |
| va009039 | 0:61831b843b44 | 141 | static const uint8_t RAW = 255; |
| va009039 | 0:61831b843b44 | 142 | }; |
| va009039 | 0:61831b843b44 | 143 | |
| va009039 | 0:61831b843b44 | 144 | class W5100Class { |
| va009039 | 0:61831b843b44 | 145 | public: |
| va009039 | 0:61831b843b44 | 146 | void init(); |
| va009039 | 0:61831b843b44 | 147 | |
| va009039 | 0:61831b843b44 | 148 | /** |
| va009039 | 0:61831b843b44 | 149 | * @brief This function is being used for copy the data form Receive buffer of the chip to application buffer. |
| va009039 | 0:61831b843b44 | 150 | * |
| va009039 | 0:61831b843b44 | 151 | * It calculate the actual physical address where one has to read |
| va009039 | 0:61831b843b44 | 152 | * the data from Receive buffer. Here also take care of the condition while it exceed |
| va009039 | 0:61831b843b44 | 153 | * the Rx memory uper-bound of socket. |
| va009039 | 0:61831b843b44 | 154 | */ |
| va009039 | 0:61831b843b44 | 155 | void read_data(SOCKET s, volatile uint8_t * src, volatile uint8_t * dst, uint16_t len); |
| va009039 | 0:61831b843b44 | 156 | |
| va009039 | 0:61831b843b44 | 157 | /** |
| va009039 | 0:61831b843b44 | 158 | * @brief This function is being called by send() and sendto() function also. |
| va009039 | 0:61831b843b44 | 159 | * |
| va009039 | 0:61831b843b44 | 160 | * This function read the Tx write pointer register and after copy the data in buffer update the Tx write pointer |
| va009039 | 0:61831b843b44 | 161 | * register. User should read upper byte first and lower byte later to get proper value. |
| va009039 | 0:61831b843b44 | 162 | */ |
| va009039 | 0:61831b843b44 | 163 | void send_data_processing(SOCKET s, const uint8_t *data, uint16_t len); |
| va009039 | 0:61831b843b44 | 164 | /** |
| va009039 | 0:61831b843b44 | 165 | * @brief A copy of send_data_processing that uses the provided ptr for the |
| va009039 | 0:61831b843b44 | 166 | * write offset. Only needed for the "streaming" UDP API, where |
| va009039 | 0:61831b843b44 | 167 | * a single UDP packet is built up over a number of calls to |
| va009039 | 0:61831b843b44 | 168 | * send_data_processing_ptr, because TX_WR doesn't seem to get updated |
| va009039 | 0:61831b843b44 | 169 | * correctly in those scenarios |
| va009039 | 0:61831b843b44 | 170 | * @param ptr value to use in place of TX_WR. If 0, then the value is read |
| va009039 | 0:61831b843b44 | 171 | * in from TX_WR |
| va009039 | 0:61831b843b44 | 172 | * @return New value for ptr, to be used in the next call |
| va009039 | 0:61831b843b44 | 173 | */ |
| va009039 | 0:61831b843b44 | 174 | // FIXME Update documentation |
| va009039 | 0:61831b843b44 | 175 | void send_data_processing_offset(SOCKET s, uint16_t data_offset, const uint8_t *data, uint16_t len); |
| va009039 | 0:61831b843b44 | 176 | |
| va009039 | 0:61831b843b44 | 177 | /** |
| va009039 | 0:61831b843b44 | 178 | * @brief This function is being called by recv() also. |
| va009039 | 0:61831b843b44 | 179 | * |
| va009039 | 0:61831b843b44 | 180 | * This function read the Rx read pointer register |
| va009039 | 0:61831b843b44 | 181 | * and after copy the data from receive buffer update the Rx write pointer register. |
| va009039 | 0:61831b843b44 | 182 | * User should read upper byte first and lower byte later to get proper value. |
| va009039 | 0:61831b843b44 | 183 | */ |
| va009039 | 0:61831b843b44 | 184 | void recv_data_processing(SOCKET s, uint8_t *data, uint16_t len, uint8_t peek = 0); |
| va009039 | 0:61831b843b44 | 185 | |
| va009039 | 0:61831b843b44 | 186 | inline void setGatewayIp(uint8_t *_addr); |
| va009039 | 0:61831b843b44 | 187 | inline void getGatewayIp(uint8_t *_addr); |
| va009039 | 0:61831b843b44 | 188 | |
| va009039 | 0:61831b843b44 | 189 | inline void setSubnetMask(uint8_t *_addr); |
| va009039 | 0:61831b843b44 | 190 | inline void getSubnetMask(uint8_t *_addr); |
| va009039 | 0:61831b843b44 | 191 | |
| va009039 | 0:61831b843b44 | 192 | inline void setMACAddress(uint8_t * addr); |
| va009039 | 0:61831b843b44 | 193 | inline void getMACAddress(uint8_t * addr); |
| va009039 | 0:61831b843b44 | 194 | |
| va009039 | 0:61831b843b44 | 195 | inline void setIPAddress(uint8_t * addr); |
| va009039 | 0:61831b843b44 | 196 | inline void getIPAddress(uint8_t * addr); |
| va009039 | 0:61831b843b44 | 197 | |
| va009039 | 0:61831b843b44 | 198 | inline void setRetransmissionTime(uint16_t timeout); |
| va009039 | 0:61831b843b44 | 199 | inline void setRetransmissionCount(uint8_t _retry); |
| va009039 | 0:61831b843b44 | 200 | |
| va009039 | 0:61831b843b44 | 201 | void execCmdSn(SOCKET s, SockCMD _cmd); |
| va009039 | 0:61831b843b44 | 202 | |
| va009039 | 0:61831b843b44 | 203 | uint16_t getTXFreeSize(SOCKET s); |
| va009039 | 0:61831b843b44 | 204 | uint16_t getRXReceivedSize(SOCKET s); |
| va009039 | 0:61831b843b44 | 205 | |
| va009039 | 0:61831b843b44 | 206 | |
| va009039 | 0:61831b843b44 | 207 | // W5100 Registers |
| va009039 | 0:61831b843b44 | 208 | // --------------- |
| va009039 | 0:61831b843b44 | 209 | private: |
| va009039 | 0:61831b843b44 | 210 | static uint8_t write(uint16_t _addr, uint8_t _data); |
| va009039 | 0:61831b843b44 | 211 | static uint16_t write(uint16_t addr, const uint8_t *buf, uint16_t len); |
| va009039 | 0:61831b843b44 | 212 | static uint8_t read(uint16_t addr); |
| va009039 | 0:61831b843b44 | 213 | static uint16_t read(uint16_t addr, uint8_t *buf, uint16_t len); |
| va009039 | 0:61831b843b44 | 214 | |
| va009039 | 0:61831b843b44 | 215 | #define __GP_REGISTER8(name, address) \ |
| va009039 | 0:61831b843b44 | 216 | static inline void write##name(uint8_t _data) { \ |
| va009039 | 0:61831b843b44 | 217 | write(address, _data); \ |
| va009039 | 0:61831b843b44 | 218 | } \ |
| va009039 | 0:61831b843b44 | 219 | static inline uint8_t read##name() { \ |
| va009039 | 0:61831b843b44 | 220 | return read(address); \ |
| va009039 | 0:61831b843b44 | 221 | } |
| va009039 | 0:61831b843b44 | 222 | #define __GP_REGISTER16(name, address) \ |
| va009039 | 0:61831b843b44 | 223 | static void write##name(uint16_t _data) { \ |
| va009039 | 0:61831b843b44 | 224 | write(address, _data >> 8); \ |
| va009039 | 0:61831b843b44 | 225 | write(address+1, _data & 0xFF); \ |
| va009039 | 0:61831b843b44 | 226 | } \ |
| va009039 | 0:61831b843b44 | 227 | static uint16_t read##name() { \ |
| va009039 | 0:61831b843b44 | 228 | uint16_t res = read(address); \ |
| va009039 | 0:61831b843b44 | 229 | res = (res << 8) + read(address + 1); \ |
| va009039 | 0:61831b843b44 | 230 | return res; \ |
| va009039 | 0:61831b843b44 | 231 | } |
| va009039 | 0:61831b843b44 | 232 | #define __GP_REGISTER_N(name, address, size) \ |
| va009039 | 0:61831b843b44 | 233 | static uint16_t write##name(uint8_t *_buff) { \ |
| va009039 | 0:61831b843b44 | 234 | return write(address, _buff, size); \ |
| va009039 | 0:61831b843b44 | 235 | } \ |
| va009039 | 0:61831b843b44 | 236 | static uint16_t read##name(uint8_t *_buff) { \ |
| va009039 | 0:61831b843b44 | 237 | return read(address, _buff, size); \ |
| va009039 | 0:61831b843b44 | 238 | } |
| va009039 | 0:61831b843b44 | 239 | |
| va009039 | 0:61831b843b44 | 240 | public: |
| va009039 | 0:61831b843b44 | 241 | __GP_REGISTER8 (MR, 0x0000); // Mode |
| va009039 | 0:61831b843b44 | 242 | __GP_REGISTER_N(GAR, 0x0001, 4); // Gateway IP address |
| va009039 | 0:61831b843b44 | 243 | __GP_REGISTER_N(SUBR, 0x0005, 4); // Subnet mask address |
| va009039 | 0:61831b843b44 | 244 | __GP_REGISTER_N(SHAR, 0x0009, 6); // Source MAC address |
| va009039 | 0:61831b843b44 | 245 | __GP_REGISTER_N(SIPR, 0x000F, 4); // Source IP address |
| va009039 | 0:61831b843b44 | 246 | __GP_REGISTER8 (IR, 0x0015); // Interrupt |
| va009039 | 0:61831b843b44 | 247 | __GP_REGISTER8 (IMR, 0x0016); // Interrupt Mask |
| va009039 | 0:61831b843b44 | 248 | __GP_REGISTER16(RTR, 0x0017); // Timeout address |
| va009039 | 0:61831b843b44 | 249 | __GP_REGISTER8 (RCR, 0x0019); // Retry count |
| va009039 | 0:61831b843b44 | 250 | |
| va009039 | 0:61831b843b44 | 251 | #ifndef W5200 |
| va009039 | 0:61831b843b44 | 252 | __GP_REGISTER8 (RMSR, 0x001A); // Receive memory size |
| va009039 | 0:61831b843b44 | 253 | __GP_REGISTER8 (TMSR, 0x001B); // Transmit memory size |
| va009039 | 0:61831b843b44 | 254 | #endif |
| va009039 | 0:61831b843b44 | 255 | __GP_REGISTER8 (PATR, 0x001C); // Authentication type address in PPPoE mode |
| va009039 | 0:61831b843b44 | 256 | |
| va009039 | 0:61831b843b44 | 257 | __GP_REGISTER8 (VERSIONR,0x001f); // Chip version |
| va009039 | 0:61831b843b44 | 258 | |
| va009039 | 0:61831b843b44 | 259 | __GP_REGISTER8 (PTIMER, 0x0028); // PPP LCP Request Timer |
| va009039 | 0:61831b843b44 | 260 | __GP_REGISTER8 (PMAGIC, 0x0029); // PPP LCP Magic Number |
| va009039 | 0:61831b843b44 | 261 | #ifndef W5200 |
| va009039 | 0:61831b843b44 | 262 | __GP_REGISTER_N(UIPR, 0x002A, 4); // Unreachable IP address in UDP mode |
| va009039 | 0:61831b843b44 | 263 | __GP_REGISTER16(UPORT, 0x002E); // Unreachable Port address in UDP mode |
| va009039 | 0:61831b843b44 | 264 | #endif |
| va009039 | 0:61831b843b44 | 265 | __GP_REGISTER8 (PHYSTATUS,0x0035); // PHY Status |
| va009039 | 0:61831b843b44 | 266 | |
| va009039 | 0:61831b843b44 | 267 | #undef __GP_REGISTER8 |
| va009039 | 0:61831b843b44 | 268 | #undef __GP_REGISTER16 |
| va009039 | 0:61831b843b44 | 269 | #undef __GP_REGISTER_N |
| va009039 | 0:61831b843b44 | 270 | |
| va009039 | 0:61831b843b44 | 271 | // W5100 Socket registers |
| va009039 | 0:61831b843b44 | 272 | // ---------------------- |
| va009039 | 0:61831b843b44 | 273 | private: |
| va009039 | 0:61831b843b44 | 274 | static inline uint8_t readSn(SOCKET _s, uint16_t _addr); |
| va009039 | 0:61831b843b44 | 275 | static inline uint8_t writeSn(SOCKET _s, uint16_t _addr, uint8_t _data); |
| va009039 | 0:61831b843b44 | 276 | static inline uint16_t readSn(SOCKET _s, uint16_t _addr, uint8_t *_buf, uint16_t len); |
| va009039 | 0:61831b843b44 | 277 | static inline uint16_t writeSn(SOCKET _s, uint16_t _addr, uint8_t *_buf, uint16_t len); |
| va009039 | 0:61831b843b44 | 278 | |
| va009039 | 0:61831b843b44 | 279 | #ifdef W5200 |
| va009039 | 0:61831b843b44 | 280 | static const uint16_t CH_BASE = 0x4000; |
| va009039 | 0:61831b843b44 | 281 | #else |
| va009039 | 0:61831b843b44 | 282 | static const uint16_t CH_BASE = 0x0400; |
| va009039 | 0:61831b843b44 | 283 | #endif |
| va009039 | 0:61831b843b44 | 284 | |
| va009039 | 0:61831b843b44 | 285 | static const uint16_t CH_SIZE = 0x0100; |
| va009039 | 0:61831b843b44 | 286 | |
| va009039 | 0:61831b843b44 | 287 | #define __SOCKET_REGISTER8(name, address) \ |
| va009039 | 0:61831b843b44 | 288 | static inline void write##name(SOCKET _s, uint8_t _data) { \ |
| va009039 | 0:61831b843b44 | 289 | writeSn(_s, address, _data); \ |
| va009039 | 0:61831b843b44 | 290 | } \ |
| va009039 | 0:61831b843b44 | 291 | static inline uint8_t read##name(SOCKET _s) { \ |
| va009039 | 0:61831b843b44 | 292 | return readSn(_s, address); \ |
| va009039 | 0:61831b843b44 | 293 | } |
| va009039 | 0:61831b843b44 | 294 | #define __SOCKET_REGISTER16(name, address) \ |
| va009039 | 0:61831b843b44 | 295 | static void write##name(SOCKET _s, uint16_t _data) { \ |
| va009039 | 0:61831b843b44 | 296 | writeSn(_s, address, _data >> 8); \ |
| va009039 | 0:61831b843b44 | 297 | writeSn(_s, address+1, _data & 0xFF); \ |
| va009039 | 0:61831b843b44 | 298 | } \ |
| va009039 | 0:61831b843b44 | 299 | static uint16_t read##name(SOCKET _s) { \ |
| va009039 | 0:61831b843b44 | 300 | uint16_t res = readSn(_s, address); \ |
| va009039 | 0:61831b843b44 | 301 | res = (res << 8) + readSn(_s, address + 1); \ |
| va009039 | 0:61831b843b44 | 302 | return res; \ |
| va009039 | 0:61831b843b44 | 303 | } |
| va009039 | 0:61831b843b44 | 304 | #define __SOCKET_REGISTER_N(name, address, size) \ |
| va009039 | 0:61831b843b44 | 305 | static uint16_t write##name(SOCKET _s, uint8_t *_buff) { \ |
| va009039 | 0:61831b843b44 | 306 | return writeSn(_s, address, _buff, size); \ |
| va009039 | 0:61831b843b44 | 307 | } \ |
| va009039 | 0:61831b843b44 | 308 | static uint16_t read##name(SOCKET _s, uint8_t *_buff) { \ |
| va009039 | 0:61831b843b44 | 309 | return readSn(_s, address, _buff, size); \ |
| va009039 | 0:61831b843b44 | 310 | } |
| va009039 | 0:61831b843b44 | 311 | |
| va009039 | 0:61831b843b44 | 312 | public: |
| va009039 | 0:61831b843b44 | 313 | __SOCKET_REGISTER8(SnMR, 0x0000) // Mode |
| va009039 | 0:61831b843b44 | 314 | __SOCKET_REGISTER8(SnCR, 0x0001) // Command |
| va009039 | 0:61831b843b44 | 315 | __SOCKET_REGISTER8(SnIR, 0x0002) // Interrupt |
| va009039 | 0:61831b843b44 | 316 | __SOCKET_REGISTER8(SnSR, 0x0003) // Status |
| va009039 | 0:61831b843b44 | 317 | __SOCKET_REGISTER16(SnPORT, 0x0004) // Source Port |
| va009039 | 0:61831b843b44 | 318 | __SOCKET_REGISTER_N(SnDHAR, 0x0006, 6) // Destination Hardw Addr |
| va009039 | 0:61831b843b44 | 319 | __SOCKET_REGISTER_N(SnDIPR, 0x000C, 4) // Destination IP Addr |
| va009039 | 0:61831b843b44 | 320 | __SOCKET_REGISTER16(SnDPORT, 0x0010) // Destination Port |
| va009039 | 0:61831b843b44 | 321 | __SOCKET_REGISTER16(SnMSSR, 0x0012) // Max Segment Size |
| va009039 | 0:61831b843b44 | 322 | __SOCKET_REGISTER8(SnPROTO, 0x0014) // Protocol in IP RAW Mode |
| va009039 | 0:61831b843b44 | 323 | __SOCKET_REGISTER8(SnTOS, 0x0015) // IP TOS |
| va009039 | 0:61831b843b44 | 324 | __SOCKET_REGISTER8(SnTTL, 0x0016) // IP TTL |
| va009039 | 0:61831b843b44 | 325 | __SOCKET_REGISTER16(SnTX_FSR, 0x0020) // TX Free Size |
| va009039 | 0:61831b843b44 | 326 | __SOCKET_REGISTER16(SnTX_RD, 0x0022) // TX Read Pointer |
| va009039 | 0:61831b843b44 | 327 | __SOCKET_REGISTER16(SnTX_WR, 0x0024) // TX Write Pointer |
| va009039 | 0:61831b843b44 | 328 | __SOCKET_REGISTER16(SnRX_RSR, 0x0026) // RX Free Size |
| va009039 | 0:61831b843b44 | 329 | __SOCKET_REGISTER16(SnRX_RD, 0x0028) // RX Read Pointer |
| va009039 | 0:61831b843b44 | 330 | __SOCKET_REGISTER16(SnRX_WR, 0x002A) // RX Write Pointer (supported?) |
| va009039 | 0:61831b843b44 | 331 | |
| va009039 | 0:61831b843b44 | 332 | #undef __SOCKET_REGISTER8 |
| va009039 | 0:61831b843b44 | 333 | #undef __SOCKET_REGISTER16 |
| va009039 | 0:61831b843b44 | 334 | #undef __SOCKET_REGISTER_N |
| va009039 | 0:61831b843b44 | 335 | |
| va009039 | 0:61831b843b44 | 336 | |
| va009039 | 0:61831b843b44 | 337 | private: |
| va009039 | 0:61831b843b44 | 338 | static const uint8_t RST = 7; // Reset BIT |
| va009039 | 0:61831b843b44 | 339 | |
| va009039 | 0:61831b843b44 | 340 | #ifdef W5200 |
| va009039 | 0:61831b843b44 | 341 | static const int SOCKETS = 8; |
| va009039 | 0:61831b843b44 | 342 | #else |
| va009039 | 0:61831b843b44 | 343 | static const int SOCKETS = 4; |
| va009039 | 0:61831b843b44 | 344 | #endif |
| va009039 | 0:61831b843b44 | 345 | |
| va009039 | 0:61831b843b44 | 346 | static const uint16_t SMASK = 0x07FF; // Tx buffer MASK |
| va009039 | 0:61831b843b44 | 347 | static const uint16_t RMASK = 0x07FF; // Rx buffer MASK |
| va009039 | 0:61831b843b44 | 348 | public: |
| va009039 | 0:61831b843b44 | 349 | static const uint16_t SSIZE = 2048; // Max Tx buffer size |
| va009039 | 0:61831b843b44 | 350 | private: |
| va009039 | 0:61831b843b44 | 351 | static const uint16_t RSIZE = 2048; // Max Rx buffer size |
| va009039 | 0:61831b843b44 | 352 | uint16_t SBASE[SOCKETS]; // Tx buffer base address |
| va009039 | 0:61831b843b44 | 353 | uint16_t RBASE[SOCKETS]; // Rx buffer base address |
| va009039 | 0:61831b843b44 | 354 | |
| va009039 | 0:61831b843b44 | 355 | private: |
| va009039 | 0:61831b843b44 | 356 | #if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__) |
| va009039 | 0:61831b843b44 | 357 | inline static void initSS() { DDRB |= _BV(4); }; |
| va009039 | 0:61831b843b44 | 358 | inline static void setSS() { PORTB &= ~_BV(4); }; |
| va009039 | 0:61831b843b44 | 359 | inline static void resetSS() { PORTB |= _BV(4); }; |
| va009039 | 0:61831b843b44 | 360 | #elif defined(__AVR_ATmega32U4__) || defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB162__) |
| va009039 | 0:61831b843b44 | 361 | inline static void initSS() { DDRB |= _BV(0); }; |
| va009039 | 0:61831b843b44 | 362 | inline static void setSS() { PORTB &= ~_BV(0); }; |
| va009039 | 0:61831b843b44 | 363 | inline static void resetSS() { PORTB |= _BV(0); }; |
| va009039 | 0:61831b843b44 | 364 | #else |
| va009039 | 0:61831b843b44 | 365 | #ifndef MBED |
| va009039 | 0:61831b843b44 | 366 | inline static void initSS() { DDRB |= _BV(2); }; |
| va009039 | 0:61831b843b44 | 367 | inline static void setSS() { PORTB &= ~_BV(2); }; |
| va009039 | 0:61831b843b44 | 368 | inline static void resetSS() { PORTB |= _BV(2); }; |
| va009039 | 0:61831b843b44 | 369 | #endif //MBED |
| va009039 | 0:61831b843b44 | 370 | #endif |
| va009039 | 0:61831b843b44 | 371 | |
| va009039 | 0:61831b843b44 | 372 | }; |
| va009039 | 0:61831b843b44 | 373 | |
| va009039 | 0:61831b843b44 | 374 | extern W5100Class W5100; |
| va009039 | 0:61831b843b44 | 375 | |
| va009039 | 0:61831b843b44 | 376 | uint8_t W5100Class::readSn(SOCKET _s, uint16_t _addr) { |
| va009039 | 0:61831b843b44 | 377 | return read(CH_BASE + _s * CH_SIZE + _addr); |
| va009039 | 0:61831b843b44 | 378 | } |
| va009039 | 0:61831b843b44 | 379 | |
| va009039 | 0:61831b843b44 | 380 | uint8_t W5100Class::writeSn(SOCKET _s, uint16_t _addr, uint8_t _data) { |
| va009039 | 0:61831b843b44 | 381 | return write(CH_BASE + _s * CH_SIZE + _addr, _data); |
| va009039 | 0:61831b843b44 | 382 | } |
| va009039 | 0:61831b843b44 | 383 | |
| va009039 | 0:61831b843b44 | 384 | uint16_t W5100Class::readSn(SOCKET _s, uint16_t _addr, uint8_t *_buf, uint16_t _len) { |
| va009039 | 0:61831b843b44 | 385 | return read(CH_BASE + _s * CH_SIZE + _addr, _buf, _len); |
| va009039 | 0:61831b843b44 | 386 | } |
| va009039 | 0:61831b843b44 | 387 | |
| va009039 | 0:61831b843b44 | 388 | uint16_t W5100Class::writeSn(SOCKET _s, uint16_t _addr, uint8_t *_buf, uint16_t _len) { |
| va009039 | 0:61831b843b44 | 389 | return write(CH_BASE + _s * CH_SIZE + _addr, _buf, _len); |
| va009039 | 0:61831b843b44 | 390 | } |
| va009039 | 0:61831b843b44 | 391 | |
| va009039 | 0:61831b843b44 | 392 | void W5100Class::getGatewayIp(uint8_t *_addr) { |
| va009039 | 0:61831b843b44 | 393 | readGAR(_addr); |
| va009039 | 0:61831b843b44 | 394 | } |
| va009039 | 0:61831b843b44 | 395 | |
| va009039 | 0:61831b843b44 | 396 | void W5100Class::setGatewayIp(uint8_t *_addr) { |
| va009039 | 0:61831b843b44 | 397 | writeGAR(_addr); |
| va009039 | 0:61831b843b44 | 398 | } |
| va009039 | 0:61831b843b44 | 399 | |
| va009039 | 0:61831b843b44 | 400 | void W5100Class::getSubnetMask(uint8_t *_addr) { |
| va009039 | 0:61831b843b44 | 401 | readSUBR(_addr); |
| va009039 | 0:61831b843b44 | 402 | } |
| va009039 | 0:61831b843b44 | 403 | |
| va009039 | 0:61831b843b44 | 404 | void W5100Class::setSubnetMask(uint8_t *_addr) { |
| va009039 | 0:61831b843b44 | 405 | writeSUBR(_addr); |
| va009039 | 0:61831b843b44 | 406 | } |
| va009039 | 0:61831b843b44 | 407 | |
| va009039 | 0:61831b843b44 | 408 | void W5100Class::getMACAddress(uint8_t *_addr) { |
| va009039 | 0:61831b843b44 | 409 | readSHAR(_addr); |
| va009039 | 0:61831b843b44 | 410 | } |
| va009039 | 0:61831b843b44 | 411 | |
| va009039 | 0:61831b843b44 | 412 | void W5100Class::setMACAddress(uint8_t *_addr) { |
| va009039 | 0:61831b843b44 | 413 | writeSHAR(_addr); |
| va009039 | 0:61831b843b44 | 414 | } |
| va009039 | 0:61831b843b44 | 415 | |
| va009039 | 0:61831b843b44 | 416 | void W5100Class::getIPAddress(uint8_t *_addr) { |
| va009039 | 0:61831b843b44 | 417 | readSIPR(_addr); |
| va009039 | 0:61831b843b44 | 418 | } |
| va009039 | 0:61831b843b44 | 419 | |
| va009039 | 0:61831b843b44 | 420 | void W5100Class::setIPAddress(uint8_t *_addr) { |
| va009039 | 0:61831b843b44 | 421 | writeSIPR(_addr); |
| va009039 | 0:61831b843b44 | 422 | } |
| va009039 | 0:61831b843b44 | 423 | |
| va009039 | 0:61831b843b44 | 424 | void W5100Class::setRetransmissionTime(uint16_t _timeout) { |
| va009039 | 0:61831b843b44 | 425 | writeRTR(_timeout); |
| va009039 | 0:61831b843b44 | 426 | } |
| va009039 | 0:61831b843b44 | 427 | |
| va009039 | 0:61831b843b44 | 428 | void W5100Class::setRetransmissionCount(uint8_t _retry) { |
| va009039 | 0:61831b843b44 | 429 | writeRCR(_retry); |
| va009039 | 0:61831b843b44 | 430 | } |
| va009039 | 0:61831b843b44 | 431 | |
| va009039 | 0:61831b843b44 | 432 | #endif |