Norimasa Okamoto / Mbed 2 deprecated LPC810_Deep_power-down_example

Deep power-down mode example program.

Dependencies:   mbed

LPC810のDeep power-downモードのテストプログラム。
LEDが消灯している時間はDeep power-downモードで作っています。

Warning

Deep power-downモードではリセットピンによるリセットは効きません。
フラッシュ書き込みにはISPモード(nISP=L)でパワーオンリセットして下さい。

DeepPowerDown.h@1:de1ba63f90b8, 2014-08-27 (annotated)

Committer:
va009039
Date:
Wed Aug 27 11:05:21 2014 +0000
Revision:
1:de1ba63f90b8
Parent:
0:843a94215f82 
update mbed library,change the LED pin.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
va009039 0:843a94215f82 1 #pragma once
va009039 0:843a94215f82 2
va009039 0:843a94215f82 3 class DeepPowerDown {
va009039 0:843a94215f82 4 public:
va009039 0:843a94215f82 5 static void wakeupTimer(uint32_t delay_sec) {
va009039 0:843a94215f82 6 wakeupTimer_ms(delay_sec * 1000);
va009039 0:843a94215f82 7 }
va009039 0:843a94215f82 8
va009039 0:843a94215f82 9 static void wakeupTimer_ms(uint32_t delay_ms) {
va009039 0:843a94215f82 10 LPC_PMU->DPDCTRL |= (1<<2)|(1<<3); // enable low-power oscillator
va009039 0:843a94215f82 11 LPC_SYSCON->SYSAHBCLKCTRL |= 1<<9;
va009039 0:843a94215f82 12 LPC_WKT->CTRL = 0x03; // low power clock(10kHz)
va009039 0:843a94215f82 13 LPC_WKT->COUNT = delay_ms * (10000/1000);
va009039 0:843a94215f82 14 }
va009039 0:843a94215f82 15
va009039 0:843a94215f82 16 static void wakeupPin(bool enable) {
va009039 0:843a94215f82 17 if (enable) {
va009039 0:843a94215f82 18 LPC_PMU->DPDCTRL &= ~(1<<1);
va009039 0:843a94215f82 19 } else {
va009039 0:843a94215f82 20 LPC_PMU->DPDCTRL |= (1<<1);
va009039 0:843a94215f82 21 }
va009039 0:843a94215f82 22 }
va009039 0:843a94215f82 23
va009039 0:843a94215f82 24 static void setData0(uint32_t data) { LPC_PMU->GPREG0 = data; }
va009039 0:843a94215f82 25 static void setData1(uint32_t data) { LPC_PMU->GPREG1 = data; }
va009039 0:843a94215f82 26 static void setData2(uint32_t data) { LPC_PMU->GPREG2 = data; }
va009039 0:843a94215f82 27 static void setData3(uint32_t data) { LPC_PMU->GPREG3 = data; }
va009039 0:843a94215f82 28
va009039 0:843a94215f82 29 static uint32_t getData0() { return LPC_PMU->GPREG0; }
va009039 0:843a94215f82 30 static uint32_t getData1() { return LPC_PMU->GPREG1; }
va009039 0:843a94215f82 31 static uint32_t getData2() { return LPC_PMU->GPREG2; }
va009039 0:843a94215f82 32 static uint32_t getData3() { return LPC_PMU->GPREG3; }
va009039 0:843a94215f82 33
va009039 0:843a94215f82 34 static void entry() {
va009039 0:843a94215f82 35 LPC_PMU->PCON = 0x03|(1<<3); // Deep power-down mode setting
va009039 0:843a94215f82 36 SCB->SCR = 1<<2; // Deep sleep for ARM core
va009039 0:843a94215f82 37 __WFI();
va009039 0:843a94215f82 38 /* NOTREACHED */
va009039 0:843a94215f82 39 }
va009039 0:843a94215f82 40
va009039 0:843a94215f82 41 static bool is_entry() {
va009039 0:843a94215f82 42 return (LPC_PMU->PCON & (1<<11)) ? true : false;
va009039 0:843a94215f82 43 }
va009039 0:843a94215f82 44
va009039 0:843a94215f82 45 static void clear() {
va009039 0:843a94215f82 46 LPC_PMU->PCON &= ~(1<<11); // clear DPDFLAG
va009039 0:843a94215f82 47 }
va009039 0:843a94215f82 48 };
va009039 0:843a94215f82 49