Norimasa Okamoto / Mbed 2 deprecated IPS

IPS(Interpreter for Process Structures) for mbed

Dependencies:   ConfigFile FATFileSystem mbed

IPS port from linux/unix version.

mbed_blinky.ips

0 VAR led1
" LED1 " DigitalOut led1 !
: main
    ANFANG
    1 JA?
      1 led1 @ write
      200 wait_ms
      0 led1 @ write
      200 wait_ms
    DANN/NOCHMAL
;
main

SDFileSystem/SDFileSystem.cpp@4:b62b40563944, 2015-05-24 (annotated)

Committer:
va009039
Date:
Sun May 24 21:29:48 2015 +0900
Revision:
4:b62b40563944
Parent:
1:e74530ad6b9e 
fix I2C

Who changed what in which revision?

UserRevisionLine numberNew contents of line
va009039 1:e74530ad6b9e 1 /* mbed Microcontroller Library
va009039 1:e74530ad6b9e 2 * Copyright (c) 2006-2012 ARM Limited
va009039 1:e74530ad6b9e 3 *
va009039 1:e74530ad6b9e 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
va009039 1:e74530ad6b9e 5 * of this software and associated documentation files (the "Software"), to deal
va009039 1:e74530ad6b9e 6 * in the Software without restriction, including without limitation the rights
va009039 1:e74530ad6b9e 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
va009039 1:e74530ad6b9e 8 * copies of the Software, and to permit persons to whom the Software is
va009039 1:e74530ad6b9e 9 * furnished to do so, subject to the following conditions:
va009039 1:e74530ad6b9e 10 *
va009039 1:e74530ad6b9e 11 * The above copyright notice and this permission notice shall be included in
va009039 1:e74530ad6b9e 12 * all copies or substantial portions of the Software.
va009039 1:e74530ad6b9e 13 *
va009039 1:e74530ad6b9e 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
va009039 1:e74530ad6b9e 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
va009039 1:e74530ad6b9e 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
va009039 1:e74530ad6b9e 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
va009039 1:e74530ad6b9e 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
va009039 1:e74530ad6b9e 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
va009039 1:e74530ad6b9e 20 * SOFTWARE.
va009039 1:e74530ad6b9e 21 */
va009039 1:e74530ad6b9e 22 /* Introduction
va009039 1:e74530ad6b9e 23 * ------------
va009039 1:e74530ad6b9e 24 * SD and MMC cards support a number of interfaces, but common to them all
va009039 1:e74530ad6b9e 25 * is one based on SPI. This is the one I'm implmenting because it means
va009039 1:e74530ad6b9e 26 * it is much more portable even though not so performant, and we already
va009039 1:e74530ad6b9e 27 * have the mbed SPI Interface!
va009039 1:e74530ad6b9e 28 *
va009039 1:e74530ad6b9e 29 * The main reference I'm using is Chapter 7, "SPI Mode" of:
va009039 1:e74530ad6b9e 30 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
va009039 1:e74530ad6b9e 31 *
va009039 1:e74530ad6b9e 32 * SPI Startup
va009039 1:e74530ad6b9e 33 * -----------
va009039 1:e74530ad6b9e 34 * The SD card powers up in SD mode. The SPI interface mode is selected by
va009039 1:e74530ad6b9e 35 * asserting CS low and sending the reset command (CMD0). The card will
va009039 1:e74530ad6b9e 36 * respond with a (R1) response.
va009039 1:e74530ad6b9e 37 *
va009039 1:e74530ad6b9e 38 * CMD8 is optionally sent to determine the voltage range supported, and
va009039 1:e74530ad6b9e 39 * indirectly determine whether it is a version 1.x SD/non-SD card or
va009039 1:e74530ad6b9e 40 * version 2.x. I'll just ignore this for now.
va009039 1:e74530ad6b9e 41 *
va009039 1:e74530ad6b9e 42 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
va009039 1:e74530ad6b9e 43 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
va009039 1:e74530ad6b9e 44 *
va009039 1:e74530ad6b9e 45 * You should also indicate whether the host supports High Capicity cards,
va009039 1:e74530ad6b9e 46 * and check whether the card is high capacity - i'll also ignore this
va009039 1:e74530ad6b9e 47 *
va009039 1:e74530ad6b9e 48 * SPI Protocol
va009039 1:e74530ad6b9e 49 * ------------
va009039 1:e74530ad6b9e 50 * The SD SPI protocol is based on transactions made up of 8-bit words, with
va009039 1:e74530ad6b9e 51 * the host starting every bus transaction by asserting the CS signal low. The
va009039 1:e74530ad6b9e 52 * card always responds to commands, data blocks and errors.
va009039 1:e74530ad6b9e 53 *
va009039 1:e74530ad6b9e 54 * The protocol supports a CRC, but by default it is off (except for the
va009039 1:e74530ad6b9e 55 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
va009039 1:e74530ad6b9e 56 * I'll leave the CRC off I think!
va009039 1:e74530ad6b9e 57 *
va009039 1:e74530ad6b9e 58 * Standard capacity cards have variable data block sizes, whereas High
va009039 1:e74530ad6b9e 59 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
va009039 1:e74530ad6b9e 60 * just always use the Standard Capacity cards with a block size of 512 bytes.
va009039 1:e74530ad6b9e 61 * This is set with CMD16.
va009039 1:e74530ad6b9e 62 *
va009039 1:e74530ad6b9e 63 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
va009039 1:e74530ad6b9e 64 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
va009039 1:e74530ad6b9e 65 * the card gets a read command, it responds with a response token, and then
va009039 1:e74530ad6b9e 66 * a data token or an error.
va009039 1:e74530ad6b9e 67 *
va009039 1:e74530ad6b9e 68 * SPI Command Format
va009039 1:e74530ad6b9e 69 * ------------------
va009039 1:e74530ad6b9e 70 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
va009039 1:e74530ad6b9e 71 *
va009039 1:e74530ad6b9e 72 * +---------------+------------+------------+-----------+----------+--------------+
va009039 1:e74530ad6b9e 73 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
va009039 1:e74530ad6b9e 74 * +---------------+------------+------------+-----------+----------+--------------+
va009039 1:e74530ad6b9e 75 *
va009039 1:e74530ad6b9e 76 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
va009039 1:e74530ad6b9e 77 *
va009039 1:e74530ad6b9e 78 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
va009039 1:e74530ad6b9e 79 *
va009039 1:e74530ad6b9e 80 * SPI Response Format
va009039 1:e74530ad6b9e 81 * -------------------
va009039 1:e74530ad6b9e 82 * The main response format (R1) is a status byte (normally zero). Key flags:
va009039 1:e74530ad6b9e 83 * idle - 1 if the card is in an idle state/initialising
va009039 1:e74530ad6b9e 84 * cmd - 1 if an illegal command code was detected
va009039 1:e74530ad6b9e 85 *
va009039 1:e74530ad6b9e 86 * +-------------------------------------------------+
va009039 1:e74530ad6b9e 87 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
va009039 1:e74530ad6b9e 88 * +-------------------------------------------------+
va009039 1:e74530ad6b9e 89 *
va009039 1:e74530ad6b9e 90 * R1b is the same, except it is followed by a busy signal (zeros) until
va009039 1:e74530ad6b9e 91 * the first non-zero byte when it is ready again.
va009039 1:e74530ad6b9e 92 *
va009039 1:e74530ad6b9e 93 * Data Response Token
va009039 1:e74530ad6b9e 94 * -------------------
va009039 1:e74530ad6b9e 95 * Every data block written to the card is acknowledged by a byte
va009039 1:e74530ad6b9e 96 * response token
va009039 1:e74530ad6b9e 97 *
va009039 1:e74530ad6b9e 98 * +----------------------+
va009039 1:e74530ad6b9e 99 * | xxx | 0 | status | 1 |
va009039 1:e74530ad6b9e 100 * +----------------------+
va009039 1:e74530ad6b9e 101 * 010 - OK!
va009039 1:e74530ad6b9e 102 * 101 - CRC Error
va009039 1:e74530ad6b9e 103 * 110 - Write Error
va009039 1:e74530ad6b9e 104 *
va009039 1:e74530ad6b9e 105 * Single Block Read and Write
va009039 1:e74530ad6b9e 106 * ---------------------------
va009039 1:e74530ad6b9e 107 *
va009039 1:e74530ad6b9e 108 * Block transfers have a byte header, followed by the data, followed
va009039 1:e74530ad6b9e 109 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
va009039 1:e74530ad6b9e 110 *
va009039 1:e74530ad6b9e 111 * +------+---------+---------+- - - -+---------+-----------+----------+
va009039 1:e74530ad6b9e 112 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
va009039 1:e74530ad6b9e 113 * +------+---------+---------+- - - -+---------+-----------+----------+
va009039 1:e74530ad6b9e 114 */
va009039 1:e74530ad6b9e 115 #include "SDFileSystem.h"
va009039 1:e74530ad6b9e 116 #include "mbed_debug.h"
va009039 1:e74530ad6b9e 117
va009039 1:e74530ad6b9e 118 #define SD_COMMAND_TIMEOUT 5000
va009039 1:e74530ad6b9e 119
va009039 1:e74530ad6b9e 120 #define SD_DBG 0
va009039 1:e74530ad6b9e 121
va009039 1:e74530ad6b9e 122 SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name) :
va009039 1:e74530ad6b9e 123 FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs), _is_initialized(0) {
va009039 1:e74530ad6b9e 124 _cs = 1;
va009039 1:e74530ad6b9e 125
va009039 1:e74530ad6b9e 126 // Set default to 100kHz for initialisation and 1MHz for data transfer
va009039 1:e74530ad6b9e 127 _init_sck = 100000;
va009039 1:e74530ad6b9e 128 _transfer_sck = 1000000;
va009039 1:e74530ad6b9e 129 }
va009039 1:e74530ad6b9e 130
va009039 1:e74530ad6b9e 131 #define R1_IDLE_STATE (1 << 0)
va009039 1:e74530ad6b9e 132 #define R1_ERASE_RESET (1 << 1)
va009039 1:e74530ad6b9e 133 #define R1_ILLEGAL_COMMAND (1 << 2)
va009039 1:e74530ad6b9e 134 #define R1_COM_CRC_ERROR (1 << 3)
va009039 1:e74530ad6b9e 135 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
va009039 1:e74530ad6b9e 136 #define R1_ADDRESS_ERROR (1 << 5)
va009039 1:e74530ad6b9e 137 #define R1_PARAMETER_ERROR (1 << 6)
va009039 1:e74530ad6b9e 138
va009039 1:e74530ad6b9e 139 // Types
va009039 1:e74530ad6b9e 140 // - v1.x Standard Capacity
va009039 1:e74530ad6b9e 141 // - v2.x Standard Capacity
va009039 1:e74530ad6b9e 142 // - v2.x High Capacity
va009039 1:e74530ad6b9e 143 // - Not recognised as an SD Card
va009039 1:e74530ad6b9e 144 #define SDCARD_FAIL 0
va009039 1:e74530ad6b9e 145 #define SDCARD_V1 1
va009039 1:e74530ad6b9e 146 #define SDCARD_V2 2
va009039 1:e74530ad6b9e 147 #define SDCARD_V2HC 3
va009039 1:e74530ad6b9e 148
va009039 1:e74530ad6b9e 149 int SDFileSystem::initialise_card() {
va009039 1:e74530ad6b9e 150 // Set to SCK for initialisation, and clock card with cs = 1
va009039 1:e74530ad6b9e 151 _spi.frequency(_init_sck);
va009039 1:e74530ad6b9e 152 _cs = 1;
va009039 1:e74530ad6b9e 153 for (int i = 0; i < 16; i++) {
va009039 1:e74530ad6b9e 154 _spi.write(0xFF);
va009039 1:e74530ad6b9e 155 }
va009039 1:e74530ad6b9e 156
va009039 1:e74530ad6b9e 157 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
va009039 1:e74530ad6b9e 158 if (_cmd(0, 0) != R1_IDLE_STATE) {
va009039 1:e74530ad6b9e 159 debug("No disk, or could not put SD card in to SPI idle state\n");
va009039 1:e74530ad6b9e 160 return SDCARD_FAIL;
va009039 1:e74530ad6b9e 161 }
va009039 1:e74530ad6b9e 162
va009039 1:e74530ad6b9e 163 // send CMD8 to determine whther it is ver 2.x
va009039 1:e74530ad6b9e 164 int r = _cmd8();
va009039 1:e74530ad6b9e 165 if (r == R1_IDLE_STATE) {
va009039 1:e74530ad6b9e 166 return initialise_card_v2();
va009039 1:e74530ad6b9e 167 } else if (r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
va009039 1:e74530ad6b9e 168 return initialise_card_v1();
va009039 1:e74530ad6b9e 169 } else {
va009039 1:e74530ad6b9e 170 debug("Not in idle state after sending CMD8 (not an SD card?)\n");
va009039 1:e74530ad6b9e 171 return SDCARD_FAIL;
va009039 1:e74530ad6b9e 172 }
va009039 1:e74530ad6b9e 173 }
va009039 1:e74530ad6b9e 174
va009039 1:e74530ad6b9e 175 int SDFileSystem::initialise_card_v1() {
va009039 1:e74530ad6b9e 176 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
va009039 1:e74530ad6b9e 177 _cmd(55, 0);
va009039 1:e74530ad6b9e 178 if (_cmd(41, 0) == 0) {
va009039 1:e74530ad6b9e 179 cdv = 512;
va009039 1:e74530ad6b9e 180 debug_if(SD_DBG, "\n\rInit: SEDCARD_V1\n\r");
va009039 1:e74530ad6b9e 181 return SDCARD_V1;
va009039 1:e74530ad6b9e 182 }
va009039 1:e74530ad6b9e 183 }
va009039 1:e74530ad6b9e 184
va009039 1:e74530ad6b9e 185 debug("Timeout waiting for v1.x card\n");
va009039 1:e74530ad6b9e 186 return SDCARD_FAIL;
va009039 1:e74530ad6b9e 187 }
va009039 1:e74530ad6b9e 188
va009039 1:e74530ad6b9e 189 int SDFileSystem::initialise_card_v2() {
va009039 1:e74530ad6b9e 190 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
va009039 1:e74530ad6b9e 191 wait_ms(50);
va009039 1:e74530ad6b9e 192 _cmd58();
va009039 1:e74530ad6b9e 193 _cmd(55, 0);
va009039 1:e74530ad6b9e 194 if (_cmd(41, 0x40000000) == 0) {
va009039 1:e74530ad6b9e 195 _cmd58();
va009039 1:e74530ad6b9e 196 debug_if(SD_DBG, "\n\rInit: SDCARD_V2\n\r");
va009039 1:e74530ad6b9e 197 cdv = 1;
va009039 1:e74530ad6b9e 198 return SDCARD_V2;
va009039 1:e74530ad6b9e 199 }
va009039 1:e74530ad6b9e 200 }
va009039 1:e74530ad6b9e 201
va009039 1:e74530ad6b9e 202 debug("Timeout waiting for v2.x card\n");
va009039 1:e74530ad6b9e 203 return SDCARD_FAIL;
va009039 1:e74530ad6b9e 204 }
va009039 1:e74530ad6b9e 205
va009039 1:e74530ad6b9e 206 int SDFileSystem::disk_initialize() {
va009039 1:e74530ad6b9e 207 _is_initialized = initialise_card();
va009039 1:e74530ad6b9e 208 if (_is_initialized == 0) {
va009039 1:e74530ad6b9e 209 debug("Fail to initialize card\n");
va009039 1:e74530ad6b9e 210 return 1;
va009039 1:e74530ad6b9e 211 }
va009039 1:e74530ad6b9e 212 debug_if(SD_DBG, "init card = %d\n", _is_initialized);
va009039 1:e74530ad6b9e 213 _sectors = _sd_sectors();
va009039 1:e74530ad6b9e 214
va009039 1:e74530ad6b9e 215 // Set block length to 512 (CMD16)
va009039 1:e74530ad6b9e 216 if (_cmd(16, 512) != 0) {
va009039 1:e74530ad6b9e 217 debug("Set 512-byte block timed out\n");
va009039 1:e74530ad6b9e 218 return 1;
va009039 1:e74530ad6b9e 219 }
va009039 1:e74530ad6b9e 220
va009039 1:e74530ad6b9e 221 // Set SCK for data transfer
va009039 1:e74530ad6b9e 222 _spi.frequency(_transfer_sck);
va009039 1:e74530ad6b9e 223 return 0;
va009039 1:e74530ad6b9e 224 }
va009039 1:e74530ad6b9e 225
va009039 1:e74530ad6b9e 226 int SDFileSystem::disk_write(const uint8_t* buffer, uint64_t block_number, uint8_t count) {
va009039 1:e74530ad6b9e 227 if (!_is_initialized) {
va009039 1:e74530ad6b9e 228 return -1;
va009039 1:e74530ad6b9e 229 }
va009039 1:e74530ad6b9e 230
va009039 1:e74530ad6b9e 231 for (uint64_t b = block_number; b < block_number + count; b++) {
va009039 1:e74530ad6b9e 232 // set write address for single block (CMD24)
va009039 1:e74530ad6b9e 233 if (_cmd(24, b * cdv) != 0) {
va009039 1:e74530ad6b9e 234 return 1;
va009039 1:e74530ad6b9e 235 }
va009039 1:e74530ad6b9e 236
va009039 1:e74530ad6b9e 237 // send the data block
va009039 1:e74530ad6b9e 238 _write(buffer, 512);
va009039 1:e74530ad6b9e 239 buffer += 512;
va009039 1:e74530ad6b9e 240 }
va009039 1:e74530ad6b9e 241
va009039 1:e74530ad6b9e 242 return 0;
va009039 1:e74530ad6b9e 243 }
va009039 1:e74530ad6b9e 244
va009039 1:e74530ad6b9e 245 int SDFileSystem::disk_read(uint8_t* buffer, uint64_t block_number, uint8_t count) {
va009039 1:e74530ad6b9e 246 if (!_is_initialized) {
va009039 1:e74530ad6b9e 247 return -1;
va009039 1:e74530ad6b9e 248 }
va009039 1:e74530ad6b9e 249
va009039 1:e74530ad6b9e 250 for (uint64_t b = block_number; b < block_number + count; b++) {
va009039 1:e74530ad6b9e 251 // set read address for single block (CMD17)
va009039 1:e74530ad6b9e 252 if (_cmd(17, b * cdv) != 0) {
va009039 1:e74530ad6b9e 253 return 1;
va009039 1:e74530ad6b9e 254 }
va009039 1:e74530ad6b9e 255
va009039 1:e74530ad6b9e 256 // receive the data
va009039 1:e74530ad6b9e 257 _read(buffer, 512);
va009039 1:e74530ad6b9e 258 buffer += 512;
va009039 1:e74530ad6b9e 259 }
va009039 1:e74530ad6b9e 260
va009039 1:e74530ad6b9e 261 return 0;
va009039 1:e74530ad6b9e 262 }
va009039 1:e74530ad6b9e 263
va009039 1:e74530ad6b9e 264 int SDFileSystem::disk_status() {
va009039 1:e74530ad6b9e 265 // FATFileSystem::disk_status() returns 0 when initialized
va009039 1:e74530ad6b9e 266 if (_is_initialized) {
va009039 1:e74530ad6b9e 267 return 0;
va009039 1:e74530ad6b9e 268 } else {
va009039 1:e74530ad6b9e 269 return 1;
va009039 1:e74530ad6b9e 270 }
va009039 1:e74530ad6b9e 271 }
va009039 1:e74530ad6b9e 272
va009039 1:e74530ad6b9e 273 int SDFileSystem::disk_sync() { return 0; }
va009039 1:e74530ad6b9e 274 uint64_t SDFileSystem::disk_sectors() { return _sectors; }
va009039 1:e74530ad6b9e 275
va009039 1:e74530ad6b9e 276
va009039 1:e74530ad6b9e 277 // PRIVATE FUNCTIONS
va009039 1:e74530ad6b9e 278 int SDFileSystem::_cmd(int cmd, int arg) {
va009039 1:e74530ad6b9e 279 _cs = 0;
va009039 1:e74530ad6b9e 280
va009039 1:e74530ad6b9e 281 // send a command
va009039 1:e74530ad6b9e 282 _spi.write(0x40 | cmd);
va009039 1:e74530ad6b9e 283 _spi.write(arg >> 24);
va009039 1:e74530ad6b9e 284 _spi.write(arg >> 16);
va009039 1:e74530ad6b9e 285 _spi.write(arg >> 8);
va009039 1:e74530ad6b9e 286 _spi.write(arg >> 0);
va009039 1:e74530ad6b9e 287 _spi.write(0x95);
va009039 1:e74530ad6b9e 288
va009039 1:e74530ad6b9e 289 // wait for the repsonse (response[7] == 0)
va009039 1:e74530ad6b9e 290 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
va009039 1:e74530ad6b9e 291 int response = _spi.write(0xFF);
va009039 1:e74530ad6b9e 292 if (!(response & 0x80)) {
va009039 1:e74530ad6b9e 293 _cs = 1;
va009039 1:e74530ad6b9e 294 _spi.write(0xFF);
va009039 1:e74530ad6b9e 295 return response;
va009039 1:e74530ad6b9e 296 }
va009039 1:e74530ad6b9e 297 }
va009039 1:e74530ad6b9e 298 _cs = 1;
va009039 1:e74530ad6b9e 299 _spi.write(0xFF);
va009039 1:e74530ad6b9e 300 return -1; // timeout
va009039 1:e74530ad6b9e 301 }
va009039 1:e74530ad6b9e 302 int SDFileSystem::_cmdx(int cmd, int arg) {
va009039 1:e74530ad6b9e 303 _cs = 0;
va009039 1:e74530ad6b9e 304
va009039 1:e74530ad6b9e 305 // send a command
va009039 1:e74530ad6b9e 306 _spi.write(0x40 | cmd);
va009039 1:e74530ad6b9e 307 _spi.write(arg >> 24);
va009039 1:e74530ad6b9e 308 _spi.write(arg >> 16);
va009039 1:e74530ad6b9e 309 _spi.write(arg >> 8);
va009039 1:e74530ad6b9e 310 _spi.write(arg >> 0);
va009039 1:e74530ad6b9e 311 _spi.write(0x95);
va009039 1:e74530ad6b9e 312
va009039 1:e74530ad6b9e 313 // wait for the repsonse (response[7] == 0)
va009039 1:e74530ad6b9e 314 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
va009039 1:e74530ad6b9e 315 int response = _spi.write(0xFF);
va009039 1:e74530ad6b9e 316 if (!(response & 0x80)) {
va009039 1:e74530ad6b9e 317 return response;
va009039 1:e74530ad6b9e 318 }
va009039 1:e74530ad6b9e 319 }
va009039 1:e74530ad6b9e 320 _cs = 1;
va009039 1:e74530ad6b9e 321 _spi.write(0xFF);
va009039 1:e74530ad6b9e 322 return -1; // timeout
va009039 1:e74530ad6b9e 323 }
va009039 1:e74530ad6b9e 324
va009039 1:e74530ad6b9e 325
va009039 1:e74530ad6b9e 326 int SDFileSystem::_cmd58() {
va009039 1:e74530ad6b9e 327 _cs = 0;
va009039 1:e74530ad6b9e 328 int arg = 0;
va009039 1:e74530ad6b9e 329
va009039 1:e74530ad6b9e 330 // send a command
va009039 1:e74530ad6b9e 331 _spi.write(0x40 | 58);
va009039 1:e74530ad6b9e 332 _spi.write(arg >> 24);
va009039 1:e74530ad6b9e 333 _spi.write(arg >> 16);
va009039 1:e74530ad6b9e 334 _spi.write(arg >> 8);
va009039 1:e74530ad6b9e 335 _spi.write(arg >> 0);
va009039 1:e74530ad6b9e 336 _spi.write(0x95);
va009039 1:e74530ad6b9e 337
va009039 1:e74530ad6b9e 338 // wait for the repsonse (response[7] == 0)
va009039 1:e74530ad6b9e 339 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
va009039 1:e74530ad6b9e 340 int response = _spi.write(0xFF);
va009039 1:e74530ad6b9e 341 if (!(response & 0x80)) {
va009039 1:e74530ad6b9e 342 int ocr = _spi.write(0xFF) << 24;
va009039 1:e74530ad6b9e 343 ocr |= _spi.write(0xFF) << 16;
va009039 1:e74530ad6b9e 344 ocr |= _spi.write(0xFF) << 8;
va009039 1:e74530ad6b9e 345 ocr |= _spi.write(0xFF) << 0;
va009039 1:e74530ad6b9e 346 _cs = 1;
va009039 1:e74530ad6b9e 347 _spi.write(0xFF);
va009039 1:e74530ad6b9e 348 return response;
va009039 1:e74530ad6b9e 349 }
va009039 1:e74530ad6b9e 350 }
va009039 1:e74530ad6b9e 351 _cs = 1;
va009039 1:e74530ad6b9e 352 _spi.write(0xFF);
va009039 1:e74530ad6b9e 353 return -1; // timeout
va009039 1:e74530ad6b9e 354 }
va009039 1:e74530ad6b9e 355
va009039 1:e74530ad6b9e 356 int SDFileSystem::_cmd8() {
va009039 1:e74530ad6b9e 357 _cs = 0;
va009039 1:e74530ad6b9e 358
va009039 1:e74530ad6b9e 359 // send a command
va009039 1:e74530ad6b9e 360 _spi.write(0x40 | 8); // CMD8
va009039 1:e74530ad6b9e 361 _spi.write(0x00); // reserved
va009039 1:e74530ad6b9e 362 _spi.write(0x00); // reserved
va009039 1:e74530ad6b9e 363 _spi.write(0x01); // 3.3v
va009039 1:e74530ad6b9e 364 _spi.write(0xAA); // check pattern
va009039 1:e74530ad6b9e 365 _spi.write(0x87); // crc
va009039 1:e74530ad6b9e 366
va009039 1:e74530ad6b9e 367 // wait for the repsonse (response[7] == 0)
va009039 1:e74530ad6b9e 368 for (int i = 0; i < SD_COMMAND_TIMEOUT * 1000; i++) {
va009039 1:e74530ad6b9e 369 char response[5];
va009039 1:e74530ad6b9e 370 response[0] = _spi.write(0xFF);
va009039 1:e74530ad6b9e 371 if (!(response[0] & 0x80)) {
va009039 1:e74530ad6b9e 372 for (int j = 1; j < 5; j++) {
va009039 1:e74530ad6b9e 373 response[i] = _spi.write(0xFF);
va009039 1:e74530ad6b9e 374 }
va009039 1:e74530ad6b9e 375 _cs = 1;
va009039 1:e74530ad6b9e 376 _spi.write(0xFF);
va009039 1:e74530ad6b9e 377 return response[0];
va009039 1:e74530ad6b9e 378 }
va009039 1:e74530ad6b9e 379 }
va009039 1:e74530ad6b9e 380 _cs = 1;
va009039 1:e74530ad6b9e 381 _spi.write(0xFF);
va009039 1:e74530ad6b9e 382 return -1; // timeout
va009039 1:e74530ad6b9e 383 }
va009039 1:e74530ad6b9e 384
va009039 1:e74530ad6b9e 385 int SDFileSystem::_read(uint8_t *buffer, uint32_t length) {
va009039 1:e74530ad6b9e 386 _cs = 0;
va009039 1:e74530ad6b9e 387
va009039 1:e74530ad6b9e 388 // read until start byte (0xFF)
va009039 1:e74530ad6b9e 389 while (_spi.write(0xFF) != 0xFE);
va009039 1:e74530ad6b9e 390
va009039 1:e74530ad6b9e 391 // read data
va009039 1:e74530ad6b9e 392 for (uint32_t i = 0; i < length; i++) {
va009039 1:e74530ad6b9e 393 buffer[i] = _spi.write(0xFF);
va009039 1:e74530ad6b9e 394 }
va009039 1:e74530ad6b9e 395 _spi.write(0xFF); // checksum
va009039 1:e74530ad6b9e 396 _spi.write(0xFF);
va009039 1:e74530ad6b9e 397
va009039 1:e74530ad6b9e 398 _cs = 1;
va009039 1:e74530ad6b9e 399 _spi.write(0xFF);
va009039 1:e74530ad6b9e 400 return 0;
va009039 1:e74530ad6b9e 401 }
va009039 1:e74530ad6b9e 402
va009039 1:e74530ad6b9e 403 int SDFileSystem::_write(const uint8_t*buffer, uint32_t length) {
va009039 1:e74530ad6b9e 404 _cs = 0;
va009039 1:e74530ad6b9e 405
va009039 1:e74530ad6b9e 406 // indicate start of block
va009039 1:e74530ad6b9e 407 _spi.write(0xFE);
va009039 1:e74530ad6b9e 408
va009039 1:e74530ad6b9e 409 // write the data
va009039 1:e74530ad6b9e 410 for (uint32_t i = 0; i < length; i++) {
va009039 1:e74530ad6b9e 411 _spi.write(buffer[i]);
va009039 1:e74530ad6b9e 412 }
va009039 1:e74530ad6b9e 413
va009039 1:e74530ad6b9e 414 // write the checksum
va009039 1:e74530ad6b9e 415 _spi.write(0xFF);
va009039 1:e74530ad6b9e 416 _spi.write(0xFF);
va009039 1:e74530ad6b9e 417
va009039 1:e74530ad6b9e 418 // check the response token
va009039 1:e74530ad6b9e 419 if ((_spi.write(0xFF) & 0x1F) != 0x05) {
va009039 1:e74530ad6b9e 420 _cs = 1;
va009039 1:e74530ad6b9e 421 _spi.write(0xFF);
va009039 1:e74530ad6b9e 422 return 1;
va009039 1:e74530ad6b9e 423 }
va009039 1:e74530ad6b9e 424
va009039 1:e74530ad6b9e 425 // wait for write to finish
va009039 1:e74530ad6b9e 426 while (_spi.write(0xFF) == 0);
va009039 1:e74530ad6b9e 427
va009039 1:e74530ad6b9e 428 _cs = 1;
va009039 1:e74530ad6b9e 429 _spi.write(0xFF);
va009039 1:e74530ad6b9e 430 return 0;
va009039 1:e74530ad6b9e 431 }
va009039 1:e74530ad6b9e 432
va009039 1:e74530ad6b9e 433 static uint32_t ext_bits(unsigned char *data, int msb, int lsb) {
va009039 1:e74530ad6b9e 434 uint32_t bits = 0;
va009039 1:e74530ad6b9e 435 uint32_t size = 1 + msb - lsb;
va009039 1:e74530ad6b9e 436 for (uint32_t i = 0; i < size; i++) {
va009039 1:e74530ad6b9e 437 uint32_t position = lsb + i;
va009039 1:e74530ad6b9e 438 uint32_t byte = 15 - (position >> 3);
va009039 1:e74530ad6b9e 439 uint32_t bit = position & 0x7;
va009039 1:e74530ad6b9e 440 uint32_t value = (data[byte] >> bit) & 1;
va009039 1:e74530ad6b9e 441 bits |= value << i;
va009039 1:e74530ad6b9e 442 }
va009039 1:e74530ad6b9e 443 return bits;
va009039 1:e74530ad6b9e 444 }
va009039 1:e74530ad6b9e 445
va009039 1:e74530ad6b9e 446 uint64_t SDFileSystem::_sd_sectors() {
va009039 1:e74530ad6b9e 447 uint32_t c_size, c_size_mult, read_bl_len;
va009039 1:e74530ad6b9e 448 uint32_t block_len, mult, blocknr, capacity;
va009039 1:e74530ad6b9e 449 uint32_t hc_c_size;
va009039 1:e74530ad6b9e 450 uint64_t blocks;
va009039 1:e74530ad6b9e 451
va009039 1:e74530ad6b9e 452 // CMD9, Response R2 (R1 byte + 16-byte block read)
va009039 1:e74530ad6b9e 453 if (_cmdx(9, 0) != 0) {
va009039 1:e74530ad6b9e 454 debug("Didn't get a response from the disk\n");
va009039 1:e74530ad6b9e 455 return 0;
va009039 1:e74530ad6b9e 456 }
va009039 1:e74530ad6b9e 457
va009039 1:e74530ad6b9e 458 uint8_t csd[16];
va009039 1:e74530ad6b9e 459 if (_read(csd, 16) != 0) {
va009039 1:e74530ad6b9e 460 debug("Couldn't read csd response from disk\n");
va009039 1:e74530ad6b9e 461 return 0;
va009039 1:e74530ad6b9e 462 }
va009039 1:e74530ad6b9e 463
va009039 1:e74530ad6b9e 464 // csd_structure : csd[127:126]
va009039 1:e74530ad6b9e 465 // c_size : csd[73:62]
va009039 1:e74530ad6b9e 466 // c_size_mult : csd[49:47]
va009039 1:e74530ad6b9e 467 // read_bl_len : csd[83:80] - the *maximum* read block length
va009039 1:e74530ad6b9e 468
va009039 1:e74530ad6b9e 469 int csd_structure = ext_bits(csd, 127, 126);
va009039 1:e74530ad6b9e 470
va009039 1:e74530ad6b9e 471 switch (csd_structure) {
va009039 1:e74530ad6b9e 472 case 0:
va009039 1:e74530ad6b9e 473 cdv = 512;
va009039 1:e74530ad6b9e 474 c_size = ext_bits(csd, 73, 62);
va009039 1:e74530ad6b9e 475 c_size_mult = ext_bits(csd, 49, 47);
va009039 1:e74530ad6b9e 476 read_bl_len = ext_bits(csd, 83, 80);
va009039 1:e74530ad6b9e 477
va009039 1:e74530ad6b9e 478 block_len = 1 << read_bl_len;
va009039 1:e74530ad6b9e 479 mult = 1 << (c_size_mult + 2);
va009039 1:e74530ad6b9e 480 blocknr = (c_size + 1) * mult;
va009039 1:e74530ad6b9e 481 capacity = blocknr * block_len;
va009039 1:e74530ad6b9e 482 blocks = capacity / 512;
va009039 1:e74530ad6b9e 483 debug_if(SD_DBG, "\n\rSDCard\n\rc_size: %d \n\rcapacity: %ld \n\rsectors: %lld\n\r", c_size, capacity, blocks);
va009039 1:e74530ad6b9e 484 break;
va009039 1:e74530ad6b9e 485
va009039 1:e74530ad6b9e 486 case 1:
va009039 1:e74530ad6b9e 487 cdv = 1;
va009039 1:e74530ad6b9e 488 hc_c_size = ext_bits(csd, 63, 48);
va009039 1:e74530ad6b9e 489 blocks = (hc_c_size+1)*1024;
va009039 1:e74530ad6b9e 490 debug_if(SD_DBG, "\n\rSDHC Card \n\rhc_c_size: %d\n\rcapacity: %lld \n\rsectors: %lld\n\r", hc_c_size, blocks*512, blocks);
va009039 1:e74530ad6b9e 491 break;
va009039 1:e74530ad6b9e 492
va009039 1:e74530ad6b9e 493 default:
va009039 1:e74530ad6b9e 494 debug("CSD struct unsupported\r\n");
va009039 1:e74530ad6b9e 495 return 0;
va009039 1:e74530ad6b9e 496 };
va009039 1:e74530ad6b9e 497 return blocks;
va009039 1:e74530ad6b9e 498 }