fork of lwip-eth for publication
Fork of lwip-eth by
arch/TARGET_STM/stm32f4_emac.c@34:3fd06fad5020, 2018-04-30 (annotated)
- Committer:
- urvishpatel12
- Date:
- Mon Apr 30 00:06:06 2018 +0000
- Revision:
- 34:3fd06fad5020
- Parent:
- 25:ba0a1c5bf54e
Add missing definition
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 25:ba0a1c5bf54e | 1 | |
mbed_official | 25:ba0a1c5bf54e | 2 | #include "stm32f4xx_hal.h" |
mbed_official | 25:ba0a1c5bf54e | 3 | #include "lwip/opt.h" |
mbed_official | 25:ba0a1c5bf54e | 4 | |
mbed_official | 25:ba0a1c5bf54e | 5 | #include "lwip/timers.h" |
mbed_official | 25:ba0a1c5bf54e | 6 | #include "netif/etharp.h" |
mbed_official | 25:ba0a1c5bf54e | 7 | #include "lwip/tcpip.h" |
mbed_official | 25:ba0a1c5bf54e | 8 | #include <string.h> |
mbed_official | 25:ba0a1c5bf54e | 9 | #include "cmsis_os.h" |
mbed_official | 25:ba0a1c5bf54e | 10 | #include "mbed_interface.h" |
mbed_official | 25:ba0a1c5bf54e | 11 | |
mbed_official | 25:ba0a1c5bf54e | 12 | /** @defgroup lwipstm32f4xx_emac_DRIVER stm32f4 EMAC driver for LWIP |
mbed_official | 25:ba0a1c5bf54e | 13 | * @ingroup lwip_emac |
mbed_official | 25:ba0a1c5bf54e | 14 | * |
mbed_official | 25:ba0a1c5bf54e | 15 | * @{ |
mbed_official | 25:ba0a1c5bf54e | 16 | */ |
mbed_official | 25:ba0a1c5bf54e | 17 | |
mbed_official | 25:ba0a1c5bf54e | 18 | #define RECV_TASK_PRI (osPriorityHigh) |
mbed_official | 25:ba0a1c5bf54e | 19 | #define PHY_TASK_PRI (osPriorityLow) |
mbed_official | 25:ba0a1c5bf54e | 20 | #define PHY_TASK_WAIT (200) |
mbed_official | 25:ba0a1c5bf54e | 21 | |
mbed_official | 25:ba0a1c5bf54e | 22 | |
mbed_official | 25:ba0a1c5bf54e | 23 | #if defined (__ICCARM__) /*!< IAR Compiler */ |
mbed_official | 25:ba0a1c5bf54e | 24 | #pragma data_alignment=4 |
mbed_official | 25:ba0a1c5bf54e | 25 | #endif |
mbed_official | 25:ba0a1c5bf54e | 26 | __ALIGN_BEGIN ETH_DMADescTypeDef DMARxDscrTab[ETH_RXBUFNB] __ALIGN_END; /* Ethernet Rx MA Descriptor */ |
mbed_official | 25:ba0a1c5bf54e | 27 | |
mbed_official | 25:ba0a1c5bf54e | 28 | #if defined (__ICCARM__) /*!< IAR Compiler */ |
mbed_official | 25:ba0a1c5bf54e | 29 | #pragma data_alignment=4 |
mbed_official | 25:ba0a1c5bf54e | 30 | #endif |
mbed_official | 25:ba0a1c5bf54e | 31 | __ALIGN_BEGIN ETH_DMADescTypeDef DMATxDscrTab[ETH_TXBUFNB] __ALIGN_END; /* Ethernet Tx DMA Descriptor */ |
mbed_official | 25:ba0a1c5bf54e | 32 | |
mbed_official | 25:ba0a1c5bf54e | 33 | #if defined (__ICCARM__) /*!< IAR Compiler */ |
mbed_official | 25:ba0a1c5bf54e | 34 | #pragma data_alignment=4 |
mbed_official | 25:ba0a1c5bf54e | 35 | #endif |
mbed_official | 25:ba0a1c5bf54e | 36 | __ALIGN_BEGIN uint8_t Rx_Buff[ETH_RXBUFNB][ETH_RX_BUF_SIZE] __ALIGN_END; /* Ethernet Receive Buffer */ |
mbed_official | 25:ba0a1c5bf54e | 37 | |
mbed_official | 25:ba0a1c5bf54e | 38 | #if defined (__ICCARM__) /*!< IAR Compiler */ |
mbed_official | 25:ba0a1c5bf54e | 39 | #pragma data_alignment=4 |
mbed_official | 25:ba0a1c5bf54e | 40 | #endif |
mbed_official | 25:ba0a1c5bf54e | 41 | __ALIGN_BEGIN uint8_t Tx_Buff[ETH_TXBUFNB][ETH_TX_BUF_SIZE] __ALIGN_END; /* Ethernet Transmit Buffer */ |
mbed_official | 25:ba0a1c5bf54e | 42 | |
mbed_official | 25:ba0a1c5bf54e | 43 | |
mbed_official | 25:ba0a1c5bf54e | 44 | ETH_HandleTypeDef heth; |
mbed_official | 25:ba0a1c5bf54e | 45 | |
mbed_official | 25:ba0a1c5bf54e | 46 | static sys_sem_t rx_ready_sem; /* receive ready semaphore */ |
mbed_official | 25:ba0a1c5bf54e | 47 | static sys_mutex_t tx_lock_mutex; |
mbed_official | 25:ba0a1c5bf54e | 48 | |
mbed_official | 25:ba0a1c5bf54e | 49 | /* function */ |
mbed_official | 25:ba0a1c5bf54e | 50 | static void stm32f4_rx_task(void *arg); |
mbed_official | 25:ba0a1c5bf54e | 51 | static void stm32f4_phy_task(void *arg); |
mbed_official | 25:ba0a1c5bf54e | 52 | static err_t stm32f4_etharp_output(struct netif *netif, struct pbuf *q, ip_addr_t *ipaddr); |
mbed_official | 25:ba0a1c5bf54e | 53 | static err_t stm32f4_low_level_output(struct netif *netif, struct pbuf *p); |
mbed_official | 25:ba0a1c5bf54e | 54 | |
mbed_official | 25:ba0a1c5bf54e | 55 | /** |
mbed_official | 25:ba0a1c5bf54e | 56 | * Override HAL Eth Init function |
mbed_official | 25:ba0a1c5bf54e | 57 | */ |
mbed_official | 25:ba0a1c5bf54e | 58 | void HAL_ETH_MspInit(ETH_HandleTypeDef* heth) |
mbed_official | 25:ba0a1c5bf54e | 59 | { |
mbed_official | 25:ba0a1c5bf54e | 60 | GPIO_InitTypeDef GPIO_InitStruct; |
mbed_official | 25:ba0a1c5bf54e | 61 | if (heth->Instance == ETH) { |
mbed_official | 25:ba0a1c5bf54e | 62 | /* Peripheral clock enable */ |
mbed_official | 25:ba0a1c5bf54e | 63 | __ETH_CLK_ENABLE(); |
mbed_official | 25:ba0a1c5bf54e | 64 | |
mbed_official | 25:ba0a1c5bf54e | 65 | __GPIOA_CLK_ENABLE(); |
mbed_official | 25:ba0a1c5bf54e | 66 | __GPIOB_CLK_ENABLE(); |
mbed_official | 25:ba0a1c5bf54e | 67 | __GPIOC_CLK_ENABLE(); |
mbed_official | 25:ba0a1c5bf54e | 68 | |
mbed_official | 25:ba0a1c5bf54e | 69 | /**ETH GPIO Configuration |
mbed_official | 25:ba0a1c5bf54e | 70 | PC1 ------> ETH_MDC |
mbed_official | 25:ba0a1c5bf54e | 71 | PA1 ------> ETH_REF_CLK |
mbed_official | 25:ba0a1c5bf54e | 72 | PA2 ------> ETH_MDIO |
mbed_official | 25:ba0a1c5bf54e | 73 | PA7 ------> ETH_CRS_DV |
mbed_official | 25:ba0a1c5bf54e | 74 | PC4 ------> ETH_RXD0 |
mbed_official | 25:ba0a1c5bf54e | 75 | PC5 ------> ETH_RXD1 |
mbed_official | 25:ba0a1c5bf54e | 76 | PB11 ------> ETH_TX_EN |
mbed_official | 25:ba0a1c5bf54e | 77 | PB12 ------> ETH_TXD0 |
mbed_official | 25:ba0a1c5bf54e | 78 | PB13 ------> ETH_TXD1 |
mbed_official | 25:ba0a1c5bf54e | 79 | */ |
mbed_official | 25:ba0a1c5bf54e | 80 | GPIO_InitStruct.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5; |
mbed_official | 25:ba0a1c5bf54e | 81 | GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; |
mbed_official | 25:ba0a1c5bf54e | 82 | GPIO_InitStruct.Pull = GPIO_NOPULL; |
mbed_official | 25:ba0a1c5bf54e | 83 | GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; |
mbed_official | 25:ba0a1c5bf54e | 84 | GPIO_InitStruct.Alternate = GPIO_AF11_ETH; |
mbed_official | 25:ba0a1c5bf54e | 85 | HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); |
mbed_official | 25:ba0a1c5bf54e | 86 | |
mbed_official | 25:ba0a1c5bf54e | 87 | GPIO_InitStruct.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7; |
mbed_official | 25:ba0a1c5bf54e | 88 | GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; |
mbed_official | 25:ba0a1c5bf54e | 89 | GPIO_InitStruct.Pull = GPIO_NOPULL; |
mbed_official | 25:ba0a1c5bf54e | 90 | GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; |
mbed_official | 25:ba0a1c5bf54e | 91 | GPIO_InitStruct.Alternate = GPIO_AF11_ETH; |
mbed_official | 25:ba0a1c5bf54e | 92 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); |
mbed_official | 25:ba0a1c5bf54e | 93 | |
mbed_official | 25:ba0a1c5bf54e | 94 | GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13; |
mbed_official | 25:ba0a1c5bf54e | 95 | GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; |
mbed_official | 25:ba0a1c5bf54e | 96 | GPIO_InitStruct.Pull = GPIO_NOPULL; |
mbed_official | 25:ba0a1c5bf54e | 97 | GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; |
mbed_official | 25:ba0a1c5bf54e | 98 | GPIO_InitStruct.Alternate = GPIO_AF11_ETH; |
mbed_official | 25:ba0a1c5bf54e | 99 | HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); |
mbed_official | 25:ba0a1c5bf54e | 100 | |
mbed_official | 25:ba0a1c5bf54e | 101 | /* Peripheral interrupt init*/ |
mbed_official | 25:ba0a1c5bf54e | 102 | /* Sets the priority grouping field */ |
mbed_official | 25:ba0a1c5bf54e | 103 | HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); |
mbed_official | 25:ba0a1c5bf54e | 104 | HAL_NVIC_SetPriority(ETH_IRQn, 0, 0); |
mbed_official | 25:ba0a1c5bf54e | 105 | HAL_NVIC_EnableIRQ(ETH_IRQn); |
mbed_official | 25:ba0a1c5bf54e | 106 | } |
mbed_official | 25:ba0a1c5bf54e | 107 | } |
mbed_official | 25:ba0a1c5bf54e | 108 | |
mbed_official | 25:ba0a1c5bf54e | 109 | /** |
mbed_official | 25:ba0a1c5bf54e | 110 | * Override HAL Eth DeInit function |
mbed_official | 25:ba0a1c5bf54e | 111 | */ |
mbed_official | 25:ba0a1c5bf54e | 112 | void HAL_ETH_MspDeInit(ETH_HandleTypeDef* heth) |
mbed_official | 25:ba0a1c5bf54e | 113 | { |
mbed_official | 25:ba0a1c5bf54e | 114 | if (heth->Instance == ETH) { |
mbed_official | 25:ba0a1c5bf54e | 115 | /* Peripheral clock disable */ |
mbed_official | 25:ba0a1c5bf54e | 116 | __ETH_CLK_DISABLE(); |
mbed_official | 25:ba0a1c5bf54e | 117 | |
mbed_official | 25:ba0a1c5bf54e | 118 | /**ETH GPIO Configuration |
mbed_official | 25:ba0a1c5bf54e | 119 | PC1 ------> ETH_MDC |
mbed_official | 25:ba0a1c5bf54e | 120 | PA1 ------> ETH_REF_CLK |
mbed_official | 25:ba0a1c5bf54e | 121 | PA2 ------> ETH_MDIO |
mbed_official | 25:ba0a1c5bf54e | 122 | PA7 ------> ETH_CRS_DV |
mbed_official | 25:ba0a1c5bf54e | 123 | PC4 ------> ETH_RXD0 |
mbed_official | 25:ba0a1c5bf54e | 124 | PC5 ------> ETH_RXD1 |
mbed_official | 25:ba0a1c5bf54e | 125 | PB11 ------> ETH_TX_EN |
mbed_official | 25:ba0a1c5bf54e | 126 | PB12 ------> ETH_TXD0 |
mbed_official | 25:ba0a1c5bf54e | 127 | PB13 ------> ETH_TXD1 |
mbed_official | 25:ba0a1c5bf54e | 128 | */ |
mbed_official | 25:ba0a1c5bf54e | 129 | HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5); |
mbed_official | 25:ba0a1c5bf54e | 130 | |
mbed_official | 25:ba0a1c5bf54e | 131 | HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7); |
mbed_official | 25:ba0a1c5bf54e | 132 | |
mbed_official | 25:ba0a1c5bf54e | 133 | HAL_GPIO_DeInit(GPIOB, GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13); |
mbed_official | 25:ba0a1c5bf54e | 134 | |
mbed_official | 25:ba0a1c5bf54e | 135 | /* Peripheral interrupt Deinit*/ |
mbed_official | 25:ba0a1c5bf54e | 136 | HAL_NVIC_DisableIRQ(ETH_IRQn); |
mbed_official | 25:ba0a1c5bf54e | 137 | } |
mbed_official | 25:ba0a1c5bf54e | 138 | } |
mbed_official | 25:ba0a1c5bf54e | 139 | |
mbed_official | 25:ba0a1c5bf54e | 140 | /** |
mbed_official | 25:ba0a1c5bf54e | 141 | * Ethernet Rx Transfer completed callback |
mbed_official | 25:ba0a1c5bf54e | 142 | * |
mbed_official | 25:ba0a1c5bf54e | 143 | * @param heth: ETH handle |
mbed_official | 25:ba0a1c5bf54e | 144 | * @retval None |
mbed_official | 25:ba0a1c5bf54e | 145 | */ |
mbed_official | 25:ba0a1c5bf54e | 146 | void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *heth) |
mbed_official | 25:ba0a1c5bf54e | 147 | { |
mbed_official | 25:ba0a1c5bf54e | 148 | |
mbed_official | 25:ba0a1c5bf54e | 149 | sys_sem_signal(&rx_ready_sem); |
mbed_official | 25:ba0a1c5bf54e | 150 | } |
mbed_official | 25:ba0a1c5bf54e | 151 | |
mbed_official | 25:ba0a1c5bf54e | 152 | |
mbed_official | 25:ba0a1c5bf54e | 153 | /** |
mbed_official | 25:ba0a1c5bf54e | 154 | * Ethernet IRQ Handler |
mbed_official | 25:ba0a1c5bf54e | 155 | * |
mbed_official | 25:ba0a1c5bf54e | 156 | * @param None |
mbed_official | 25:ba0a1c5bf54e | 157 | * @retval None |
mbed_official | 25:ba0a1c5bf54e | 158 | */ |
mbed_official | 25:ba0a1c5bf54e | 159 | void ETH_IRQHandler(void) |
mbed_official | 25:ba0a1c5bf54e | 160 | { |
mbed_official | 25:ba0a1c5bf54e | 161 | HAL_ETH_IRQHandler(&heth); |
mbed_official | 25:ba0a1c5bf54e | 162 | } |
mbed_official | 25:ba0a1c5bf54e | 163 | |
mbed_official | 25:ba0a1c5bf54e | 164 | |
mbed_official | 25:ba0a1c5bf54e | 165 | |
mbed_official | 25:ba0a1c5bf54e | 166 | /** |
mbed_official | 25:ba0a1c5bf54e | 167 | * In this function, the hardware should be initialized. |
mbed_official | 25:ba0a1c5bf54e | 168 | * Called from eth_arch_enetif_init(). |
mbed_official | 25:ba0a1c5bf54e | 169 | * |
mbed_official | 25:ba0a1c5bf54e | 170 | * @param netif the already initialized lwip network interface structure |
mbed_official | 25:ba0a1c5bf54e | 171 | * for this ethernetif |
mbed_official | 25:ba0a1c5bf54e | 172 | */ |
mbed_official | 25:ba0a1c5bf54e | 173 | static void stm32f4_low_level_init(struct netif *netif) |
mbed_official | 25:ba0a1c5bf54e | 174 | { |
mbed_official | 25:ba0a1c5bf54e | 175 | uint32_t regvalue = 0; |
mbed_official | 25:ba0a1c5bf54e | 176 | HAL_StatusTypeDef hal_eth_init_status; |
mbed_official | 25:ba0a1c5bf54e | 177 | |
mbed_official | 25:ba0a1c5bf54e | 178 | /* Init ETH */ |
mbed_official | 25:ba0a1c5bf54e | 179 | uint8_t MACAddr[6]; |
mbed_official | 25:ba0a1c5bf54e | 180 | heth.Instance = ETH; |
mbed_official | 25:ba0a1c5bf54e | 181 | heth.Init.AutoNegotiation = ETH_AUTONEGOTIATION_ENABLE; |
mbed_official | 25:ba0a1c5bf54e | 182 | heth.Init.Speed = ETH_SPEED_10M; |
mbed_official | 25:ba0a1c5bf54e | 183 | heth.Init.DuplexMode = ETH_MODE_FULLDUPLEX; |
mbed_official | 25:ba0a1c5bf54e | 184 | heth.Init.PhyAddress = 1; |
mbed_official | 25:ba0a1c5bf54e | 185 | #if (MBED_MAC_ADDRESS_SUM != MBED_MAC_ADDR_INTERFACE) |
mbed_official | 25:ba0a1c5bf54e | 186 | MACAddr[0] = MBED_MAC_ADDR_0; |
mbed_official | 25:ba0a1c5bf54e | 187 | MACAddr[1] = MBED_MAC_ADDR_1; |
mbed_official | 25:ba0a1c5bf54e | 188 | MACAddr[2] = MBED_MAC_ADDR_2; |
mbed_official | 25:ba0a1c5bf54e | 189 | MACAddr[3] = MBED_MAC_ADDR_3; |
mbed_official | 25:ba0a1c5bf54e | 190 | MACAddr[4] = MBED_MAC_ADDR_4; |
mbed_official | 25:ba0a1c5bf54e | 191 | MACAddr[5] = MBED_MAC_ADDR_5; |
mbed_official | 25:ba0a1c5bf54e | 192 | #else |
mbed_official | 25:ba0a1c5bf54e | 193 | mbed_mac_address((char *)MACAddr); |
mbed_official | 25:ba0a1c5bf54e | 194 | #endif |
mbed_official | 25:ba0a1c5bf54e | 195 | heth.Init.MACAddr = &MACAddr[0]; |
mbed_official | 25:ba0a1c5bf54e | 196 | heth.Init.RxMode = ETH_RXINTERRUPT_MODE; |
mbed_official | 25:ba0a1c5bf54e | 197 | heth.Init.ChecksumMode = ETH_CHECKSUM_BY_HARDWARE; |
mbed_official | 25:ba0a1c5bf54e | 198 | heth.Init.MediaInterface = ETH_MEDIA_INTERFACE_RMII; |
mbed_official | 25:ba0a1c5bf54e | 199 | hal_eth_init_status = HAL_ETH_Init(&heth); |
mbed_official | 25:ba0a1c5bf54e | 200 | |
mbed_official | 25:ba0a1c5bf54e | 201 | if (hal_eth_init_status == HAL_OK) { |
mbed_official | 25:ba0a1c5bf54e | 202 | /* Set netif link flag */ |
mbed_official | 25:ba0a1c5bf54e | 203 | netif->flags |= NETIF_FLAG_LINK_UP; |
mbed_official | 25:ba0a1c5bf54e | 204 | } |
mbed_official | 25:ba0a1c5bf54e | 205 | |
mbed_official | 25:ba0a1c5bf54e | 206 | /* Initialize Tx Descriptors list: Chain Mode */ |
mbed_official | 25:ba0a1c5bf54e | 207 | HAL_ETH_DMATxDescListInit(&heth, DMATxDscrTab, &Tx_Buff[0][0], ETH_TXBUFNB); |
mbed_official | 25:ba0a1c5bf54e | 208 | |
mbed_official | 25:ba0a1c5bf54e | 209 | /* Initialize Rx Descriptors list: Chain Mode */ |
mbed_official | 25:ba0a1c5bf54e | 210 | HAL_ETH_DMARxDescListInit(&heth, DMARxDscrTab, &Rx_Buff[0][0], ETH_RXBUFNB); |
mbed_official | 25:ba0a1c5bf54e | 211 | |
mbed_official | 25:ba0a1c5bf54e | 212 | #if LWIP_ARP || LWIP_ETHERNET |
mbed_official | 25:ba0a1c5bf54e | 213 | /* set MAC hardware address length */ |
mbed_official | 25:ba0a1c5bf54e | 214 | netif->hwaddr_len = ETHARP_HWADDR_LEN; |
mbed_official | 25:ba0a1c5bf54e | 215 | |
mbed_official | 25:ba0a1c5bf54e | 216 | /* set MAC hardware address */ |
mbed_official | 25:ba0a1c5bf54e | 217 | netif->hwaddr[0] = heth.Init.MACAddr[0]; |
mbed_official | 25:ba0a1c5bf54e | 218 | netif->hwaddr[1] = heth.Init.MACAddr[1]; |
mbed_official | 25:ba0a1c5bf54e | 219 | netif->hwaddr[2] = heth.Init.MACAddr[2]; |
mbed_official | 25:ba0a1c5bf54e | 220 | netif->hwaddr[3] = heth.Init.MACAddr[3]; |
mbed_official | 25:ba0a1c5bf54e | 221 | netif->hwaddr[4] = heth.Init.MACAddr[4]; |
mbed_official | 25:ba0a1c5bf54e | 222 | netif->hwaddr[5] = heth.Init.MACAddr[5]; |
mbed_official | 25:ba0a1c5bf54e | 223 | |
mbed_official | 25:ba0a1c5bf54e | 224 | /* maximum transfer unit */ |
mbed_official | 25:ba0a1c5bf54e | 225 | netif->mtu = 1500; |
mbed_official | 25:ba0a1c5bf54e | 226 | |
mbed_official | 25:ba0a1c5bf54e | 227 | /* device capabilities */ |
mbed_official | 25:ba0a1c5bf54e | 228 | /* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */ |
mbed_official | 25:ba0a1c5bf54e | 229 | netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP; |
mbed_official | 25:ba0a1c5bf54e | 230 | |
mbed_official | 25:ba0a1c5bf54e | 231 | /* Enable MAC and DMA transmission and reception */ |
mbed_official | 25:ba0a1c5bf54e | 232 | HAL_ETH_Start(&heth); |
mbed_official | 25:ba0a1c5bf54e | 233 | |
mbed_official | 25:ba0a1c5bf54e | 234 | /**** Configure PHY to generate an interrupt when Eth Link state changes ****/ |
mbed_official | 25:ba0a1c5bf54e | 235 | /* Read Register Configuration */ |
mbed_official | 25:ba0a1c5bf54e | 236 | HAL_ETH_ReadPHYRegister(&heth, PHY_MICR, ®value); |
mbed_official | 25:ba0a1c5bf54e | 237 | |
mbed_official | 25:ba0a1c5bf54e | 238 | regvalue |= (PHY_MICR_INT_EN | PHY_MICR_INT_OE); |
mbed_official | 25:ba0a1c5bf54e | 239 | |
mbed_official | 25:ba0a1c5bf54e | 240 | /* Enable Interrupts */ |
mbed_official | 25:ba0a1c5bf54e | 241 | HAL_ETH_WritePHYRegister(&heth, PHY_MICR, regvalue); |
mbed_official | 25:ba0a1c5bf54e | 242 | |
mbed_official | 25:ba0a1c5bf54e | 243 | /* Read Register Configuration */ |
mbed_official | 25:ba0a1c5bf54e | 244 | HAL_ETH_ReadPHYRegister(&heth, PHY_MISR, ®value); |
mbed_official | 25:ba0a1c5bf54e | 245 | |
mbed_official | 25:ba0a1c5bf54e | 246 | regvalue |= PHY_MISR_LINK_INT_EN; |
mbed_official | 25:ba0a1c5bf54e | 247 | |
mbed_official | 25:ba0a1c5bf54e | 248 | /* Enable Interrupt on change of link status */ |
mbed_official | 25:ba0a1c5bf54e | 249 | HAL_ETH_WritePHYRegister(&heth, PHY_MISR, regvalue); |
mbed_official | 25:ba0a1c5bf54e | 250 | #endif |
mbed_official | 25:ba0a1c5bf54e | 251 | } |
mbed_official | 25:ba0a1c5bf54e | 252 | |
mbed_official | 25:ba0a1c5bf54e | 253 | /** |
mbed_official | 25:ba0a1c5bf54e | 254 | * This function should do the actual transmission of the packet. The packet is |
mbed_official | 25:ba0a1c5bf54e | 255 | * contained in the pbuf that is passed to the function. This pbuf |
mbed_official | 25:ba0a1c5bf54e | 256 | * might be chained. |
mbed_official | 25:ba0a1c5bf54e | 257 | * |
mbed_official | 25:ba0a1c5bf54e | 258 | * @param netif the lwip network interface structure for this ethernetif |
mbed_official | 25:ba0a1c5bf54e | 259 | * @param p the MAC packet to send (e.g. IP packet including MAC addresses and type) |
mbed_official | 25:ba0a1c5bf54e | 260 | * @return ERR_OK if the packet could be sent |
mbed_official | 25:ba0a1c5bf54e | 261 | * an err_t value if the packet couldn't be sent |
mbed_official | 25:ba0a1c5bf54e | 262 | * |
mbed_official | 25:ba0a1c5bf54e | 263 | * @note Returning ERR_MEM here if a DMA queue of your MAC is full can lead to |
mbed_official | 25:ba0a1c5bf54e | 264 | * strange results. You might consider waiting for space in the DMA queue |
mbed_official | 25:ba0a1c5bf54e | 265 | * to become availale since the stack doesn't retry to send a packet |
mbed_official | 25:ba0a1c5bf54e | 266 | * dropped because of memory failure (except for the TCP timers). |
mbed_official | 25:ba0a1c5bf54e | 267 | */ |
mbed_official | 25:ba0a1c5bf54e | 268 | |
mbed_official | 25:ba0a1c5bf54e | 269 | static err_t stm32f4_low_level_output(struct netif *netif, struct pbuf *p) |
mbed_official | 25:ba0a1c5bf54e | 270 | { |
mbed_official | 25:ba0a1c5bf54e | 271 | err_t errval; |
mbed_official | 25:ba0a1c5bf54e | 272 | struct pbuf *q; |
mbed_official | 25:ba0a1c5bf54e | 273 | uint8_t *buffer = (uint8_t*)(heth.TxDesc->Buffer1Addr); |
mbed_official | 25:ba0a1c5bf54e | 274 | __IO ETH_DMADescTypeDef *DmaTxDesc; |
mbed_official | 25:ba0a1c5bf54e | 275 | uint32_t framelength = 0; |
mbed_official | 25:ba0a1c5bf54e | 276 | uint32_t bufferoffset = 0; |
mbed_official | 25:ba0a1c5bf54e | 277 | uint32_t byteslefttocopy = 0; |
mbed_official | 25:ba0a1c5bf54e | 278 | uint32_t payloadoffset = 0; |
mbed_official | 25:ba0a1c5bf54e | 279 | DmaTxDesc = heth.TxDesc; |
mbed_official | 25:ba0a1c5bf54e | 280 | bufferoffset = 0; |
mbed_official | 25:ba0a1c5bf54e | 281 | |
mbed_official | 25:ba0a1c5bf54e | 282 | |
mbed_official | 25:ba0a1c5bf54e | 283 | sys_mutex_lock(&tx_lock_mutex); |
mbed_official | 25:ba0a1c5bf54e | 284 | |
mbed_official | 25:ba0a1c5bf54e | 285 | /* copy frame from pbufs to driver buffers */ |
mbed_official | 25:ba0a1c5bf54e | 286 | for (q = p; q != NULL; q = q->next) { |
mbed_official | 25:ba0a1c5bf54e | 287 | /* Is this buffer available? If not, goto error */ |
mbed_official | 25:ba0a1c5bf54e | 288 | if ((DmaTxDesc->Status & ETH_DMATXDESC_OWN) != (uint32_t)RESET) { |
mbed_official | 25:ba0a1c5bf54e | 289 | errval = ERR_USE; |
mbed_official | 25:ba0a1c5bf54e | 290 | goto error; |
mbed_official | 25:ba0a1c5bf54e | 291 | } |
mbed_official | 25:ba0a1c5bf54e | 292 | |
mbed_official | 25:ba0a1c5bf54e | 293 | /* Get bytes in current lwIP buffer */ |
mbed_official | 25:ba0a1c5bf54e | 294 | byteslefttocopy = q->len; |
mbed_official | 25:ba0a1c5bf54e | 295 | payloadoffset = 0; |
mbed_official | 25:ba0a1c5bf54e | 296 | |
mbed_official | 25:ba0a1c5bf54e | 297 | /* Check if the length of data to copy is bigger than Tx buffer size*/ |
mbed_official | 25:ba0a1c5bf54e | 298 | while ((byteslefttocopy + bufferoffset) > ETH_TX_BUF_SIZE) { |
mbed_official | 25:ba0a1c5bf54e | 299 | /* Copy data to Tx buffer*/ |
mbed_official | 25:ba0a1c5bf54e | 300 | memcpy((uint8_t*)((uint8_t*)buffer + bufferoffset), (uint8_t*)((uint8_t*)q->payload + payloadoffset), (ETH_TX_BUF_SIZE - bufferoffset)); |
mbed_official | 25:ba0a1c5bf54e | 301 | |
mbed_official | 25:ba0a1c5bf54e | 302 | /* Point to next descriptor */ |
mbed_official | 25:ba0a1c5bf54e | 303 | DmaTxDesc = (ETH_DMADescTypeDef*)(DmaTxDesc->Buffer2NextDescAddr); |
mbed_official | 25:ba0a1c5bf54e | 304 | |
mbed_official | 25:ba0a1c5bf54e | 305 | /* Check if the buffer is available */ |
mbed_official | 25:ba0a1c5bf54e | 306 | if ((DmaTxDesc->Status & ETH_DMATXDESC_OWN) != (uint32_t)RESET) { |
mbed_official | 25:ba0a1c5bf54e | 307 | errval = ERR_USE; |
mbed_official | 25:ba0a1c5bf54e | 308 | goto error; |
mbed_official | 25:ba0a1c5bf54e | 309 | } |
mbed_official | 25:ba0a1c5bf54e | 310 | |
mbed_official | 25:ba0a1c5bf54e | 311 | buffer = (uint8_t*)(DmaTxDesc->Buffer1Addr); |
mbed_official | 25:ba0a1c5bf54e | 312 | |
mbed_official | 25:ba0a1c5bf54e | 313 | byteslefttocopy = byteslefttocopy - (ETH_TX_BUF_SIZE - bufferoffset); |
mbed_official | 25:ba0a1c5bf54e | 314 | payloadoffset = payloadoffset + (ETH_TX_BUF_SIZE - bufferoffset); |
mbed_official | 25:ba0a1c5bf54e | 315 | framelength = framelength + (ETH_TX_BUF_SIZE - bufferoffset); |
mbed_official | 25:ba0a1c5bf54e | 316 | bufferoffset = 0; |
mbed_official | 25:ba0a1c5bf54e | 317 | } |
mbed_official | 25:ba0a1c5bf54e | 318 | |
mbed_official | 25:ba0a1c5bf54e | 319 | /* Copy the remaining bytes */ |
mbed_official | 25:ba0a1c5bf54e | 320 | memcpy((uint8_t*)((uint8_t*)buffer + bufferoffset), (uint8_t*)((uint8_t*)q->payload + payloadoffset), byteslefttocopy); |
mbed_official | 25:ba0a1c5bf54e | 321 | bufferoffset = bufferoffset + byteslefttocopy; |
mbed_official | 25:ba0a1c5bf54e | 322 | framelength = framelength + byteslefttocopy; |
mbed_official | 25:ba0a1c5bf54e | 323 | } |
mbed_official | 25:ba0a1c5bf54e | 324 | |
mbed_official | 25:ba0a1c5bf54e | 325 | /* Prepare transmit descriptors to give to DMA */ |
mbed_official | 25:ba0a1c5bf54e | 326 | HAL_ETH_TransmitFrame(&heth, framelength); |
mbed_official | 25:ba0a1c5bf54e | 327 | |
mbed_official | 25:ba0a1c5bf54e | 328 | errval = ERR_OK; |
mbed_official | 25:ba0a1c5bf54e | 329 | |
mbed_official | 25:ba0a1c5bf54e | 330 | error: |
mbed_official | 25:ba0a1c5bf54e | 331 | |
mbed_official | 25:ba0a1c5bf54e | 332 | /* When Transmit Underflow flag is set, clear it and issue a Transmit Poll Demand to resume transmission */ |
mbed_official | 25:ba0a1c5bf54e | 333 | if ((heth.Instance->DMASR & ETH_DMASR_TUS) != (uint32_t)RESET) { |
mbed_official | 25:ba0a1c5bf54e | 334 | /* Clear TUS ETHERNET DMA flag */ |
mbed_official | 25:ba0a1c5bf54e | 335 | heth.Instance->DMASR = ETH_DMASR_TUS; |
mbed_official | 25:ba0a1c5bf54e | 336 | |
mbed_official | 25:ba0a1c5bf54e | 337 | /* Resume DMA transmission*/ |
mbed_official | 25:ba0a1c5bf54e | 338 | heth.Instance->DMATPDR = 0; |
mbed_official | 25:ba0a1c5bf54e | 339 | } |
mbed_official | 25:ba0a1c5bf54e | 340 | |
mbed_official | 25:ba0a1c5bf54e | 341 | sys_mutex_unlock(&tx_lock_mutex); |
mbed_official | 25:ba0a1c5bf54e | 342 | |
mbed_official | 25:ba0a1c5bf54e | 343 | return errval; |
mbed_official | 25:ba0a1c5bf54e | 344 | } |
mbed_official | 25:ba0a1c5bf54e | 345 | |
mbed_official | 25:ba0a1c5bf54e | 346 | |
mbed_official | 25:ba0a1c5bf54e | 347 | /** |
mbed_official | 25:ba0a1c5bf54e | 348 | * Should allocate a pbuf and transfer the bytes of the incoming |
mbed_official | 25:ba0a1c5bf54e | 349 | * packet from the interface into the pbuf. |
mbed_official | 25:ba0a1c5bf54e | 350 | * |
mbed_official | 25:ba0a1c5bf54e | 351 | * @param netif the lwip network interface structure for this ethernetif |
mbed_official | 25:ba0a1c5bf54e | 352 | * @return a pbuf filled with the received packet (including MAC header) |
mbed_official | 25:ba0a1c5bf54e | 353 | * NULL on memory error |
mbed_official | 25:ba0a1c5bf54e | 354 | */ |
mbed_official | 25:ba0a1c5bf54e | 355 | static struct pbuf * stm32f4_low_level_input(struct netif *netif) |
mbed_official | 25:ba0a1c5bf54e | 356 | { |
mbed_official | 25:ba0a1c5bf54e | 357 | struct pbuf *p = NULL; |
mbed_official | 25:ba0a1c5bf54e | 358 | struct pbuf *q; |
mbed_official | 25:ba0a1c5bf54e | 359 | uint16_t len = 0; |
mbed_official | 25:ba0a1c5bf54e | 360 | uint8_t *buffer; |
mbed_official | 25:ba0a1c5bf54e | 361 | __IO ETH_DMADescTypeDef *dmarxdesc; |
mbed_official | 25:ba0a1c5bf54e | 362 | uint32_t bufferoffset = 0; |
mbed_official | 25:ba0a1c5bf54e | 363 | uint32_t payloadoffset = 0; |
mbed_official | 25:ba0a1c5bf54e | 364 | uint32_t byteslefttocopy = 0; |
mbed_official | 25:ba0a1c5bf54e | 365 | uint32_t i = 0; |
mbed_official | 25:ba0a1c5bf54e | 366 | |
mbed_official | 25:ba0a1c5bf54e | 367 | |
mbed_official | 25:ba0a1c5bf54e | 368 | /* get received frame */ |
mbed_official | 25:ba0a1c5bf54e | 369 | if (HAL_ETH_GetReceivedFrame(&heth) != HAL_OK) |
mbed_official | 25:ba0a1c5bf54e | 370 | return NULL; |
mbed_official | 25:ba0a1c5bf54e | 371 | |
mbed_official | 25:ba0a1c5bf54e | 372 | /* Obtain the size of the packet and put it into the "len" variable. */ |
mbed_official | 25:ba0a1c5bf54e | 373 | len = heth.RxFrameInfos.length; |
mbed_official | 25:ba0a1c5bf54e | 374 | buffer = (uint8_t*)heth.RxFrameInfos.buffer; |
mbed_official | 25:ba0a1c5bf54e | 375 | |
mbed_official | 25:ba0a1c5bf54e | 376 | if (len > 0) { |
mbed_official | 25:ba0a1c5bf54e | 377 | /* We allocate a pbuf chain of pbufs from the Lwip buffer pool */ |
mbed_official | 25:ba0a1c5bf54e | 378 | p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL); |
mbed_official | 25:ba0a1c5bf54e | 379 | } |
mbed_official | 25:ba0a1c5bf54e | 380 | |
mbed_official | 25:ba0a1c5bf54e | 381 | if (p != NULL) { |
mbed_official | 25:ba0a1c5bf54e | 382 | dmarxdesc = heth.RxFrameInfos.FSRxDesc; |
mbed_official | 25:ba0a1c5bf54e | 383 | bufferoffset = 0; |
mbed_official | 25:ba0a1c5bf54e | 384 | for (q = p; q != NULL; q = q->next) { |
mbed_official | 25:ba0a1c5bf54e | 385 | byteslefttocopy = q->len; |
mbed_official | 25:ba0a1c5bf54e | 386 | payloadoffset = 0; |
mbed_official | 25:ba0a1c5bf54e | 387 | |
mbed_official | 25:ba0a1c5bf54e | 388 | /* Check if the length of bytes to copy in current pbuf is bigger than Rx buffer size*/ |
mbed_official | 25:ba0a1c5bf54e | 389 | while ((byteslefttocopy + bufferoffset) > ETH_RX_BUF_SIZE) { |
mbed_official | 25:ba0a1c5bf54e | 390 | /* Copy data to pbuf */ |
mbed_official | 25:ba0a1c5bf54e | 391 | memcpy((uint8_t*)((uint8_t*)q->payload + payloadoffset), (uint8_t*)((uint8_t*)buffer + bufferoffset), (ETH_RX_BUF_SIZE - bufferoffset)); |
mbed_official | 25:ba0a1c5bf54e | 392 | |
mbed_official | 25:ba0a1c5bf54e | 393 | /* Point to next descriptor */ |
mbed_official | 25:ba0a1c5bf54e | 394 | dmarxdesc = (ETH_DMADescTypeDef*)(dmarxdesc->Buffer2NextDescAddr); |
mbed_official | 25:ba0a1c5bf54e | 395 | buffer = (uint8_t*)(dmarxdesc->Buffer1Addr); |
mbed_official | 25:ba0a1c5bf54e | 396 | |
mbed_official | 25:ba0a1c5bf54e | 397 | byteslefttocopy = byteslefttocopy - (ETH_RX_BUF_SIZE - bufferoffset); |
mbed_official | 25:ba0a1c5bf54e | 398 | payloadoffset = payloadoffset + (ETH_RX_BUF_SIZE - bufferoffset); |
mbed_official | 25:ba0a1c5bf54e | 399 | bufferoffset = 0; |
mbed_official | 25:ba0a1c5bf54e | 400 | } |
mbed_official | 25:ba0a1c5bf54e | 401 | /* Copy remaining data in pbuf */ |
mbed_official | 25:ba0a1c5bf54e | 402 | memcpy((uint8_t*)((uint8_t*)q->payload + payloadoffset), (uint8_t*)((uint8_t*)buffer + bufferoffset), byteslefttocopy); |
mbed_official | 25:ba0a1c5bf54e | 403 | bufferoffset = bufferoffset + byteslefttocopy; |
mbed_official | 25:ba0a1c5bf54e | 404 | } |
mbed_official | 25:ba0a1c5bf54e | 405 | |
mbed_official | 25:ba0a1c5bf54e | 406 | /* Release descriptors to DMA */ |
mbed_official | 25:ba0a1c5bf54e | 407 | /* Point to first descriptor */ |
mbed_official | 25:ba0a1c5bf54e | 408 | dmarxdesc = heth.RxFrameInfos.FSRxDesc; |
mbed_official | 25:ba0a1c5bf54e | 409 | /* Set Own bit in Rx descriptors: gives the buffers back to DMA */ |
mbed_official | 25:ba0a1c5bf54e | 410 | for (i = 0; i < heth.RxFrameInfos.SegCount; i++) { |
mbed_official | 25:ba0a1c5bf54e | 411 | dmarxdesc->Status |= ETH_DMARXDESC_OWN; |
mbed_official | 25:ba0a1c5bf54e | 412 | dmarxdesc = (ETH_DMADescTypeDef*)(dmarxdesc->Buffer2NextDescAddr); |
mbed_official | 25:ba0a1c5bf54e | 413 | } |
mbed_official | 25:ba0a1c5bf54e | 414 | |
mbed_official | 25:ba0a1c5bf54e | 415 | /* Clear Segment_Count */ |
mbed_official | 25:ba0a1c5bf54e | 416 | heth.RxFrameInfos.SegCount = 0; |
mbed_official | 25:ba0a1c5bf54e | 417 | } |
mbed_official | 25:ba0a1c5bf54e | 418 | |
mbed_official | 25:ba0a1c5bf54e | 419 | /* When Rx Buffer unavailable flag is set: clear it and resume reception */ |
mbed_official | 25:ba0a1c5bf54e | 420 | if ((heth.Instance->DMASR & ETH_DMASR_RBUS) != (uint32_t)RESET) { |
mbed_official | 25:ba0a1c5bf54e | 421 | /* Clear RBUS ETHERNET DMA flag */ |
mbed_official | 25:ba0a1c5bf54e | 422 | heth.Instance->DMASR = ETH_DMASR_RBUS; |
mbed_official | 25:ba0a1c5bf54e | 423 | /* Resume DMA reception */ |
mbed_official | 25:ba0a1c5bf54e | 424 | heth.Instance->DMARPDR = 0; |
mbed_official | 25:ba0a1c5bf54e | 425 | } |
mbed_official | 25:ba0a1c5bf54e | 426 | return p; |
mbed_official | 25:ba0a1c5bf54e | 427 | } |
mbed_official | 25:ba0a1c5bf54e | 428 | |
mbed_official | 25:ba0a1c5bf54e | 429 | /** |
mbed_official | 25:ba0a1c5bf54e | 430 | * This task receives input data |
mbed_official | 25:ba0a1c5bf54e | 431 | * |
mbed_official | 25:ba0a1c5bf54e | 432 | * \param[in] netif the lwip network interface structure |
mbed_official | 25:ba0a1c5bf54e | 433 | */ |
mbed_official | 25:ba0a1c5bf54e | 434 | static void stm32f4_rx_task(void *arg) |
mbed_official | 25:ba0a1c5bf54e | 435 | { |
mbed_official | 25:ba0a1c5bf54e | 436 | struct netif *netif = (struct netif*)arg; |
mbed_official | 25:ba0a1c5bf54e | 437 | struct pbuf *p; |
mbed_official | 25:ba0a1c5bf54e | 438 | |
mbed_official | 25:ba0a1c5bf54e | 439 | while (1) { |
mbed_official | 25:ba0a1c5bf54e | 440 | sys_arch_sem_wait(&rx_ready_sem, 0); |
mbed_official | 25:ba0a1c5bf54e | 441 | p = stm32f4_low_level_input(netif); |
mbed_official | 25:ba0a1c5bf54e | 442 | if (p != NULL) { |
mbed_official | 25:ba0a1c5bf54e | 443 | if (netif->input(p, netif) != ERR_OK) { |
mbed_official | 25:ba0a1c5bf54e | 444 | pbuf_free(p); |
mbed_official | 25:ba0a1c5bf54e | 445 | p = NULL; |
mbed_official | 25:ba0a1c5bf54e | 446 | } |
mbed_official | 25:ba0a1c5bf54e | 447 | } |
mbed_official | 25:ba0a1c5bf54e | 448 | } |
mbed_official | 25:ba0a1c5bf54e | 449 | } |
mbed_official | 25:ba0a1c5bf54e | 450 | |
mbed_official | 25:ba0a1c5bf54e | 451 | /** |
mbed_official | 25:ba0a1c5bf54e | 452 | * This task checks phy link status and updates net status |
mbed_official | 25:ba0a1c5bf54e | 453 | * |
mbed_official | 25:ba0a1c5bf54e | 454 | * \param[in] netif the lwip network interface structure |
mbed_official | 25:ba0a1c5bf54e | 455 | */ |
mbed_official | 25:ba0a1c5bf54e | 456 | static void stm32f4_phy_task(void *arg) |
mbed_official | 25:ba0a1c5bf54e | 457 | { |
mbed_official | 25:ba0a1c5bf54e | 458 | struct netif *netif = (struct netif*)arg; |
mbed_official | 25:ba0a1c5bf54e | 459 | uint32_t phy_status = 0; |
mbed_official | 25:ba0a1c5bf54e | 460 | |
mbed_official | 25:ba0a1c5bf54e | 461 | while (1) { |
mbed_official | 25:ba0a1c5bf54e | 462 | uint32_t status; |
mbed_official | 25:ba0a1c5bf54e | 463 | if (HAL_ETH_ReadPHYRegister(&heth, PHY_SR, &status) == HAL_OK) { |
mbed_official | 25:ba0a1c5bf54e | 464 | if ((status & PHY_LINK_STATUS) && !(phy_status & PHY_LINK_STATUS)) { |
mbed_official | 25:ba0a1c5bf54e | 465 | tcpip_callback_with_block((tcpip_callback_fn)netif_set_link_up, (void*) netif, 1); |
mbed_official | 25:ba0a1c5bf54e | 466 | } else if (!(status & PHY_LINK_STATUS) && (phy_status & PHY_LINK_STATUS)) { |
mbed_official | 25:ba0a1c5bf54e | 467 | tcpip_callback_with_block((tcpip_callback_fn)netif_set_link_down, (void*) netif, 1); |
mbed_official | 25:ba0a1c5bf54e | 468 | } |
mbed_official | 25:ba0a1c5bf54e | 469 | |
mbed_official | 25:ba0a1c5bf54e | 470 | phy_status = status; |
mbed_official | 25:ba0a1c5bf54e | 471 | } |
mbed_official | 25:ba0a1c5bf54e | 472 | |
mbed_official | 25:ba0a1c5bf54e | 473 | osDelay(PHY_TASK_WAIT); |
mbed_official | 25:ba0a1c5bf54e | 474 | } |
mbed_official | 25:ba0a1c5bf54e | 475 | } |
mbed_official | 25:ba0a1c5bf54e | 476 | |
mbed_official | 25:ba0a1c5bf54e | 477 | /** |
mbed_official | 25:ba0a1c5bf54e | 478 | * This function is the ethernet packet send function. It calls |
mbed_official | 25:ba0a1c5bf54e | 479 | * etharp_output after checking link status. |
mbed_official | 25:ba0a1c5bf54e | 480 | * |
mbed_official | 25:ba0a1c5bf54e | 481 | * \param[in] netif the lwip network interface structure for this lpc_enetif |
mbed_official | 25:ba0a1c5bf54e | 482 | * \param[in] q Pointer to pbug to send |
mbed_official | 25:ba0a1c5bf54e | 483 | * \param[in] ipaddr IP address |
mbed_official | 25:ba0a1c5bf54e | 484 | * \return ERR_OK or error code |
mbed_official | 25:ba0a1c5bf54e | 485 | */ |
mbed_official | 25:ba0a1c5bf54e | 486 | static err_t stm32f4_etharp_output(struct netif *netif, struct pbuf *q, ip_addr_t *ipaddr) |
mbed_official | 25:ba0a1c5bf54e | 487 | { |
mbed_official | 25:ba0a1c5bf54e | 488 | /* Only send packet is link is up */ |
mbed_official | 25:ba0a1c5bf54e | 489 | if (netif->flags & NETIF_FLAG_LINK_UP) { |
mbed_official | 25:ba0a1c5bf54e | 490 | return etharp_output(netif, q, ipaddr); |
mbed_official | 25:ba0a1c5bf54e | 491 | } |
mbed_official | 25:ba0a1c5bf54e | 492 | |
mbed_official | 25:ba0a1c5bf54e | 493 | return ERR_CONN; |
mbed_official | 25:ba0a1c5bf54e | 494 | } |
mbed_official | 25:ba0a1c5bf54e | 495 | |
mbed_official | 25:ba0a1c5bf54e | 496 | /** |
mbed_official | 25:ba0a1c5bf54e | 497 | * Should be called at the beginning of the program to set up the |
mbed_official | 25:ba0a1c5bf54e | 498 | * network interface. |
mbed_official | 25:ba0a1c5bf54e | 499 | * |
mbed_official | 25:ba0a1c5bf54e | 500 | * This function should be passed as a parameter to netif_add(). |
mbed_official | 25:ba0a1c5bf54e | 501 | * |
mbed_official | 25:ba0a1c5bf54e | 502 | * @param[in] netif the lwip network interface structure for this lpc_enetif |
mbed_official | 25:ba0a1c5bf54e | 503 | * @return ERR_OK if the loopif is initialized |
mbed_official | 25:ba0a1c5bf54e | 504 | * ERR_MEM if private data couldn't be allocated |
mbed_official | 25:ba0a1c5bf54e | 505 | * any other err_t on error |
mbed_official | 25:ba0a1c5bf54e | 506 | */ |
mbed_official | 25:ba0a1c5bf54e | 507 | err_t eth_arch_enetif_init(struct netif *netif) |
mbed_official | 25:ba0a1c5bf54e | 508 | { |
mbed_official | 25:ba0a1c5bf54e | 509 | /* set MAC hardware address */ |
mbed_official | 25:ba0a1c5bf54e | 510 | netif->hwaddr_len = ETHARP_HWADDR_LEN; |
mbed_official | 25:ba0a1c5bf54e | 511 | |
mbed_official | 25:ba0a1c5bf54e | 512 | /* maximum transfer unit */ |
mbed_official | 25:ba0a1c5bf54e | 513 | netif->mtu = 1500; |
mbed_official | 25:ba0a1c5bf54e | 514 | |
mbed_official | 25:ba0a1c5bf54e | 515 | /* device capabilities */ |
mbed_official | 25:ba0a1c5bf54e | 516 | netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP | NETIF_FLAG_ETHERNET | NETIF_FLAG_IGMP; |
mbed_official | 25:ba0a1c5bf54e | 517 | |
mbed_official | 25:ba0a1c5bf54e | 518 | #if LWIP_NETIF_HOSTNAME |
mbed_official | 25:ba0a1c5bf54e | 519 | /* Initialize interface hostname */ |
mbed_official | 25:ba0a1c5bf54e | 520 | netif->hostname = "lwipstm32f4"; |
mbed_official | 25:ba0a1c5bf54e | 521 | #endif /* LWIP_NETIF_HOSTNAME */ |
mbed_official | 25:ba0a1c5bf54e | 522 | |
mbed_official | 25:ba0a1c5bf54e | 523 | netif->name[0] = 'e'; |
mbed_official | 25:ba0a1c5bf54e | 524 | netif->name[1] = 'n'; |
mbed_official | 25:ba0a1c5bf54e | 525 | |
mbed_official | 25:ba0a1c5bf54e | 526 | netif->output = stm32f4_etharp_output; |
mbed_official | 25:ba0a1c5bf54e | 527 | netif->linkoutput = stm32f4_low_level_output; |
mbed_official | 25:ba0a1c5bf54e | 528 | |
mbed_official | 25:ba0a1c5bf54e | 529 | /* semaphore */ |
mbed_official | 25:ba0a1c5bf54e | 530 | sys_sem_new(&rx_ready_sem, 0); |
mbed_official | 25:ba0a1c5bf54e | 531 | |
mbed_official | 25:ba0a1c5bf54e | 532 | sys_mutex_new(&tx_lock_mutex); |
mbed_official | 25:ba0a1c5bf54e | 533 | |
mbed_official | 25:ba0a1c5bf54e | 534 | /* task */ |
mbed_official | 25:ba0a1c5bf54e | 535 | sys_thread_new("stm32f4_recv_task", stm32f4_rx_task, netif, DEFAULT_THREAD_STACKSIZE, RECV_TASK_PRI); |
mbed_official | 25:ba0a1c5bf54e | 536 | sys_thread_new("stm32f4_phy_task", stm32f4_phy_task, netif, DEFAULT_THREAD_STACKSIZE, PHY_TASK_PRI); |
mbed_official | 25:ba0a1c5bf54e | 537 | |
mbed_official | 25:ba0a1c5bf54e | 538 | /* initialize the hardware */ |
mbed_official | 25:ba0a1c5bf54e | 539 | stm32f4_low_level_init(netif); |
mbed_official | 25:ba0a1c5bf54e | 540 | |
mbed_official | 25:ba0a1c5bf54e | 541 | return ERR_OK; |
mbed_official | 25:ba0a1c5bf54e | 542 | } |
mbed_official | 25:ba0a1c5bf54e | 543 | |
mbed_official | 25:ba0a1c5bf54e | 544 | void eth_arch_enable_interrupts(void) |
mbed_official | 25:ba0a1c5bf54e | 545 | { |
mbed_official | 25:ba0a1c5bf54e | 546 | HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); |
mbed_official | 25:ba0a1c5bf54e | 547 | HAL_NVIC_SetPriority(ETH_IRQn, 0, 0); |
mbed_official | 25:ba0a1c5bf54e | 548 | HAL_NVIC_EnableIRQ(ETH_IRQn); |
mbed_official | 25:ba0a1c5bf54e | 549 | } |
mbed_official | 25:ba0a1c5bf54e | 550 | |
mbed_official | 25:ba0a1c5bf54e | 551 | void eth_arch_disable_interrupts(void) |
mbed_official | 25:ba0a1c5bf54e | 552 | { |
mbed_official | 25:ba0a1c5bf54e | 553 | NVIC_DisableIRQ(ETH_IRQn); |
mbed_official | 25:ba0a1c5bf54e | 554 | } |
mbed_official | 25:ba0a1c5bf54e | 555 | |
mbed_official | 25:ba0a1c5bf54e | 556 | /** |
mbed_official | 25:ba0a1c5bf54e | 557 | * @} |
mbed_official | 25:ba0a1c5bf54e | 558 | */ |
mbed_official | 25:ba0a1c5bf54e | 559 | |
mbed_official | 25:ba0a1c5bf54e | 560 | /* --------------------------------- End Of File ------------------------------ */ |