Genadi Zawidowski / mbed-dev

mbed library sources. Supersedes mbed-src. Edited target satm32f446 for user USART3 pins

Dependents:   IGLOO_board

Fork of mbed-dev by mbed official

targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TMPM46B.h@188:3f10722804f9, 2018-07-30 (annotated)

Committer:
ua1arn
Date:
Mon Jul 30 12:31:10 2018 +0000
Revision:
188:3f10722804f9
Parent:
184:08ed48f1de7f 
before add multi-configuration USB descriptors

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 184:08ed48f1de7f 1 /**
AnnaBridge 184:08ed48f1de7f 2 *******************************************************************************
AnnaBridge 184:08ed48f1de7f 3 * @file TMPM46B.h
AnnaBridge 184:08ed48f1de7f 4 * @brief CMSIS Cortex-M4 Core Peripheral Access Layer Header File for the
AnnaBridge 184:08ed48f1de7f 5 * TOSHIBA 'TMPM46B' Device Series
AnnaBridge 184:08ed48f1de7f 6 * @version V2.0.2.4
AnnaBridge 184:08ed48f1de7f 7 * @date 2015/03/13
AnnaBridge 184:08ed48f1de7f 8 *
AnnaBridge 184:08ed48f1de7f 9 * DO NOT USE THIS SOFTWARE WITHOUT THE SOFTWARE LICENSE AGREEMENT.
AnnaBridge 184:08ed48f1de7f 10 *
AnnaBridge 184:08ed48f1de7f 11 * (C)Copyright TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION 2017 All rights reserved
AnnaBridge 184:08ed48f1de7f 12 *******************************************************************************
AnnaBridge 184:08ed48f1de7f 13 */
AnnaBridge 184:08ed48f1de7f 14
AnnaBridge 184:08ed48f1de7f 15 /** @addtogroup TOSHIBA_TX04_MICROCONTROLLER
AnnaBridge 184:08ed48f1de7f 16 * @{
AnnaBridge 184:08ed48f1de7f 17 */
AnnaBridge 184:08ed48f1de7f 18
AnnaBridge 184:08ed48f1de7f 19 /** @addtogroup TMPM46B
AnnaBridge 184:08ed48f1de7f 20 * @{
AnnaBridge 184:08ed48f1de7f 21 */
AnnaBridge 184:08ed48f1de7f 22
AnnaBridge 184:08ed48f1de7f 23 #ifndef __TMPM46B_H__
AnnaBridge 184:08ed48f1de7f 24 #define __TMPM46B_H__
AnnaBridge 184:08ed48f1de7f 25
AnnaBridge 184:08ed48f1de7f 26 #ifdef __cplusplus
AnnaBridge 184:08ed48f1de7f 27 extern "C" {
AnnaBridge 184:08ed48f1de7f 28 #endif
AnnaBridge 184:08ed48f1de7f 29
AnnaBridge 184:08ed48f1de7f 30 /** @addtogroup Configuration_of_CMSIS
AnnaBridge 184:08ed48f1de7f 31 * @{
AnnaBridge 184:08ed48f1de7f 32 */
AnnaBridge 184:08ed48f1de7f 33
AnnaBridge 184:08ed48f1de7f 34 /** Interrupt Number Definition */
AnnaBridge 184:08ed48f1de7f 35 typedef enum IRQn
AnnaBridge 184:08ed48f1de7f 36 {
AnnaBridge 184:08ed48f1de7f 37 /****** Cortex-M4 Processor Exceptions Numbers ***************************************************************/
AnnaBridge 184:08ed48f1de7f 38 NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
AnnaBridge 184:08ed48f1de7f 39 HardFault_IRQn = -13, /*!< 3 Cortex-M4 Hard Fault Interrupt */
AnnaBridge 184:08ed48f1de7f 40 MemoryManagement_IRQn = -12, /*!< 4 Cortex-M4 Memory Management Interrupt */
AnnaBridge 184:08ed48f1de7f 41 BusFault_IRQn = -11, /*!< 5 Cortex-M4 Bus Fault Interrupt */
AnnaBridge 184:08ed48f1de7f 42 UsageFault_IRQn = -10, /*!< 6 Cortex-M4 Usage Fault Interrupt */
AnnaBridge 184:08ed48f1de7f 43 SVCall_IRQn = -5, /*!< 11 Cortex-M4 SV Call Interrupt */
AnnaBridge 184:08ed48f1de7f 44 DebugMonitor_IRQn = -4, /*!< 12 Cortex-M4 Debug Monitor Interrupt */
AnnaBridge 184:08ed48f1de7f 45 PendSV_IRQn = -2, /*!< 14 Cortex-M4 Pend SV Interrupt */
AnnaBridge 184:08ed48f1de7f 46 SysTick_IRQn = -1, /*!< 15 Cortex-M4 System Tick Interrupt */
AnnaBridge 184:08ed48f1de7f 47
AnnaBridge 184:08ed48f1de7f 48 /****** TMPM46B Specific Interrupt Numbers *******************************************************************/
AnnaBridge 184:08ed48f1de7f 49 INT0_IRQn = 0, /*!< Interrupt pin 0 */
AnnaBridge 184:08ed48f1de7f 50 INT1_IRQn = 1, /*!< Interrupt pin 1 */
AnnaBridge 184:08ed48f1de7f 51 INT2_IRQn = 2, /*!< Interrupt pin 2 */
AnnaBridge 184:08ed48f1de7f 52 INT3_IRQn = 3, /*!< Interrupt pin 3 */
AnnaBridge 184:08ed48f1de7f 53 INT4_IRQn = 4, /*!< Interrupt pin 4 */
AnnaBridge 184:08ed48f1de7f 54 INT5_IRQn = 5, /*!< Interrupt pin 5 */
AnnaBridge 184:08ed48f1de7f 55 INT6_IRQn = 6, /*!< Interrupt pin 6 */
AnnaBridge 184:08ed48f1de7f 56 INT7_IRQn = 7, /*!< Interrupt pin 7 */
AnnaBridge 184:08ed48f1de7f 57 INT8_IRQn = 8, /*!< Interrupt pin 8 */
AnnaBridge 184:08ed48f1de7f 58 INT9_IRQn = 9, /*!< Interrupt pin 9 */
AnnaBridge 184:08ed48f1de7f 59 INTA_IRQn = 10, /*!< Interrupt pin A */
AnnaBridge 184:08ed48f1de7f 60 INTB_IRQn = 11, /*!< Interrupt pin B */
AnnaBridge 184:08ed48f1de7f 61 INTC_IRQn = 12, /*!< Interrupt pin C */
AnnaBridge 184:08ed48f1de7f 62 INTD_IRQn = 13, /*!< Interrupt pin D */
AnnaBridge 184:08ed48f1de7f 63 INTE_IRQn = 14, /*!< Interrupt pin E */
AnnaBridge 184:08ed48f1de7f 64 INTF_IRQn = 15, /*!< Interrupt pin F */
AnnaBridge 184:08ed48f1de7f 65 INTRX0_IRQn = 16, /*!< Serial0 reception interrupt */
AnnaBridge 184:08ed48f1de7f 66 INTTX0_IRQn = 17, /*!< Serial0 transmission interrupt */
AnnaBridge 184:08ed48f1de7f 67 INTRX1_IRQn = 18, /*!< Serial1 reception interrupt */
AnnaBridge 184:08ed48f1de7f 68 INTTX1_IRQn = 19, /*!< Serial1 transmission interrupt */
AnnaBridge 184:08ed48f1de7f 69 INTRX2_IRQn = 20, /*!< Serial2 reception interrupt */
AnnaBridge 184:08ed48f1de7f 70 INTTX2_IRQn = 21, /*!< Serial2 transmission interrupt */
AnnaBridge 184:08ed48f1de7f 71 INTRX3_IRQn = 22, /*!< Serial3 reception interrupt */
AnnaBridge 184:08ed48f1de7f 72 INTTX3_IRQn = 23, /*!< Serial3 transmission interrupt */
AnnaBridge 184:08ed48f1de7f 73 INTUART0_IRQn = 24, /*!< Full UART0 transmission and reception interrupt */
AnnaBridge 184:08ed48f1de7f 74 INTUART1_IRQn = 25, /*!< Full UART1 transmission and reception interrupt */
AnnaBridge 184:08ed48f1de7f 75 INTI2C0_IRQn = 26, /*!< I2C0 transmission and reception interrupt */
AnnaBridge 184:08ed48f1de7f 76 INTI2C1_IRQn = 27, /*!< I2C1 transmission and reception interrupt */
AnnaBridge 184:08ed48f1de7f 77 INTI2C2_IRQn = 28, /*!< I2C2 transmission and reception interrupt */
AnnaBridge 184:08ed48f1de7f 78 INTSSP0_IRQn = 29, /*!< SSP(SPI) Serial interface 0 interrupt */
AnnaBridge 184:08ed48f1de7f 79 INTSSP1_IRQn = 30, /*!< SSP(SPI) Serial interface 1 interrupt */
AnnaBridge 184:08ed48f1de7f 80 INTSSP2_IRQn = 31, /*!< SSP(SPI) Serial interface 2 interrupt */
AnnaBridge 184:08ed48f1de7f 81 INTADHP_IRQn = 32, /*!< High Priority AD conversion interrupt */
AnnaBridge 184:08ed48f1de7f 82 INTADM0_IRQn = 33, /*!< AD conversion monitor interrupt 0 */
AnnaBridge 184:08ed48f1de7f 83 INTADM1_IRQn = 34, /*!< AD conversion monitor interrupt 1 */
AnnaBridge 184:08ed48f1de7f 84 INTAD_IRQn = 35, /*!< AD conversion interrupt */
AnnaBridge 184:08ed48f1de7f 85 INTAES_IRQn = 36, /*!< AES completion interrupt */
AnnaBridge 184:08ed48f1de7f 86 INTSHA_IRQn = 37, /*!< SHA completion interrupt */
AnnaBridge 184:08ed48f1de7f 87 INTMLA_IRQn = 38, /*!< MLA completion interrupt */
AnnaBridge 184:08ed48f1de7f 88 INTESG_IRQn = 39, /*!< ESG completion interrupt */
AnnaBridge 184:08ed48f1de7f 89 INTSNFCSEQ_IRQn = 40, /*!< SNFC command sequence end interrupt */
AnnaBridge 184:08ed48f1de7f 90 INTSNFCPRTAE_IRQn = 41, /*!< SNFC page lead RAM transfer end interrupt */
AnnaBridge 184:08ed48f1de7f 91 INTSNFCPRTCE_IRQn = 42, /*!< SNFC decode data RAM transmission end interrupt */
AnnaBridge 184:08ed48f1de7f 92 INTSNFCFAIL_IRQn = 43, /*!< SNFC decode fail interrupt */
AnnaBridge 184:08ed48f1de7f 93 INTMTEMG0_IRQn = 47, /*!< MPT0 EMG interrupt */
AnnaBridge 184:08ed48f1de7f 94 INTMTPTB00_IRQn = 48, /*!< MPT0 compare match0/overflow,IGBT cycle interrupt */
AnnaBridge 184:08ed48f1de7f 95 INTMTPTB01_IRQn = 49, /*!< MPT0 compare match1/overflow,IGBT cycle interrupt */
AnnaBridge 184:08ed48f1de7f 96 INTMTCAP00_IRQn = 50, /*!< MPT0 input capture0 interrupt */
AnnaBridge 184:08ed48f1de7f 97 INTMTCAP01_IRQn = 51, /*!< MPT0 input capture1 interrupt */
AnnaBridge 184:08ed48f1de7f 98 INTMTEMG1_IRQn = 52, /*!< MPT1 EMG interrupt */
AnnaBridge 184:08ed48f1de7f 99 INTMTPTB10_IRQn = 53, /*!< MPT1 compare match0/overflow,IGBT cycle interrupt */
AnnaBridge 184:08ed48f1de7f 100 INTMTPTB11_IRQn = 54, /*!< MPT1 compare match1/overflow,IGBT cycle interrupt */
AnnaBridge 184:08ed48f1de7f 101 INTMTCAP10_IRQn = 55, /*!< MPT1 input capture0 interrupt */
AnnaBridge 184:08ed48f1de7f 102 INTMTCAP11_IRQn = 56, /*!< MPT1 input capture1 interrupt */
AnnaBridge 184:08ed48f1de7f 103 INTMTEMG2_IRQn = 57, /*!< MPT2 EMG interrupt */
AnnaBridge 184:08ed48f1de7f 104 INTMTPTB20_IRQn = 58, /*!< MPT2 compare match0/overflow,IGBT cycle interrupt */
AnnaBridge 184:08ed48f1de7f 105 INTMTTTB21_IRQn = 59, /*!< MPT2 compare match1/overflow,IGBT cycle interrupt */
AnnaBridge 184:08ed48f1de7f 106 INTMTCAP20_IRQn = 60, /*!< MPT2 input capture0 interrupt */
AnnaBridge 184:08ed48f1de7f 107 INTMTCAP21_IRQn = 61, /*!< MPT2 input capture1 interrupt */
AnnaBridge 184:08ed48f1de7f 108 INTMTEMG3_IRQn = 62, /*!< MPT3 EMG interrupt */
AnnaBridge 184:08ed48f1de7f 109 INTMTPTB30_IRQn = 63, /*!< MPT3 compare match0/overflow,IGBT cycle interrupt */
AnnaBridge 184:08ed48f1de7f 110 INTMTTTB31_IRQn = 64, /*!< MPT3 compare match1/overflow,IGBT cycle interrupt */
AnnaBridge 184:08ed48f1de7f 111 INTMTCAP30_IRQn = 65, /*!< MPT3 input capture0 interrupt */
AnnaBridge 184:08ed48f1de7f 112 INTMTCAP31_IRQn = 66, /*!< MPT3 input capture1 interrupt */
AnnaBridge 184:08ed48f1de7f 113 INTTB0_IRQn = 67, /*!< TMRB0 compare match detection interrupt */
AnnaBridge 184:08ed48f1de7f 114 INTCAP00_IRQn = 68, /*!< TMRB0 input capture 0 interrupt */
AnnaBridge 184:08ed48f1de7f 115 INTCAP01_IRQn = 69, /*!< TMRB0 input capture 1 interrupt */
AnnaBridge 184:08ed48f1de7f 116 INTTB1_IRQn = 70, /*!< TMRB1 compare match detection interrupt */
AnnaBridge 184:08ed48f1de7f 117 INTCAP10_IRQn = 71, /*!< TMRB1 input capture 0 interrupt */
AnnaBridge 184:08ed48f1de7f 118 INTCAP11_IRQn = 72, /*!< TMRB1 input capture 1 interrupt */
AnnaBridge 184:08ed48f1de7f 119 INTTB2_IRQn = 73, /*!< TMRB2 compare match detection interrupt */
AnnaBridge 184:08ed48f1de7f 120 INTCAP20_IRQn = 74, /*!< TMRB2 input capture 0 interrupt */
AnnaBridge 184:08ed48f1de7f 121 INTCAP21_IRQn = 75, /*!< TMRB2 input capture 1 interrupt */
AnnaBridge 184:08ed48f1de7f 122 INTTB3_IRQn = 76, /*!< TMRB3 compare match detection interrupt */
AnnaBridge 184:08ed48f1de7f 123 INTCAP30_IRQn = 77, /*!< TMRB3 input capture 0 interrupt */
AnnaBridge 184:08ed48f1de7f 124 INTCAP31_IRQn = 78, /*!< TMRB3 input capture 1 interrupt */
AnnaBridge 184:08ed48f1de7f 125 INTTB4_IRQn = 79, /*!< TMRB4 compare match detection interrupt */
AnnaBridge 184:08ed48f1de7f 126 INTCAP40_IRQn = 80, /*!< TMRB4 input capture 0 interrupt */
AnnaBridge 184:08ed48f1de7f 127 INTCAP41_IRQn = 81, /*!< TMRB4 input capture 1 interrupt */
AnnaBridge 184:08ed48f1de7f 128 INTTB5_IRQn = 82, /*!< TMRB5 compare match detection interrupt */
AnnaBridge 184:08ed48f1de7f 129 INTCAP50_IRQn = 83, /*!< TMRB5 input capture 0 interrupt */
AnnaBridge 184:08ed48f1de7f 130 INTCAP51_IRQn = 84, /*!< TMRB5 input capture 1 interrupt */
AnnaBridge 184:08ed48f1de7f 131 INTTB6_IRQn = 85, /*!< TMRB6 compare match detection interrupt */
AnnaBridge 184:08ed48f1de7f 132 INTCAP60_IRQn = 86, /*!< TMRB6 input capture 0 interrupt */
AnnaBridge 184:08ed48f1de7f 133 INTCAP61_IRQn = 87, /*!< TMRB6 input capture 1 interrupt */
AnnaBridge 184:08ed48f1de7f 134 INTTB7_IRQn = 88, /*!< TMRB7 compare match detection interrupt */
AnnaBridge 184:08ed48f1de7f 135 INTCAP70_IRQn = 89, /*!< TMRB7 input capture 0 interrupt */
AnnaBridge 184:08ed48f1de7f 136 INTCAP71_IRQn = 90, /*!< TMRB7 input capture 1 interrupt */
AnnaBridge 184:08ed48f1de7f 137 INTRTC_IRQn = 91, /*!< Real time clock interrupt */
AnnaBridge 184:08ed48f1de7f 138 INTDMAA_IRQn = 92, /*!< DMAC unitA transmission completion interrupt(ch4-31) */
AnnaBridge 184:08ed48f1de7f 139 INTDMAB_IRQn = 93, /*!< DMAC unitB transmission completion interrupt(ch24-31) */
AnnaBridge 184:08ed48f1de7f 140 INTDMAC_IRQn = 94, /*!< DMAC unitC transmission completion interrupt(ch12-31) */
AnnaBridge 184:08ed48f1de7f 141 INTDMACTC8_IRQn = 95, /*!< DMAC unitC transmission completion interrupt(ch8) */
AnnaBridge 184:08ed48f1de7f 142 INTDMACTC9_IRQn = 96, /*!< DMAC unitC transmission completion interrupt(ch9) */
AnnaBridge 184:08ed48f1de7f 143 INTDMACTC10_IRQn = 97, /*!< DMAC unitC transmission completion interrupt(ch10) */
AnnaBridge 184:08ed48f1de7f 144 INTDMACTC11_IRQn = 98, /*!< DMAC unitC transmission completion interrupt(ch11) */
AnnaBridge 184:08ed48f1de7f 145 INTDMAAERR_IRQn = 99, /*!< DMAC transmission error interrupt(unitA) */
AnnaBridge 184:08ed48f1de7f 146 INTDMABERR_IRQn = 100, /*!< DMAC transmission error interrupt(unitB) */
AnnaBridge 184:08ed48f1de7f 147 INTDMACERR_IRQn = 101, /*!< DMAC transmission error interrupt(unitC) */
AnnaBridge 184:08ed48f1de7f 148 INTFLRDY_IRQn = 102 /*!< Flash Ready interrupt */
AnnaBridge 184:08ed48f1de7f 149 } IRQn_Type;
AnnaBridge 184:08ed48f1de7f 150
AnnaBridge 184:08ed48f1de7f 151 /** Processor and Core Peripheral Section */
AnnaBridge 184:08ed48f1de7f 152
AnnaBridge 184:08ed48f1de7f 153 /* Configuration of the Cortex-M4 Processor and Core Peripherals */
AnnaBridge 184:08ed48f1de7f 154 #define __CM4_REV 0x0001 /*!< Cortex-M4 Core Revision */
AnnaBridge 184:08ed48f1de7f 155 #define __MPU_PRESENT 0 /*!< MPU present or not */
AnnaBridge 184:08ed48f1de7f 156 #define __NVIC_PRIO_BITS 3 /*!< Number of Bits used for Priority Levels */
AnnaBridge 184:08ed48f1de7f 157 #define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
AnnaBridge 184:08ed48f1de7f 158 #define __FPU_PRESENT 1 /*!< FPU present or not */
AnnaBridge 184:08ed48f1de7f 159
AnnaBridge 184:08ed48f1de7f 160 /** @} */ /* End of group Configuration_of_CMSIS */
AnnaBridge 184:08ed48f1de7f 161
AnnaBridge 184:08ed48f1de7f 162 #include "core_cm4.h" /* Cortex-M4 processor and core peripherals */
AnnaBridge 184:08ed48f1de7f 163 #include "system_TMPM46B.h" /* TMPM46B System */
AnnaBridge 184:08ed48f1de7f 164
AnnaBridge 184:08ed48f1de7f 165 /** @addtogroup Device_Peripheral_registers
AnnaBridge 184:08ed48f1de7f 166 * @{
AnnaBridge 184:08ed48f1de7f 167 */
AnnaBridge 184:08ed48f1de7f 168
AnnaBridge 184:08ed48f1de7f 169 /** Device Specific Peripheral registers structures */
AnnaBridge 184:08ed48f1de7f 170
AnnaBridge 184:08ed48f1de7f 171 /**
AnnaBridge 184:08ed48f1de7f 172 * @brief Synchronous Serial Port
AnnaBridge 184:08ed48f1de7f 173 */
AnnaBridge 184:08ed48f1de7f 174 typedef struct
AnnaBridge 184:08ed48f1de7f 175 {
AnnaBridge 184:08ed48f1de7f 176 __IO uint32_t CR0; /*!< SSP Control Register 0 */
AnnaBridge 184:08ed48f1de7f 177 __IO uint32_t CR1; /*!< SSP Control Register 1 */
AnnaBridge 184:08ed48f1de7f 178 __IO uint32_t DR; /*!< SSP Data Register */
AnnaBridge 184:08ed48f1de7f 179 __I uint32_t SR; /*!< SSP Status Register */
AnnaBridge 184:08ed48f1de7f 180 __IO uint32_t CPSR; /*!< SSP Clock Prescaler Register */
AnnaBridge 184:08ed48f1de7f 181 __IO uint32_t IMSC; /*!< SSP Interrupt Mask Set and Clear Register */
AnnaBridge 184:08ed48f1de7f 182 __I uint32_t RIS; /*!< SSP Raw Interrupt Status Register */
AnnaBridge 184:08ed48f1de7f 183 __I uint32_t MIS; /*!< SSP Masked Interrupt Status Register */
AnnaBridge 184:08ed48f1de7f 184 __O uint32_t ICR; /*!< SSP Interrupt Clear Register */
AnnaBridge 184:08ed48f1de7f 185 __IO uint32_t DMACR; /*!< SSP DMA Control Register */
AnnaBridge 184:08ed48f1de7f 186 } TSB_SSP_TypeDef;
AnnaBridge 184:08ed48f1de7f 187
AnnaBridge 184:08ed48f1de7f 188 #if defined ( __CC_ARM ) /* RealView Compiler */
AnnaBridge 184:08ed48f1de7f 189 #pragma anon_unions
AnnaBridge 184:08ed48f1de7f 190 #elif (defined (__ICCARM__)) /* ICC Compiler */
AnnaBridge 184:08ed48f1de7f 191 #pragma language=extended
AnnaBridge 184:08ed48f1de7f 192 #endif
AnnaBridge 184:08ed48f1de7f 193
AnnaBridge 184:08ed48f1de7f 194 /**
AnnaBridge 184:08ed48f1de7f 195 * @brief UART
AnnaBridge 184:08ed48f1de7f 196 */
AnnaBridge 184:08ed48f1de7f 197 typedef struct
AnnaBridge 184:08ed48f1de7f 198 {
AnnaBridge 184:08ed48f1de7f 199 __IO uint32_t DR; /*!< Data Register */
AnnaBridge 184:08ed48f1de7f 200 union {
AnnaBridge 184:08ed48f1de7f 201 __I uint32_t RSR; /*!< Receive Status Register */
AnnaBridge 184:08ed48f1de7f 202 __O uint32_t ECR; /*!< Error Clear Register */
AnnaBridge 184:08ed48f1de7f 203 };
AnnaBridge 184:08ed48f1de7f 204 uint32_t RESERVED0[4];
AnnaBridge 184:08ed48f1de7f 205 __I uint32_t FR; /*!< Flag Register */
AnnaBridge 184:08ed48f1de7f 206 uint32_t RESERVED1;
AnnaBridge 184:08ed48f1de7f 207 __IO uint32_t ILPR; /*!< UART IrDA lowPower count register */
AnnaBridge 184:08ed48f1de7f 208 __IO uint32_t IBRD; /*!< Integer Baud Rate Register */
AnnaBridge 184:08ed48f1de7f 209 __IO uint32_t FBRD; /*!< Fractional Baud Rate Register */
AnnaBridge 184:08ed48f1de7f 210 __IO uint32_t LCR_H; /*!< Line Control Register */
AnnaBridge 184:08ed48f1de7f 211 __IO uint32_t CR; /*!< Control Register */
AnnaBridge 184:08ed48f1de7f 212 __IO uint32_t IFLS; /*!< Interrupt FIFO Level Selection Register */
AnnaBridge 184:08ed48f1de7f 213 __IO uint32_t IMSC; /*!< Interrupt Mask Set/Clear Register */
AnnaBridge 184:08ed48f1de7f 214 __I uint32_t RIS; /*!< Raw Interrupt Status Register */
AnnaBridge 184:08ed48f1de7f 215 __I uint32_t MIS; /*!< Masked Interrupt Status Register */
AnnaBridge 184:08ed48f1de7f 216 __O uint32_t ICR; /*!< Interrupt Clear Register */
AnnaBridge 184:08ed48f1de7f 217 __IO uint32_t DMACR; /*!< DMA Control Register */
AnnaBridge 184:08ed48f1de7f 218 } TSB_UART_TypeDef;
AnnaBridge 184:08ed48f1de7f 219
AnnaBridge 184:08ed48f1de7f 220 /**
AnnaBridge 184:08ed48f1de7f 221 * @brief DMA Controller
AnnaBridge 184:08ed48f1de7f 222 */
AnnaBridge 184:08ed48f1de7f 223 typedef struct
AnnaBridge 184:08ed48f1de7f 224 {
AnnaBridge 184:08ed48f1de7f 225 __I uint32_t STATUS; /*!< DMA Status Register */
AnnaBridge 184:08ed48f1de7f 226 __O uint32_t CFG; /*!< DMA Configuration Register */
AnnaBridge 184:08ed48f1de7f 227 __IO uint32_t CTRLBASEPTR; /*!< DMA Control Data Base Pointer Register */
AnnaBridge 184:08ed48f1de7f 228 __I uint32_t ALTCTRLBASEPTR; /*!< DMA Channel Alternate Control Data Base Pointer Register*/
AnnaBridge 184:08ed48f1de7f 229 uint32_t RESERVED0;
AnnaBridge 184:08ed48f1de7f 230 __O uint32_t CHNLSWREQUEST; /*!< DMA Channel Software Request Register */
AnnaBridge 184:08ed48f1de7f 231 __IO uint32_t CHNLUSEBURSTSET; /*!< DMA Channel Useburst Set Register */
AnnaBridge 184:08ed48f1de7f 232 __O uint32_t CHNLUSEBURSTCLR; /*!< DMA Channel Useburst Clear Register */
AnnaBridge 184:08ed48f1de7f 233 __IO uint32_t CHNLREQMASKSET; /*!< DMA Channel Request Mask Set Register */
AnnaBridge 184:08ed48f1de7f 234 __O uint32_t CHNLREQMASKCLR; /*!< DMA Channel Request Mask Clear Register */
AnnaBridge 184:08ed48f1de7f 235 __IO uint32_t CHNLENABLESET; /*!< DMA Channel Enable Set Register */
AnnaBridge 184:08ed48f1de7f 236 __O uint32_t CHNLENABLECLR; /*!< DMA Channel Enable Clear Register */
AnnaBridge 184:08ed48f1de7f 237 __IO uint32_t CHNLPRIALTSET; /*!< DMA Channel Primary-Alternate Set Register */
AnnaBridge 184:08ed48f1de7f 238 __O uint32_t CHNLPRIALTCLR; /*!< DMA Channel Primary-Alternate Clear Register */
AnnaBridge 184:08ed48f1de7f 239 __IO uint32_t CHNLPRIORITYSET; /*!< DMA Channel Priority Set Register */
AnnaBridge 184:08ed48f1de7f 240 __O uint32_t CHNLPRIORITYCLR; /*!< DMA Channel Priority Clear Register */
AnnaBridge 184:08ed48f1de7f 241 uint32_t RESERVED1[3];
AnnaBridge 184:08ed48f1de7f 242 __IO uint32_t ERRCLR; /*!< DMA Bus Error Clear Register */
AnnaBridge 184:08ed48f1de7f 243 } TSB_DMA_TypeDef;
AnnaBridge 184:08ed48f1de7f 244
AnnaBridge 184:08ed48f1de7f 245 /**
AnnaBridge 184:08ed48f1de7f 246 * @brief 12bit A/D Converter
AnnaBridge 184:08ed48f1de7f 247 */
AnnaBridge 184:08ed48f1de7f 248 typedef struct
AnnaBridge 184:08ed48f1de7f 249 {
AnnaBridge 184:08ed48f1de7f 250 __IO uint32_t CLK; /*!< Conversion Clock Setting Register */
AnnaBridge 184:08ed48f1de7f 251 __O uint32_t MOD0; /*!< Mode Control Register0 */
AnnaBridge 184:08ed48f1de7f 252 __IO uint32_t MOD1; /*!< Mode Control Register1 */
AnnaBridge 184:08ed48f1de7f 253 __IO uint32_t MOD2; /*!< Mode Control Register2 */
AnnaBridge 184:08ed48f1de7f 254 __IO uint32_t MOD3; /*!< Mode Control Register3 */
AnnaBridge 184:08ed48f1de7f 255 __IO uint32_t MOD4; /*!< Mode Control Register4 */
AnnaBridge 184:08ed48f1de7f 256 __I uint32_t MOD5; /*!< Mode Control Register5 */
AnnaBridge 184:08ed48f1de7f 257 __O uint32_t MOD6; /*!< Mode Control Register6 */
AnnaBridge 184:08ed48f1de7f 258 uint32_t RESERVED0;
AnnaBridge 184:08ed48f1de7f 259 __IO uint32_t CMPCR0; /*!< Monitoring Interrupt Control Register0 */
AnnaBridge 184:08ed48f1de7f 260 __IO uint32_t CMPCR1; /*!< Monitoring Interrupt Control Register1 */
AnnaBridge 184:08ed48f1de7f 261 __IO uint32_t CMP0; /*!< Conversion Result Compare Register0 */
AnnaBridge 184:08ed48f1de7f 262 __IO uint32_t CMP1; /*!< Conversion Result Compare Register1 */
AnnaBridge 184:08ed48f1de7f 263 __I uint32_t REG00; /*!< Conversion Result Store Register0 */
AnnaBridge 184:08ed48f1de7f 264 __I uint32_t REG01; /*!< Conversion Result Store Register1 */
AnnaBridge 184:08ed48f1de7f 265 __I uint32_t REG02; /*!< Conversion Result Store Register2 */
AnnaBridge 184:08ed48f1de7f 266 __I uint32_t REG03; /*!< Conversion Result Store Register3 */
AnnaBridge 184:08ed48f1de7f 267 __I uint32_t REG04; /*!< Conversion Result Store Register4 */
AnnaBridge 184:08ed48f1de7f 268 __I uint32_t REG05; /*!< Conversion Result Store Register5 */
AnnaBridge 184:08ed48f1de7f 269 __I uint32_t REG06; /*!< Conversion Result Store Register6 */
AnnaBridge 184:08ed48f1de7f 270 __I uint32_t REG07; /*!< Conversion Result Store Register7 */
AnnaBridge 184:08ed48f1de7f 271 uint32_t RESERVED1[8];
AnnaBridge 184:08ed48f1de7f 272 __I uint32_t REGSP; /*!< Highest Priority Conversion Result Store Register*/
AnnaBridge 184:08ed48f1de7f 273 } TSB_AD_TypeDef;
AnnaBridge 184:08ed48f1de7f 274
AnnaBridge 184:08ed48f1de7f 275 /**
AnnaBridge 184:08ed48f1de7f 276 * @brief External Bus Interface(EXB)
AnnaBridge 184:08ed48f1de7f 277 */
AnnaBridge 184:08ed48f1de7f 278 typedef struct
AnnaBridge 184:08ed48f1de7f 279 {
AnnaBridge 184:08ed48f1de7f 280 __IO uint32_t MOD; /*!< External Bus Mode Control Register */
AnnaBridge 184:08ed48f1de7f 281 uint32_t RESERVED0[3];
AnnaBridge 184:08ed48f1de7f 282 __IO uint32_t AS0; /*!< External Bus Base Address and CS Space setting Register 0*/
AnnaBridge 184:08ed48f1de7f 283 __IO uint32_t AS1; /*!< External Bus Base Address and CS Space setting Register 1 */
AnnaBridge 184:08ed48f1de7f 284 __IO uint32_t AS2; /*!< External Bus Base Address and CS Space setting Register 2*/
AnnaBridge 184:08ed48f1de7f 285 __IO uint32_t AS3; /*!< External Bus Base Address and CS Space setting Register 3*/
AnnaBridge 184:08ed48f1de7f 286 uint32_t RESERVED1[8];
AnnaBridge 184:08ed48f1de7f 287 __IO uint32_t CS0; /*!< Chip Select and Wait Controller Register 0 */
AnnaBridge 184:08ed48f1de7f 288 __IO uint32_t CS1; /*!< Chip Select and Wait Controller Register 1 */
AnnaBridge 184:08ed48f1de7f 289 __IO uint32_t CS2; /*!< Chip Select and Wait Controller Register 2 */
AnnaBridge 184:08ed48f1de7f 290 __IO uint32_t CS3; /*!< Chip Select and Wait Controller Register 3 */
AnnaBridge 184:08ed48f1de7f 291 } TSB_EXB_TypeDef;
AnnaBridge 184:08ed48f1de7f 292
AnnaBridge 184:08ed48f1de7f 293 /**
AnnaBridge 184:08ed48f1de7f 294 * @brief SNFC (SLC NAND Flash Controller)
AnnaBridge 184:08ed48f1de7f 295 */
AnnaBridge 184:08ed48f1de7f 296 typedef struct
AnnaBridge 184:08ed48f1de7f 297 {
AnnaBridge 184:08ed48f1de7f 298 __IO uint32_t ENC; /*!< SNFC Enable Control Register */
AnnaBridge 184:08ed48f1de7f 299 __IO uint32_t ECCMOD; /*!< SNFC Ecc Mode Register */
AnnaBridge 184:08ed48f1de7f 300 __IO uint32_t IE; /*!< SNFC Interrupt Enable Register */
AnnaBridge 184:08ed48f1de7f 301 uint32_t RESERVED0;
AnnaBridge 184:08ed48f1de7f 302 __IO uint32_t PS; /*!< SNFC Page Size Register */
AnnaBridge 184:08ed48f1de7f 303 __IO uint32_t PRCS; /*!< SNFC Page Read Column Status Register */
AnnaBridge 184:08ed48f1de7f 304 __IO uint32_t S; /*!< SNFC Sector Register */
AnnaBridge 184:08ed48f1de7f 305 __IO uint32_t SS; /*!< SNFC Sector Status Register */
AnnaBridge 184:08ed48f1de7f 306 __IO uint32_t DIC; /*!< SNFC Decode Input Count Register */
AnnaBridge 184:08ed48f1de7f 307 __IO uint32_t DOC; /*!< SNFC Decode Output Count Register */
AnnaBridge 184:08ed48f1de7f 308 __IO uint32_t EIC; /*!< SNFC Encode Input Count Register */
AnnaBridge 184:08ed48f1de7f 309 uint32_t RESERVED1;
AnnaBridge 184:08ed48f1de7f 310 __IO uint32_t A1; /*!< SNFC Address Register 1 */
AnnaBridge 184:08ed48f1de7f 311 __IO uint32_t A2; /*!< SNFC Address Register 2 */
AnnaBridge 184:08ed48f1de7f 312 __IO uint32_t W; /*!< SNFC Write Register */
AnnaBridge 184:08ed48f1de7f 313 __IO uint32_t BIC; /*!< SNFC Bus Interface Control Register */
AnnaBridge 184:08ed48f1de7f 314 __IO uint32_t CS1; /*!< SNFC Command Sequence Register 1 */
AnnaBridge 184:08ed48f1de7f 315 __IO uint32_t CS2; /*!< SNFC Command Sequence Register 2 */
AnnaBridge 184:08ed48f1de7f 316 __IO uint32_t CS3; /*!< SNFC Command Sequence Register 3 */
AnnaBridge 184:08ed48f1de7f 317 __IO uint32_t CS4; /*!< SNFC Command Sequence Register 4 */
AnnaBridge 184:08ed48f1de7f 318 __IO uint32_t CSE; /*!< SNFC Command Sequence Enable Register */
AnnaBridge 184:08ed48f1de7f 319 uint32_t RESERVED2[43];
AnnaBridge 184:08ed48f1de7f 320 __I uint32_t PRDB; /*!< SNFC Page Read Buffer Registerer */
AnnaBridge 184:08ed48f1de7f 321 __I uint32_t IR1; /*!< SNFC Id Read Register 1 */
AnnaBridge 184:08ed48f1de7f 322 __I uint32_t IR2; /*!< SNFC Id Read Register 2 */
AnnaBridge 184:08ed48f1de7f 323 uint32_t RESERVED3;
AnnaBridge 184:08ed48f1de7f 324 __I uint32_t EP1; /*!< SNFC Ecc Parity Register 1 */
AnnaBridge 184:08ed48f1de7f 325 __I uint32_t EP2; /*!< SNFC Ecc Parity Register 2 */
AnnaBridge 184:08ed48f1de7f 326 __I uint32_t EP3; /*!< SNFC Ecc Parity Register 3 */
AnnaBridge 184:08ed48f1de7f 327 __I uint32_t EP4; /*!< SNFC Ecc Parity Register 4 */
AnnaBridge 184:08ed48f1de7f 328 __I uint32_t EC; /*!< SNFC Ecc Crc Register */
AnnaBridge 184:08ed48f1de7f 329 uint32_t RESERVED4[183];
AnnaBridge 184:08ed48f1de7f 330 __IO uint32_t EWRB; /*!< SNFC Ecc Write Buffer Register */
AnnaBridge 184:08ed48f1de7f 331 uint32_t RESERVED5[255];
AnnaBridge 184:08ed48f1de7f 332 __I uint32_t CDRB; /*!< SNFC Correction Data Read Buffer Register */
AnnaBridge 184:08ed48f1de7f 333 __I uint32_t EOC; /*!< SNFC Ecc Output Control Register */
AnnaBridge 184:08ed48f1de7f 334 __I uint32_t EBS; /*!< SNFC Ecc Busy Status Register */
AnnaBridge 184:08ed48f1de7f 335 uint32_t RESERVED6[5];
AnnaBridge 184:08ed48f1de7f 336 __I uint32_t EES; /*!< SNFC Ecc Error Status Register */
AnnaBridge 184:08ed48f1de7f 337 uint32_t RESERVED7[7];
AnnaBridge 184:08ed48f1de7f 338 __I uint32_t EDS1; /*!< SNFC Ecc Decode State Register 1 */
AnnaBridge 184:08ed48f1de7f 339 __I uint32_t EDS2; /*!< SNFC Ecc Decode State Register 2 */
AnnaBridge 184:08ed48f1de7f 340 __I uint32_t EDS3; /*!< SNFC Ecc Decode State Register 3 */
AnnaBridge 184:08ed48f1de7f 341 __I uint32_t EDS4; /*!< SNFC Ecc Decode State Register 4 */
AnnaBridge 184:08ed48f1de7f 342 __I uint32_t EDS5; /*!< SNFC Ecc Decode State Register 5 */
AnnaBridge 184:08ed48f1de7f 343 __I uint32_t EDS6; /*!< SNFC Ecc Decode State Register 6 */
AnnaBridge 184:08ed48f1de7f 344 __I uint32_t EDS7; /*!< SNFC Ecc Decode State Register 7 */
AnnaBridge 184:08ed48f1de7f 345 __I uint32_t EDS8; /*!< SNFC Ecc Decode State Register 8 */
AnnaBridge 184:08ed48f1de7f 346 uint32_t RESERVED8[8];
AnnaBridge 184:08ed48f1de7f 347 __I uint32_t S1EE1PI; /*!< SNFC Sector 1 Ecc Error 1 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 348 __I uint32_t S1EE2PI; /*!< SNFC Sector 1 Ecc Error 2 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 349 __I uint32_t S1EE3PI; /*!< SNFC Sector 1 Ecc Error 3 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 350 __I uint32_t S1EE4PI; /*!< SNFC Sector 1 Ecc Error 4 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 351 __I uint32_t S2EE1PI; /*!< SNFC Sector 2 Ecc Error 1 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 352 __I uint32_t S2EE2PI; /*!< SNFC Sector 2 Ecc Error 2 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 353 __I uint32_t S2EE3PI; /*!< SNFC Sector 2 Ecc Error 3 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 354 __I uint32_t S2EE4PI; /*!< SNFC Sector 2 Ecc Error 4 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 355 __I uint32_t S3EE1PI; /*!< SNFC Sector 3 Ecc Error 1 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 356 __I uint32_t S3EE2PI; /*!< SNFC Sector 3 Ecc Error 2 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 357 __I uint32_t S3EE3PI; /*!< SNFC Sector 3 Ecc Error 3 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 358 __I uint32_t S3EE4PI; /*!< SNFC Sector 3 Ecc Error 4 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 359 __I uint32_t S4EE1PI; /*!< SNFC Sector 4 Ecc Error 1 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 360 __I uint32_t S4EE2PI; /*!< SNFC Sector 4 Ecc Error 2 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 361 __I uint32_t S4EE3PI; /*!< SNFC Sector 4 Ecc Error 3 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 362 __I uint32_t S4EE4PI; /*!< SNFC Sector 4 Ecc Error 4 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 363 __I uint32_t S5EE1PI; /*!< SNFC Sector 5 Ecc Error 1 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 364 __I uint32_t S5EE2PI; /*!< SNFC Sector 5 Ecc Error 2 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 365 __I uint32_t S5EE3PI; /*!< SNFC Sector 5 Ecc Error 3 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 366 __I uint32_t S5EE4PI; /*!< SNFC Sector 5 Ecc Error 4 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 367 __I uint32_t S6EE1PI; /*!< SNFC Sector 6 Ecc Error 1 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 368 __I uint32_t S6EE2PI; /*!< SNFC Sector 6 Ecc Error 2 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 369 __I uint32_t S6EE3PI; /*!< SNFC Sector 6 Ecc Error 3 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 370 __I uint32_t S6EE4PI; /*!< SNFC Sector 6 Ecc Error 4 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 371 __I uint32_t S7EE1PI; /*!< SNFC Sector 7 Ecc Error 1 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 372 __I uint32_t S7EE2PI; /*!< SNFC Sector 7 Ecc Error 2 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 373 __I uint32_t S7EE3PI; /*!< SNFC Sector 7 Ecc Error 3 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 374 __I uint32_t S7EE4PI; /*!< SNFC Sector 7 Ecc Error 4 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 375 __I uint32_t S8EE1PI; /*!< SNFC Sector 8 Ecc Error 1 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 376 __I uint32_t S8EE2PI; /*!< SNFC Sector 8 Ecc Error 2 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 377 __I uint32_t S8EE3PI; /*!< SNFC Sector 8 Ecc Error 3 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 378 __I uint32_t S8EE4PI; /*!< SNFC Sector 8 Ecc Error 4 Positional Information Register*/
AnnaBridge 184:08ed48f1de7f 379 } TSB_SNFC_TypeDef;
AnnaBridge 184:08ed48f1de7f 380
AnnaBridge 184:08ed48f1de7f 381 /**
AnnaBridge 184:08ed48f1de7f 382 * @brief DMA Interrupt Flag
AnnaBridge 184:08ed48f1de7f 383 */
AnnaBridge 184:08ed48f1de7f 384 typedef struct
AnnaBridge 184:08ed48f1de7f 385 {
AnnaBridge 184:08ed48f1de7f 386 __I uint32_t FLGA; /*!< DMA Flag Register A */
AnnaBridge 184:08ed48f1de7f 387 __I uint32_t FLGB; /*!< DMA Flag Register B */
AnnaBridge 184:08ed48f1de7f 388 __I uint32_t FLGC; /*!< DMA Flag Register C */
AnnaBridge 184:08ed48f1de7f 389 } TSB_DMAIF_TypeDef;
AnnaBridge 184:08ed48f1de7f 390
AnnaBridge 184:08ed48f1de7f 391 /**
AnnaBridge 184:08ed48f1de7f 392 * @brief ADC infterface Register
AnnaBridge 184:08ed48f1de7f 393 */
AnnaBridge 184:08ed48f1de7f 394 typedef struct
AnnaBridge 184:08ed48f1de7f 395 {
AnnaBridge 184:08ed48f1de7f 396 uint32_t RESERVED0[4];
AnnaBridge 184:08ed48f1de7f 397 __IO uint32_t TRGSEL; /*!< Trigger Selection Register */
AnnaBridge 184:08ed48f1de7f 398 } TSB_ADILV_TypeDef;
AnnaBridge 184:08ed48f1de7f 399
AnnaBridge 184:08ed48f1de7f 400 /**
AnnaBridge 184:08ed48f1de7f 401 * @brief I2C Bus Interface (I2C)
AnnaBridge 184:08ed48f1de7f 402 */
AnnaBridge 184:08ed48f1de7f 403 typedef struct
AnnaBridge 184:08ed48f1de7f 404 {
AnnaBridge 184:08ed48f1de7f 405 __IO uint32_t CR1; /*!< I2C Control Register 1 */
AnnaBridge 184:08ed48f1de7f 406 __IO uint32_t DBR; /*!< Data Buffer Register */
AnnaBridge 184:08ed48f1de7f 407 __IO uint32_t AR; /*!< Bus address Register */
AnnaBridge 184:08ed48f1de7f 408 union {
AnnaBridge 184:08ed48f1de7f 409 __O uint32_t CR2; /*!< Control Register 1 */
AnnaBridge 184:08ed48f1de7f 410 __I uint32_t SR; /*!< Status Register */
AnnaBridge 184:08ed48f1de7f 411 };
AnnaBridge 184:08ed48f1de7f 412 __IO uint32_t PRS; /*!< Prescaler clcok setting Register */
AnnaBridge 184:08ed48f1de7f 413 __IO uint32_t IE; /*!< Interrupt Enable Register */
AnnaBridge 184:08ed48f1de7f 414 __IO uint32_t IR; /*!< Interrupt Register */
AnnaBridge 184:08ed48f1de7f 415 } TSB_I2C_TypeDef;
AnnaBridge 184:08ed48f1de7f 416
AnnaBridge 184:08ed48f1de7f 417 /**
AnnaBridge 184:08ed48f1de7f 418 * @brief Advanced Encryption Standard (AES)
AnnaBridge 184:08ed48f1de7f 419 */
AnnaBridge 184:08ed48f1de7f 420 typedef struct
AnnaBridge 184:08ed48f1de7f 421 {
AnnaBridge 184:08ed48f1de7f 422 __O uint32_t DT; /*!< Plaintext/encrypted text data Register */
AnnaBridge 184:08ed48f1de7f 423 __IO uint32_t KEY7; /*!< Input Key Data Register (bit 31 - 0) */
AnnaBridge 184:08ed48f1de7f 424 __IO uint32_t KEY6; /*!< Input Key Data Register (bit 63 - 32) */
AnnaBridge 184:08ed48f1de7f 425 __IO uint32_t KEY5; /*!< Input Key Data Register (bit 95 - 64) */
AnnaBridge 184:08ed48f1de7f 426 __IO uint32_t KEY4; /*!< Input Key Data Register (bit 127 - 96) */
AnnaBridge 184:08ed48f1de7f 427 __IO uint32_t KEY3; /*!< Input Key Data Register (bit 159 - 128) */
AnnaBridge 184:08ed48f1de7f 428 __IO uint32_t KEY2; /*!< Input Key Data Register (bit 191 - 160) */
AnnaBridge 184:08ed48f1de7f 429 __IO uint32_t KEY1; /*!< Input Key Data Register (bit 223 - 192) */
AnnaBridge 184:08ed48f1de7f 430 __IO uint32_t KEY0; /*!< Input Key Data Register (bit 255 - 224) */
AnnaBridge 184:08ed48f1de7f 431 __IO uint32_t CNT3; /*!< Counter Initial Value Register (bit 31 - 0) */
AnnaBridge 184:08ed48f1de7f 432 __IO uint32_t CNT2; /*!< Counter Initial Value Register (bit 63 - 32) */
AnnaBridge 184:08ed48f1de7f 433 __IO uint32_t CNT1; /*!< Counter Initial Value Register (bit 95 - 64) */
AnnaBridge 184:08ed48f1de7f 434 __IO uint32_t CNT0; /*!< Counter Initial Value Register (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 435 __IO uint32_t IV3; /*!< Initial Vector Register (bit 31 - 0) */
AnnaBridge 184:08ed48f1de7f 436 __IO uint32_t IV2; /*!< Initial Vector Register (bit 63 - 32) */
AnnaBridge 184:08ed48f1de7f 437 __IO uint32_t IV1; /*!< Initial Vector Register (bit 95 - 64) */
AnnaBridge 184:08ed48f1de7f 438 __IO uint32_t IV0; /*!< Initial Vector Register (bit 127 - 96) */
AnnaBridge 184:08ed48f1de7f 439 __I uint32_t ODT; /*!< Calculation Result Store Register */
AnnaBridge 184:08ed48f1de7f 440 __I uint32_t RKEY7; /*!< Output Key Store Register (bit 31 - 0) */
AnnaBridge 184:08ed48f1de7f 441 __I uint32_t RKEY6; /*!< Output Key Store Register (bit 63 - 32) */
AnnaBridge 184:08ed48f1de7f 442 __I uint32_t RKEY5; /*!< Output Key Store Register (bit 95 - 64) */
AnnaBridge 184:08ed48f1de7f 443 __I uint32_t RKEY4; /*!< Output Key Store Register (bit 127 - 96) */
AnnaBridge 184:08ed48f1de7f 444 __I uint32_t RKEY3; /*!< Output Key Store Register (bit 159 - 128) */
AnnaBridge 184:08ed48f1de7f 445 __I uint32_t RKEY2; /*!< Output Key Store Register (bit 191 - 160) */
AnnaBridge 184:08ed48f1de7f 446 __I uint32_t RKEY1; /*!< Output Key Store Register (bit 223 - 192) */
AnnaBridge 184:08ed48f1de7f 447 __I uint32_t RKEY0; /*!< Output Key Store Register (bit 255 - 224) */
AnnaBridge 184:08ed48f1de7f 448 __O uint32_t CLR; /*!< FIFO Clear Register */
AnnaBridge 184:08ed48f1de7f 449 __IO uint32_t MOD; /*!< Mode Setting Register */
AnnaBridge 184:08ed48f1de7f 450 __I uint32_t STATUS; /*!< Status Register */
AnnaBridge 184:08ed48f1de7f 451 } TSB_AES_TypeDef;
AnnaBridge 184:08ed48f1de7f 452
AnnaBridge 184:08ed48f1de7f 453 /**
AnnaBridge 184:08ed48f1de7f 454 * @brief Secure Hash Algorithm Processor (SHA)
AnnaBridge 184:08ed48f1de7f 455 */
AnnaBridge 184:08ed48f1de7f 456 typedef struct
AnnaBridge 184:08ed48f1de7f 457 {
AnnaBridge 184:08ed48f1de7f 458 __O uint32_t START; /*!< Process Start Register */
AnnaBridge 184:08ed48f1de7f 459 __IO uint32_t CR; /*!< Control Register */
AnnaBridge 184:08ed48f1de7f 460 __IO uint32_t DMAEN; /*!< DMA Enable Register */
AnnaBridge 184:08ed48f1de7f 461 __IO uint32_t MSGLEN0; /*!< Whole Message Length Register (bit 31 - 0) */
AnnaBridge 184:08ed48f1de7f 462 __IO uint32_t MSGLEN1; /*!< Whole Message Length Register (bit 60 - 32) */
AnnaBridge 184:08ed48f1de7f 463 __IO uint32_t REMAIN0; /*!< Unhandled Message Length Register (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 464 __IO uint32_t REMAIN1; /*!< Unhandled Message Length Register (bit 60 - 32)*/
AnnaBridge 184:08ed48f1de7f 465 __IO uint32_t MSG00; /*!< Message Register (bit 31 - 0) */
AnnaBridge 184:08ed48f1de7f 466 __IO uint32_t MSG01; /*!< Message Register (bit 63 - 32) */
AnnaBridge 184:08ed48f1de7f 467 __IO uint32_t MSG02; /*!< Message Register (bit 95 - 64) */
AnnaBridge 184:08ed48f1de7f 468 __IO uint32_t MSG03; /*!< Message Register (bit 127 - 96) */
AnnaBridge 184:08ed48f1de7f 469 __IO uint32_t MSG04; /*!< Message Register (bit 159 - 128) */
AnnaBridge 184:08ed48f1de7f 470 __IO uint32_t MSG05; /*!< Message Register (bit 191 - 160) */
AnnaBridge 184:08ed48f1de7f 471 __IO uint32_t MSG06; /*!< Message Register (bit 223 - 192) */
AnnaBridge 184:08ed48f1de7f 472 __IO uint32_t MSG07; /*!< Message Register (bit 255 - 224) */
AnnaBridge 184:08ed48f1de7f 473 __IO uint32_t MSG08; /*!< Message Register (bit 287 - 256) */
AnnaBridge 184:08ed48f1de7f 474 __IO uint32_t MSG09; /*!< Message Register (bit 319 - 288) */
AnnaBridge 184:08ed48f1de7f 475 __IO uint32_t MSG10; /*!< Message Register (bit 351 - 320) */
AnnaBridge 184:08ed48f1de7f 476 __IO uint32_t MSG11; /*!< Message Register (bit 383 - 352) */
AnnaBridge 184:08ed48f1de7f 477 __IO uint32_t MSG12; /*!< Message Register (bit 415 - 384) */
AnnaBridge 184:08ed48f1de7f 478 __IO uint32_t MSG13; /*!< Message Register (bit 447 - 416) */
AnnaBridge 184:08ed48f1de7f 479 __IO uint32_t MSG14; /*!< Message Register (bit 479 - 448) */
AnnaBridge 184:08ed48f1de7f 480 __IO uint32_t MSG15; /*!< Message Register (bit 511 - 480) */
AnnaBridge 184:08ed48f1de7f 481 __IO uint32_t INIT0; /*!< Hash Initial Value Register (bit 31 - 0) */
AnnaBridge 184:08ed48f1de7f 482 __IO uint32_t INIT1; /*!< Hash Initial Value Register (bit 63 - 32) */
AnnaBridge 184:08ed48f1de7f 483 __IO uint32_t INIT2; /*!< Hash Initial Value Register (bit 95 - 64) */
AnnaBridge 184:08ed48f1de7f 484 __IO uint32_t INIT3; /*!< Hash Initial Value Register (bit 127 - 96) */
AnnaBridge 184:08ed48f1de7f 485 __IO uint32_t INIT4; /*!< Hash Initial Value Register (bit 159 - 128) */
AnnaBridge 184:08ed48f1de7f 486 __IO uint32_t INIT5; /*!< Hash Initial Value Register (bit 191 - 160) */
AnnaBridge 184:08ed48f1de7f 487 __IO uint32_t INIT6; /*!< Hash Initial Value Register (bit 223 - 192) */
AnnaBridge 184:08ed48f1de7f 488 __IO uint32_t INIT7; /*!< Hash Initial Value Register (bit 255 - 224) */
AnnaBridge 184:08ed48f1de7f 489 __I uint32_t RESULT0; /*!< Calculation Result Register (bit 31 - 0) */
AnnaBridge 184:08ed48f1de7f 490 __I uint32_t RESULT1; /*!< Calculation Result Register (bit 63 - 32) */
AnnaBridge 184:08ed48f1de7f 491 __I uint32_t RESULT2; /*!< Calculation Result Register (bit 95 - 64) */
AnnaBridge 184:08ed48f1de7f 492 __I uint32_t RESULT3; /*!< Calculation Result Register (bit 127 - 96) */
AnnaBridge 184:08ed48f1de7f 493 __I uint32_t RESULT4; /*!< Calculation Result Register (bit 159 - 128) */
AnnaBridge 184:08ed48f1de7f 494 __I uint32_t RESULT5; /*!< Calculation Result Register (bit 191 - 160) */
AnnaBridge 184:08ed48f1de7f 495 __I uint32_t RESULT6; /*!< Calculation Result Register (bit 223 - 192) */
AnnaBridge 184:08ed48f1de7f 496 __I uint32_t RESULT7; /*!< Calculation Result Register (bit 255 - 224) */
AnnaBridge 184:08ed48f1de7f 497 __I uint32_t STATUS; /*!< Status Register */
AnnaBridge 184:08ed48f1de7f 498 } TSB_SHA_TypeDef;
AnnaBridge 184:08ed48f1de7f 499
AnnaBridge 184:08ed48f1de7f 500 /**
AnnaBridge 184:08ed48f1de7f 501 * @brief Entropy Seed Generator (ESG)
AnnaBridge 184:08ed48f1de7f 502 */
AnnaBridge 184:08ed48f1de7f 503 typedef struct
AnnaBridge 184:08ed48f1de7f 504 {
AnnaBridge 184:08ed48f1de7f 505 __O uint32_t CR; /*!< Control Register */
AnnaBridge 184:08ed48f1de7f 506 __I uint32_t ST; /*!< Status Register */
AnnaBridge 184:08ed48f1de7f 507 __IO uint32_t OUTCR; /*!< Output Control Register */
AnnaBridge 184:08ed48f1de7f 508 __IO uint32_t INT; /*!< Interrupt Status Register */
AnnaBridge 184:08ed48f1de7f 509 __I uint32_t BLK00; /*!< Entropy Seed Store Block 00 */
AnnaBridge 184:08ed48f1de7f 510 __I uint32_t BLK01; /*!< Entropy Seed Store Block 01 */
AnnaBridge 184:08ed48f1de7f 511 __I uint32_t BLK02; /*!< Entropy Seed Store Block 02 */
AnnaBridge 184:08ed48f1de7f 512 __I uint32_t BLK03; /*!< Entropy Seed Store Block 03 */
AnnaBridge 184:08ed48f1de7f 513 __I uint32_t BLK04; /*!< Entropy Seed Store Block 04 */
AnnaBridge 184:08ed48f1de7f 514 __I uint32_t BLK05; /*!< Entropy Seed Store Block 05 */
AnnaBridge 184:08ed48f1de7f 515 __I uint32_t BLK06; /*!< Entropy Seed Store Block 06 */
AnnaBridge 184:08ed48f1de7f 516 __I uint32_t BLK07; /*!< Entropy Seed Store Block 07 */
AnnaBridge 184:08ed48f1de7f 517 __I uint32_t BLK08; /*!< Entropy Seed Store Block 08 */
AnnaBridge 184:08ed48f1de7f 518 __I uint32_t BLK09; /*!< Entropy Seed Store Block 09 */
AnnaBridge 184:08ed48f1de7f 519 __I uint32_t BLK10; /*!< Entropy Seed Store Block 10 */
AnnaBridge 184:08ed48f1de7f 520 __I uint32_t BLK11; /*!< Entropy Seed Store Block 11 */
AnnaBridge 184:08ed48f1de7f 521 __I uint32_t BLK12; /*!< Entropy Seed Store Block 12 */
AnnaBridge 184:08ed48f1de7f 522 __I uint32_t BLK13; /*!< Entropy Seed Store Block 13 */
AnnaBridge 184:08ed48f1de7f 523 __I uint32_t BLK14; /*!< Entropy Seed Store Block 14 */
AnnaBridge 184:08ed48f1de7f 524 __I uint32_t BLK15; /*!< Entropy Seed Store Block 15 */
AnnaBridge 184:08ed48f1de7f 525 } TSB_ESG_TypeDef;
AnnaBridge 184:08ed48f1de7f 526
AnnaBridge 184:08ed48f1de7f 527 /**
AnnaBridge 184:08ed48f1de7f 528 * @brief Soft Reset
AnnaBridge 184:08ed48f1de7f 529 */
AnnaBridge 184:08ed48f1de7f 530 typedef struct
AnnaBridge 184:08ed48f1de7f 531 {
AnnaBridge 184:08ed48f1de7f 532 __IO uint32_t PROTECT; /*!< Soft reset protect Register */
AnnaBridge 184:08ed48f1de7f 533 __IO uint32_t IPRST; /*!< Soft reset Register */
AnnaBridge 184:08ed48f1de7f 534 } TSB_SRST_TypeDef;
AnnaBridge 184:08ed48f1de7f 535
AnnaBridge 184:08ed48f1de7f 536 /**
AnnaBridge 184:08ed48f1de7f 537 * @brief Multiple Length Arithmetic Coprocessor (MLA)
AnnaBridge 184:08ed48f1de7f 538 */
AnnaBridge 184:08ed48f1de7f 539 typedef struct
AnnaBridge 184:08ed48f1de7f 540 {
AnnaBridge 184:08ed48f1de7f 541 __IO uint32_t CR; /*!< Control Register */
AnnaBridge 184:08ed48f1de7f 542 __IO uint32_t ST; /*!< Status Register */
AnnaBridge 184:08ed48f1de7f 543 uint32_t RESERVED0;
AnnaBridge 184:08ed48f1de7f 544 __IO uint32_t PARA; /*!< Montgomery Parameter Register */
AnnaBridge 184:08ed48f1de7f 545 __IO uint32_t BLK1_0; /*!< General-purpose Register Block 1 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 546 __IO uint32_t BLK1_1; /*!< General-purpose Register Block 1 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 547 __IO uint32_t BLK1_2; /*!< General-purpose Register Block 1 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 548 __IO uint32_t BLK1_3; /*!< General-purpose Register Block 1 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 549 __IO uint32_t BLK1_4; /*!< General-purpose Register Block 1 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 550 __IO uint32_t BLK1_5; /*!< General-purpose Register Block 1 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 551 __IO uint32_t BLK1_6; /*!< General-purpose Register Block 1 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 552 __IO uint32_t BLK1_7; /*!< General-purpose Register Block 1 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 553 __IO uint32_t BLK2_0; /*!< General-purpose Register Block 2 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 554 __IO uint32_t BLK2_1; /*!< General-purpose Register Block 2 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 555 __IO uint32_t BLK2_2; /*!< General-purpose Register Block 2 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 556 __IO uint32_t BLK2_3; /*!< General-purpose Register Block 2 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 557 __IO uint32_t BLK2_4; /*!< General-purpose Register Block 2 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 558 __IO uint32_t BLK2_5; /*!< General-purpose Register Block 2 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 559 __IO uint32_t BLK2_6; /*!< General-purpose Register Block 2 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 560 __IO uint32_t BLK2_7; /*!< General-purpose Register Block 2 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 561 __IO uint32_t BLK3_0; /*!< General-purpose Register Block 3 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 562 __IO uint32_t BLK3_1; /*!< General-purpose Register Block 3 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 563 __IO uint32_t BLK3_2; /*!< General-purpose Register Block 3 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 564 __IO uint32_t BLK3_3; /*!< General-purpose Register Block 3 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 565 __IO uint32_t BLK3_4; /*!< General-purpose Register Block 3 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 566 __IO uint32_t BLK3_5; /*!< General-purpose Register Block 3 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 567 __IO uint32_t BLK3_6; /*!< General-purpose Register Block 3 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 568 __IO uint32_t BLK3_7; /*!< General-purpose Register Block 3 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 569 __IO uint32_t BLK4_0; /*!< General-purpose Register Block 4 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 570 __IO uint32_t BLK4_1; /*!< General-purpose Register Block 4 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 571 __IO uint32_t BLK4_2; /*!< General-purpose Register Block 4 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 572 __IO uint32_t BLK4_3; /*!< General-purpose Register Block 4 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 573 __IO uint32_t BLK4_4; /*!< General-purpose Register Block 4 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 574 __IO uint32_t BLK4_5; /*!< General-purpose Register Block 4 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 575 __IO uint32_t BLK4_6; /*!< General-purpose Register Block 4 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 576 __IO uint32_t BLK4_7; /*!< General-purpose Register Block 4 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 577 __IO uint32_t BLK5_0; /*!< General-purpose Register Block 5 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 578 __IO uint32_t BLK5_1; /*!< General-purpose Register Block 5 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 579 __IO uint32_t BLK5_2; /*!< General-purpose Register Block 5 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 580 __IO uint32_t BLK5_3; /*!< General-purpose Register Block 5 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 581 __IO uint32_t BLK5_4; /*!< General-purpose Register Block 5 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 582 __IO uint32_t BLK5_5; /*!< General-purpose Register Block 5 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 583 __IO uint32_t BLK5_6; /*!< General-purpose Register Block 5 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 584 __IO uint32_t BLK5_7; /*!< General-purpose Register Block 5 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 585 __IO uint32_t BLK6_0; /*!< General-purpose Register Block 6 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 586 __IO uint32_t BLK6_1; /*!< General-purpose Register Block 6 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 587 __IO uint32_t BLK6_2; /*!< General-purpose Register Block 6 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 588 __IO uint32_t BLK6_3; /*!< General-purpose Register Block 6 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 589 __IO uint32_t BLK6_4; /*!< General-purpose Register Block 6 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 590 __IO uint32_t BLK6_5; /*!< General-purpose Register Block 6 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 591 __IO uint32_t BLK6_6; /*!< General-purpose Register Block 6 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 592 __IO uint32_t BLK6_7; /*!< General-purpose Register Block 6 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 593 __IO uint32_t BLK7_0; /*!< General-purpose Register Block 7 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 594 __IO uint32_t BLK7_1; /*!< General-purpose Register Block 7 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 595 __IO uint32_t BLK7_2; /*!< General-purpose Register Block 7 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 596 __IO uint32_t BLK7_3; /*!< General-purpose Register Block 7 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 597 __IO uint32_t BLK7_4; /*!< General-purpose Register Block 7 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 598 __IO uint32_t BLK7_5; /*!< General-purpose Register Block 7 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 599 __IO uint32_t BLK7_6; /*!< General-purpose Register Block 7 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 600 __IO uint32_t BLK7_7; /*!< General-purpose Register Block 7 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 601 __IO uint32_t BLK8_0; /*!< General-purpose Register Block 8 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 602 __IO uint32_t BLK8_1; /*!< General-purpose Register Block 8 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 603 __IO uint32_t BLK8_2; /*!< General-purpose Register Block 8 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 604 __IO uint32_t BLK8_3; /*!< General-purpose Register Block 8 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 605 __IO uint32_t BLK8_4; /*!< General-purpose Register Block 8 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 606 __IO uint32_t BLK8_5; /*!< General-purpose Register Block 8 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 607 __IO uint32_t BLK8_6; /*!< General-purpose Register Block 8 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 608 __IO uint32_t BLK8_7; /*!< General-purpose Register Block 8 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 609 __IO uint32_t BLK9_0; /*!< General-purpose Register Block 9 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 610 __IO uint32_t BLK9_1; /*!< General-purpose Register Block 9 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 611 __IO uint32_t BLK9_2; /*!< General-purpose Register Block 9 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 612 __IO uint32_t BLK9_3; /*!< General-purpose Register Block 9 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 613 __IO uint32_t BLK9_4; /*!< General-purpose Register Block 9 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 614 __IO uint32_t BLK9_5; /*!< General-purpose Register Block 9 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 615 __IO uint32_t BLK9_6; /*!< General-purpose Register Block 9 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 616 __IO uint32_t BLK9_7; /*!< General-purpose Register Block 9 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 617 __IO uint32_t BLK10_0; /*!< General-purpose Register Block 10 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 618 __IO uint32_t BLK10_1; /*!< General-purpose Register Block 10 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 619 __IO uint32_t BLK10_2; /*!< General-purpose Register Block 10 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 620 __IO uint32_t BLK10_3; /*!< General-purpose Register Block 10 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 621 __IO uint32_t BLK10_4; /*!< General-purpose Register Block 10 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 622 __IO uint32_t BLK10_5; /*!< General-purpose Register Block 10 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 623 __IO uint32_t BLK10_6; /*!< General-purpose Register Block 10 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 624 __IO uint32_t BLK10_7; /*!< General-purpose Register Block 10 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 625 __IO uint32_t BLK11_0; /*!< General-purpose Register Block 11 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 626 __IO uint32_t BLK11_1; /*!< General-purpose Register Block 11 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 627 __IO uint32_t BLK11_2; /*!< General-purpose Register Block 11 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 628 __IO uint32_t BLK11_3; /*!< General-purpose Register Block 11 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 629 __IO uint32_t BLK11_4; /*!< General-purpose Register Block 11 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 630 __IO uint32_t BLK11_5; /*!< General-purpose Register Block 11 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 631 __IO uint32_t BLK11_6; /*!< General-purpose Register Block 11 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 632 __IO uint32_t BLK11_7; /*!< General-purpose Register Block 11 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 633 __IO uint32_t BLK12_0; /*!< General-purpose Register Block 12 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 634 __IO uint32_t BLK12_1; /*!< General-purpose Register Block 12 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 635 __IO uint32_t BLK12_2; /*!< General-purpose Register Block 12 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 636 __IO uint32_t BLK12_3; /*!< General-purpose Register Block 12 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 637 __IO uint32_t BLK12_4; /*!< General-purpose Register Block 12 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 638 __IO uint32_t BLK12_5; /*!< General-purpose Register Block 12 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 639 __IO uint32_t BLK12_6; /*!< General-purpose Register Block 12 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 640 __IO uint32_t BLK12_7; /*!< General-purpose Register Block 12 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 641 __IO uint32_t BLK13_0; /*!< General-purpose Register Block 13 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 642 __IO uint32_t BLK13_1; /*!< General-purpose Register Block 13 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 643 __IO uint32_t BLK13_2; /*!< General-purpose Register Block 13 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 644 __IO uint32_t BLK13_3; /*!< General-purpose Register Block 13 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 645 __IO uint32_t BLK13_4; /*!< General-purpose Register Block 13 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 646 __IO uint32_t BLK13_5; /*!< General-purpose Register Block 13 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 647 __IO uint32_t BLK13_6; /*!< General-purpose Register Block 13 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 648 __IO uint32_t BLK13_7; /*!< General-purpose Register Block 13 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 649 __IO uint32_t BLK14_0; /*!< General-purpose Register Block 14 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 650 __IO uint32_t BLK14_1; /*!< General-purpose Register Block 14 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 651 __IO uint32_t BLK14_2; /*!< General-purpose Register Block 14 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 652 __IO uint32_t BLK14_3; /*!< General-purpose Register Block 14 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 653 __IO uint32_t BLK14_4; /*!< General-purpose Register Block 14 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 654 __IO uint32_t BLK14_5; /*!< General-purpose Register Block 14 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 655 __IO uint32_t BLK14_6; /*!< General-purpose Register Block 14 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 656 __IO uint32_t BLK14_7; /*!< General-purpose Register Block 14 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 657 __IO uint32_t BLK15_0; /*!< General-purpose Register Block 15 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 658 __IO uint32_t BLK15_1; /*!< General-purpose Register Block 15 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 659 __IO uint32_t BLK15_2; /*!< General-purpose Register Block 15 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 660 __IO uint32_t BLK15_3; /*!< General-purpose Register Block 15 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 661 __IO uint32_t BLK15_4; /*!< General-purpose Register Block 15 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 662 __IO uint32_t BLK15_5; /*!< General-purpose Register Block 15 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 663 __IO uint32_t BLK15_6; /*!< General-purpose Register Block 15 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 664 __IO uint32_t BLK15_7; /*!< General-purpose Register Block 15 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 665 __IO uint32_t BLK16_0; /*!< General-purpose Register Block 16 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 666 __IO uint32_t BLK16_1; /*!< General-purpose Register Block 16 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 667 __IO uint32_t BLK16_2; /*!< General-purpose Register Block 16 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 668 __IO uint32_t BLK16_3; /*!< General-purpose Register Block 16 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 669 __IO uint32_t BLK16_4; /*!< General-purpose Register Block 16 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 670 __IO uint32_t BLK16_5; /*!< General-purpose Register Block 16 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 671 __IO uint32_t BLK16_6; /*!< General-purpose Register Block 16 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 672 __IO uint32_t BLK16_7; /*!< General-purpose Register Block 16 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 673 __IO uint32_t BLK17_0; /*!< General-purpose Register Block 17 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 674 __IO uint32_t BLK17_1; /*!< General-purpose Register Block 17 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 675 __IO uint32_t BLK17_2; /*!< General-purpose Register Block 17 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 676 __IO uint32_t BLK17_3; /*!< General-purpose Register Block 17 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 677 __IO uint32_t BLK17_4; /*!< General-purpose Register Block 17 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 678 __IO uint32_t BLK17_5; /*!< General-purpose Register Block 17 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 679 __IO uint32_t BLK17_6; /*!< General-purpose Register Block 17 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 680 __IO uint32_t BLK17_7; /*!< General-purpose Register Block 17 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 681 __IO uint32_t BLK18_0; /*!< General-purpose Register Block 18 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 682 __IO uint32_t BLK18_1; /*!< General-purpose Register Block 18 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 683 __IO uint32_t BLK18_2; /*!< General-purpose Register Block 18 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 684 __IO uint32_t BLK18_3; /*!< General-purpose Register Block 18 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 685 __IO uint32_t BLK18_4; /*!< General-purpose Register Block 18 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 686 __IO uint32_t BLK18_5; /*!< General-purpose Register Block 18 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 687 __IO uint32_t BLK18_6; /*!< General-purpose Register Block 18 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 688 __IO uint32_t BLK18_7; /*!< General-purpose Register Block 18 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 689 __IO uint32_t BLK19_0; /*!< General-purpose Register Block 19 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 690 __IO uint32_t BLK19_1; /*!< General-purpose Register Block 19 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 691 __IO uint32_t BLK19_2; /*!< General-purpose Register Block 19 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 692 __IO uint32_t BLK19_3; /*!< General-purpose Register Block 19 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 693 __IO uint32_t BLK19_4; /*!< General-purpose Register Block 19 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 694 __IO uint32_t BLK19_5; /*!< General-purpose Register Block 19 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 695 __IO uint32_t BLK19_6; /*!< General-purpose Register Block 19 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 696 __IO uint32_t BLK19_7; /*!< General-purpose Register Block 19 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 697 __IO uint32_t BLK20_0; /*!< General-purpose Register Block 20 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 698 __IO uint32_t BLK20_1; /*!< General-purpose Register Block 20 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 699 __IO uint32_t BLK20_2; /*!< General-purpose Register Block 20 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 700 __IO uint32_t BLK20_3; /*!< General-purpose Register Block 20 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 701 __IO uint32_t BLK20_4; /*!< General-purpose Register Block 20 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 702 __IO uint32_t BLK20_5; /*!< General-purpose Register Block 20 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 703 __IO uint32_t BLK20_6; /*!< General-purpose Register Block 20 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 704 __IO uint32_t BLK20_7; /*!< General-purpose Register Block 20 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 705 __IO uint32_t BLK21_0; /*!< General-purpose Register Block 21 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 706 __IO uint32_t BLK21_1; /*!< General-purpose Register Block 21 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 707 __IO uint32_t BLK21_2; /*!< General-purpose Register Block 21 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 708 __IO uint32_t BLK21_3; /*!< General-purpose Register Block 21 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 709 __IO uint32_t BLK21_4; /*!< General-purpose Register Block 21 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 710 __IO uint32_t BLK21_5; /*!< General-purpose Register Block 21 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 711 __IO uint32_t BLK21_6; /*!< General-purpose Register Block 21 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 712 __IO uint32_t BLK21_7; /*!< General-purpose Register Block 21 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 713 __IO uint32_t BLK22_0; /*!< General-purpose Register Block 22 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 714 __IO uint32_t BLK22_1; /*!< General-purpose Register Block 22 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 715 __IO uint32_t BLK22_2; /*!< General-purpose Register Block 22 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 716 __IO uint32_t BLK22_3; /*!< General-purpose Register Block 22 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 717 __IO uint32_t BLK22_4; /*!< General-purpose Register Block 22 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 718 __IO uint32_t BLK22_5; /*!< General-purpose Register Block 22 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 719 __IO uint32_t BLK22_6; /*!< General-purpose Register Block 22 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 720 __IO uint32_t BLK22_7; /*!< General-purpose Register Block 22 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 721 __IO uint32_t BLK23_0; /*!< General-purpose Register Block 23 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 722 __IO uint32_t BLK23_1; /*!< General-purpose Register Block 23 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 723 __IO uint32_t BLK23_2; /*!< General-purpose Register Block 23 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 724 __IO uint32_t BLK23_3; /*!< General-purpose Register Block 23 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 725 __IO uint32_t BLK23_4; /*!< General-purpose Register Block 23 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 726 __IO uint32_t BLK23_5; /*!< General-purpose Register Block 23 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 727 __IO uint32_t BLK23_6; /*!< General-purpose Register Block 23 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 728 __IO uint32_t BLK23_7; /*!< General-purpose Register Block 23 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 729 __IO uint32_t BLK24_0; /*!< General-purpose Register Block 24 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 730 __IO uint32_t BLK24_1; /*!< General-purpose Register Block 24 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 731 __IO uint32_t BLK24_2; /*!< General-purpose Register Block 24 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 732 __IO uint32_t BLK24_3; /*!< General-purpose Register Block 24 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 733 __IO uint32_t BLK24_4; /*!< General-purpose Register Block 24 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 734 __IO uint32_t BLK24_5; /*!< General-purpose Register Block 24 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 735 __IO uint32_t BLK24_6; /*!< General-purpose Register Block 24 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 736 __IO uint32_t BLK24_7; /*!< General-purpose Register Block 24 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 737 __IO uint32_t BLK25_0; /*!< General-purpose Register Block 25 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 738 __IO uint32_t BLK25_1; /*!< General-purpose Register Block 25 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 739 __IO uint32_t BLK25_2; /*!< General-purpose Register Block 25 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 740 __IO uint32_t BLK25_3; /*!< General-purpose Register Block 25 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 741 __IO uint32_t BLK25_4; /*!< General-purpose Register Block 25 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 742 __IO uint32_t BLK25_5; /*!< General-purpose Register Block 25 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 743 __IO uint32_t BLK25_6; /*!< General-purpose Register Block 25 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 744 __IO uint32_t BLK25_7; /*!< General-purpose Register Block 25 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 745 __IO uint32_t BLK26_0; /*!< General-purpose Register Block 26 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 746 __IO uint32_t BLK26_1; /*!< General-purpose Register Block 26 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 747 __IO uint32_t BLK26_2; /*!< General-purpose Register Block 26 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 748 __IO uint32_t BLK26_3; /*!< General-purpose Register Block 26 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 749 __IO uint32_t BLK26_4; /*!< General-purpose Register Block 26 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 750 __IO uint32_t BLK26_5; /*!< General-purpose Register Block 26 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 751 __IO uint32_t BLK26_6; /*!< General-purpose Register Block 26 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 752 __IO uint32_t BLK26_7; /*!< General-purpose Register Block 26 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 753 __IO uint32_t BLK27_0; /*!< General-purpose Register Block 27 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 754 __IO uint32_t BLK27_1; /*!< General-purpose Register Block 27 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 755 __IO uint32_t BLK27_2; /*!< General-purpose Register Block 27 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 756 __IO uint32_t BLK27_3; /*!< General-purpose Register Block 27 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 757 __IO uint32_t BLK27_4; /*!< General-purpose Register Block 27 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 758 __IO uint32_t BLK27_5; /*!< General-purpose Register Block 27 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 759 __IO uint32_t BLK27_6; /*!< General-purpose Register Block 27 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 760 __IO uint32_t BLK27_7; /*!< General-purpose Register Block 27 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 761 __IO uint32_t BLK28_0; /*!< General-purpose Register Block 28 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 762 __IO uint32_t BLK28_1; /*!< General-purpose Register Block 28 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 763 __IO uint32_t BLK28_2; /*!< General-purpose Register Block 28 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 764 __IO uint32_t BLK28_3; /*!< General-purpose Register Block 28 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 765 __IO uint32_t BLK28_4; /*!< General-purpose Register Block 28 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 766 __IO uint32_t BLK28_5; /*!< General-purpose Register Block 28 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 767 __IO uint32_t BLK28_6; /*!< General-purpose Register Block 28 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 768 __IO uint32_t BLK28_7; /*!< General-purpose Register Block 28 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 769 __IO uint32_t BLK29_0; /*!< General-purpose Register Block 29 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 770 __IO uint32_t BLK29_1; /*!< General-purpose Register Block 29 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 771 __IO uint32_t BLK29_2; /*!< General-purpose Register Block 29 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 772 __IO uint32_t BLK29_3; /*!< General-purpose Register Block 29 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 773 __IO uint32_t BLK29_4; /*!< General-purpose Register Block 29 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 774 __IO uint32_t BLK29_5; /*!< General-purpose Register Block 29 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 775 __IO uint32_t BLK29_6; /*!< General-purpose Register Block 29 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 776 __IO uint32_t BLK29_7; /*!< General-purpose Register Block 29 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 777 __IO uint32_t BLK30_0; /*!< General-purpose Register Block 30 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 778 __IO uint32_t BLK30_1; /*!< General-purpose Register Block 30 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 779 __IO uint32_t BLK30_2; /*!< General-purpose Register Block 30 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 780 __IO uint32_t BLK30_3; /*!< General-purpose Register Block 30 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 781 __IO uint32_t BLK30_4; /*!< General-purpose Register Block 30 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 782 __IO uint32_t BLK30_5; /*!< General-purpose Register Block 30 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 783 __IO uint32_t BLK30_6; /*!< General-purpose Register Block 30 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 784 __IO uint32_t BLK30_7; /*!< General-purpose Register Block 30 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 785 __IO uint32_t BLK31_0; /*!< General-purpose Register Block 31 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 786 __IO uint32_t BLK31_1; /*!< General-purpose Register Block 31 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 787 __IO uint32_t BLK31_2; /*!< General-purpose Register Block 31 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 788 __IO uint32_t BLK31_3; /*!< General-purpose Register Block 31 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 789 __IO uint32_t BLK31_4; /*!< General-purpose Register Block 31 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 790 __IO uint32_t BLK31_5; /*!< General-purpose Register Block 31 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 791 __IO uint32_t BLK31_6; /*!< General-purpose Register Block 31 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 792 __IO uint32_t BLK31_7; /*!< General-purpose Register Block 31 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 793 uint32_t RESERVED1[260];
AnnaBridge 184:08ed48f1de7f 794 __IO uint32_t BLK0_0; /*!< General-purpose Register Block 0 (bit 31 - 0)*/
AnnaBridge 184:08ed48f1de7f 795 __IO uint32_t BLK0_1; /*!< General-purpose Register Block 0 (bit 63 - 32)*/
AnnaBridge 184:08ed48f1de7f 796 __IO uint32_t BLK0_2; /*!< General-purpose Register Block 0 (bit 95 - 64)*/
AnnaBridge 184:08ed48f1de7f 797 __IO uint32_t BLK0_3; /*!< General-purpose Register Block 0 (bit 127 - 96)*/
AnnaBridge 184:08ed48f1de7f 798 __IO uint32_t BLK0_4; /*!< General-purpose Register Block 0 (bit 159 - 128)*/
AnnaBridge 184:08ed48f1de7f 799 __IO uint32_t BLK0_5; /*!< General-purpose Register Block 0 (bit 191 - 160)*/
AnnaBridge 184:08ed48f1de7f 800 __IO uint32_t BLK0_6; /*!< General-purpose Register Block 0 (bit 223 - 192)*/
AnnaBridge 184:08ed48f1de7f 801 __IO uint32_t BLK0_7; /*!< General-purpose Register Block 0 (bit 255 - 224)*/
AnnaBridge 184:08ed48f1de7f 802 } TSB_MLA_TypeDef;
AnnaBridge 184:08ed48f1de7f 803
AnnaBridge 184:08ed48f1de7f 804 /**
AnnaBridge 184:08ed48f1de7f 805 * @brief Port A
AnnaBridge 184:08ed48f1de7f 806 */
AnnaBridge 184:08ed48f1de7f 807 typedef struct
AnnaBridge 184:08ed48f1de7f 808 {
AnnaBridge 184:08ed48f1de7f 809 __IO uint32_t DATA; /*!< Port A Data Register */
AnnaBridge 184:08ed48f1de7f 810 __IO uint32_t CR; /*!< Port A Output Control Register */
AnnaBridge 184:08ed48f1de7f 811 __IO uint32_t FR1; /*!< Port A Function Register 1 */
AnnaBridge 184:08ed48f1de7f 812 __IO uint32_t FR2; /*!< Port A Function Register 2 */
AnnaBridge 184:08ed48f1de7f 813 __IO uint32_t FR3; /*!< Port A Function Register 3 */
AnnaBridge 184:08ed48f1de7f 814 __IO uint32_t FR4; /*!< Port A Function Register 4 */
AnnaBridge 184:08ed48f1de7f 815 __IO uint32_t FR5; /*!< Port A Function Register 5 */
AnnaBridge 184:08ed48f1de7f 816 uint32_t RESERVED0[3];
AnnaBridge 184:08ed48f1de7f 817 __IO uint32_t OD; /*!< Port A Open Drain Control Register */
AnnaBridge 184:08ed48f1de7f 818 __IO uint32_t PUP; /*!< Port A Pull-up Control Register */
AnnaBridge 184:08ed48f1de7f 819 __IO uint32_t PDN; /*!< Port A Pull-down Control Register */
AnnaBridge 184:08ed48f1de7f 820 uint32_t RESERVED1;
AnnaBridge 184:08ed48f1de7f 821 __IO uint32_t IE; /*!< Port A Input Control Register */
AnnaBridge 184:08ed48f1de7f 822 } TSB_PA_TypeDef;
AnnaBridge 184:08ed48f1de7f 823
AnnaBridge 184:08ed48f1de7f 824 /**
AnnaBridge 184:08ed48f1de7f 825 * @brief Port B
AnnaBridge 184:08ed48f1de7f 826 */
AnnaBridge 184:08ed48f1de7f 827 typedef struct
AnnaBridge 184:08ed48f1de7f 828 {
AnnaBridge 184:08ed48f1de7f 829 __IO uint32_t DATA; /*!< Port B Data Register */
AnnaBridge 184:08ed48f1de7f 830 __IO uint32_t CR; /*!< Port B Output Control Register */
AnnaBridge 184:08ed48f1de7f 831 __IO uint32_t FR1; /*!< Port B Function Register 1 */
AnnaBridge 184:08ed48f1de7f 832 __IO uint32_t FR2; /*!< Port B Function Register 2 */
AnnaBridge 184:08ed48f1de7f 833 __IO uint32_t FR3; /*!< Port B Function Register 3 */
AnnaBridge 184:08ed48f1de7f 834 __IO uint32_t FR4; /*!< Port B Function Register 4 */
AnnaBridge 184:08ed48f1de7f 835 __IO uint32_t FR5; /*!< Port B Function Register 5 */
AnnaBridge 184:08ed48f1de7f 836 uint32_t RESERVED0[3];
AnnaBridge 184:08ed48f1de7f 837 __IO uint32_t OD; /*!< Port B Open Drain Control Register */
AnnaBridge 184:08ed48f1de7f 838 __IO uint32_t PUP; /*!< Port B Pull-up Control Register */
AnnaBridge 184:08ed48f1de7f 839 uint32_t RESERVED1[2];
AnnaBridge 184:08ed48f1de7f 840 __IO uint32_t IE; /*!< Port B Input Control Register */
AnnaBridge 184:08ed48f1de7f 841 } TSB_PB_TypeDef;
AnnaBridge 184:08ed48f1de7f 842
AnnaBridge 184:08ed48f1de7f 843 /**
AnnaBridge 184:08ed48f1de7f 844 * @brief Port C
AnnaBridge 184:08ed48f1de7f 845 */
AnnaBridge 184:08ed48f1de7f 846 typedef struct
AnnaBridge 184:08ed48f1de7f 847 {
AnnaBridge 184:08ed48f1de7f 848 __IO uint32_t DATA; /*!< Port C Data Register */
AnnaBridge 184:08ed48f1de7f 849 __IO uint32_t CR; /*!< Port C Output Control Register */
AnnaBridge 184:08ed48f1de7f 850 __IO uint32_t FR1; /*!< Port C Function Register 1 */
AnnaBridge 184:08ed48f1de7f 851 __IO uint32_t FR2; /*!< Port C Function Register 2 */
AnnaBridge 184:08ed48f1de7f 852 uint32_t RESERVED0[6];
AnnaBridge 184:08ed48f1de7f 853 __IO uint32_t OD; /*!< Port C Open Drain Control Register */
AnnaBridge 184:08ed48f1de7f 854 __IO uint32_t PUP; /*!< Port C Pull-up Control Register */
AnnaBridge 184:08ed48f1de7f 855 uint32_t RESERVED1[2];
AnnaBridge 184:08ed48f1de7f 856 __IO uint32_t IE; /*!< Port C Input Control Register */
AnnaBridge 184:08ed48f1de7f 857 } TSB_PC_TypeDef;
AnnaBridge 184:08ed48f1de7f 858
AnnaBridge 184:08ed48f1de7f 859 /**
AnnaBridge 184:08ed48f1de7f 860 * @brief Port D
AnnaBridge 184:08ed48f1de7f 861 */
AnnaBridge 184:08ed48f1de7f 862 typedef struct
AnnaBridge 184:08ed48f1de7f 863 {
AnnaBridge 184:08ed48f1de7f 864 __IO uint32_t DATA; /*!< Port D Data Register */
AnnaBridge 184:08ed48f1de7f 865 __IO uint32_t CR; /*!< Port D Output Control Register */
AnnaBridge 184:08ed48f1de7f 866 __IO uint32_t FR1; /*!< Port D Function Register 1 */
AnnaBridge 184:08ed48f1de7f 867 uint32_t RESERVED0[7];
AnnaBridge 184:08ed48f1de7f 868 __IO uint32_t OD; /*!< Port D Open Drain Control Register */
AnnaBridge 184:08ed48f1de7f 869 __IO uint32_t PUP; /*!< Port D Pull-up Control Register */
AnnaBridge 184:08ed48f1de7f 870 uint32_t RESERVED1[2];
AnnaBridge 184:08ed48f1de7f 871 __IO uint32_t IE; /*!< Port D Input Control Register */
AnnaBridge 184:08ed48f1de7f 872 } TSB_PD_TypeDef;
AnnaBridge 184:08ed48f1de7f 873
AnnaBridge 184:08ed48f1de7f 874 /**
AnnaBridge 184:08ed48f1de7f 875 * @brief Port E
AnnaBridge 184:08ed48f1de7f 876 */
AnnaBridge 184:08ed48f1de7f 877 typedef struct
AnnaBridge 184:08ed48f1de7f 878 {
AnnaBridge 184:08ed48f1de7f 879 __IO uint32_t DATA; /*!< Port E Data Register */
AnnaBridge 184:08ed48f1de7f 880 __IO uint32_t CR; /*!< Port E Output Control Register */
AnnaBridge 184:08ed48f1de7f 881 __IO uint32_t FR1; /*!< Port E Function Register 1 */
AnnaBridge 184:08ed48f1de7f 882 uint32_t RESERVED0;
AnnaBridge 184:08ed48f1de7f 883 __IO uint32_t FR3; /*!< Port E Function Register 3 */
AnnaBridge 184:08ed48f1de7f 884 __IO uint32_t FR4; /*!< Port E Function Register 4 */
AnnaBridge 184:08ed48f1de7f 885 __IO uint32_t FR5; /*!< Port E Function Register 5 */
AnnaBridge 184:08ed48f1de7f 886 uint32_t RESERVED1[3];
AnnaBridge 184:08ed48f1de7f 887 __IO uint32_t OD; /*!< Port E Open Drain Control Register */
AnnaBridge 184:08ed48f1de7f 888 __IO uint32_t PUP; /*!< Port E Pull-up Control Register */
AnnaBridge 184:08ed48f1de7f 889 uint32_t RESERVED2[2];
AnnaBridge 184:08ed48f1de7f 890 __IO uint32_t IE; /*!< Port E Input Control Register */
AnnaBridge 184:08ed48f1de7f 891 } TSB_PE_TypeDef;
AnnaBridge 184:08ed48f1de7f 892
AnnaBridge 184:08ed48f1de7f 893 /**
AnnaBridge 184:08ed48f1de7f 894 * @brief Port F
AnnaBridge 184:08ed48f1de7f 895 */
AnnaBridge 184:08ed48f1de7f 896 typedef struct
AnnaBridge 184:08ed48f1de7f 897 {
AnnaBridge 184:08ed48f1de7f 898 __IO uint32_t DATA; /*!< Port F Data Register */
AnnaBridge 184:08ed48f1de7f 899 __IO uint32_t CR; /*!< Port F Output Control Register */
AnnaBridge 184:08ed48f1de7f 900 __IO uint32_t FR1; /*!< Port F Function Register 1 */
AnnaBridge 184:08ed48f1de7f 901 uint32_t RESERVED0;
AnnaBridge 184:08ed48f1de7f 902 __IO uint32_t FR3; /*!< Port F Function Register 3 */
AnnaBridge 184:08ed48f1de7f 903 __IO uint32_t FR4; /*!< Port F Function Register 4 */
AnnaBridge 184:08ed48f1de7f 904 __IO uint32_t FR5; /*!< Port F Function Register 5 */
AnnaBridge 184:08ed48f1de7f 905 uint32_t RESERVED1[3];
AnnaBridge 184:08ed48f1de7f 906 __IO uint32_t OD; /*!< Port F Open Drain Control Register */
AnnaBridge 184:08ed48f1de7f 907 __IO uint32_t PUP; /*!< Port E Pull-up Control Register */
AnnaBridge 184:08ed48f1de7f 908 uint32_t RESERVED2[2];
AnnaBridge 184:08ed48f1de7f 909 __IO uint32_t IE; /*!< Port F Input Control Register */
AnnaBridge 184:08ed48f1de7f 910 } TSB_PF_TypeDef;
AnnaBridge 184:08ed48f1de7f 911
AnnaBridge 184:08ed48f1de7f 912 /**
AnnaBridge 184:08ed48f1de7f 913 * @brief Port G
AnnaBridge 184:08ed48f1de7f 914 */
AnnaBridge 184:08ed48f1de7f 915 typedef struct
AnnaBridge 184:08ed48f1de7f 916 {
AnnaBridge 184:08ed48f1de7f 917 __IO uint32_t DATA; /*!< Port G Data Register */
AnnaBridge 184:08ed48f1de7f 918 __IO uint32_t CR; /*!< Port G Output Control Register */
AnnaBridge 184:08ed48f1de7f 919 __IO uint32_t FR1; /*!< Port G Function Register 1 */
AnnaBridge 184:08ed48f1de7f 920 uint32_t RESERVED0;
AnnaBridge 184:08ed48f1de7f 921 __IO uint32_t FR3; /*!< Port G Function Register 3 */
AnnaBridge 184:08ed48f1de7f 922 __IO uint32_t FR4; /*!< Port G Function Register 4 */
AnnaBridge 184:08ed48f1de7f 923 __IO uint32_t FR5; /*!< Port G Function Register 5 */
AnnaBridge 184:08ed48f1de7f 924 uint32_t RESERVED1[3];
AnnaBridge 184:08ed48f1de7f 925 __IO uint32_t OD; /*!< Port G Open Drain Control Register */
AnnaBridge 184:08ed48f1de7f 926 __IO uint32_t PUP; /*!< Port G Pull-up Control Register */
AnnaBridge 184:08ed48f1de7f 927 uint32_t RESERVED2[2];
AnnaBridge 184:08ed48f1de7f 928 __IO uint32_t IE; /*!< Port G Input Control Register */
AnnaBridge 184:08ed48f1de7f 929 } TSB_PG_TypeDef;
AnnaBridge 184:08ed48f1de7f 930
AnnaBridge 184:08ed48f1de7f 931 /**
AnnaBridge 184:08ed48f1de7f 932 * @brief Port H
AnnaBridge 184:08ed48f1de7f 933 */
AnnaBridge 184:08ed48f1de7f 934 typedef struct
AnnaBridge 184:08ed48f1de7f 935 {
AnnaBridge 184:08ed48f1de7f 936 __IO uint32_t DATA; /*!< Port H Data Register */
AnnaBridge 184:08ed48f1de7f 937 __IO uint32_t CR; /*!< Port H Output Control Register */
AnnaBridge 184:08ed48f1de7f 938 __IO uint32_t FR1; /*!< Port H Function Register 1 */
AnnaBridge 184:08ed48f1de7f 939 __IO uint32_t FR2; /*!< Port H Function Register 2 */
AnnaBridge 184:08ed48f1de7f 940 __IO uint32_t FR3; /*!< Port H Function Register 3 */
AnnaBridge 184:08ed48f1de7f 941 __IO uint32_t FR4; /*!< Port H Function Register 4 */
AnnaBridge 184:08ed48f1de7f 942 uint32_t RESERVED0[4];
AnnaBridge 184:08ed48f1de7f 943 __IO uint32_t OD; /*!< Port H Open Drain Control Register */
AnnaBridge 184:08ed48f1de7f 944 __IO uint32_t PUP; /*!< Port H Pull-up Control Register */
AnnaBridge 184:08ed48f1de7f 945 uint32_t RESERVED1[2];
AnnaBridge 184:08ed48f1de7f 946 __IO uint32_t IE; /*!< Port H Input Control Register */
AnnaBridge 184:08ed48f1de7f 947 } TSB_PH_TypeDef;
AnnaBridge 184:08ed48f1de7f 948
AnnaBridge 184:08ed48f1de7f 949 /**
AnnaBridge 184:08ed48f1de7f 950 * @brief Port J
AnnaBridge 184:08ed48f1de7f 951 */
AnnaBridge 184:08ed48f1de7f 952 typedef struct
AnnaBridge 184:08ed48f1de7f 953 {
AnnaBridge 184:08ed48f1de7f 954 __IO uint32_t DATA; /*!< Port J Data Register */
AnnaBridge 184:08ed48f1de7f 955 __IO uint32_t CR; /*!< Port J Output Control Register */
AnnaBridge 184:08ed48f1de7f 956 __IO uint32_t FR1; /*!< Port J Function Register 1 */
AnnaBridge 184:08ed48f1de7f 957 __IO uint32_t FR2; /*!< Port J Function Register 2 */
AnnaBridge 184:08ed48f1de7f 958 __IO uint32_t FR3; /*!< Port J Function Register 3 */
AnnaBridge 184:08ed48f1de7f 959 uint32_t RESERVED0[5];
AnnaBridge 184:08ed48f1de7f 960 __IO uint32_t OD; /*!< Port J Open Drain Control Register */
AnnaBridge 184:08ed48f1de7f 961 __IO uint32_t PUP; /*!< Port J Pull-up Control Register */
AnnaBridge 184:08ed48f1de7f 962 uint32_t RESERVED1[2];
AnnaBridge 184:08ed48f1de7f 963 __IO uint32_t IE; /*!< Port J Input Control Register */
AnnaBridge 184:08ed48f1de7f 964 } TSB_PJ_TypeDef;
AnnaBridge 184:08ed48f1de7f 965
AnnaBridge 184:08ed48f1de7f 966 /**
AnnaBridge 184:08ed48f1de7f 967 * @brief Port K
AnnaBridge 184:08ed48f1de7f 968 */
AnnaBridge 184:08ed48f1de7f 969 typedef struct
AnnaBridge 184:08ed48f1de7f 970 {
AnnaBridge 184:08ed48f1de7f 971 __IO uint32_t DATA; /*!< Port K Data Register */
AnnaBridge 184:08ed48f1de7f 972 __IO uint32_t CR; /*!< Port K Output Control Register */
AnnaBridge 184:08ed48f1de7f 973 uint32_t RESERVED0;
AnnaBridge 184:08ed48f1de7f 974 __IO uint32_t FR2; /*!< Port K Function Register 2 */
AnnaBridge 184:08ed48f1de7f 975 __IO uint32_t FR3; /*!< Port K Function Register 3 */
AnnaBridge 184:08ed48f1de7f 976 __IO uint32_t FR4; /*!< Port K Function Register 4 */
AnnaBridge 184:08ed48f1de7f 977 uint32_t RESERVED1[4];
AnnaBridge 184:08ed48f1de7f 978 __IO uint32_t OD; /*!< Port K Open Drain Control Register */
AnnaBridge 184:08ed48f1de7f 979 __IO uint32_t PUP; /*!< Port K Pull-up Control Register */
AnnaBridge 184:08ed48f1de7f 980 uint32_t RESERVED2[2];
AnnaBridge 184:08ed48f1de7f 981 __IO uint32_t IE; /*!< Port K Input Control Register */
AnnaBridge 184:08ed48f1de7f 982 } TSB_PK_TypeDef;
AnnaBridge 184:08ed48f1de7f 983
AnnaBridge 184:08ed48f1de7f 984 /**
AnnaBridge 184:08ed48f1de7f 985 * @brief Port L
AnnaBridge 184:08ed48f1de7f 986 */
AnnaBridge 184:08ed48f1de7f 987 typedef struct
AnnaBridge 184:08ed48f1de7f 988 {
AnnaBridge 184:08ed48f1de7f 989 __IO uint32_t DATA; /*!< Port L Data Register */
AnnaBridge 184:08ed48f1de7f 990 __IO uint32_t CR; /*!< Port L Output Control Register */
AnnaBridge 184:08ed48f1de7f 991 uint32_t RESERVED0[2];
AnnaBridge 184:08ed48f1de7f 992 __IO uint32_t FR3; /*!< Port L Function Register 3 */
AnnaBridge 184:08ed48f1de7f 993 __IO uint32_t FR4; /*!< Port L Function Register 4 */
AnnaBridge 184:08ed48f1de7f 994 __IO uint32_t FR5; /*!< Port L Function Register 5 */
AnnaBridge 184:08ed48f1de7f 995 __IO uint32_t FR6; /*!< Port L Function Register 6 */
AnnaBridge 184:08ed48f1de7f 996 uint32_t RESERVED1[2];
AnnaBridge 184:08ed48f1de7f 997 __IO uint32_t OD; /*!< Port L Open Drain Control Register */
AnnaBridge 184:08ed48f1de7f 998 __IO uint32_t PUP; /*!< Port L Pull-up Control Register */
AnnaBridge 184:08ed48f1de7f 999 uint32_t RESERVED2[2];
AnnaBridge 184:08ed48f1de7f 1000 __IO uint32_t IE; /*!< Port L Input Control Register */
AnnaBridge 184:08ed48f1de7f 1001 } TSB_PL_TypeDef;
AnnaBridge 184:08ed48f1de7f 1002
AnnaBridge 184:08ed48f1de7f 1003 /**
AnnaBridge 184:08ed48f1de7f 1004 * @brief 16-bit Timer/Event Counter (TB)
AnnaBridge 184:08ed48f1de7f 1005 */
AnnaBridge 184:08ed48f1de7f 1006 typedef struct
AnnaBridge 184:08ed48f1de7f 1007 {
AnnaBridge 184:08ed48f1de7f 1008 __IO uint32_t EN; /*!< TB Enable Register */
AnnaBridge 184:08ed48f1de7f 1009 __IO uint32_t RUN; /*!< TB RUN Register */
AnnaBridge 184:08ed48f1de7f 1010 __IO uint32_t CR; /*!< TB Control Register */
AnnaBridge 184:08ed48f1de7f 1011 __IO uint32_t MOD; /*!< TB Mode Register */
AnnaBridge 184:08ed48f1de7f 1012 __IO uint32_t FFCR; /*!< TB Flip-Flop Control Register */
AnnaBridge 184:08ed48f1de7f 1013 __I uint32_t ST; /*!< TB Status Register */
AnnaBridge 184:08ed48f1de7f 1014 __IO uint32_t IM; /*!< TB Interrupt Mask Register */
AnnaBridge 184:08ed48f1de7f 1015 __I uint32_t UC; /*!< TB Up-counter Capture Register */
AnnaBridge 184:08ed48f1de7f 1016 __IO uint32_t RG0; /*!< TB RG0 Timer Register */
AnnaBridge 184:08ed48f1de7f 1017 __IO uint32_t RG1; /*!< TB RG1 Timer Register */
AnnaBridge 184:08ed48f1de7f 1018 __I uint32_t CP0; /*!< TB CP0 Capture Register */
AnnaBridge 184:08ed48f1de7f 1019 __I uint32_t CP1; /*!< TB CP1 Capture Register */
AnnaBridge 184:08ed48f1de7f 1020 } TSB_TB_TypeDef;
AnnaBridge 184:08ed48f1de7f 1021
AnnaBridge 184:08ed48f1de7f 1022 /**
AnnaBridge 184:08ed48f1de7f 1023 * @brief 16-bit Multi-Purpose Timer (MPT-TMR/IGBT)
AnnaBridge 184:08ed48f1de7f 1024 */
AnnaBridge 184:08ed48f1de7f 1025 typedef struct
AnnaBridge 184:08ed48f1de7f 1026 {
AnnaBridge 184:08ed48f1de7f 1027 __IO uint32_t EN; /*!< MPT Enable Register */
AnnaBridge 184:08ed48f1de7f 1028 __IO uint32_t RUN; /*!< MPT RUN Register */
AnnaBridge 184:08ed48f1de7f 1029 __IO uint32_t TBCR; /*!< MPT Control Register */
AnnaBridge 184:08ed48f1de7f 1030 __IO uint32_t TBMOD; /*!< MPT Mode Register */
AnnaBridge 184:08ed48f1de7f 1031 __IO uint32_t TBFFCR; /*!< MPT Flip-Flop Control Register */
AnnaBridge 184:08ed48f1de7f 1032 __I uint32_t TBST; /*!< MPT Status Register */
AnnaBridge 184:08ed48f1de7f 1033 __IO uint32_t TBIM; /*!< MPT Interrupt Mask Register */
AnnaBridge 184:08ed48f1de7f 1034 __I uint32_t TBUC; /*!< MPT Read Capture Register */
AnnaBridge 184:08ed48f1de7f 1035 __IO uint32_t RG0; /*!< MPT RG0 Timer Register */
AnnaBridge 184:08ed48f1de7f 1036 __IO uint32_t RG1; /*!< MPT RG1 Timer Register */
AnnaBridge 184:08ed48f1de7f 1037 __I uint32_t CP0; /*!< MPT CP0 Capture Register */
AnnaBridge 184:08ed48f1de7f 1038 __I uint32_t CP1; /*!< MPT CP1 Capture Register */
AnnaBridge 184:08ed48f1de7f 1039 __IO uint32_t IGCR; /*!< IGBT Control Register */
AnnaBridge 184:08ed48f1de7f 1040 __O uint32_t IGRESTA; /*!< IGBT Timer Restart Register */
AnnaBridge 184:08ed48f1de7f 1041 __I uint32_t IGST; /*!< IGBT Timer Status Register */
AnnaBridge 184:08ed48f1de7f 1042 __IO uint32_t IGICR; /*!< IGBT Input Control Register */
AnnaBridge 184:08ed48f1de7f 1043 __IO uint32_t IGOCR; /*!< IGBT Output Control Register */
AnnaBridge 184:08ed48f1de7f 1044 __IO uint32_t IGRG2; /*!< IGBT RG2 Timer Register */
AnnaBridge 184:08ed48f1de7f 1045 __IO uint32_t IGRG3; /*!< IGBT RG3 Timer Register */
AnnaBridge 184:08ed48f1de7f 1046 __IO uint32_t IGRG4; /*!< IGBT RG4 Timer Register */
AnnaBridge 184:08ed48f1de7f 1047 __IO uint32_t IGEMGCR; /*!< IGBT EMG Control Register */
AnnaBridge 184:08ed48f1de7f 1048 __I uint32_t IGEMGST; /*!< IGBT EMG Status Register */
AnnaBridge 184:08ed48f1de7f 1049 __IO uint32_t IGTRG; /*!< IGBT Trigger Status Register */
AnnaBridge 184:08ed48f1de7f 1050 } TSB_MT_TypeDef;
AnnaBridge 184:08ed48f1de7f 1051
AnnaBridge 184:08ed48f1de7f 1052 /**
AnnaBridge 184:08ed48f1de7f 1053 * @brief Real Time Clock (RTC)
AnnaBridge 184:08ed48f1de7f 1054 */
AnnaBridge 184:08ed48f1de7f 1055 typedef struct
AnnaBridge 184:08ed48f1de7f 1056 {
AnnaBridge 184:08ed48f1de7f 1057 __IO uint8_t SECR; /*!< RTC Sec setting register */
AnnaBridge 184:08ed48f1de7f 1058 __IO uint8_t MINR; /*!< RTC Min settging register */
AnnaBridge 184:08ed48f1de7f 1059 __IO uint8_t HOURR; /*!< RTC Hour setting register */
AnnaBridge 184:08ed48f1de7f 1060 uint8_t RESERVED0;
AnnaBridge 184:08ed48f1de7f 1061 __IO uint8_t DAYR; /*!< RTC Day setting register */
AnnaBridge 184:08ed48f1de7f 1062 __IO uint8_t DATER; /*!< RTC Date setting register */
AnnaBridge 184:08ed48f1de7f 1063 __IO uint8_t MONTHR; /*!< RTC Month settging register PAGE0 */
AnnaBridge 184:08ed48f1de7f 1064 __IO uint8_t YEARR; /*!< RTC Year setting register PAGE0 */
AnnaBridge 184:08ed48f1de7f 1065 __IO uint8_t PAGER; /*!< RTC Page register */
AnnaBridge 184:08ed48f1de7f 1066 uint8_t RESERVED1[3];
AnnaBridge 184:08ed48f1de7f 1067 __IO uint8_t RESTR; /*!< RTC Reset register */
AnnaBridge 184:08ed48f1de7f 1068 uint8_t RESERVED2;
AnnaBridge 184:08ed48f1de7f 1069 __IO uint8_t PROTECT; /*!< RTC protect register */
AnnaBridge 184:08ed48f1de7f 1070 __IO uint8_t ADJCTL; /*!< RTC clock adjust control register */
AnnaBridge 184:08ed48f1de7f 1071 __IO uint16_t ADJDAT; /*!< RTC clock adjust data register */
AnnaBridge 184:08ed48f1de7f 1072 } TSB_RTC_TypeDef;
AnnaBridge 184:08ed48f1de7f 1073
AnnaBridge 184:08ed48f1de7f 1074 /**
AnnaBridge 184:08ed48f1de7f 1075 * @brief Serial Channel (SC)
AnnaBridge 184:08ed48f1de7f 1076 */
AnnaBridge 184:08ed48f1de7f 1077 typedef struct
AnnaBridge 184:08ed48f1de7f 1078 {
AnnaBridge 184:08ed48f1de7f 1079 __IO uint32_t EN; /*!< SC Enable Register */
AnnaBridge 184:08ed48f1de7f 1080 __IO uint32_t BUF; /*!< SC Buffer Register */
AnnaBridge 184:08ed48f1de7f 1081 __IO uint32_t CR; /*!< SC Control Register */
AnnaBridge 184:08ed48f1de7f 1082 __IO uint32_t MOD0; /*!< SC Mode Control Register 0 */
AnnaBridge 184:08ed48f1de7f 1083 __IO uint32_t BRCR; /*!< SC Baud Rate Generator Control Register */
AnnaBridge 184:08ed48f1de7f 1084 __IO uint32_t BRADD; /*!< SC Baud Rate Generator Control Register 2 */
AnnaBridge 184:08ed48f1de7f 1085 __IO uint32_t MOD1; /*!< SC Mode Control Register 1 */
AnnaBridge 184:08ed48f1de7f 1086 __IO uint32_t MOD2; /*!< SC Mode Control Register 2 */
AnnaBridge 184:08ed48f1de7f 1087 __IO uint32_t RFC; /*!< SC RX FIFO Configuration Register */
AnnaBridge 184:08ed48f1de7f 1088 __IO uint32_t TFC; /*!< SC TX FIFO Configuration Register */
AnnaBridge 184:08ed48f1de7f 1089 __I uint32_t RST; /*!< SC RX FIFO Status Register */
AnnaBridge 184:08ed48f1de7f 1090 __I uint32_t TST; /*!< SC TX FIFO Status Register */
AnnaBridge 184:08ed48f1de7f 1091 __IO uint32_t FCNF; /*!< SC FIFO Configuration Register */
AnnaBridge 184:08ed48f1de7f 1092 } TSB_SC_TypeDef;
AnnaBridge 184:08ed48f1de7f 1093
AnnaBridge 184:08ed48f1de7f 1094 /**
AnnaBridge 184:08ed48f1de7f 1095 * @brief Watchdog Timer (WD)
AnnaBridge 184:08ed48f1de7f 1096 */
AnnaBridge 184:08ed48f1de7f 1097 typedef struct
AnnaBridge 184:08ed48f1de7f 1098 {
AnnaBridge 184:08ed48f1de7f 1099 __IO uint32_t MOD; /*!< WD Mode Register */
AnnaBridge 184:08ed48f1de7f 1100 __O uint32_t CR; /*!< WD Control Register */
AnnaBridge 184:08ed48f1de7f 1101 __I uint32_t FLG; /*!< Flag Register */
AnnaBridge 184:08ed48f1de7f 1102 } TSB_WD_TypeDef;
AnnaBridge 184:08ed48f1de7f 1103
AnnaBridge 184:08ed48f1de7f 1104 /**
AnnaBridge 184:08ed48f1de7f 1105 * @brief Clock Generator (CG)
AnnaBridge 184:08ed48f1de7f 1106 */
AnnaBridge 184:08ed48f1de7f 1107 typedef struct
AnnaBridge 184:08ed48f1de7f 1108 {
AnnaBridge 184:08ed48f1de7f 1109 __IO uint32_t SYSCR; /*!< System Control Register */
AnnaBridge 184:08ed48f1de7f 1110 __IO uint32_t OSCCR; /*!< Oscillation Control Register */
AnnaBridge 184:08ed48f1de7f 1111 __IO uint32_t STBYCR; /*!< Standby Control Register */
AnnaBridge 184:08ed48f1de7f 1112 __IO uint32_t PLLSEL; /*!< PLL Selection Register */
AnnaBridge 184:08ed48f1de7f 1113 uint32_t RESERVED0[4];
AnnaBridge 184:08ed48f1de7f 1114 __IO uint32_t FSYSMSKA; /*!< fclk Supply Stop Register A */
AnnaBridge 184:08ed48f1de7f 1115 __IO uint32_t FSYSMSKB; /*!< fclk Supply Stop Register B */
AnnaBridge 184:08ed48f1de7f 1116 uint32_t RESERVED1[5];
AnnaBridge 184:08ed48f1de7f 1117 __IO uint32_t PROTECT; /*!< Protect Register */
AnnaBridge 184:08ed48f1de7f 1118 __IO uint32_t IMCGA; /*!< CG Interrupt Mode Control Register A */
AnnaBridge 184:08ed48f1de7f 1119 __IO uint32_t IMCGB; /*!< CG Interrupt Mode Control Register B */
AnnaBridge 184:08ed48f1de7f 1120 uint32_t RESERVED2[6];
AnnaBridge 184:08ed48f1de7f 1121 __O uint32_t ICRCG; /*!< CG Interrupt Request Clear Register */
AnnaBridge 184:08ed48f1de7f 1122 __IO uint32_t RSTFLG; /*!< Reset Flag Register */
AnnaBridge 184:08ed48f1de7f 1123 __I uint32_t NMIFLG; /*!< NMI Flag Register */
AnnaBridge 184:08ed48f1de7f 1124 } TSB_CG_TypeDef;
AnnaBridge 184:08ed48f1de7f 1125
AnnaBridge 184:08ed48f1de7f 1126 /**
AnnaBridge 184:08ed48f1de7f 1127 * @brief Low voltage detecter
AnnaBridge 184:08ed48f1de7f 1128 */
AnnaBridge 184:08ed48f1de7f 1129 typedef struct
AnnaBridge 184:08ed48f1de7f 1130 {
AnnaBridge 184:08ed48f1de7f 1131 uint32_t RESERVED0;
AnnaBridge 184:08ed48f1de7f 1132 __IO uint32_t CR1; /*!< LVD detection control register 1 */
AnnaBridge 184:08ed48f1de7f 1133 } TSB_LVD_TypeDef;
AnnaBridge 184:08ed48f1de7f 1134
AnnaBridge 184:08ed48f1de7f 1135 /**
AnnaBridge 184:08ed48f1de7f 1136 * @brief Flash Control (FC)
AnnaBridge 184:08ed48f1de7f 1137 */
AnnaBridge 184:08ed48f1de7f 1138 typedef struct
AnnaBridge 184:08ed48f1de7f 1139 {
AnnaBridge 184:08ed48f1de7f 1140 uint32_t RESERVED0[4];
AnnaBridge 184:08ed48f1de7f 1141 __IO uint32_t SECBIT; /*!< Security Bit Register */
AnnaBridge 184:08ed48f1de7f 1142 uint32_t RESERVED1[3];
AnnaBridge 184:08ed48f1de7f 1143 __I uint32_t PSR0; /*!< Protect Status Register 0 */
AnnaBridge 184:08ed48f1de7f 1144 uint32_t RESERVED2[3];
AnnaBridge 184:08ed48f1de7f 1145 __I uint32_t PSR1; /*!< Protect Status Register 1 */
AnnaBridge 184:08ed48f1de7f 1146 uint32_t RESERVED3[51];
AnnaBridge 184:08ed48f1de7f 1147 __I uint32_t SR; /*!< Status Register */
AnnaBridge 184:08ed48f1de7f 1148 __I uint32_t SWPSR; /*!< Swap Status Register */
AnnaBridge 184:08ed48f1de7f 1149 uint32_t RESERVED4[14];
AnnaBridge 184:08ed48f1de7f 1150 __IO uint32_t AREASEL; /*!< Area Selection Register */
AnnaBridge 184:08ed48f1de7f 1151 uint32_t RESERVED5;
AnnaBridge 184:08ed48f1de7f 1152 __IO uint32_t CR; /*!< Control Register */
AnnaBridge 184:08ed48f1de7f 1153 __IO uint32_t STSCLR; /*!< Status Clear Register */
AnnaBridge 184:08ed48f1de7f 1154 __IO uint32_t WCLKCR; /*!< WCLK Configuration Register */
AnnaBridge 184:08ed48f1de7f 1155 __IO uint32_t PROGCR; /*!< Program Counter Configuration Register */
AnnaBridge 184:08ed48f1de7f 1156 __IO uint32_t ERASECR; /*!< Erase Counter Configuration Register */
AnnaBridge 184:08ed48f1de7f 1157 } TSB_FC_TypeDef;
AnnaBridge 184:08ed48f1de7f 1158
AnnaBridge 184:08ed48f1de7f 1159
AnnaBridge 184:08ed48f1de7f 1160 /* Memory map */
AnnaBridge 184:08ed48f1de7f 1161 #define FLASH_BASE (0x00000000UL)
AnnaBridge 184:08ed48f1de7f 1162 #define RAM_BASE (0x20000000UL)
AnnaBridge 184:08ed48f1de7f 1163 #define PERI_BASE (0x40000000UL)
AnnaBridge 184:08ed48f1de7f 1164
AnnaBridge 184:08ed48f1de7f 1165
AnnaBridge 184:08ed48f1de7f 1166 #define TSB_SSP0_BASE (PERI_BASE + 0x0040000UL)
AnnaBridge 184:08ed48f1de7f 1167 #define TSB_SSP1_BASE (PERI_BASE + 0x0041000UL)
AnnaBridge 184:08ed48f1de7f 1168 #define TSB_SSP2_BASE (PERI_BASE + 0x0042000UL)
AnnaBridge 184:08ed48f1de7f 1169 #define TSB_UART0_BASE (PERI_BASE + 0x0048000UL)
AnnaBridge 184:08ed48f1de7f 1170 #define TSB_UART1_BASE (PERI_BASE + 0x0049000UL)
AnnaBridge 184:08ed48f1de7f 1171 #define TSB_DMAA_BASE (PERI_BASE + 0x004C000UL)
AnnaBridge 184:08ed48f1de7f 1172 #define TSB_DMAB_BASE (PERI_BASE + 0x004D000UL)
AnnaBridge 184:08ed48f1de7f 1173 #define TSB_DMAC_BASE (PERI_BASE + 0x004E000UL)
AnnaBridge 184:08ed48f1de7f 1174 #define TSB_AD_BASE (PERI_BASE + 0x0050000UL)
AnnaBridge 184:08ed48f1de7f 1175 #define TSB_EXB_BASE (PERI_BASE + 0x005C000UL)
AnnaBridge 184:08ed48f1de7f 1176 #define TSB_SNFC_BASE (PERI_BASE + 0x005C400UL)
AnnaBridge 184:08ed48f1de7f 1177 #define TSB_DMAIF_BASE (PERI_BASE + 0x005F000UL)
AnnaBridge 184:08ed48f1de7f 1178 #define TSB_ADILV_BASE (PERI_BASE + 0x0066000UL)
AnnaBridge 184:08ed48f1de7f 1179 #define TSB_I2C0_BASE (PERI_BASE + 0x00A0000UL)
AnnaBridge 184:08ed48f1de7f 1180 #define TSB_I2C1_BASE (PERI_BASE + 0x00A1000UL)
AnnaBridge 184:08ed48f1de7f 1181 #define TSB_I2C2_BASE (PERI_BASE + 0x00A2000UL)
AnnaBridge 184:08ed48f1de7f 1182 #define TSB_AES_BASE (PERI_BASE + 0x00B8200UL)
AnnaBridge 184:08ed48f1de7f 1183 #define TSB_SHA_BASE (PERI_BASE + 0x00B8300UL)
AnnaBridge 184:08ed48f1de7f 1184 #define TSB_ESG_BASE (PERI_BASE + 0x00B8400UL)
AnnaBridge 184:08ed48f1de7f 1185 #define TSB_SRST_BASE (PERI_BASE + 0x00B8500UL)
AnnaBridge 184:08ed48f1de7f 1186 #define TSB_MLA_BASE (PERI_BASE + 0x00B9000UL)
AnnaBridge 184:08ed48f1de7f 1187 #define TSB_PA_BASE (PERI_BASE + 0x00C0000UL)
AnnaBridge 184:08ed48f1de7f 1188 #define TSB_PB_BASE (PERI_BASE + 0x00C0100UL)
AnnaBridge 184:08ed48f1de7f 1189 #define TSB_PC_BASE (PERI_BASE + 0x00C0200UL)
AnnaBridge 184:08ed48f1de7f 1190 #define TSB_PD_BASE (PERI_BASE + 0x00C0300UL)
AnnaBridge 184:08ed48f1de7f 1191 #define TSB_PE_BASE (PERI_BASE + 0x00C0400UL)
AnnaBridge 184:08ed48f1de7f 1192 #define TSB_PF_BASE (PERI_BASE + 0x00C0500UL)
AnnaBridge 184:08ed48f1de7f 1193 #define TSB_PG_BASE (PERI_BASE + 0x00C0600UL)
AnnaBridge 184:08ed48f1de7f 1194 #define TSB_PH_BASE (PERI_BASE + 0x00C0700UL)
AnnaBridge 184:08ed48f1de7f 1195 #define TSB_PJ_BASE (PERI_BASE + 0x00C0800UL)
AnnaBridge 184:08ed48f1de7f 1196 #define TSB_PK_BASE (PERI_BASE + 0x00C0900UL)
AnnaBridge 184:08ed48f1de7f 1197 #define TSB_PL_BASE (PERI_BASE + 0x00C0A00UL)
AnnaBridge 184:08ed48f1de7f 1198 #define TSB_TB0_BASE (PERI_BASE + 0x00C4000UL)
AnnaBridge 184:08ed48f1de7f 1199 #define TSB_TB1_BASE (PERI_BASE + 0x00C4100UL)
AnnaBridge 184:08ed48f1de7f 1200 #define TSB_TB2_BASE (PERI_BASE + 0x00C4200UL)
AnnaBridge 184:08ed48f1de7f 1201 #define TSB_TB3_BASE (PERI_BASE + 0x00C4300UL)
AnnaBridge 184:08ed48f1de7f 1202 #define TSB_TB4_BASE (PERI_BASE + 0x00C4400UL)
AnnaBridge 184:08ed48f1de7f 1203 #define TSB_TB5_BASE (PERI_BASE + 0x00C4500UL)
AnnaBridge 184:08ed48f1de7f 1204 #define TSB_TB6_BASE (PERI_BASE + 0x00C4600UL)
AnnaBridge 184:08ed48f1de7f 1205 #define TSB_TB7_BASE (PERI_BASE + 0x00C4700UL)
AnnaBridge 184:08ed48f1de7f 1206 #define TSB_MT0_BASE (PERI_BASE + 0x00C7000UL)
AnnaBridge 184:08ed48f1de7f 1207 #define TSB_MT1_BASE (PERI_BASE + 0x00C7100UL)
AnnaBridge 184:08ed48f1de7f 1208 #define TSB_MT2_BASE (PERI_BASE + 0x00C7200UL)
AnnaBridge 184:08ed48f1de7f 1209 #define TSB_MT3_BASE (PERI_BASE + 0x00C7300UL)
AnnaBridge 184:08ed48f1de7f 1210 #define TSB_RTC_BASE (PERI_BASE + 0x00CC000UL)
AnnaBridge 184:08ed48f1de7f 1211 #define TSB_SC0_BASE (PERI_BASE + 0x00E1000UL)
AnnaBridge 184:08ed48f1de7f 1212 #define TSB_SC1_BASE (PERI_BASE + 0x00E1100UL)
AnnaBridge 184:08ed48f1de7f 1213 #define TSB_SC2_BASE (PERI_BASE + 0x00E1200UL)
AnnaBridge 184:08ed48f1de7f 1214 #define TSB_SC3_BASE (PERI_BASE + 0x00E1300UL)
AnnaBridge 184:08ed48f1de7f 1215 #define TSB_WD_BASE (PERI_BASE + 0x00F2000UL)
AnnaBridge 184:08ed48f1de7f 1216 #define TSB_CG_BASE (PERI_BASE + 0x00F3000UL)
AnnaBridge 184:08ed48f1de7f 1217 #define TSB_LVD_BASE (PERI_BASE + 0x00F4000UL)
AnnaBridge 184:08ed48f1de7f 1218 #define TSB_FC_BASE (PERI_BASE + 0x1DFF0000UL)
AnnaBridge 184:08ed48f1de7f 1219
AnnaBridge 184:08ed48f1de7f 1220
AnnaBridge 184:08ed48f1de7f 1221 /* Peripheral declaration */
AnnaBridge 184:08ed48f1de7f 1222 #define TSB_SSP0 (( TSB_SSP_TypeDef *) TSB_SSP0_BASE)
AnnaBridge 184:08ed48f1de7f 1223 #define TSB_SSP1 (( TSB_SSP_TypeDef *) TSB_SSP1_BASE)
AnnaBridge 184:08ed48f1de7f 1224 #define TSB_SSP2 (( TSB_SSP_TypeDef *) TSB_SSP2_BASE)
AnnaBridge 184:08ed48f1de7f 1225 #define TSB_UART0 (( TSB_UART_TypeDef *) TSB_UART0_BASE)
AnnaBridge 184:08ed48f1de7f 1226 #define TSB_UART1 (( TSB_UART_TypeDef *) TSB_UART1_BASE)
AnnaBridge 184:08ed48f1de7f 1227 #define TSB_DMAA (( TSB_DMA_TypeDef *) TSB_DMAA_BASE)
AnnaBridge 184:08ed48f1de7f 1228 #define TSB_DMAB (( TSB_DMA_TypeDef *) TSB_DMAB_BASE)
AnnaBridge 184:08ed48f1de7f 1229 #define TSB_DMAC (( TSB_DMA_TypeDef *) TSB_DMAC_BASE)
AnnaBridge 184:08ed48f1de7f 1230 #define TSB_AD (( TSB_AD_TypeDef *) TSB_AD_BASE)
AnnaBridge 184:08ed48f1de7f 1231 #define TSB_EXB (( TSB_EXB_TypeDef *) TSB_EXB_BASE)
AnnaBridge 184:08ed48f1de7f 1232 #define TSB_SNFC (( TSB_SNFC_TypeDef *) TSB_SNFC_BASE)
AnnaBridge 184:08ed48f1de7f 1233 #define TSB_DMAIF (( TSB_DMAIF_TypeDef *) TSB_DMAIF_BASE)
AnnaBridge 184:08ed48f1de7f 1234 #define TSB_ADILV (( TSB_ADILV_TypeDef *) TSB_ADILV_BASE)
AnnaBridge 184:08ed48f1de7f 1235 #define TSB_I2C0 (( TSB_I2C_TypeDef *) TSB_I2C0_BASE)
AnnaBridge 184:08ed48f1de7f 1236 #define TSB_I2C1 (( TSB_I2C_TypeDef *) TSB_I2C1_BASE)
AnnaBridge 184:08ed48f1de7f 1237 #define TSB_I2C2 (( TSB_I2C_TypeDef *) TSB_I2C2_BASE)
AnnaBridge 184:08ed48f1de7f 1238 #define TSB_AES (( TSB_AES_TypeDef *) TSB_AES_BASE)
AnnaBridge 184:08ed48f1de7f 1239 #define TSB_SHA (( TSB_SHA_TypeDef *) TSB_SHA_BASE)
AnnaBridge 184:08ed48f1de7f 1240 #define TSB_ESG (( TSB_ESG_TypeDef *) TSB_ESG_BASE)
AnnaBridge 184:08ed48f1de7f 1241 #define TSB_SRST (( TSB_SRST_TypeDef *) TSB_SRST_BASE)
AnnaBridge 184:08ed48f1de7f 1242 #define TSB_MLA (( TSB_MLA_TypeDef *) TSB_MLA_BASE)
AnnaBridge 184:08ed48f1de7f 1243 #define TSB_PA (( TSB_PA_TypeDef *) TSB_PA_BASE)
AnnaBridge 184:08ed48f1de7f 1244 #define TSB_PB (( TSB_PB_TypeDef *) TSB_PB_BASE)
AnnaBridge 184:08ed48f1de7f 1245 #define TSB_PC (( TSB_PC_TypeDef *) TSB_PC_BASE)
AnnaBridge 184:08ed48f1de7f 1246 #define TSB_PD (( TSB_PD_TypeDef *) TSB_PD_BASE)
AnnaBridge 184:08ed48f1de7f 1247 #define TSB_PE (( TSB_PE_TypeDef *) TSB_PE_BASE)
AnnaBridge 184:08ed48f1de7f 1248 #define TSB_PF (( TSB_PF_TypeDef *) TSB_PF_BASE)
AnnaBridge 184:08ed48f1de7f 1249 #define TSB_PG (( TSB_PG_TypeDef *) TSB_PG_BASE)
AnnaBridge 184:08ed48f1de7f 1250 #define TSB_PH (( TSB_PH_TypeDef *) TSB_PH_BASE)
AnnaBridge 184:08ed48f1de7f 1251 #define TSB_PJ (( TSB_PJ_TypeDef *) TSB_PJ_BASE)
AnnaBridge 184:08ed48f1de7f 1252 #define TSB_PK (( TSB_PK_TypeDef *) TSB_PK_BASE)
AnnaBridge 184:08ed48f1de7f 1253 #define TSB_PL (( TSB_PL_TypeDef *) TSB_PL_BASE)
AnnaBridge 184:08ed48f1de7f 1254 #define TSB_TB0 (( TSB_TB_TypeDef *) TSB_TB0_BASE)
AnnaBridge 184:08ed48f1de7f 1255 #define TSB_TB1 (( TSB_TB_TypeDef *) TSB_TB1_BASE)
AnnaBridge 184:08ed48f1de7f 1256 #define TSB_TB2 (( TSB_TB_TypeDef *) TSB_TB2_BASE)
AnnaBridge 184:08ed48f1de7f 1257 #define TSB_TB3 (( TSB_TB_TypeDef *) TSB_TB3_BASE)
AnnaBridge 184:08ed48f1de7f 1258 #define TSB_TB4 (( TSB_TB_TypeDef *) TSB_TB4_BASE)
AnnaBridge 184:08ed48f1de7f 1259 #define TSB_TB5 (( TSB_TB_TypeDef *) TSB_TB5_BASE)
AnnaBridge 184:08ed48f1de7f 1260 #define TSB_TB6 (( TSB_TB_TypeDef *) TSB_TB6_BASE)
AnnaBridge 184:08ed48f1de7f 1261 #define TSB_TB7 (( TSB_TB_TypeDef *) TSB_TB7_BASE)
AnnaBridge 184:08ed48f1de7f 1262 #define TSB_MT0 (( TSB_MT_TypeDef *) TSB_MT0_BASE)
AnnaBridge 184:08ed48f1de7f 1263 #define TSB_MT1 (( TSB_MT_TypeDef *) TSB_MT1_BASE)
AnnaBridge 184:08ed48f1de7f 1264 #define TSB_MT2 (( TSB_MT_TypeDef *) TSB_MT2_BASE)
AnnaBridge 184:08ed48f1de7f 1265 #define TSB_MT3 (( TSB_MT_TypeDef *) TSB_MT3_BASE)
AnnaBridge 184:08ed48f1de7f 1266 #define TSB_RTC (( TSB_RTC_TypeDef *) TSB_RTC_BASE)
AnnaBridge 184:08ed48f1de7f 1267 #define TSB_SC0 (( TSB_SC_TypeDef *) TSB_SC0_BASE)
AnnaBridge 184:08ed48f1de7f 1268 #define TSB_SC1 (( TSB_SC_TypeDef *) TSB_SC1_BASE)
AnnaBridge 184:08ed48f1de7f 1269 #define TSB_SC2 (( TSB_SC_TypeDef *) TSB_SC2_BASE)
AnnaBridge 184:08ed48f1de7f 1270 #define TSB_SC3 (( TSB_SC_TypeDef *) TSB_SC3_BASE)
AnnaBridge 184:08ed48f1de7f 1271 #define TSB_WD (( TSB_WD_TypeDef *) TSB_WD_BASE)
AnnaBridge 184:08ed48f1de7f 1272 #define TSB_CG (( TSB_CG_TypeDef *) TSB_CG_BASE)
AnnaBridge 184:08ed48f1de7f 1273 #define TSB_LVD (( TSB_LVD_TypeDef *) TSB_LVD_BASE)
AnnaBridge 184:08ed48f1de7f 1274 #define TSB_FC (( TSB_FC_TypeDef *) TSB_FC_BASE)
AnnaBridge 184:08ed48f1de7f 1275
AnnaBridge 184:08ed48f1de7f 1276
AnnaBridge 184:08ed48f1de7f 1277 /* Bit-Band for Device Specific Peripheral Registers */
AnnaBridge 184:08ed48f1de7f 1278 #define BITBAND_OFFSET (0x02000000UL)
AnnaBridge 184:08ed48f1de7f 1279 #define BITBAND_PERI_BASE (PERI_BASE + BITBAND_OFFSET)
AnnaBridge 184:08ed48f1de7f 1280 #define BITBAND_PERI(addr, bitnum) (BITBAND_PERI_BASE + (((uint32_t)(addr) - PERI_BASE) << 5) + ((uint32_t)(bitnum) << 2))
AnnaBridge 184:08ed48f1de7f 1281
AnnaBridge 184:08ed48f1de7f 1282
AnnaBridge 184:08ed48f1de7f 1283
AnnaBridge 184:08ed48f1de7f 1284 /* Synchronous Serial Port */
AnnaBridge 184:08ed48f1de7f 1285 #define TSB_SSP0_CR0_SPO (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP0->CR0,6)))
AnnaBridge 184:08ed48f1de7f 1286 #define TSB_SSP0_CR0_SPH (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP0->CR0,7)))
AnnaBridge 184:08ed48f1de7f 1287 #define TSB_SSP0_CR1_LBM (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP0->CR1,0)))
AnnaBridge 184:08ed48f1de7f 1288 #define TSB_SSP0_CR1_SSE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP0->CR1,1)))
AnnaBridge 184:08ed48f1de7f 1289 #define TSB_SSP0_CR1_MS (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP0->CR1,2)))
AnnaBridge 184:08ed48f1de7f 1290 #define TSB_SSP0_CR1_SOD (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP0->CR1,3)))
AnnaBridge 184:08ed48f1de7f 1291 #define TSB_SSP0_SR_TFE (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP0->SR,0)))
AnnaBridge 184:08ed48f1de7f 1292 #define TSB_SSP0_SR_TNF (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP0->SR,1)))
AnnaBridge 184:08ed48f1de7f 1293 #define TSB_SSP0_SR_RNE (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP0->SR,2)))
AnnaBridge 184:08ed48f1de7f 1294 #define TSB_SSP0_SR_RFF (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP0->SR,3)))
AnnaBridge 184:08ed48f1de7f 1295 #define TSB_SSP0_SR_BSY (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP0->SR,4)))
AnnaBridge 184:08ed48f1de7f 1296 #define TSB_SSP0_IMSC_RORIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP0->IMSC,0)))
AnnaBridge 184:08ed48f1de7f 1297 #define TSB_SSP0_IMSC_RTIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP0->IMSC,1)))
AnnaBridge 184:08ed48f1de7f 1298 #define TSB_SSP0_IMSC_RXIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP0->IMSC,2)))
AnnaBridge 184:08ed48f1de7f 1299 #define TSB_SSP0_IMSC_TXIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP0->IMSC,3)))
AnnaBridge 184:08ed48f1de7f 1300 #define TSB_SSP0_RIS_RORRIS (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP0->RIS,0)))
AnnaBridge 184:08ed48f1de7f 1301 #define TSB_SSP0_RIS_RTRIS (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP0->RIS,1)))
AnnaBridge 184:08ed48f1de7f 1302 #define TSB_SSP0_RIS_RXRIS (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP0->RIS,2)))
AnnaBridge 184:08ed48f1de7f 1303 #define TSB_SSP0_RIS_TXRIS (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP0->RIS,3)))
AnnaBridge 184:08ed48f1de7f 1304 #define TSB_SSP0_MIS_RORMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP0->MIS,0)))
AnnaBridge 184:08ed48f1de7f 1305 #define TSB_SSP0_MIS_RTMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP0->MIS,1)))
AnnaBridge 184:08ed48f1de7f 1306 #define TSB_SSP0_MIS_RXMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP0->MIS,2)))
AnnaBridge 184:08ed48f1de7f 1307 #define TSB_SSP0_MIS_TXMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP0->MIS,3)))
AnnaBridge 184:08ed48f1de7f 1308 #define TSB_SSP0_ICR_RORIC (*((__O uint32_t *)BITBAND_PERI(&TSB_SSP0->ICR,0)))
AnnaBridge 184:08ed48f1de7f 1309 #define TSB_SSP0_ICR_RTIC (*((__O uint32_t *)BITBAND_PERI(&TSB_SSP0->ICR,1)))
AnnaBridge 184:08ed48f1de7f 1310 #define TSB_SSP0_DMACR_RXDMAE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP0->DMACR,0)))
AnnaBridge 184:08ed48f1de7f 1311 #define TSB_SSP0_DMACR_TXDMAE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP0->DMACR,1)))
AnnaBridge 184:08ed48f1de7f 1312
AnnaBridge 184:08ed48f1de7f 1313 #define TSB_SSP1_CR0_SPO (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP1->CR0,6)))
AnnaBridge 184:08ed48f1de7f 1314 #define TSB_SSP1_CR0_SPH (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP1->CR0,7)))
AnnaBridge 184:08ed48f1de7f 1315 #define TSB_SSP1_CR1_LBM (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP1->CR1,0)))
AnnaBridge 184:08ed48f1de7f 1316 #define TSB_SSP1_CR1_SSE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP1->CR1,1)))
AnnaBridge 184:08ed48f1de7f 1317 #define TSB_SSP1_CR1_MS (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP1->CR1,2)))
AnnaBridge 184:08ed48f1de7f 1318 #define TSB_SSP1_CR1_SOD (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP1->CR1,3)))
AnnaBridge 184:08ed48f1de7f 1319 #define TSB_SSP1_SR_TFE (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP1->SR,0)))
AnnaBridge 184:08ed48f1de7f 1320 #define TSB_SSP1_SR_TNF (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP1->SR,1)))
AnnaBridge 184:08ed48f1de7f 1321 #define TSB_SSP1_SR_RNE (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP1->SR,2)))
AnnaBridge 184:08ed48f1de7f 1322 #define TSB_SSP1_SR_RFF (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP1->SR,3)))
AnnaBridge 184:08ed48f1de7f 1323 #define TSB_SSP1_SR_BSY (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP1->SR,4)))
AnnaBridge 184:08ed48f1de7f 1324 #define TSB_SSP1_IMSC_RORIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP1->IMSC,0)))
AnnaBridge 184:08ed48f1de7f 1325 #define TSB_SSP1_IMSC_RTIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP1->IMSC,1)))
AnnaBridge 184:08ed48f1de7f 1326 #define TSB_SSP1_IMSC_RXIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP1->IMSC,2)))
AnnaBridge 184:08ed48f1de7f 1327 #define TSB_SSP1_IMSC_TXIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP1->IMSC,3)))
AnnaBridge 184:08ed48f1de7f 1328 #define TSB_SSP1_RIS_RORRIS (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP1->RIS,0)))
AnnaBridge 184:08ed48f1de7f 1329 #define TSB_SSP1_RIS_RTRIS (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP1->RIS,1)))
AnnaBridge 184:08ed48f1de7f 1330 #define TSB_SSP1_RIS_RXRIS (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP1->RIS,2)))
AnnaBridge 184:08ed48f1de7f 1331 #define TSB_SSP1_RIS_TXRIS (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP1->RIS,3)))
AnnaBridge 184:08ed48f1de7f 1332 #define TSB_SSP1_MIS_RORMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP1->MIS,0)))
AnnaBridge 184:08ed48f1de7f 1333 #define TSB_SSP1_MIS_RTMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP1->MIS,1)))
AnnaBridge 184:08ed48f1de7f 1334 #define TSB_SSP1_MIS_RXMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP1->MIS,2)))
AnnaBridge 184:08ed48f1de7f 1335 #define TSB_SSP1_MIS_TXMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP1->MIS,3)))
AnnaBridge 184:08ed48f1de7f 1336 #define TSB_SSP1_ICR_RORIC (*((__O uint32_t *)BITBAND_PERI(&TSB_SSP1->ICR,0)))
AnnaBridge 184:08ed48f1de7f 1337 #define TSB_SSP1_ICR_RTIC (*((__O uint32_t *)BITBAND_PERI(&TSB_SSP1->ICR,1)))
AnnaBridge 184:08ed48f1de7f 1338 #define TSB_SSP1_DMACR_RXDMAE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP1->DMACR,0)))
AnnaBridge 184:08ed48f1de7f 1339 #define TSB_SSP1_DMACR_TXDMAE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP1->DMACR,1)))
AnnaBridge 184:08ed48f1de7f 1340
AnnaBridge 184:08ed48f1de7f 1341 #define TSB_SSP2_CR0_SPO (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP2->CR0,6)))
AnnaBridge 184:08ed48f1de7f 1342 #define TSB_SSP2_CR0_SPH (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP2->CR0,7)))
AnnaBridge 184:08ed48f1de7f 1343 #define TSB_SSP2_CR1_LBM (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP2->CR1,0)))
AnnaBridge 184:08ed48f1de7f 1344 #define TSB_SSP2_CR1_SSE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP2->CR1,1)))
AnnaBridge 184:08ed48f1de7f 1345 #define TSB_SSP2_CR1_MS (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP2->CR1,2)))
AnnaBridge 184:08ed48f1de7f 1346 #define TSB_SSP2_CR1_SOD (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP2->CR1,3)))
AnnaBridge 184:08ed48f1de7f 1347 #define TSB_SSP2_SR_TFE (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP2->SR,0)))
AnnaBridge 184:08ed48f1de7f 1348 #define TSB_SSP2_SR_TNF (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP2->SR,1)))
AnnaBridge 184:08ed48f1de7f 1349 #define TSB_SSP2_SR_RNE (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP2->SR,2)))
AnnaBridge 184:08ed48f1de7f 1350 #define TSB_SSP2_SR_RFF (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP2->SR,3)))
AnnaBridge 184:08ed48f1de7f 1351 #define TSB_SSP2_SR_BSY (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP2->SR,4)))
AnnaBridge 184:08ed48f1de7f 1352 #define TSB_SSP2_IMSC_RORIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP2->IMSC,0)))
AnnaBridge 184:08ed48f1de7f 1353 #define TSB_SSP2_IMSC_RTIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP2->IMSC,1)))
AnnaBridge 184:08ed48f1de7f 1354 #define TSB_SSP2_IMSC_RXIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP2->IMSC,2)))
AnnaBridge 184:08ed48f1de7f 1355 #define TSB_SSP2_IMSC_TXIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP2->IMSC,3)))
AnnaBridge 184:08ed48f1de7f 1356 #define TSB_SSP2_RIS_RORRIS (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP2->RIS,0)))
AnnaBridge 184:08ed48f1de7f 1357 #define TSB_SSP2_RIS_RTRIS (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP2->RIS,1)))
AnnaBridge 184:08ed48f1de7f 1358 #define TSB_SSP2_RIS_RXRIS (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP2->RIS,2)))
AnnaBridge 184:08ed48f1de7f 1359 #define TSB_SSP2_RIS_TXRIS (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP2->RIS,3)))
AnnaBridge 184:08ed48f1de7f 1360 #define TSB_SSP2_MIS_RORMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP2->MIS,0)))
AnnaBridge 184:08ed48f1de7f 1361 #define TSB_SSP2_MIS_RTMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP2->MIS,1)))
AnnaBridge 184:08ed48f1de7f 1362 #define TSB_SSP2_MIS_RXMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP2->MIS,2)))
AnnaBridge 184:08ed48f1de7f 1363 #define TSB_SSP2_MIS_TXMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_SSP2->MIS,3)))
AnnaBridge 184:08ed48f1de7f 1364 #define TSB_SSP2_ICR_RORIC (*((__O uint32_t *)BITBAND_PERI(&TSB_SSP2->ICR,0)))
AnnaBridge 184:08ed48f1de7f 1365 #define TSB_SSP2_ICR_RTIC (*((__O uint32_t *)BITBAND_PERI(&TSB_SSP2->ICR,1)))
AnnaBridge 184:08ed48f1de7f 1366 #define TSB_SSP2_DMACR_RXDMAE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP2->DMACR,0)))
AnnaBridge 184:08ed48f1de7f 1367 #define TSB_SSP2_DMACR_TXDMAE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SSP2->DMACR,1)))
AnnaBridge 184:08ed48f1de7f 1368
AnnaBridge 184:08ed48f1de7f 1369
AnnaBridge 184:08ed48f1de7f 1370 /* UART */
AnnaBridge 184:08ed48f1de7f 1371 #define TSB_UART0_DR_FE (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->DR,8)))
AnnaBridge 184:08ed48f1de7f 1372 #define TSB_UART0_DR_PE (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->DR,9)))
AnnaBridge 184:08ed48f1de7f 1373 #define TSB_UART0_DR_BE (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->DR,10)))
AnnaBridge 184:08ed48f1de7f 1374 #define TSB_UART0_DR_OE (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->DR,11)))
AnnaBridge 184:08ed48f1de7f 1375 #define TSB_UART0_RSR_FE (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->RSR,0)))
AnnaBridge 184:08ed48f1de7f 1376 #define TSB_UART0_RSR_PE (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->RSR,1)))
AnnaBridge 184:08ed48f1de7f 1377 #define TSB_UART0_RSR_BE (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->RSR,2)))
AnnaBridge 184:08ed48f1de7f 1378 #define TSB_UART0_RSR_OE (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->RSR,3)))
AnnaBridge 184:08ed48f1de7f 1379 #define TSB_UART0_ECR_FE (*((__O uint32_t *)BITBAND_PERI(&TSB_UART0->ECR,0)))
AnnaBridge 184:08ed48f1de7f 1380 #define TSB_UART0_ECR_PE (*((__O uint32_t *)BITBAND_PERI(&TSB_UART0->ECR,1)))
AnnaBridge 184:08ed48f1de7f 1381 #define TSB_UART0_ECR_BE (*((__O uint32_t *)BITBAND_PERI(&TSB_UART0->ECR,2)))
AnnaBridge 184:08ed48f1de7f 1382 #define TSB_UART0_ECR_OE (*((__O uint32_t *)BITBAND_PERI(&TSB_UART0->ECR,3)))
AnnaBridge 184:08ed48f1de7f 1383 #define TSB_UART0_FR_CTS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->FR,0)))
AnnaBridge 184:08ed48f1de7f 1384 #define TSB_UART0_FR_DSR (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->FR,1)))
AnnaBridge 184:08ed48f1de7f 1385 #define TSB_UART0_FR_DCD (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->FR,2)))
AnnaBridge 184:08ed48f1de7f 1386 #define TSB_UART0_FR_BUSY (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->FR,3)))
AnnaBridge 184:08ed48f1de7f 1387 #define TSB_UART0_FR_RXFE (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->FR,4)))
AnnaBridge 184:08ed48f1de7f 1388 #define TSB_UART0_FR_TXFF (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->FR,5)))
AnnaBridge 184:08ed48f1de7f 1389 #define TSB_UART0_FR_RXFF (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->FR,6)))
AnnaBridge 184:08ed48f1de7f 1390 #define TSB_UART0_FR_TXFE (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->FR,7)))
AnnaBridge 184:08ed48f1de7f 1391 #define TSB_UART0_FR_RI (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->FR,8)))
AnnaBridge 184:08ed48f1de7f 1392 #define TSB_UART0_LCR_H_BRK (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->LCR_H,0)))
AnnaBridge 184:08ed48f1de7f 1393 #define TSB_UART0_LCR_H_PEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->LCR_H,1)))
AnnaBridge 184:08ed48f1de7f 1394 #define TSB_UART0_LCR_H_EPS (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->LCR_H,2)))
AnnaBridge 184:08ed48f1de7f 1395 #define TSB_UART0_LCR_H_STP2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->LCR_H,3)))
AnnaBridge 184:08ed48f1de7f 1396 #define TSB_UART0_LCR_H_FEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->LCR_H,4)))
AnnaBridge 184:08ed48f1de7f 1397 #define TSB_UART0_LCR_H_SPS (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->LCR_H,7)))
AnnaBridge 184:08ed48f1de7f 1398 #define TSB_UART0_CR_UARTEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->CR,0)))
AnnaBridge 184:08ed48f1de7f 1399 #define TSB_UART0_CR_SIREN (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->CR,1)))
AnnaBridge 184:08ed48f1de7f 1400 #define TSB_UART0_CR_SIRLP (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->CR,2)))
AnnaBridge 184:08ed48f1de7f 1401 #define TSB_UART0_CR_TXE (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->CR,8)))
AnnaBridge 184:08ed48f1de7f 1402 #define TSB_UART0_CR_RXE (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->CR,9)))
AnnaBridge 184:08ed48f1de7f 1403 #define TSB_UART0_CR_DTR (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->CR,10)))
AnnaBridge 184:08ed48f1de7f 1404 #define TSB_UART0_CR_RTS (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->CR,11)))
AnnaBridge 184:08ed48f1de7f 1405 #define TSB_UART0_CR_RTSEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->CR,14)))
AnnaBridge 184:08ed48f1de7f 1406 #define TSB_UART0_CR_CTSEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->CR,15)))
AnnaBridge 184:08ed48f1de7f 1407 #define TSB_UART0_IMSC_RIMIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->IMSC,0)))
AnnaBridge 184:08ed48f1de7f 1408 #define TSB_UART0_IMSC_CTSMIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->IMSC,1)))
AnnaBridge 184:08ed48f1de7f 1409 #define TSB_UART0_IMSC_DCDMIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->IMSC,2)))
AnnaBridge 184:08ed48f1de7f 1410 #define TSB_UART0_IMSC_DSRMIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->IMSC,3)))
AnnaBridge 184:08ed48f1de7f 1411 #define TSB_UART0_IMSC_RXIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->IMSC,4)))
AnnaBridge 184:08ed48f1de7f 1412 #define TSB_UART0_IMSC_TXIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->IMSC,5)))
AnnaBridge 184:08ed48f1de7f 1413 #define TSB_UART0_IMSC_RTIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->IMSC,6)))
AnnaBridge 184:08ed48f1de7f 1414 #define TSB_UART0_IMSC_FEIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->IMSC,7)))
AnnaBridge 184:08ed48f1de7f 1415 #define TSB_UART0_IMSC_PEIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->IMSC,8)))
AnnaBridge 184:08ed48f1de7f 1416 #define TSB_UART0_IMSC_BEIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->IMSC,9)))
AnnaBridge 184:08ed48f1de7f 1417 #define TSB_UART0_IMSC_OEIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->IMSC,10)))
AnnaBridge 184:08ed48f1de7f 1418 #define TSB_UART0_RIS_RIRMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->RIS,0)))
AnnaBridge 184:08ed48f1de7f 1419 #define TSB_UART0_RIS_CTSRMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->RIS,1)))
AnnaBridge 184:08ed48f1de7f 1420 #define TSB_UART0_RIS_DCDRMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->RIS,2)))
AnnaBridge 184:08ed48f1de7f 1421 #define TSB_UART0_RIS_DSRRMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->RIS,3)))
AnnaBridge 184:08ed48f1de7f 1422 #define TSB_UART0_RIS_RXRIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->RIS,4)))
AnnaBridge 184:08ed48f1de7f 1423 #define TSB_UART0_RIS_TXRIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->RIS,5)))
AnnaBridge 184:08ed48f1de7f 1424 #define TSB_UART0_RIS_RTRIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->RIS,6)))
AnnaBridge 184:08ed48f1de7f 1425 #define TSB_UART0_RIS_FERIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->RIS,7)))
AnnaBridge 184:08ed48f1de7f 1426 #define TSB_UART0_RIS_PERIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->RIS,8)))
AnnaBridge 184:08ed48f1de7f 1427 #define TSB_UART0_RIS_BERIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->RIS,9)))
AnnaBridge 184:08ed48f1de7f 1428 #define TSB_UART0_RIS_OERIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->RIS,10)))
AnnaBridge 184:08ed48f1de7f 1429 #define TSB_UART0_MIS_RIMMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->MIS,0)))
AnnaBridge 184:08ed48f1de7f 1430 #define TSB_UART0_MIS_CTSMMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->MIS,1)))
AnnaBridge 184:08ed48f1de7f 1431 #define TSB_UART0_MIS_DCDMMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->MIS,2)))
AnnaBridge 184:08ed48f1de7f 1432 #define TSB_UART0_MIS_DSRMMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->MIS,3)))
AnnaBridge 184:08ed48f1de7f 1433 #define TSB_UART0_MIS_RXMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->MIS,4)))
AnnaBridge 184:08ed48f1de7f 1434 #define TSB_UART0_MIS_TXMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->MIS,5)))
AnnaBridge 184:08ed48f1de7f 1435 #define TSB_UART0_MIS_RTMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->MIS,6)))
AnnaBridge 184:08ed48f1de7f 1436 #define TSB_UART0_MIS_FEMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->MIS,7)))
AnnaBridge 184:08ed48f1de7f 1437 #define TSB_UART0_MIS_PEMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->MIS,8)))
AnnaBridge 184:08ed48f1de7f 1438 #define TSB_UART0_MIS_BEMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->MIS,9)))
AnnaBridge 184:08ed48f1de7f 1439 #define TSB_UART0_MIS_OEMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART0->MIS,10)))
AnnaBridge 184:08ed48f1de7f 1440 #define TSB_UART0_ICR_RIMIC (*((__O uint32_t *)BITBAND_PERI(&TSB_UART0->ICR,0)))
AnnaBridge 184:08ed48f1de7f 1441 #define TSB_UART0_ICR_CTSMIC (*((__O uint32_t *)BITBAND_PERI(&TSB_UART0->ICR,1)))
AnnaBridge 184:08ed48f1de7f 1442 #define TSB_UART0_ICR_DCDMIC (*((__O uint32_t *)BITBAND_PERI(&TSB_UART0->ICR,2)))
AnnaBridge 184:08ed48f1de7f 1443 #define TSB_UART0_ICR_DSRMIC (*((__O uint32_t *)BITBAND_PERI(&TSB_UART0->ICR,3)))
AnnaBridge 184:08ed48f1de7f 1444 #define TSB_UART0_ICR_RXIC (*((__O uint32_t *)BITBAND_PERI(&TSB_UART0->ICR,4)))
AnnaBridge 184:08ed48f1de7f 1445 #define TSB_UART0_ICR_TXIC (*((__O uint32_t *)BITBAND_PERI(&TSB_UART0->ICR,5)))
AnnaBridge 184:08ed48f1de7f 1446 #define TSB_UART0_ICR_RTIC (*((__O uint32_t *)BITBAND_PERI(&TSB_UART0->ICR,6)))
AnnaBridge 184:08ed48f1de7f 1447 #define TSB_UART0_ICR_FEIC (*((__O uint32_t *)BITBAND_PERI(&TSB_UART0->ICR,7)))
AnnaBridge 184:08ed48f1de7f 1448 #define TSB_UART0_ICR_PEIC (*((__O uint32_t *)BITBAND_PERI(&TSB_UART0->ICR,8)))
AnnaBridge 184:08ed48f1de7f 1449 #define TSB_UART0_ICR_BEIC (*((__O uint32_t *)BITBAND_PERI(&TSB_UART0->ICR,9)))
AnnaBridge 184:08ed48f1de7f 1450 #define TSB_UART0_ICR_OEIC (*((__O uint32_t *)BITBAND_PERI(&TSB_UART0->ICR,10)))
AnnaBridge 184:08ed48f1de7f 1451 #define TSB_UART0_DMACR_RXDMAE (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->DMACR,0)))
AnnaBridge 184:08ed48f1de7f 1452 #define TSB_UART0_DMACR_TXDMAE (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->DMACR,1)))
AnnaBridge 184:08ed48f1de7f 1453 #define TSB_UART0_DMACR_DMAONERR (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART0->DMACR,2)))
AnnaBridge 184:08ed48f1de7f 1454
AnnaBridge 184:08ed48f1de7f 1455 #define TSB_UART1_DR_FE (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->DR,8)))
AnnaBridge 184:08ed48f1de7f 1456 #define TSB_UART1_DR_PE (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->DR,9)))
AnnaBridge 184:08ed48f1de7f 1457 #define TSB_UART1_DR_BE (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->DR,10)))
AnnaBridge 184:08ed48f1de7f 1458 #define TSB_UART1_DR_OE (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->DR,11)))
AnnaBridge 184:08ed48f1de7f 1459 #define TSB_UART1_RSR_FE (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->RSR,0)))
AnnaBridge 184:08ed48f1de7f 1460 #define TSB_UART1_RSR_PE (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->RSR,1)))
AnnaBridge 184:08ed48f1de7f 1461 #define TSB_UART1_RSR_BE (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->RSR,2)))
AnnaBridge 184:08ed48f1de7f 1462 #define TSB_UART1_RSR_OE (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->RSR,3)))
AnnaBridge 184:08ed48f1de7f 1463 #define TSB_UART1_ECR_FE (*((__O uint32_t *)BITBAND_PERI(&TSB_UART1->ECR,0)))
AnnaBridge 184:08ed48f1de7f 1464 #define TSB_UART1_ECR_PE (*((__O uint32_t *)BITBAND_PERI(&TSB_UART1->ECR,1)))
AnnaBridge 184:08ed48f1de7f 1465 #define TSB_UART1_ECR_BE (*((__O uint32_t *)BITBAND_PERI(&TSB_UART1->ECR,2)))
AnnaBridge 184:08ed48f1de7f 1466 #define TSB_UART1_ECR_OE (*((__O uint32_t *)BITBAND_PERI(&TSB_UART1->ECR,3)))
AnnaBridge 184:08ed48f1de7f 1467 #define TSB_UART1_FR_CTS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->FR,0)))
AnnaBridge 184:08ed48f1de7f 1468 #define TSB_UART1_FR_DSR (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->FR,1)))
AnnaBridge 184:08ed48f1de7f 1469 #define TSB_UART1_FR_DCD (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->FR,2)))
AnnaBridge 184:08ed48f1de7f 1470 #define TSB_UART1_FR_BUSY (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->FR,3)))
AnnaBridge 184:08ed48f1de7f 1471 #define TSB_UART1_FR_RXFE (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->FR,4)))
AnnaBridge 184:08ed48f1de7f 1472 #define TSB_UART1_FR_TXFF (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->FR,5)))
AnnaBridge 184:08ed48f1de7f 1473 #define TSB_UART1_FR_RXFF (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->FR,6)))
AnnaBridge 184:08ed48f1de7f 1474 #define TSB_UART1_FR_TXFE (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->FR,7)))
AnnaBridge 184:08ed48f1de7f 1475 #define TSB_UART1_FR_RI (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->FR,8)))
AnnaBridge 184:08ed48f1de7f 1476 #define TSB_UART1_LCR_H_BRK (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->LCR_H,0)))
AnnaBridge 184:08ed48f1de7f 1477 #define TSB_UART1_LCR_H_PEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->LCR_H,1)))
AnnaBridge 184:08ed48f1de7f 1478 #define TSB_UART1_LCR_H_EPS (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->LCR_H,2)))
AnnaBridge 184:08ed48f1de7f 1479 #define TSB_UART1_LCR_H_STP2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->LCR_H,3)))
AnnaBridge 184:08ed48f1de7f 1480 #define TSB_UART1_LCR_H_FEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->LCR_H,4)))
AnnaBridge 184:08ed48f1de7f 1481 #define TSB_UART1_LCR_H_SPS (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->LCR_H,7)))
AnnaBridge 184:08ed48f1de7f 1482 #define TSB_UART1_CR_UARTEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->CR,0)))
AnnaBridge 184:08ed48f1de7f 1483 #define TSB_UART1_CR_SIREN (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->CR,1)))
AnnaBridge 184:08ed48f1de7f 1484 #define TSB_UART1_CR_SIRLP (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->CR,2)))
AnnaBridge 184:08ed48f1de7f 1485 #define TSB_UART1_CR_TXE (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->CR,8)))
AnnaBridge 184:08ed48f1de7f 1486 #define TSB_UART1_CR_RXE (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->CR,9)))
AnnaBridge 184:08ed48f1de7f 1487 #define TSB_UART1_CR_DTR (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->CR,10)))
AnnaBridge 184:08ed48f1de7f 1488 #define TSB_UART1_CR_RTS (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->CR,11)))
AnnaBridge 184:08ed48f1de7f 1489 #define TSB_UART1_CR_RTSEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->CR,14)))
AnnaBridge 184:08ed48f1de7f 1490 #define TSB_UART1_CR_CTSEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->CR,15)))
AnnaBridge 184:08ed48f1de7f 1491 #define TSB_UART1_IMSC_RIMIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->IMSC,0)))
AnnaBridge 184:08ed48f1de7f 1492 #define TSB_UART1_IMSC_CTSMIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->IMSC,1)))
AnnaBridge 184:08ed48f1de7f 1493 #define TSB_UART1_IMSC_DCDMIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->IMSC,2)))
AnnaBridge 184:08ed48f1de7f 1494 #define TSB_UART1_IMSC_DSRMIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->IMSC,3)))
AnnaBridge 184:08ed48f1de7f 1495 #define TSB_UART1_IMSC_RXIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->IMSC,4)))
AnnaBridge 184:08ed48f1de7f 1496 #define TSB_UART1_IMSC_TXIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->IMSC,5)))
AnnaBridge 184:08ed48f1de7f 1497 #define TSB_UART1_IMSC_RTIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->IMSC,6)))
AnnaBridge 184:08ed48f1de7f 1498 #define TSB_UART1_IMSC_FEIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->IMSC,7)))
AnnaBridge 184:08ed48f1de7f 1499 #define TSB_UART1_IMSC_PEIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->IMSC,8)))
AnnaBridge 184:08ed48f1de7f 1500 #define TSB_UART1_IMSC_BEIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->IMSC,9)))
AnnaBridge 184:08ed48f1de7f 1501 #define TSB_UART1_IMSC_OEIM (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->IMSC,10)))
AnnaBridge 184:08ed48f1de7f 1502 #define TSB_UART1_RIS_RIRMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->RIS,0)))
AnnaBridge 184:08ed48f1de7f 1503 #define TSB_UART1_RIS_CTSRMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->RIS,1)))
AnnaBridge 184:08ed48f1de7f 1504 #define TSB_UART1_RIS_DCDRMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->RIS,2)))
AnnaBridge 184:08ed48f1de7f 1505 #define TSB_UART1_RIS_DSRRMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->RIS,3)))
AnnaBridge 184:08ed48f1de7f 1506 #define TSB_UART1_RIS_RXRIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->RIS,4)))
AnnaBridge 184:08ed48f1de7f 1507 #define TSB_UART1_RIS_TXRIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->RIS,5)))
AnnaBridge 184:08ed48f1de7f 1508 #define TSB_UART1_RIS_RTRIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->RIS,6)))
AnnaBridge 184:08ed48f1de7f 1509 #define TSB_UART1_RIS_FERIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->RIS,7)))
AnnaBridge 184:08ed48f1de7f 1510 #define TSB_UART1_RIS_PERIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->RIS,8)))
AnnaBridge 184:08ed48f1de7f 1511 #define TSB_UART1_RIS_BERIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->RIS,9)))
AnnaBridge 184:08ed48f1de7f 1512 #define TSB_UART1_RIS_OERIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->RIS,10)))
AnnaBridge 184:08ed48f1de7f 1513 #define TSB_UART1_MIS_RIMMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->MIS,0)))
AnnaBridge 184:08ed48f1de7f 1514 #define TSB_UART1_MIS_CTSMMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->MIS,1)))
AnnaBridge 184:08ed48f1de7f 1515 #define TSB_UART1_MIS_DCDMMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->MIS,2)))
AnnaBridge 184:08ed48f1de7f 1516 #define TSB_UART1_MIS_DSRMMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->MIS,3)))
AnnaBridge 184:08ed48f1de7f 1517 #define TSB_UART1_MIS_RXMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->MIS,4)))
AnnaBridge 184:08ed48f1de7f 1518 #define TSB_UART1_MIS_TXMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->MIS,5)))
AnnaBridge 184:08ed48f1de7f 1519 #define TSB_UART1_MIS_RTMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->MIS,6)))
AnnaBridge 184:08ed48f1de7f 1520 #define TSB_UART1_MIS_FEMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->MIS,7)))
AnnaBridge 184:08ed48f1de7f 1521 #define TSB_UART1_MIS_PEMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->MIS,8)))
AnnaBridge 184:08ed48f1de7f 1522 #define TSB_UART1_MIS_BEMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->MIS,9)))
AnnaBridge 184:08ed48f1de7f 1523 #define TSB_UART1_MIS_OEMIS (*((__I uint32_t *)BITBAND_PERI(&TSB_UART1->MIS,10)))
AnnaBridge 184:08ed48f1de7f 1524 #define TSB_UART1_ICR_RIMIC (*((__O uint32_t *)BITBAND_PERI(&TSB_UART1->ICR,0)))
AnnaBridge 184:08ed48f1de7f 1525 #define TSB_UART1_ICR_CTSMIC (*((__O uint32_t *)BITBAND_PERI(&TSB_UART1->ICR,1)))
AnnaBridge 184:08ed48f1de7f 1526 #define TSB_UART1_ICR_DCDMIC (*((__O uint32_t *)BITBAND_PERI(&TSB_UART1->ICR,2)))
AnnaBridge 184:08ed48f1de7f 1527 #define TSB_UART1_ICR_DSRMIC (*((__O uint32_t *)BITBAND_PERI(&TSB_UART1->ICR,3)))
AnnaBridge 184:08ed48f1de7f 1528 #define TSB_UART1_ICR_RXIC (*((__O uint32_t *)BITBAND_PERI(&TSB_UART1->ICR,4)))
AnnaBridge 184:08ed48f1de7f 1529 #define TSB_UART1_ICR_TXIC (*((__O uint32_t *)BITBAND_PERI(&TSB_UART1->ICR,5)))
AnnaBridge 184:08ed48f1de7f 1530 #define TSB_UART1_ICR_RTIC (*((__O uint32_t *)BITBAND_PERI(&TSB_UART1->ICR,6)))
AnnaBridge 184:08ed48f1de7f 1531 #define TSB_UART1_ICR_FEIC (*((__O uint32_t *)BITBAND_PERI(&TSB_UART1->ICR,7)))
AnnaBridge 184:08ed48f1de7f 1532 #define TSB_UART1_ICR_PEIC (*((__O uint32_t *)BITBAND_PERI(&TSB_UART1->ICR,8)))
AnnaBridge 184:08ed48f1de7f 1533 #define TSB_UART1_ICR_BEIC (*((__O uint32_t *)BITBAND_PERI(&TSB_UART1->ICR,9)))
AnnaBridge 184:08ed48f1de7f 1534 #define TSB_UART1_ICR_OEIC (*((__O uint32_t *)BITBAND_PERI(&TSB_UART1->ICR,10)))
AnnaBridge 184:08ed48f1de7f 1535 #define TSB_UART1_DMACR_RXDMAE (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->DMACR,0)))
AnnaBridge 184:08ed48f1de7f 1536 #define TSB_UART1_DMACR_TXDMAE (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->DMACR,1)))
AnnaBridge 184:08ed48f1de7f 1537 #define TSB_UART1_DMACR_DMAONERR (*((__IO uint32_t *)BITBAND_PERI(&TSB_UART1->DMACR,2)))
AnnaBridge 184:08ed48f1de7f 1538
AnnaBridge 184:08ed48f1de7f 1539
AnnaBridge 184:08ed48f1de7f 1540 /* DMA Controller */
AnnaBridge 184:08ed48f1de7f 1541 #define TSB_DMAA_STATUS_MASTER_ENABLE (*((__I uint32_t *)BITBAND_PERI(&TSB_DMAA->STATUS,0)))
AnnaBridge 184:08ed48f1de7f 1542 #define TSB_DMAA_CFG_MASTER_ENABLE (*((__O uint32_t *)BITBAND_PERI(&TSB_DMAA->CFG,0)))
AnnaBridge 184:08ed48f1de7f 1543 #define TSB_DMAA_ERRCLR_ERR_CLR (*((__IO uint32_t *)BITBAND_PERI(&TSB_DMAA->ERRCLR,0)))
AnnaBridge 184:08ed48f1de7f 1544
AnnaBridge 184:08ed48f1de7f 1545 #define TSB_DMAB_STATUS_MASTER_ENABLE (*((__I uint32_t *)BITBAND_PERI(&TSB_DMAB->STATUS,0)))
AnnaBridge 184:08ed48f1de7f 1546 #define TSB_DMAB_CFG_MASTER_ENABLE (*((__O uint32_t *)BITBAND_PERI(&TSB_DMAB->CFG,0)))
AnnaBridge 184:08ed48f1de7f 1547 #define TSB_DMAB_ERRCLR_ERR_CLR (*((__IO uint32_t *)BITBAND_PERI(&TSB_DMAB->ERRCLR,0)))
AnnaBridge 184:08ed48f1de7f 1548
AnnaBridge 184:08ed48f1de7f 1549 #define TSB_DMAC_STATUS_MASTER_ENABLE (*((__I uint32_t *)BITBAND_PERI(&TSB_DMAC->STATUS,0)))
AnnaBridge 184:08ed48f1de7f 1550 #define TSB_DMAC_CFG_MASTER_ENABLE (*((__O uint32_t *)BITBAND_PERI(&TSB_DMAC->CFG,0)))
AnnaBridge 184:08ed48f1de7f 1551 #define TSB_DMAC_ERRCLR_ERR_CLR (*((__IO uint32_t *)BITBAND_PERI(&TSB_DMAC->ERRCLR,0)))
AnnaBridge 184:08ed48f1de7f 1552
AnnaBridge 184:08ed48f1de7f 1553
AnnaBridge 184:08ed48f1de7f 1554 /* 12bit A/D Converter */
AnnaBridge 184:08ed48f1de7f 1555 #define TSB_AD_MOD0_ADS (*((__O uint32_t *)BITBAND_PERI(&TSB_AD->MOD0,0)))
AnnaBridge 184:08ed48f1de7f 1556 #define TSB_AD_MOD0_HPADS (*((__O uint32_t *)BITBAND_PERI(&TSB_AD->MOD0,1)))
AnnaBridge 184:08ed48f1de7f 1557 #define TSB_AD_MOD1_ADHWE (*((__IO uint32_t *)BITBAND_PERI(&TSB_AD->MOD1,0)))
AnnaBridge 184:08ed48f1de7f 1558 #define TSB_AD_MOD1_ADHWS (*((__IO uint32_t *)BITBAND_PERI(&TSB_AD->MOD1,1)))
AnnaBridge 184:08ed48f1de7f 1559 #define TSB_AD_MOD1_HPADHWE (*((__IO uint32_t *)BITBAND_PERI(&TSB_AD->MOD1,2)))
AnnaBridge 184:08ed48f1de7f 1560 #define TSB_AD_MOD1_HPADHWS (*((__IO uint32_t *)BITBAND_PERI(&TSB_AD->MOD1,3)))
AnnaBridge 184:08ed48f1de7f 1561 #define TSB_AD_MOD1_RCUT (*((__IO uint32_t *)BITBAND_PERI(&TSB_AD->MOD1,5)))
AnnaBridge 184:08ed48f1de7f 1562 #define TSB_AD_MOD1_I2AD (*((__IO uint32_t *)BITBAND_PERI(&TSB_AD->MOD1,6)))
AnnaBridge 184:08ed48f1de7f 1563 #define TSB_AD_MOD1_DACON (*((__IO uint32_t *)BITBAND_PERI(&TSB_AD->MOD1,7)))
AnnaBridge 184:08ed48f1de7f 1564 #define TSB_AD_MOD3_SCAN (*((__IO uint32_t *)BITBAND_PERI(&TSB_AD->MOD3,0)))
AnnaBridge 184:08ed48f1de7f 1565 #define TSB_AD_MOD3_REPEAT (*((__IO uint32_t *)BITBAND_PERI(&TSB_AD->MOD3,1)))
AnnaBridge 184:08ed48f1de7f 1566 #define TSB_AD_CMPCR0_ADBIG0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_AD->CMPCR0,4)))
AnnaBridge 184:08ed48f1de7f 1567 #define TSB_AD_CMPCR0_CMPCOND0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_AD->CMPCR0,5)))
AnnaBridge 184:08ed48f1de7f 1568 #define TSB_AD_CMPCR0_CMP0EN (*((__IO uint32_t *)BITBAND_PERI(&TSB_AD->CMPCR0,7)))
AnnaBridge 184:08ed48f1de7f 1569 #define TSB_AD_CMPCR1_ADBIG1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_AD->CMPCR1,4)))
AnnaBridge 184:08ed48f1de7f 1570 #define TSB_AD_CMPCR1_CMPCOND1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_AD->CMPCR1,5)))
AnnaBridge 184:08ed48f1de7f 1571 #define TSB_AD_CMPCR1_CMP1EN (*((__IO uint32_t *)BITBAND_PERI(&TSB_AD->CMPCR1,7)))
AnnaBridge 184:08ed48f1de7f 1572
AnnaBridge 184:08ed48f1de7f 1573
AnnaBridge 184:08ed48f1de7f 1574 /* External Bus Interface(EXB) */
AnnaBridge 184:08ed48f1de7f 1575 #define TSB_EXB_MOD_EXBSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_EXB->MOD,0)))
AnnaBridge 184:08ed48f1de7f 1576 #define TSB_EXB_CS0_CSW0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_EXB->CS0,0)))
AnnaBridge 184:08ed48f1de7f 1577 #define TSB_EXB_CS1_CSW0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_EXB->CS1,0)))
AnnaBridge 184:08ed48f1de7f 1578 #define TSB_EXB_CS2_CSW0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_EXB->CS2,0)))
AnnaBridge 184:08ed48f1de7f 1579 #define TSB_EXB_CS3_CSW0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_EXB->CS3,0)))
AnnaBridge 184:08ed48f1de7f 1580
AnnaBridge 184:08ed48f1de7f 1581
AnnaBridge 184:08ed48f1de7f 1582 /* SNFC (SLC NAND Flash Controller) */
AnnaBridge 184:08ed48f1de7f 1583 #define TSB_SNFC_ENC_EN (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->ENC,0)))
AnnaBridge 184:08ed48f1de7f 1584 #define TSB_SNFC_ECCMOD_SELBCH (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->ECCMOD,0)))
AnnaBridge 184:08ed48f1de7f 1585 #define TSB_SNFC_ECCMOD_GOUTMODE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->ECCMOD,1)))
AnnaBridge 184:08ed48f1de7f 1586 #define TSB_SNFC_IE_SEQEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->IE,0)))
AnnaBridge 184:08ed48f1de7f 1587 #define TSB_SNFC_IE_SEQFLG (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->IE,1)))
AnnaBridge 184:08ed48f1de7f 1588 #define TSB_SNFC_IE_SEQCLR (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->IE,2)))
AnnaBridge 184:08ed48f1de7f 1589 #define TSB_SNFC_IE_PRTAEFLG (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->IE,6)))
AnnaBridge 184:08ed48f1de7f 1590 #define TSB_SNFC_IE_PRTAECLR (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->IE,7)))
AnnaBridge 184:08ed48f1de7f 1591 #define TSB_SNFC_IE_PRTCEFLG (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->IE,17)))
AnnaBridge 184:08ed48f1de7f 1592 #define TSB_SNFC_IE_PRTCECLR (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->IE,18)))
AnnaBridge 184:08ed48f1de7f 1593 #define TSB_SNFC_IE_FAILEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->IE,19)))
AnnaBridge 184:08ed48f1de7f 1594 #define TSB_SNFC_IE_FAILFLG (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->IE,20)))
AnnaBridge 184:08ed48f1de7f 1595 #define TSB_SNFC_IE_FAILCLR (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->IE,21)))
AnnaBridge 184:08ed48f1de7f 1596 #define TSB_SNFC_CS1_PA3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS1,12)))
AnnaBridge 184:08ed48f1de7f 1597 #define TSB_SNFC_CS1_PA (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS1,13)))
AnnaBridge 184:08ed48f1de7f 1598 #define TSB_SNFC_CS1_CA (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS1,14)))
AnnaBridge 184:08ed48f1de7f 1599 #define TSB_SNFC_CS1_CLE1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS1,15)))
AnnaBridge 184:08ed48f1de7f 1600 #define TSB_SNFC_CS1_DMYA (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS1,26)))
AnnaBridge 184:08ed48f1de7f 1601 #define TSB_SNFC_CS1_BSY (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS1,27)))
AnnaBridge 184:08ed48f1de7f 1602 #define TSB_SNFC_CS1_ALE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS1,30)))
AnnaBridge 184:08ed48f1de7f 1603 #define TSB_SNFC_CS1_CLE2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS1,31)))
AnnaBridge 184:08ed48f1de7f 1604 #define TSB_SNFC_CS2_PA3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS2,12)))
AnnaBridge 184:08ed48f1de7f 1605 #define TSB_SNFC_CS2_PA (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS2,13)))
AnnaBridge 184:08ed48f1de7f 1606 #define TSB_SNFC_CS2_CA (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS2,14)))
AnnaBridge 184:08ed48f1de7f 1607 #define TSB_SNFC_CS2_CLE1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS2,15)))
AnnaBridge 184:08ed48f1de7f 1608 #define TSB_SNFC_CS2_DMYA (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS2,26)))
AnnaBridge 184:08ed48f1de7f 1609 #define TSB_SNFC_CS2_BSY (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS2,27)))
AnnaBridge 184:08ed48f1de7f 1610 #define TSB_SNFC_CS2_ALE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS2,30)))
AnnaBridge 184:08ed48f1de7f 1611 #define TSB_SNFC_CS2_CLE2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS2,31)))
AnnaBridge 184:08ed48f1de7f 1612 #define TSB_SNFC_CS3_PA3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS3,12)))
AnnaBridge 184:08ed48f1de7f 1613 #define TSB_SNFC_CS3_PA (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS3,13)))
AnnaBridge 184:08ed48f1de7f 1614 #define TSB_SNFC_CS3_CA (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS3,14)))
AnnaBridge 184:08ed48f1de7f 1615 #define TSB_SNFC_CS3_CLE1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS3,15)))
AnnaBridge 184:08ed48f1de7f 1616 #define TSB_SNFC_CS3_DMYA (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS3,26)))
AnnaBridge 184:08ed48f1de7f 1617 #define TSB_SNFC_CS3_BSY (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS3,27)))
AnnaBridge 184:08ed48f1de7f 1618 #define TSB_SNFC_CS3_ALE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS3,30)))
AnnaBridge 184:08ed48f1de7f 1619 #define TSB_SNFC_CS3_CLE2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS3,31)))
AnnaBridge 184:08ed48f1de7f 1620 #define TSB_SNFC_CS4_PA3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS4,12)))
AnnaBridge 184:08ed48f1de7f 1621 #define TSB_SNFC_CS4_PA (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS4,13)))
AnnaBridge 184:08ed48f1de7f 1622 #define TSB_SNFC_CS4_CA (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS4,14)))
AnnaBridge 184:08ed48f1de7f 1623 #define TSB_SNFC_CS4_CLE1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS4,15)))
AnnaBridge 184:08ed48f1de7f 1624 #define TSB_SNFC_CS4_DMYA (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS4,26)))
AnnaBridge 184:08ed48f1de7f 1625 #define TSB_SNFC_CS4_BSY (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS4,27)))
AnnaBridge 184:08ed48f1de7f 1626 #define TSB_SNFC_CS4_ALE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS4,30)))
AnnaBridge 184:08ed48f1de7f 1627 #define TSB_SNFC_CS4_CLE2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CS4,31)))
AnnaBridge 184:08ed48f1de7f 1628 #define TSB_SNFC_CSE_CMDSQ1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CSE,0)))
AnnaBridge 184:08ed48f1de7f 1629 #define TSB_SNFC_CSE_CMDSQ2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CSE,1)))
AnnaBridge 184:08ed48f1de7f 1630 #define TSB_SNFC_CSE_CMDSQ3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CSE,2)))
AnnaBridge 184:08ed48f1de7f 1631 #define TSB_SNFC_CSE_CMDSQ4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CSE,3)))
AnnaBridge 184:08ed48f1de7f 1632 #define TSB_SNFC_CSE_RAMSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CSE,6)))
AnnaBridge 184:08ed48f1de7f 1633 #define TSB_SNFC_CSE_DECMODE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->CSE,7)))
AnnaBridge 184:08ed48f1de7f 1634 #define TSB_SNFC_EOC_GOUTEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_SNFC->EOC,8)))
AnnaBridge 184:08ed48f1de7f 1635 #define TSB_SNFC_EBS_BSYST0 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EBS,0)))
AnnaBridge 184:08ed48f1de7f 1636 #define TSB_SNFC_EBS_BSYST1 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EBS,1)))
AnnaBridge 184:08ed48f1de7f 1637 #define TSB_SNFC_EBS_BSYST2 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EBS,2)))
AnnaBridge 184:08ed48f1de7f 1638 #define TSB_SNFC_EES_ERR1 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EES,0)))
AnnaBridge 184:08ed48f1de7f 1639 #define TSB_SNFC_EES_ERR2 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EES,1)))
AnnaBridge 184:08ed48f1de7f 1640 #define TSB_SNFC_EES_ERR3 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EES,2)))
AnnaBridge 184:08ed48f1de7f 1641 #define TSB_SNFC_EES_ERR4 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EES,3)))
AnnaBridge 184:08ed48f1de7f 1642 #define TSB_SNFC_EES_ERR5 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EES,4)))
AnnaBridge 184:08ed48f1de7f 1643 #define TSB_SNFC_EES_ERR6 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EES,5)))
AnnaBridge 184:08ed48f1de7f 1644 #define TSB_SNFC_EES_ERR7 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EES,6)))
AnnaBridge 184:08ed48f1de7f 1645 #define TSB_SNFC_EES_ERR8 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EES,7)))
AnnaBridge 184:08ed48f1de7f 1646 #define TSB_SNFC_EDS1_ERRST0 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS1,4)))
AnnaBridge 184:08ed48f1de7f 1647 #define TSB_SNFC_EDS1_ERRST1 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS1,5)))
AnnaBridge 184:08ed48f1de7f 1648 #define TSB_SNFC_EDS1_ERRST2 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS1,6)))
AnnaBridge 184:08ed48f1de7f 1649 #define TSB_SNFC_EDS1_ERRST3 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS1,7)))
AnnaBridge 184:08ed48f1de7f 1650 #define TSB_SNFC_EDS2_ERRST0 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS2,4)))
AnnaBridge 184:08ed48f1de7f 1651 #define TSB_SNFC_EDS2_ERRST1 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS2,5)))
AnnaBridge 184:08ed48f1de7f 1652 #define TSB_SNFC_EDS2_ERRST2 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS2,6)))
AnnaBridge 184:08ed48f1de7f 1653 #define TSB_SNFC_EDS2_ERRST3 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS2,7)))
AnnaBridge 184:08ed48f1de7f 1654 #define TSB_SNFC_EDS3_ERRST0 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS3,4)))
AnnaBridge 184:08ed48f1de7f 1655 #define TSB_SNFC_EDS3_ERRST1 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS3,5)))
AnnaBridge 184:08ed48f1de7f 1656 #define TSB_SNFC_EDS3_ERRST2 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS3,6)))
AnnaBridge 184:08ed48f1de7f 1657 #define TSB_SNFC_EDS3_ERRST3 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS3,7)))
AnnaBridge 184:08ed48f1de7f 1658 #define TSB_SNFC_EDS4_ERRST0 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS4,4)))
AnnaBridge 184:08ed48f1de7f 1659 #define TSB_SNFC_EDS4_ERRST1 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS4,5)))
AnnaBridge 184:08ed48f1de7f 1660 #define TSB_SNFC_EDS4_ERRST2 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS4,6)))
AnnaBridge 184:08ed48f1de7f 1661 #define TSB_SNFC_EDS4_ERRST3 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS4,7)))
AnnaBridge 184:08ed48f1de7f 1662 #define TSB_SNFC_EDS5_ERRST0 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS5,4)))
AnnaBridge 184:08ed48f1de7f 1663 #define TSB_SNFC_EDS5_ERRST1 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS5,5)))
AnnaBridge 184:08ed48f1de7f 1664 #define TSB_SNFC_EDS5_ERRST2 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS5,6)))
AnnaBridge 184:08ed48f1de7f 1665 #define TSB_SNFC_EDS5_ERRST3 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS5,7)))
AnnaBridge 184:08ed48f1de7f 1666 #define TSB_SNFC_EDS6_ERRST0 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS6,4)))
AnnaBridge 184:08ed48f1de7f 1667 #define TSB_SNFC_EDS6_ERRST1 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS6,5)))
AnnaBridge 184:08ed48f1de7f 1668 #define TSB_SNFC_EDS6_ERRST2 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS6,6)))
AnnaBridge 184:08ed48f1de7f 1669 #define TSB_SNFC_EDS6_ERRST3 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS6,7)))
AnnaBridge 184:08ed48f1de7f 1670 #define TSB_SNFC_EDS7_ERRST0 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS7,4)))
AnnaBridge 184:08ed48f1de7f 1671 #define TSB_SNFC_EDS7_ERRST1 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS7,5)))
AnnaBridge 184:08ed48f1de7f 1672 #define TSB_SNFC_EDS7_ERRST2 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS7,6)))
AnnaBridge 184:08ed48f1de7f 1673 #define TSB_SNFC_EDS7_ERRST3 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS7,7)))
AnnaBridge 184:08ed48f1de7f 1674 #define TSB_SNFC_EDS8_ERRST0 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS8,4)))
AnnaBridge 184:08ed48f1de7f 1675 #define TSB_SNFC_EDS8_ERRST1 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS8,5)))
AnnaBridge 184:08ed48f1de7f 1676 #define TSB_SNFC_EDS8_ERRST2 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS8,6)))
AnnaBridge 184:08ed48f1de7f 1677 #define TSB_SNFC_EDS8_ERRST3 (*((__I uint32_t *)BITBAND_PERI(&TSB_SNFC->EDS8,7)))
AnnaBridge 184:08ed48f1de7f 1678
AnnaBridge 184:08ed48f1de7f 1679
AnnaBridge 184:08ed48f1de7f 1680
AnnaBridge 184:08ed48f1de7f 1681 /* ADC infterface Register */
AnnaBridge 184:08ed48f1de7f 1682 #define TSB_ADILV_TRGSEL_TRGSELEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_ADILV->TRGSEL,0)))
AnnaBridge 184:08ed48f1de7f 1683
AnnaBridge 184:08ed48f1de7f 1684
AnnaBridge 184:08ed48f1de7f 1685 /* I2C Bus Interface (I2C) */
AnnaBridge 184:08ed48f1de7f 1686 #define TSB_I2C0_CR1_NOACK (*((__IO uint32_t *)BITBAND_PERI(&TSB_I2C0->CR1,3)))
AnnaBridge 184:08ed48f1de7f 1687 #define TSB_I2C0_CR1_ACK (*((__IO uint32_t *)BITBAND_PERI(&TSB_I2C0->CR1,4)))
AnnaBridge 184:08ed48f1de7f 1688 #define TSB_I2C0_AR_ALS (*((__IO uint32_t *)BITBAND_PERI(&TSB_I2C0->AR,0)))
AnnaBridge 184:08ed48f1de7f 1689 #define TSB_I2C0_CR2_I2CM (*((__O uint32_t *)BITBAND_PERI(&TSB_I2C0->CR2,3)))
AnnaBridge 184:08ed48f1de7f 1690 #define TSB_I2C0_CR2_PIN (*((__O uint32_t *)BITBAND_PERI(&TSB_I2C0->CR2,4)))
AnnaBridge 184:08ed48f1de7f 1691 #define TSB_I2C0_CR2_BB (*((__O uint32_t *)BITBAND_PERI(&TSB_I2C0->CR2,5)))
AnnaBridge 184:08ed48f1de7f 1692 #define TSB_I2C0_CR2_TRX (*((__O uint32_t *)BITBAND_PERI(&TSB_I2C0->CR2,6)))
AnnaBridge 184:08ed48f1de7f 1693 #define TSB_I2C0_CR2_MST (*((__O uint32_t *)BITBAND_PERI(&TSB_I2C0->CR2,7)))
AnnaBridge 184:08ed48f1de7f 1694 #define TSB_I2C0_SR_LRB (*((__I uint32_t *)BITBAND_PERI(&TSB_I2C0->SR,0)))
AnnaBridge 184:08ed48f1de7f 1695 #define TSB_I2C0_SR_ADO (*((__I uint32_t *)BITBAND_PERI(&TSB_I2C0->SR,1)))
AnnaBridge 184:08ed48f1de7f 1696 #define TSB_I2C0_SR_AAS (*((__I uint32_t *)BITBAND_PERI(&TSB_I2C0->SR,2)))
AnnaBridge 184:08ed48f1de7f 1697 #define TSB_I2C0_SR_AL (*((__I uint32_t *)BITBAND_PERI(&TSB_I2C0->SR,3)))
AnnaBridge 184:08ed48f1de7f 1698 #define TSB_I2C0_SR_PIN (*((__I uint32_t *)BITBAND_PERI(&TSB_I2C0->SR,4)))
AnnaBridge 184:08ed48f1de7f 1699 #define TSB_I2C0_SR_BB (*((__I uint32_t *)BITBAND_PERI(&TSB_I2C0->SR,5)))
AnnaBridge 184:08ed48f1de7f 1700 #define TSB_I2C0_SR_TRX (*((__I uint32_t *)BITBAND_PERI(&TSB_I2C0->SR,6)))
AnnaBridge 184:08ed48f1de7f 1701 #define TSB_I2C0_SR_MST (*((__I uint32_t *)BITBAND_PERI(&TSB_I2C0->SR,7)))
AnnaBridge 184:08ed48f1de7f 1702 #define TSB_I2C0_IE_IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_I2C0->IE,0)))
AnnaBridge 184:08ed48f1de7f 1703 #define TSB_I2C0_IR_ISIC (*((__IO uint32_t *)BITBAND_PERI(&TSB_I2C0->IR,0)))
AnnaBridge 184:08ed48f1de7f 1704
AnnaBridge 184:08ed48f1de7f 1705 #define TSB_I2C1_CR1_NOACK (*((__IO uint32_t *)BITBAND_PERI(&TSB_I2C1->CR1,3)))
AnnaBridge 184:08ed48f1de7f 1706 #define TSB_I2C1_CR1_ACK (*((__IO uint32_t *)BITBAND_PERI(&TSB_I2C1->CR1,4)))
AnnaBridge 184:08ed48f1de7f 1707 #define TSB_I2C1_AR_ALS (*((__IO uint32_t *)BITBAND_PERI(&TSB_I2C1->AR,0)))
AnnaBridge 184:08ed48f1de7f 1708 #define TSB_I2C1_CR2_I2CM (*((__O uint32_t *)BITBAND_PERI(&TSB_I2C1->CR2,3)))
AnnaBridge 184:08ed48f1de7f 1709 #define TSB_I2C1_CR2_PIN (*((__O uint32_t *)BITBAND_PERI(&TSB_I2C1->CR2,4)))
AnnaBridge 184:08ed48f1de7f 1710 #define TSB_I2C1_CR2_BB (*((__O uint32_t *)BITBAND_PERI(&TSB_I2C1->CR2,5)))
AnnaBridge 184:08ed48f1de7f 1711 #define TSB_I2C1_CR2_TRX (*((__O uint32_t *)BITBAND_PERI(&TSB_I2C1->CR2,6)))
AnnaBridge 184:08ed48f1de7f 1712 #define TSB_I2C1_CR2_MST (*((__O uint32_t *)BITBAND_PERI(&TSB_I2C1->CR2,7)))
AnnaBridge 184:08ed48f1de7f 1713 #define TSB_I2C1_SR_LRB (*((__I uint32_t *)BITBAND_PERI(&TSB_I2C1->SR,0)))
AnnaBridge 184:08ed48f1de7f 1714 #define TSB_I2C1_SR_ADO (*((__I uint32_t *)BITBAND_PERI(&TSB_I2C1->SR,1)))
AnnaBridge 184:08ed48f1de7f 1715 #define TSB_I2C1_SR_AAS (*((__I uint32_t *)BITBAND_PERI(&TSB_I2C1->SR,2)))
AnnaBridge 184:08ed48f1de7f 1716 #define TSB_I2C1_SR_AL (*((__I uint32_t *)BITBAND_PERI(&TSB_I2C1->SR,3)))
AnnaBridge 184:08ed48f1de7f 1717 #define TSB_I2C1_SR_PIN (*((__I uint32_t *)BITBAND_PERI(&TSB_I2C1->SR,4)))
AnnaBridge 184:08ed48f1de7f 1718 #define TSB_I2C1_SR_BB (*((__I uint32_t *)BITBAND_PERI(&TSB_I2C1->SR,5)))
AnnaBridge 184:08ed48f1de7f 1719 #define TSB_I2C1_SR_TRX (*((__I uint32_t *)BITBAND_PERI(&TSB_I2C1->SR,6)))
AnnaBridge 184:08ed48f1de7f 1720 #define TSB_I2C1_SR_MST (*((__I uint32_t *)BITBAND_PERI(&TSB_I2C1->SR,7)))
AnnaBridge 184:08ed48f1de7f 1721 #define TSB_I2C1_IE_IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_I2C1->IE,0)))
AnnaBridge 184:08ed48f1de7f 1722 #define TSB_I2C1_IR_ISIC (*((__IO uint32_t *)BITBAND_PERI(&TSB_I2C1->IR,0)))
AnnaBridge 184:08ed48f1de7f 1723
AnnaBridge 184:08ed48f1de7f 1724 #define TSB_I2C2_CR1_NOACK (*((__IO uint32_t *)BITBAND_PERI(&TSB_I2C2->CR1,3)))
AnnaBridge 184:08ed48f1de7f 1725 #define TSB_I2C2_CR1_ACK (*((__IO uint32_t *)BITBAND_PERI(&TSB_I2C2->CR1,4)))
AnnaBridge 184:08ed48f1de7f 1726 #define TSB_I2C2_AR_ALS (*((__IO uint32_t *)BITBAND_PERI(&TSB_I2C2->AR,0)))
AnnaBridge 184:08ed48f1de7f 1727 #define TSB_I2C2_CR2_I2CM (*((__O uint32_t *)BITBAND_PERI(&TSB_I2C2->CR2,3)))
AnnaBridge 184:08ed48f1de7f 1728 #define TSB_I2C2_CR2_PIN (*((__O uint32_t *)BITBAND_PERI(&TSB_I2C2->CR2,4)))
AnnaBridge 184:08ed48f1de7f 1729 #define TSB_I2C2_CR2_BB (*((__O uint32_t *)BITBAND_PERI(&TSB_I2C2->CR2,5)))
AnnaBridge 184:08ed48f1de7f 1730 #define TSB_I2C2_CR2_TRX (*((__O uint32_t *)BITBAND_PERI(&TSB_I2C2->CR2,6)))
AnnaBridge 184:08ed48f1de7f 1731 #define TSB_I2C2_CR2_MST (*((__O uint32_t *)BITBAND_PERI(&TSB_I2C2->CR2,7)))
AnnaBridge 184:08ed48f1de7f 1732 #define TSB_I2C2_SR_LRB (*((__I uint32_t *)BITBAND_PERI(&TSB_I2C2->SR,0)))
AnnaBridge 184:08ed48f1de7f 1733 #define TSB_I2C2_SR_ADO (*((__I uint32_t *)BITBAND_PERI(&TSB_I2C2->SR,1)))
AnnaBridge 184:08ed48f1de7f 1734 #define TSB_I2C2_SR_AAS (*((__I uint32_t *)BITBAND_PERI(&TSB_I2C2->SR,2)))
AnnaBridge 184:08ed48f1de7f 1735 #define TSB_I2C2_SR_AL (*((__I uint32_t *)BITBAND_PERI(&TSB_I2C2->SR,3)))
AnnaBridge 184:08ed48f1de7f 1736 #define TSB_I2C2_SR_PIN (*((__I uint32_t *)BITBAND_PERI(&TSB_I2C2->SR,4)))
AnnaBridge 184:08ed48f1de7f 1737 #define TSB_I2C2_SR_BB (*((__I uint32_t *)BITBAND_PERI(&TSB_I2C2->SR,5)))
AnnaBridge 184:08ed48f1de7f 1738 #define TSB_I2C2_SR_TRX (*((__I uint32_t *)BITBAND_PERI(&TSB_I2C2->SR,6)))
AnnaBridge 184:08ed48f1de7f 1739 #define TSB_I2C2_SR_MST (*((__I uint32_t *)BITBAND_PERI(&TSB_I2C2->SR,7)))
AnnaBridge 184:08ed48f1de7f 1740 #define TSB_I2C2_IE_IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_I2C2->IE,0)))
AnnaBridge 184:08ed48f1de7f 1741 #define TSB_I2C2_IR_ISIC (*((__IO uint32_t *)BITBAND_PERI(&TSB_I2C2->IR,0)))
AnnaBridge 184:08ed48f1de7f 1742
AnnaBridge 184:08ed48f1de7f 1743
AnnaBridge 184:08ed48f1de7f 1744 /* Advanced Encryption Standard (AES) */
AnnaBridge 184:08ed48f1de7f 1745 #define TSB_AES_CLR_FIFOCLR (*((__O uint32_t *)BITBAND_PERI(&TSB_AES->CLR,0)))
AnnaBridge 184:08ed48f1de7f 1746 #define TSB_AES_MOD_OP (*((__IO uint32_t *)BITBAND_PERI(&TSB_AES->MOD,0)))
AnnaBridge 184:08ed48f1de7f 1747 #define TSB_AES_MOD_DMAEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_AES->MOD,1)))
AnnaBridge 184:08ed48f1de7f 1748 #define TSB_AES_STATUS_BUSY (*((__I uint32_t *)BITBAND_PERI(&TSB_AES->STATUS,0)))
AnnaBridge 184:08ed48f1de7f 1749 #define TSB_AES_STATUS_WFIFOST (*((__I uint32_t *)BITBAND_PERI(&TSB_AES->STATUS,1)))
AnnaBridge 184:08ed48f1de7f 1750 #define TSB_AES_STATUS_RFIFOST (*((__I uint32_t *)BITBAND_PERI(&TSB_AES->STATUS,2)))
AnnaBridge 184:08ed48f1de7f 1751
AnnaBridge 184:08ed48f1de7f 1752
AnnaBridge 184:08ed48f1de7f 1753 /* Secure Hash Algorithm Processor (SHA) */
AnnaBridge 184:08ed48f1de7f 1754 #define TSB_SHA_START_START (*((__O uint32_t *)BITBAND_PERI(&TSB_SHA->START,0)))
AnnaBridge 184:08ed48f1de7f 1755 #define TSB_SHA_CR_INTEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_SHA->CR,3)))
AnnaBridge 184:08ed48f1de7f 1756 #define TSB_SHA_DMAEN_DMAEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_SHA->DMAEN,0)))
AnnaBridge 184:08ed48f1de7f 1757 #define TSB_SHA_STATUS_BUSY (*((__I uint32_t *)BITBAND_PERI(&TSB_SHA->STATUS,0)))
AnnaBridge 184:08ed48f1de7f 1758
AnnaBridge 184:08ed48f1de7f 1759
AnnaBridge 184:08ed48f1de7f 1760 /* Entropy Seed Generator (ESG) */
AnnaBridge 184:08ed48f1de7f 1761 #define TSB_ESG_CR_START (*((__O uint32_t *)BITBAND_PERI(&TSB_ESG->CR,0)))
AnnaBridge 184:08ed48f1de7f 1762 #define TSB_ESG_ST_BUSY (*((__I uint32_t *)BITBAND_PERI(&TSB_ESG->ST,0)))
AnnaBridge 184:08ed48f1de7f 1763 #define TSB_ESG_INT_INT (*((__IO uint32_t *)BITBAND_PERI(&TSB_ESG->INT,0)))
AnnaBridge 184:08ed48f1de7f 1764
AnnaBridge 184:08ed48f1de7f 1765
AnnaBridge 184:08ed48f1de7f 1766 /* Soft Reset */
AnnaBridge 184:08ed48f1de7f 1767 #define TSB_SRST_IPRST_IPRST0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_SRST->IPRST,0)))
AnnaBridge 184:08ed48f1de7f 1768 #define TSB_SRST_IPRST_IPRST1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_SRST->IPRST,1)))
AnnaBridge 184:08ed48f1de7f 1769 #define TSB_SRST_IPRST_IPRST2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_SRST->IPRST,2)))
AnnaBridge 184:08ed48f1de7f 1770 #define TSB_SRST_IPRST_IPRST3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_SRST->IPRST,3)))
AnnaBridge 184:08ed48f1de7f 1771 #define TSB_SRST_IPRST_IPRST4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_SRST->IPRST,4)))
AnnaBridge 184:08ed48f1de7f 1772
AnnaBridge 184:08ed48f1de7f 1773
AnnaBridge 184:08ed48f1de7f 1774 /* Multiple Length Arithmetic Coprocessor (MLA) */
AnnaBridge 184:08ed48f1de7f 1775 #define TSB_MLA_ST_CABO (*((__IO uint32_t *)BITBAND_PERI(&TSB_MLA->ST,0)))
AnnaBridge 184:08ed48f1de7f 1776 #define TSB_MLA_ST_BUSY (*((__IO uint32_t *)BITBAND_PERI(&TSB_MLA->ST,1)))
AnnaBridge 184:08ed48f1de7f 1777
AnnaBridge 184:08ed48f1de7f 1778
AnnaBridge 184:08ed48f1de7f 1779 /* Port A */
AnnaBridge 184:08ed48f1de7f 1780 #define TSB_PA_DATA_PA0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->DATA,0)))
AnnaBridge 184:08ed48f1de7f 1781 #define TSB_PA_DATA_PA1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->DATA,1)))
AnnaBridge 184:08ed48f1de7f 1782 #define TSB_PA_DATA_PA2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->DATA,2)))
AnnaBridge 184:08ed48f1de7f 1783 #define TSB_PA_DATA_PA3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->DATA,3)))
AnnaBridge 184:08ed48f1de7f 1784 #define TSB_PA_DATA_PA4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->DATA,4)))
AnnaBridge 184:08ed48f1de7f 1785 #define TSB_PA_DATA_PA5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->DATA,5)))
AnnaBridge 184:08ed48f1de7f 1786 #define TSB_PA_DATA_PA6 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->DATA,6)))
AnnaBridge 184:08ed48f1de7f 1787 #define TSB_PA_DATA_PA7 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->DATA,7)))
AnnaBridge 184:08ed48f1de7f 1788 #define TSB_PA_CR_PA0C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->CR,0)))
AnnaBridge 184:08ed48f1de7f 1789 #define TSB_PA_CR_PA1C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->CR,1)))
AnnaBridge 184:08ed48f1de7f 1790 #define TSB_PA_CR_PA2C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->CR,2)))
AnnaBridge 184:08ed48f1de7f 1791 #define TSB_PA_CR_PA3C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->CR,3)))
AnnaBridge 184:08ed48f1de7f 1792 #define TSB_PA_CR_PA4C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->CR,4)))
AnnaBridge 184:08ed48f1de7f 1793 #define TSB_PA_CR_PA5C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->CR,5)))
AnnaBridge 184:08ed48f1de7f 1794 #define TSB_PA_CR_PA6C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->CR,6)))
AnnaBridge 184:08ed48f1de7f 1795 #define TSB_PA_CR_PA7C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->CR,7)))
AnnaBridge 184:08ed48f1de7f 1796 #define TSB_PA_FR1_PA0F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->FR1,0)))
AnnaBridge 184:08ed48f1de7f 1797 #define TSB_PA_FR1_PA1F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->FR1,1)))
AnnaBridge 184:08ed48f1de7f 1798 #define TSB_PA_FR1_PA2F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->FR1,2)))
AnnaBridge 184:08ed48f1de7f 1799 #define TSB_PA_FR1_PA3F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->FR1,3)))
AnnaBridge 184:08ed48f1de7f 1800 #define TSB_PA_FR1_PA4F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->FR1,4)))
AnnaBridge 184:08ed48f1de7f 1801 #define TSB_PA_FR1_PA5F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->FR1,5)))
AnnaBridge 184:08ed48f1de7f 1802 #define TSB_PA_FR1_PA6F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->FR1,6)))
AnnaBridge 184:08ed48f1de7f 1803 #define TSB_PA_FR1_PA7F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->FR1,7)))
AnnaBridge 184:08ed48f1de7f 1804 #define TSB_PA_FR2_PA0F2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->FR2,0)))
AnnaBridge 184:08ed48f1de7f 1805 #define TSB_PA_FR2_PA1F2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->FR2,1)))
AnnaBridge 184:08ed48f1de7f 1806 #define TSB_PA_FR2_PA2F2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->FR2,2)))
AnnaBridge 184:08ed48f1de7f 1807 #define TSB_PA_FR2_PA3F2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->FR2,3)))
AnnaBridge 184:08ed48f1de7f 1808 #define TSB_PA_FR2_PA4F2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->FR2,4)))
AnnaBridge 184:08ed48f1de7f 1809 #define TSB_PA_FR2_PA5F2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->FR2,5)))
AnnaBridge 184:08ed48f1de7f 1810 #define TSB_PA_FR2_PA6F2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->FR2,6)))
AnnaBridge 184:08ed48f1de7f 1811 #define TSB_PA_FR2_PA7F2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->FR2,7)))
AnnaBridge 184:08ed48f1de7f 1812 #define TSB_PA_FR3_PA5F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->FR3,5)))
AnnaBridge 184:08ed48f1de7f 1813 #define TSB_PA_FR3_PA6F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->FR3,6)))
AnnaBridge 184:08ed48f1de7f 1814 #define TSB_PA_FR3_PA7F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->FR3,7)))
AnnaBridge 184:08ed48f1de7f 1815 #define TSB_PA_FR4_PA7F4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->FR4,7)))
AnnaBridge 184:08ed48f1de7f 1816 #define TSB_PA_FR5_PA7F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->FR5,7)))
AnnaBridge 184:08ed48f1de7f 1817 #define TSB_PA_OD_PA0OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->OD,0)))
AnnaBridge 184:08ed48f1de7f 1818 #define TSB_PA_OD_PA1OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->OD,1)))
AnnaBridge 184:08ed48f1de7f 1819 #define TSB_PA_OD_PA2OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->OD,2)))
AnnaBridge 184:08ed48f1de7f 1820 #define TSB_PA_OD_PA3OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->OD,3)))
AnnaBridge 184:08ed48f1de7f 1821 #define TSB_PA_OD_PA4OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->OD,4)))
AnnaBridge 184:08ed48f1de7f 1822 #define TSB_PA_OD_PA5OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->OD,5)))
AnnaBridge 184:08ed48f1de7f 1823 #define TSB_PA_OD_PA6OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->OD,6)))
AnnaBridge 184:08ed48f1de7f 1824 #define TSB_PA_OD_PA7OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->OD,7)))
AnnaBridge 184:08ed48f1de7f 1825 #define TSB_PA_PUP_PA0UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->PUP,0)))
AnnaBridge 184:08ed48f1de7f 1826 #define TSB_PA_PUP_PA1UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->PUP,1)))
AnnaBridge 184:08ed48f1de7f 1827 #define TSB_PA_PUP_PA3UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->PUP,3)))
AnnaBridge 184:08ed48f1de7f 1828 #define TSB_PA_PUP_PA4UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->PUP,4)))
AnnaBridge 184:08ed48f1de7f 1829 #define TSB_PA_PUP_PA5UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->PUP,5)))
AnnaBridge 184:08ed48f1de7f 1830 #define TSB_PA_PUP_PA6UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->PUP,6)))
AnnaBridge 184:08ed48f1de7f 1831 #define TSB_PA_PUP_PA7UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->PUP,7)))
AnnaBridge 184:08ed48f1de7f 1832 #define TSB_PA_PDN_PA2DN (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->PDN,2)))
AnnaBridge 184:08ed48f1de7f 1833 #define TSB_PA_IE_PA0IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->IE,0)))
AnnaBridge 184:08ed48f1de7f 1834 #define TSB_PA_IE_PA1IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->IE,1)))
AnnaBridge 184:08ed48f1de7f 1835 #define TSB_PA_IE_PA2IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->IE,2)))
AnnaBridge 184:08ed48f1de7f 1836 #define TSB_PA_IE_PA3IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->IE,3)))
AnnaBridge 184:08ed48f1de7f 1837 #define TSB_PA_IE_PA4IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->IE,4)))
AnnaBridge 184:08ed48f1de7f 1838 #define TSB_PA_IE_PA5IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->IE,5)))
AnnaBridge 184:08ed48f1de7f 1839 #define TSB_PA_IE_PA6IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->IE,6)))
AnnaBridge 184:08ed48f1de7f 1840 #define TSB_PA_IE_PA7IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PA->IE,7)))
AnnaBridge 184:08ed48f1de7f 1841
AnnaBridge 184:08ed48f1de7f 1842
AnnaBridge 184:08ed48f1de7f 1843 /* Port B */
AnnaBridge 184:08ed48f1de7f 1844 #define TSB_PB_DATA_PB0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->DATA,0)))
AnnaBridge 184:08ed48f1de7f 1845 #define TSB_PB_DATA_PB1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->DATA,1)))
AnnaBridge 184:08ed48f1de7f 1846 #define TSB_PB_DATA_PB2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->DATA,2)))
AnnaBridge 184:08ed48f1de7f 1847 #define TSB_PB_DATA_PB3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->DATA,3)))
AnnaBridge 184:08ed48f1de7f 1848 #define TSB_PB_DATA_PB4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->DATA,4)))
AnnaBridge 184:08ed48f1de7f 1849 #define TSB_PB_DATA_PB5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->DATA,5)))
AnnaBridge 184:08ed48f1de7f 1850 #define TSB_PB_DATA_PB6 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->DATA,6)))
AnnaBridge 184:08ed48f1de7f 1851 #define TSB_PB_DATA_PB7 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->DATA,7)))
AnnaBridge 184:08ed48f1de7f 1852 #define TSB_PB_CR_PB0C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->CR,0)))
AnnaBridge 184:08ed48f1de7f 1853 #define TSB_PB_CR_PB1C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->CR,1)))
AnnaBridge 184:08ed48f1de7f 1854 #define TSB_PB_CR_PB2C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->CR,2)))
AnnaBridge 184:08ed48f1de7f 1855 #define TSB_PB_CR_PB3C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->CR,3)))
AnnaBridge 184:08ed48f1de7f 1856 #define TSB_PB_CR_PB4C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->CR,4)))
AnnaBridge 184:08ed48f1de7f 1857 #define TSB_PB_CR_PB5C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->CR,5)))
AnnaBridge 184:08ed48f1de7f 1858 #define TSB_PB_CR_PB6C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->CR,6)))
AnnaBridge 184:08ed48f1de7f 1859 #define TSB_PB_CR_PB7C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->CR,7)))
AnnaBridge 184:08ed48f1de7f 1860 #define TSB_PB_FR1_PB0F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->FR1,0)))
AnnaBridge 184:08ed48f1de7f 1861 #define TSB_PB_FR1_PB1F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->FR1,1)))
AnnaBridge 184:08ed48f1de7f 1862 #define TSB_PB_FR1_PB2F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->FR1,2)))
AnnaBridge 184:08ed48f1de7f 1863 #define TSB_PB_FR1_PB3F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->FR1,3)))
AnnaBridge 184:08ed48f1de7f 1864 #define TSB_PB_FR1_PB4F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->FR1,4)))
AnnaBridge 184:08ed48f1de7f 1865 #define TSB_PB_FR1_PB5F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->FR1,5)))
AnnaBridge 184:08ed48f1de7f 1866 #define TSB_PB_FR1_PB6F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->FR1,6)))
AnnaBridge 184:08ed48f1de7f 1867 #define TSB_PB_FR2_PB6F2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->FR2,6)))
AnnaBridge 184:08ed48f1de7f 1868 #define TSB_PB_FR3_PB0F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->FR3,0)))
AnnaBridge 184:08ed48f1de7f 1869 #define TSB_PB_FR3_PB1F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->FR3,1)))
AnnaBridge 184:08ed48f1de7f 1870 #define TSB_PB_FR3_PB2F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->FR3,2)))
AnnaBridge 184:08ed48f1de7f 1871 #define TSB_PB_FR3_PB3F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->FR3,3)))
AnnaBridge 184:08ed48f1de7f 1872 #define TSB_PB_FR3_PB4F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->FR3,4)))
AnnaBridge 184:08ed48f1de7f 1873 #define TSB_PB_FR3_PB5F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->FR3,5)))
AnnaBridge 184:08ed48f1de7f 1874 #define TSB_PB_FR4_PB2F4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->FR4,2)))
AnnaBridge 184:08ed48f1de7f 1875 #define TSB_PB_FR4_PB3F4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->FR4,3)))
AnnaBridge 184:08ed48f1de7f 1876 #define TSB_PB_FR4_PB6F4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->FR4,6)))
AnnaBridge 184:08ed48f1de7f 1877 #define TSB_PB_FR5_PB2F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->FR5,2)))
AnnaBridge 184:08ed48f1de7f 1878 #define TSB_PB_FR5_PB3F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->FR5,3)))
AnnaBridge 184:08ed48f1de7f 1879 #define TSB_PB_FR5_PB4F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->FR5,4)))
AnnaBridge 184:08ed48f1de7f 1880 #define TSB_PB_FR5_PB5F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->FR5,5)))
AnnaBridge 184:08ed48f1de7f 1881 #define TSB_PB_FR5_PB6F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->FR5,6)))
AnnaBridge 184:08ed48f1de7f 1882 #define TSB_PB_FR5_PB7F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->FR5,7)))
AnnaBridge 184:08ed48f1de7f 1883 #define TSB_PB_OD_PB0OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->OD,0)))
AnnaBridge 184:08ed48f1de7f 1884 #define TSB_PB_OD_PB1OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->OD,1)))
AnnaBridge 184:08ed48f1de7f 1885 #define TSB_PB_OD_PB2OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->OD,2)))
AnnaBridge 184:08ed48f1de7f 1886 #define TSB_PB_OD_PB3OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->OD,3)))
AnnaBridge 184:08ed48f1de7f 1887 #define TSB_PB_OD_PB4OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->OD,4)))
AnnaBridge 184:08ed48f1de7f 1888 #define TSB_PB_OD_PB5OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->OD,5)))
AnnaBridge 184:08ed48f1de7f 1889 #define TSB_PB_OD_PB6OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->OD,6)))
AnnaBridge 184:08ed48f1de7f 1890 #define TSB_PB_OD_PB7OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->OD,7)))
AnnaBridge 184:08ed48f1de7f 1891 #define TSB_PB_PUP_PB0UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->PUP,0)))
AnnaBridge 184:08ed48f1de7f 1892 #define TSB_PB_PUP_PB1UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->PUP,1)))
AnnaBridge 184:08ed48f1de7f 1893 #define TSB_PB_PUP_PB2UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->PUP,2)))
AnnaBridge 184:08ed48f1de7f 1894 #define TSB_PB_PUP_PB3UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->PUP,3)))
AnnaBridge 184:08ed48f1de7f 1895 #define TSB_PB_PUP_PB4UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->PUP,4)))
AnnaBridge 184:08ed48f1de7f 1896 #define TSB_PB_PUP_PB5UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->PUP,5)))
AnnaBridge 184:08ed48f1de7f 1897 #define TSB_PB_PUP_PB6UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->PUP,6)))
AnnaBridge 184:08ed48f1de7f 1898 #define TSB_PB_PUP_PB7UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->PUP,7)))
AnnaBridge 184:08ed48f1de7f 1899 #define TSB_PB_IE_PB0IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->IE,0)))
AnnaBridge 184:08ed48f1de7f 1900 #define TSB_PB_IE_PB1IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->IE,1)))
AnnaBridge 184:08ed48f1de7f 1901 #define TSB_PB_IE_PB2IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->IE,2)))
AnnaBridge 184:08ed48f1de7f 1902 #define TSB_PB_IE_PB3IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->IE,3)))
AnnaBridge 184:08ed48f1de7f 1903 #define TSB_PB_IE_PB4IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->IE,4)))
AnnaBridge 184:08ed48f1de7f 1904 #define TSB_PB_IE_PB5IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->IE,5)))
AnnaBridge 184:08ed48f1de7f 1905 #define TSB_PB_IE_PB7IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PB->IE,7)))
AnnaBridge 184:08ed48f1de7f 1906
AnnaBridge 184:08ed48f1de7f 1907
AnnaBridge 184:08ed48f1de7f 1908 /* Port C */
AnnaBridge 184:08ed48f1de7f 1909 #define TSB_PC_DATA_PC0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->DATA,0)))
AnnaBridge 184:08ed48f1de7f 1910 #define TSB_PC_DATA_PC1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->DATA,1)))
AnnaBridge 184:08ed48f1de7f 1911 #define TSB_PC_DATA_PC2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->DATA,2)))
AnnaBridge 184:08ed48f1de7f 1912 #define TSB_PC_DATA_PC3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->DATA,3)))
AnnaBridge 184:08ed48f1de7f 1913 #define TSB_PC_DATA_PC4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->DATA,4)))
AnnaBridge 184:08ed48f1de7f 1914 #define TSB_PC_DATA_PC5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->DATA,5)))
AnnaBridge 184:08ed48f1de7f 1915 #define TSB_PC_CR_PC0C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->CR,0)))
AnnaBridge 184:08ed48f1de7f 1916 #define TSB_PC_CR_PC1C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->CR,1)))
AnnaBridge 184:08ed48f1de7f 1917 #define TSB_PC_CR_PC2C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->CR,2)))
AnnaBridge 184:08ed48f1de7f 1918 #define TSB_PC_CR_PC3C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->CR,3)))
AnnaBridge 184:08ed48f1de7f 1919 #define TSB_PC_CR_PC4C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->CR,4)))
AnnaBridge 184:08ed48f1de7f 1920 #define TSB_PC_CR_PC5C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->CR,5)))
AnnaBridge 184:08ed48f1de7f 1921 #define TSB_PC_FR1_PC2F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->FR1,2)))
AnnaBridge 184:08ed48f1de7f 1922 #define TSB_PC_FR1_PC3F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->FR1,3)))
AnnaBridge 184:08ed48f1de7f 1923 #define TSB_PC_FR1_PC4F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->FR1,4)))
AnnaBridge 184:08ed48f1de7f 1924 #define TSB_PC_FR1_PC5F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->FR1,5)))
AnnaBridge 184:08ed48f1de7f 1925 #define TSB_PC_FR2_PC5F2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->FR2,5)))
AnnaBridge 184:08ed48f1de7f 1926 #define TSB_PC_OD_PC0OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->OD,0)))
AnnaBridge 184:08ed48f1de7f 1927 #define TSB_PC_OD_PC1OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->OD,1)))
AnnaBridge 184:08ed48f1de7f 1928 #define TSB_PC_OD_PC2OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->OD,2)))
AnnaBridge 184:08ed48f1de7f 1929 #define TSB_PC_OD_PC3OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->OD,3)))
AnnaBridge 184:08ed48f1de7f 1930 #define TSB_PC_OD_PC4OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->OD,4)))
AnnaBridge 184:08ed48f1de7f 1931 #define TSB_PC_OD_PC5OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->OD,5)))
AnnaBridge 184:08ed48f1de7f 1932 #define TSB_PC_PUP_PC0UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->PUP,0)))
AnnaBridge 184:08ed48f1de7f 1933 #define TSB_PC_PUP_PC1UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->PUP,1)))
AnnaBridge 184:08ed48f1de7f 1934 #define TSB_PC_PUP_PC2UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->PUP,2)))
AnnaBridge 184:08ed48f1de7f 1935 #define TSB_PC_PUP_PC3UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->PUP,3)))
AnnaBridge 184:08ed48f1de7f 1936 #define TSB_PC_PUP_PC4UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->PUP,4)))
AnnaBridge 184:08ed48f1de7f 1937 #define TSB_PC_PUP_PC5UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->PUP,5)))
AnnaBridge 184:08ed48f1de7f 1938 #define TSB_PC_IE_PC0IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->IE,0)))
AnnaBridge 184:08ed48f1de7f 1939 #define TSB_PC_IE_PC1IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->IE,1)))
AnnaBridge 184:08ed48f1de7f 1940 #define TSB_PC_IE_PC2IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->IE,2)))
AnnaBridge 184:08ed48f1de7f 1941 #define TSB_PC_IE_PC3IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->IE,3)))
AnnaBridge 184:08ed48f1de7f 1942 #define TSB_PC_IE_PC4IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->IE,4)))
AnnaBridge 184:08ed48f1de7f 1943 #define TSB_PC_IE_PC5IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PC->IE,5)))
AnnaBridge 184:08ed48f1de7f 1944
AnnaBridge 184:08ed48f1de7f 1945
AnnaBridge 184:08ed48f1de7f 1946 /* Port D */
AnnaBridge 184:08ed48f1de7f 1947 #define TSB_PD_DATA_PD0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->DATA,0)))
AnnaBridge 184:08ed48f1de7f 1948 #define TSB_PD_DATA_PD1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->DATA,1)))
AnnaBridge 184:08ed48f1de7f 1949 #define TSB_PD_DATA_PD2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->DATA,2)))
AnnaBridge 184:08ed48f1de7f 1950 #define TSB_PD_DATA_PD3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->DATA,3)))
AnnaBridge 184:08ed48f1de7f 1951 #define TSB_PD_DATA_PD4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->DATA,4)))
AnnaBridge 184:08ed48f1de7f 1952 #define TSB_PD_CR_PD0C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->CR,0)))
AnnaBridge 184:08ed48f1de7f 1953 #define TSB_PD_CR_PD1C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->CR,1)))
AnnaBridge 184:08ed48f1de7f 1954 #define TSB_PD_CR_PD2C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->CR,2)))
AnnaBridge 184:08ed48f1de7f 1955 #define TSB_PD_CR_PD3C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->CR,3)))
AnnaBridge 184:08ed48f1de7f 1956 #define TSB_PD_CR_PD4C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->CR,4)))
AnnaBridge 184:08ed48f1de7f 1957 #define TSB_PD_FR1_PD0F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->FR1,0)))
AnnaBridge 184:08ed48f1de7f 1958 #define TSB_PD_FR1_PD1F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->FR1,1)))
AnnaBridge 184:08ed48f1de7f 1959 #define TSB_PD_FR1_PD2F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->FR1,2)))
AnnaBridge 184:08ed48f1de7f 1960 #define TSB_PD_FR1_PD3F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->FR1,3)))
AnnaBridge 184:08ed48f1de7f 1961 #define TSB_PD_FR1_PD4F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->FR1,4)))
AnnaBridge 184:08ed48f1de7f 1962 #define TSB_PD_OD_PD0OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->OD,0)))
AnnaBridge 184:08ed48f1de7f 1963 #define TSB_PD_OD_PD1OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->OD,1)))
AnnaBridge 184:08ed48f1de7f 1964 #define TSB_PD_OD_PD2OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->OD,2)))
AnnaBridge 184:08ed48f1de7f 1965 #define TSB_PD_OD_PD3OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->OD,3)))
AnnaBridge 184:08ed48f1de7f 1966 #define TSB_PD_OD_PD4OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->OD,4)))
AnnaBridge 184:08ed48f1de7f 1967 #define TSB_PD_PUP_PD0UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->PUP,0)))
AnnaBridge 184:08ed48f1de7f 1968 #define TSB_PD_PUP_PD1UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->PUP,1)))
AnnaBridge 184:08ed48f1de7f 1969 #define TSB_PD_PUP_PD2UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->PUP,2)))
AnnaBridge 184:08ed48f1de7f 1970 #define TSB_PD_PUP_PD3UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->PUP,3)))
AnnaBridge 184:08ed48f1de7f 1971 #define TSB_PD_PUP_PD4UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->PUP,4)))
AnnaBridge 184:08ed48f1de7f 1972 #define TSB_PD_IE_PD0IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->IE,0)))
AnnaBridge 184:08ed48f1de7f 1973 #define TSB_PD_IE_PD1IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->IE,1)))
AnnaBridge 184:08ed48f1de7f 1974 #define TSB_PD_IE_PD2IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->IE,2)))
AnnaBridge 184:08ed48f1de7f 1975 #define TSB_PD_IE_PD3IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->IE,3)))
AnnaBridge 184:08ed48f1de7f 1976 #define TSB_PD_IE_PD4IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PD->IE,4)))
AnnaBridge 184:08ed48f1de7f 1977
AnnaBridge 184:08ed48f1de7f 1978
AnnaBridge 184:08ed48f1de7f 1979 /* Port E */
AnnaBridge 184:08ed48f1de7f 1980 #define TSB_PE_DATA_PE0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->DATA,0)))
AnnaBridge 184:08ed48f1de7f 1981 #define TSB_PE_DATA_PE1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->DATA,1)))
AnnaBridge 184:08ed48f1de7f 1982 #define TSB_PE_DATA_PE2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->DATA,2)))
AnnaBridge 184:08ed48f1de7f 1983 #define TSB_PE_DATA_PE3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->DATA,3)))
AnnaBridge 184:08ed48f1de7f 1984 #define TSB_PE_DATA_PE4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->DATA,4)))
AnnaBridge 184:08ed48f1de7f 1985 #define TSB_PE_DATA_PE5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->DATA,5)))
AnnaBridge 184:08ed48f1de7f 1986 #define TSB_PE_DATA_PE6 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->DATA,6)))
AnnaBridge 184:08ed48f1de7f 1987 #define TSB_PE_DATA_PE7 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->DATA,7)))
AnnaBridge 184:08ed48f1de7f 1988 #define TSB_PE_CR_PE0C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->CR,0)))
AnnaBridge 184:08ed48f1de7f 1989 #define TSB_PE_CR_PE1C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->CR,1)))
AnnaBridge 184:08ed48f1de7f 1990 #define TSB_PE_CR_PE2C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->CR,2)))
AnnaBridge 184:08ed48f1de7f 1991 #define TSB_PE_CR_PE3C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->CR,3)))
AnnaBridge 184:08ed48f1de7f 1992 #define TSB_PE_CR_PE4C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->CR,4)))
AnnaBridge 184:08ed48f1de7f 1993 #define TSB_PE_CR_PE5C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->CR,5)))
AnnaBridge 184:08ed48f1de7f 1994 #define TSB_PE_CR_PE6C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->CR,6)))
AnnaBridge 184:08ed48f1de7f 1995 #define TSB_PE_CR_PE7C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->CR,7)))
AnnaBridge 184:08ed48f1de7f 1996 #define TSB_PE_FR1_PE1F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->FR1,1)))
AnnaBridge 184:08ed48f1de7f 1997 #define TSB_PE_FR1_PE2F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->FR1,2)))
AnnaBridge 184:08ed48f1de7f 1998 #define TSB_PE_FR1_PE3F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->FR1,3)))
AnnaBridge 184:08ed48f1de7f 1999 #define TSB_PE_FR1_PE4F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->FR1,4)))
AnnaBridge 184:08ed48f1de7f 2000 #define TSB_PE_FR1_PE5F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->FR1,5)))
AnnaBridge 184:08ed48f1de7f 2001 #define TSB_PE_FR1_PE6F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->FR1,6)))
AnnaBridge 184:08ed48f1de7f 2002 #define TSB_PE_FR3_PE0F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->FR3,0)))
AnnaBridge 184:08ed48f1de7f 2003 #define TSB_PE_FR3_PE1F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->FR3,1)))
AnnaBridge 184:08ed48f1de7f 2004 #define TSB_PE_FR3_PE2F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->FR3,2)))
AnnaBridge 184:08ed48f1de7f 2005 #define TSB_PE_FR3_PE3F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->FR3,3)))
AnnaBridge 184:08ed48f1de7f 2006 #define TSB_PE_FR3_PE4F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->FR3,4)))
AnnaBridge 184:08ed48f1de7f 2007 #define TSB_PE_FR3_PE5F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->FR3,5)))
AnnaBridge 184:08ed48f1de7f 2008 #define TSB_PE_FR3_PE6F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->FR3,6)))
AnnaBridge 184:08ed48f1de7f 2009 #define TSB_PE_FR3_PE7F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->FR3,7)))
AnnaBridge 184:08ed48f1de7f 2010 #define TSB_PE_FR4_PE3F4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->FR4,3)))
AnnaBridge 184:08ed48f1de7f 2011 #define TSB_PE_FR4_PE4F4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->FR4,4)))
AnnaBridge 184:08ed48f1de7f 2012 #define TSB_PE_FR5_PE0F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->FR5,0)))
AnnaBridge 184:08ed48f1de7f 2013 #define TSB_PE_FR5_PE1F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->FR5,1)))
AnnaBridge 184:08ed48f1de7f 2014 #define TSB_PE_FR5_PE2F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->FR5,2)))
AnnaBridge 184:08ed48f1de7f 2015 #define TSB_PE_FR5_PE3F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->FR5,3)))
AnnaBridge 184:08ed48f1de7f 2016 #define TSB_PE_FR5_PE4F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->FR5,4)))
AnnaBridge 184:08ed48f1de7f 2017 #define TSB_PE_FR5_PE7F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->FR5,7)))
AnnaBridge 184:08ed48f1de7f 2018 #define TSB_PE_OD_PE0OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->OD,0)))
AnnaBridge 184:08ed48f1de7f 2019 #define TSB_PE_OD_PE1OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->OD,1)))
AnnaBridge 184:08ed48f1de7f 2020 #define TSB_PE_OD_PE2OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->OD,2)))
AnnaBridge 184:08ed48f1de7f 2021 #define TSB_PE_OD_PE3OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->OD,3)))
AnnaBridge 184:08ed48f1de7f 2022 #define TSB_PE_OD_PE4OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->OD,4)))
AnnaBridge 184:08ed48f1de7f 2023 #define TSB_PE_OD_PE5OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->OD,5)))
AnnaBridge 184:08ed48f1de7f 2024 #define TSB_PE_OD_PE6OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->OD,6)))
AnnaBridge 184:08ed48f1de7f 2025 #define TSB_PE_OD_PE7OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->OD,7)))
AnnaBridge 184:08ed48f1de7f 2026 #define TSB_PE_PUP_PE0UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->PUP,0)))
AnnaBridge 184:08ed48f1de7f 2027 #define TSB_PE_PUP_PE1UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->PUP,1)))
AnnaBridge 184:08ed48f1de7f 2028 #define TSB_PE_PUP_PE2UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->PUP,2)))
AnnaBridge 184:08ed48f1de7f 2029 #define TSB_PE_PUP_PE3UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->PUP,3)))
AnnaBridge 184:08ed48f1de7f 2030 #define TSB_PE_PUP_PE4UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->PUP,4)))
AnnaBridge 184:08ed48f1de7f 2031 #define TSB_PE_PUP_PE5UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->PUP,5)))
AnnaBridge 184:08ed48f1de7f 2032 #define TSB_PE_PUP_PE6UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->PUP,6)))
AnnaBridge 184:08ed48f1de7f 2033 #define TSB_PE_PUP_PE7UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->PUP,7)))
AnnaBridge 184:08ed48f1de7f 2034 #define TSB_PE_IE_PE0IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->IE,0)))
AnnaBridge 184:08ed48f1de7f 2035 #define TSB_PE_IE_PE1IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->IE,1)))
AnnaBridge 184:08ed48f1de7f 2036 #define TSB_PE_IE_PE2IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->IE,2)))
AnnaBridge 184:08ed48f1de7f 2037 #define TSB_PE_IE_PE3IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->IE,3)))
AnnaBridge 184:08ed48f1de7f 2038 #define TSB_PE_IE_PE4IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->IE,4)))
AnnaBridge 184:08ed48f1de7f 2039 #define TSB_PE_IE_PE5IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->IE,5)))
AnnaBridge 184:08ed48f1de7f 2040 #define TSB_PE_IE_PE6IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->IE,6)))
AnnaBridge 184:08ed48f1de7f 2041 #define TSB_PE_IE_PE7IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PE->IE,7)))
AnnaBridge 184:08ed48f1de7f 2042
AnnaBridge 184:08ed48f1de7f 2043
AnnaBridge 184:08ed48f1de7f 2044 /* Port F */
AnnaBridge 184:08ed48f1de7f 2045 #define TSB_PF_DATA_PF0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->DATA,0)))
AnnaBridge 184:08ed48f1de7f 2046 #define TSB_PF_DATA_PF1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->DATA,1)))
AnnaBridge 184:08ed48f1de7f 2047 #define TSB_PF_DATA_PF2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->DATA,2)))
AnnaBridge 184:08ed48f1de7f 2048 #define TSB_PF_DATA_PF3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->DATA,3)))
AnnaBridge 184:08ed48f1de7f 2049 #define TSB_PF_DATA_PF4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->DATA,4)))
AnnaBridge 184:08ed48f1de7f 2050 #define TSB_PF_DATA_PF5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->DATA,5)))
AnnaBridge 184:08ed48f1de7f 2051 #define TSB_PF_DATA_PF6 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->DATA,6)))
AnnaBridge 184:08ed48f1de7f 2052 #define TSB_PF_DATA_PF7 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->DATA,7)))
AnnaBridge 184:08ed48f1de7f 2053 #define TSB_PF_CR_PF0C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->CR,0)))
AnnaBridge 184:08ed48f1de7f 2054 #define TSB_PF_CR_PF1C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->CR,1)))
AnnaBridge 184:08ed48f1de7f 2055 #define TSB_PF_CR_PF2C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->CR,2)))
AnnaBridge 184:08ed48f1de7f 2056 #define TSB_PF_CR_PF3C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->CR,3)))
AnnaBridge 184:08ed48f1de7f 2057 #define TSB_PF_CR_PF4C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->CR,4)))
AnnaBridge 184:08ed48f1de7f 2058 #define TSB_PF_CR_PF5C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->CR,5)))
AnnaBridge 184:08ed48f1de7f 2059 #define TSB_PF_CR_PF6C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->CR,6)))
AnnaBridge 184:08ed48f1de7f 2060 #define TSB_PF_CR_PF7C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->CR,7)))
AnnaBridge 184:08ed48f1de7f 2061 #define TSB_PF_FR1_PF0F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->FR1,0)))
AnnaBridge 184:08ed48f1de7f 2062 #define TSB_PF_FR1_PF1F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->FR1,1)))
AnnaBridge 184:08ed48f1de7f 2063 #define TSB_PF_FR1_PF2F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->FR1,2)))
AnnaBridge 184:08ed48f1de7f 2064 #define TSB_PF_FR1_PF3F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->FR1,3)))
AnnaBridge 184:08ed48f1de7f 2065 #define TSB_PF_FR1_PF4F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->FR1,4)))
AnnaBridge 184:08ed48f1de7f 2066 #define TSB_PF_FR1_PF5F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->FR1,5)))
AnnaBridge 184:08ed48f1de7f 2067 #define TSB_PF_FR1_PF6F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->FR1,6)))
AnnaBridge 184:08ed48f1de7f 2068 #define TSB_PF_FR1_PF7F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->FR1,7)))
AnnaBridge 184:08ed48f1de7f 2069 #define TSB_PF_FR3_PF0F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->FR3,0)))
AnnaBridge 184:08ed48f1de7f 2070 #define TSB_PF_FR3_PF1F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->FR3,1)))
AnnaBridge 184:08ed48f1de7f 2071 #define TSB_PF_FR3_PF2F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->FR3,2)))
AnnaBridge 184:08ed48f1de7f 2072 #define TSB_PF_FR3_PF3F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->FR3,3)))
AnnaBridge 184:08ed48f1de7f 2073 #define TSB_PF_FR3_PF4F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->FR3,4)))
AnnaBridge 184:08ed48f1de7f 2074 #define TSB_PF_FR3_PF5F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->FR3,5)))
AnnaBridge 184:08ed48f1de7f 2075 #define TSB_PF_FR3_PF6F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->FR3,6)))
AnnaBridge 184:08ed48f1de7f 2076 #define TSB_PF_FR3_PF7F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->FR3,7)))
AnnaBridge 184:08ed48f1de7f 2077 #define TSB_PF_FR4_PF1F4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->FR4,1)))
AnnaBridge 184:08ed48f1de7f 2078 #define TSB_PF_FR4_PF2F4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->FR4,2)))
AnnaBridge 184:08ed48f1de7f 2079 #define TSB_PF_FR4_PF6F4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->FR4,6)))
AnnaBridge 184:08ed48f1de7f 2080 #define TSB_PF_FR4_PF7F4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->FR4,7)))
AnnaBridge 184:08ed48f1de7f 2081 #define TSB_PF_FR5_PF3F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->FR5,3)))
AnnaBridge 184:08ed48f1de7f 2082 #define TSB_PF_FR5_PF4F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->FR5,4)))
AnnaBridge 184:08ed48f1de7f 2083 #define TSB_PF_FR5_PF5F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->FR5,5)))
AnnaBridge 184:08ed48f1de7f 2084 #define TSB_PF_FR5_PF6F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->FR5,6)))
AnnaBridge 184:08ed48f1de7f 2085 #define TSB_PF_OD_PF0OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->OD,0)))
AnnaBridge 184:08ed48f1de7f 2086 #define TSB_PF_OD_PF1OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->OD,1)))
AnnaBridge 184:08ed48f1de7f 2087 #define TSB_PF_OD_PF2OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->OD,2)))
AnnaBridge 184:08ed48f1de7f 2088 #define TSB_PF_OD_PF3OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->OD,3)))
AnnaBridge 184:08ed48f1de7f 2089 #define TSB_PF_OD_PF4OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->OD,4)))
AnnaBridge 184:08ed48f1de7f 2090 #define TSB_PF_OD_PF5OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->OD,5)))
AnnaBridge 184:08ed48f1de7f 2091 #define TSB_PF_OD_PF6OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->OD,6)))
AnnaBridge 184:08ed48f1de7f 2092 #define TSB_PF_OD_PF7OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->OD,7)))
AnnaBridge 184:08ed48f1de7f 2093 #define TSB_PF_PUP_PF0UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->PUP,0)))
AnnaBridge 184:08ed48f1de7f 2094 #define TSB_PF_PUP_PF1UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->PUP,1)))
AnnaBridge 184:08ed48f1de7f 2095 #define TSB_PF_PUP_PF2UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->PUP,2)))
AnnaBridge 184:08ed48f1de7f 2096 #define TSB_PF_PUP_PF3UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->PUP,3)))
AnnaBridge 184:08ed48f1de7f 2097 #define TSB_PF_PUP_PF4UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->PUP,4)))
AnnaBridge 184:08ed48f1de7f 2098 #define TSB_PF_PUP_PF5UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->PUP,5)))
AnnaBridge 184:08ed48f1de7f 2099 #define TSB_PF_PUP_PF6UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->PUP,6)))
AnnaBridge 184:08ed48f1de7f 2100 #define TSB_PF_PUP_PF7UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->PUP,7)))
AnnaBridge 184:08ed48f1de7f 2101 #define TSB_PF_IE_PF0IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->IE,0)))
AnnaBridge 184:08ed48f1de7f 2102 #define TSB_PF_IE_PF1IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->IE,1)))
AnnaBridge 184:08ed48f1de7f 2103 #define TSB_PF_IE_PF2IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->IE,2)))
AnnaBridge 184:08ed48f1de7f 2104 #define TSB_PF_IE_PF3IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->IE,3)))
AnnaBridge 184:08ed48f1de7f 2105 #define TSB_PF_IE_PF4IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->IE,4)))
AnnaBridge 184:08ed48f1de7f 2106 #define TSB_PF_IE_PF5IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->IE,5)))
AnnaBridge 184:08ed48f1de7f 2107 #define TSB_PF_IE_PF6IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->IE,6)))
AnnaBridge 184:08ed48f1de7f 2108 #define TSB_PF_IE_PF7IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PF->IE,7)))
AnnaBridge 184:08ed48f1de7f 2109
AnnaBridge 184:08ed48f1de7f 2110
AnnaBridge 184:08ed48f1de7f 2111 /* Port G */
AnnaBridge 184:08ed48f1de7f 2112 #define TSB_PG_DATA_PG0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->DATA,0)))
AnnaBridge 184:08ed48f1de7f 2113 #define TSB_PG_DATA_PG1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->DATA,1)))
AnnaBridge 184:08ed48f1de7f 2114 #define TSB_PG_DATA_PG2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->DATA,2)))
AnnaBridge 184:08ed48f1de7f 2115 #define TSB_PG_DATA_PG3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->DATA,3)))
AnnaBridge 184:08ed48f1de7f 2116 #define TSB_PG_DATA_PG4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->DATA,4)))
AnnaBridge 184:08ed48f1de7f 2117 #define TSB_PG_DATA_PG5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->DATA,5)))
AnnaBridge 184:08ed48f1de7f 2118 #define TSB_PG_DATA_PG6 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->DATA,6)))
AnnaBridge 184:08ed48f1de7f 2119 #define TSB_PG_DATA_PG7 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->DATA,7)))
AnnaBridge 184:08ed48f1de7f 2120 #define TSB_PG_CR_PG0C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->CR,0)))
AnnaBridge 184:08ed48f1de7f 2121 #define TSB_PG_CR_PG1C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->CR,1)))
AnnaBridge 184:08ed48f1de7f 2122 #define TSB_PG_CR_PG2C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->CR,2)))
AnnaBridge 184:08ed48f1de7f 2123 #define TSB_PG_CR_PG3C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->CR,3)))
AnnaBridge 184:08ed48f1de7f 2124 #define TSB_PG_CR_PG4C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->CR,4)))
AnnaBridge 184:08ed48f1de7f 2125 #define TSB_PG_CR_PG5C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->CR,5)))
AnnaBridge 184:08ed48f1de7f 2126 #define TSB_PG_CR_PG6C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->CR,6)))
AnnaBridge 184:08ed48f1de7f 2127 #define TSB_PG_CR_PG7C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->CR,7)))
AnnaBridge 184:08ed48f1de7f 2128 #define TSB_PG_FR1_PG0F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->FR1,0)))
AnnaBridge 184:08ed48f1de7f 2129 #define TSB_PG_FR1_PG1F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->FR1,1)))
AnnaBridge 184:08ed48f1de7f 2130 #define TSB_PG_FR1_PG2F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->FR1,2)))
AnnaBridge 184:08ed48f1de7f 2131 #define TSB_PG_FR1_PG3F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->FR1,3)))
AnnaBridge 184:08ed48f1de7f 2132 #define TSB_PG_FR1_PG4F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->FR1,4)))
AnnaBridge 184:08ed48f1de7f 2133 #define TSB_PG_FR1_PG5F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->FR1,5)))
AnnaBridge 184:08ed48f1de7f 2134 #define TSB_PG_FR1_PG6F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->FR1,6)))
AnnaBridge 184:08ed48f1de7f 2135 #define TSB_PG_FR1_PG7F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->FR1,7)))
AnnaBridge 184:08ed48f1de7f 2136 #define TSB_PG_FR3_PG0F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->FR3,0)))
AnnaBridge 184:08ed48f1de7f 2137 #define TSB_PG_FR3_PG1F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->FR3,1)))
AnnaBridge 184:08ed48f1de7f 2138 #define TSB_PG_FR3_PG2F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->FR3,2)))
AnnaBridge 184:08ed48f1de7f 2139 #define TSB_PG_FR3_PG3F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->FR3,3)))
AnnaBridge 184:08ed48f1de7f 2140 #define TSB_PG_FR4_PG2F4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->FR4,2)))
AnnaBridge 184:08ed48f1de7f 2141 #define TSB_PG_FR4_PG3F4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->FR4,3)))
AnnaBridge 184:08ed48f1de7f 2142 #define TSB_PG_FR5_PG0F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->FR5,0)))
AnnaBridge 184:08ed48f1de7f 2143 #define TSB_PG_FR5_PG1F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->FR5,1)))
AnnaBridge 184:08ed48f1de7f 2144 #define TSB_PG_FR5_PG2F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->FR5,2)))
AnnaBridge 184:08ed48f1de7f 2145 #define TSB_PG_FR5_PG3F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->FR5,3)))
AnnaBridge 184:08ed48f1de7f 2146 #define TSB_PG_FR5_PG4F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->FR5,4)))
AnnaBridge 184:08ed48f1de7f 2147 #define TSB_PG_FR5_PG5F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->FR5,5)))
AnnaBridge 184:08ed48f1de7f 2148 #define TSB_PG_FR5_PG6F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->FR5,6)))
AnnaBridge 184:08ed48f1de7f 2149 #define TSB_PG_FR5_PG7F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->FR5,7)))
AnnaBridge 184:08ed48f1de7f 2150 #define TSB_PG_OD_PG0OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->OD,0)))
AnnaBridge 184:08ed48f1de7f 2151 #define TSB_PG_OD_PG1OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->OD,1)))
AnnaBridge 184:08ed48f1de7f 2152 #define TSB_PG_OD_PG2OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->OD,2)))
AnnaBridge 184:08ed48f1de7f 2153 #define TSB_PG_OD_PG3OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->OD,3)))
AnnaBridge 184:08ed48f1de7f 2154 #define TSB_PG_OD_PG4OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->OD,4)))
AnnaBridge 184:08ed48f1de7f 2155 #define TSB_PG_OD_PG5OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->OD,5)))
AnnaBridge 184:08ed48f1de7f 2156 #define TSB_PG_OD_PG6OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->OD,6)))
AnnaBridge 184:08ed48f1de7f 2157 #define TSB_PG_OD_PG7OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->OD,7)))
AnnaBridge 184:08ed48f1de7f 2158 #define TSB_PG_PUP_PG0UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->PUP,0)))
AnnaBridge 184:08ed48f1de7f 2159 #define TSB_PG_PUP_PG1UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->PUP,1)))
AnnaBridge 184:08ed48f1de7f 2160 #define TSB_PG_PUP_PG2UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->PUP,2)))
AnnaBridge 184:08ed48f1de7f 2161 #define TSB_PG_PUP_PG3UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->PUP,3)))
AnnaBridge 184:08ed48f1de7f 2162 #define TSB_PG_PUP_PG4UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->PUP,4)))
AnnaBridge 184:08ed48f1de7f 2163 #define TSB_PG_PUP_PG5UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->PUP,5)))
AnnaBridge 184:08ed48f1de7f 2164 #define TSB_PG_PUP_PG6UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->PUP,6)))
AnnaBridge 184:08ed48f1de7f 2165 #define TSB_PG_PUP_PG7UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->PUP,7)))
AnnaBridge 184:08ed48f1de7f 2166 #define TSB_PG_IE_PG0IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->IE,0)))
AnnaBridge 184:08ed48f1de7f 2167 #define TSB_PG_IE_PG1IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->IE,1)))
AnnaBridge 184:08ed48f1de7f 2168 #define TSB_PG_IE_PG2IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->IE,2)))
AnnaBridge 184:08ed48f1de7f 2169 #define TSB_PG_IE_PG3IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->IE,3)))
AnnaBridge 184:08ed48f1de7f 2170 #define TSB_PG_IE_PG4IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->IE,4)))
AnnaBridge 184:08ed48f1de7f 2171 #define TSB_PG_IE_PG5IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->IE,5)))
AnnaBridge 184:08ed48f1de7f 2172 #define TSB_PG_IE_PG6IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->IE,6)))
AnnaBridge 184:08ed48f1de7f 2173 #define TSB_PG_IE_PG7IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PG->IE,7)))
AnnaBridge 184:08ed48f1de7f 2174
AnnaBridge 184:08ed48f1de7f 2175
AnnaBridge 184:08ed48f1de7f 2176 /* Port H */
AnnaBridge 184:08ed48f1de7f 2177 #define TSB_PH_DATA_PH0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->DATA,0)))
AnnaBridge 184:08ed48f1de7f 2178 #define TSB_PH_DATA_PH1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->DATA,1)))
AnnaBridge 184:08ed48f1de7f 2179 #define TSB_PH_DATA_PH2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->DATA,2)))
AnnaBridge 184:08ed48f1de7f 2180 #define TSB_PH_DATA_PH3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->DATA,3)))
AnnaBridge 184:08ed48f1de7f 2181 #define TSB_PH_CR_PH0C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->CR,0)))
AnnaBridge 184:08ed48f1de7f 2182 #define TSB_PH_CR_PH1C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->CR,1)))
AnnaBridge 184:08ed48f1de7f 2183 #define TSB_PH_CR_PH2C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->CR,2)))
AnnaBridge 184:08ed48f1de7f 2184 #define TSB_PH_CR_PH3C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->CR,3)))
AnnaBridge 184:08ed48f1de7f 2185 #define TSB_PH_FR1_PH0F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->FR1,0)))
AnnaBridge 184:08ed48f1de7f 2186 #define TSB_PH_FR1_PH1F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->FR1,1)))
AnnaBridge 184:08ed48f1de7f 2187 #define TSB_PH_FR1_PH2F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->FR1,2)))
AnnaBridge 184:08ed48f1de7f 2188 #define TSB_PH_FR1_PH3F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->FR1,3)))
AnnaBridge 184:08ed48f1de7f 2189 #define TSB_PH_FR2_PH0F2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->FR2,0)))
AnnaBridge 184:08ed48f1de7f 2190 #define TSB_PH_FR2_PH1F2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->FR2,1)))
AnnaBridge 184:08ed48f1de7f 2191 #define TSB_PH_FR3_PH0F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->FR3,0)))
AnnaBridge 184:08ed48f1de7f 2192 #define TSB_PH_FR3_PH1F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->FR3,1)))
AnnaBridge 184:08ed48f1de7f 2193 #define TSB_PH_FR3_PH2F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->FR3,2)))
AnnaBridge 184:08ed48f1de7f 2194 #define TSB_PH_FR3_PH3F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->FR3,3)))
AnnaBridge 184:08ed48f1de7f 2195 #define TSB_PH_FR4_PH0F4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->FR4,0)))
AnnaBridge 184:08ed48f1de7f 2196 #define TSB_PH_FR4_PH1F4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->FR4,1)))
AnnaBridge 184:08ed48f1de7f 2197 #define TSB_PH_FR4_PH2F4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->FR4,2)))
AnnaBridge 184:08ed48f1de7f 2198 #define TSB_PH_FR4_PH3F4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->FR4,3)))
AnnaBridge 184:08ed48f1de7f 2199 #define TSB_PH_OD_PH0OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->OD,0)))
AnnaBridge 184:08ed48f1de7f 2200 #define TSB_PH_OD_PH1OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->OD,1)))
AnnaBridge 184:08ed48f1de7f 2201 #define TSB_PH_OD_PH2OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->OD,2)))
AnnaBridge 184:08ed48f1de7f 2202 #define TSB_PH_OD_PH3OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->OD,3)))
AnnaBridge 184:08ed48f1de7f 2203 #define TSB_PH_PUP_PH0UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->PUP,0)))
AnnaBridge 184:08ed48f1de7f 2204 #define TSB_PH_PUP_PH1UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->PUP,1)))
AnnaBridge 184:08ed48f1de7f 2205 #define TSB_PH_PUP_PH2UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->PUP,2)))
AnnaBridge 184:08ed48f1de7f 2206 #define TSB_PH_PUP_PH3UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->PUP,3)))
AnnaBridge 184:08ed48f1de7f 2207 #define TSB_PH_IE_PH0IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->IE,0)))
AnnaBridge 184:08ed48f1de7f 2208 #define TSB_PH_IE_PH1IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->IE,1)))
AnnaBridge 184:08ed48f1de7f 2209 #define TSB_PH_IE_PH2IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->IE,2)))
AnnaBridge 184:08ed48f1de7f 2210 #define TSB_PH_IE_PH3IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PH->IE,3)))
AnnaBridge 184:08ed48f1de7f 2211
AnnaBridge 184:08ed48f1de7f 2212
AnnaBridge 184:08ed48f1de7f 2213 /* Port J */
AnnaBridge 184:08ed48f1de7f 2214 #define TSB_PJ_DATA_PJ0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->DATA,0)))
AnnaBridge 184:08ed48f1de7f 2215 #define TSB_PJ_DATA_PJ1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->DATA,1)))
AnnaBridge 184:08ed48f1de7f 2216 #define TSB_PJ_DATA_PJ2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->DATA,2)))
AnnaBridge 184:08ed48f1de7f 2217 #define TSB_PJ_DATA_PJ3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->DATA,3)))
AnnaBridge 184:08ed48f1de7f 2218 #define TSB_PJ_DATA_PJ4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->DATA,4)))
AnnaBridge 184:08ed48f1de7f 2219 #define TSB_PJ_DATA_PJ5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->DATA,5)))
AnnaBridge 184:08ed48f1de7f 2220 #define TSB_PJ_DATA_PJ6 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->DATA,6)))
AnnaBridge 184:08ed48f1de7f 2221 #define TSB_PJ_DATA_PJ7 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->DATA,7)))
AnnaBridge 184:08ed48f1de7f 2222 #define TSB_PJ_CR_PJ0C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->CR,0)))
AnnaBridge 184:08ed48f1de7f 2223 #define TSB_PJ_CR_PJ1C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->CR,1)))
AnnaBridge 184:08ed48f1de7f 2224 #define TSB_PJ_CR_PJ2C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->CR,2)))
AnnaBridge 184:08ed48f1de7f 2225 #define TSB_PJ_CR_PJ3C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->CR,3)))
AnnaBridge 184:08ed48f1de7f 2226 #define TSB_PJ_CR_PJ4C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->CR,4)))
AnnaBridge 184:08ed48f1de7f 2227 #define TSB_PJ_CR_PJ5C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->CR,5)))
AnnaBridge 184:08ed48f1de7f 2228 #define TSB_PJ_CR_PJ6C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->CR,6)))
AnnaBridge 184:08ed48f1de7f 2229 #define TSB_PJ_CR_PJ7C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->CR,7)))
AnnaBridge 184:08ed48f1de7f 2230 #define TSB_PJ_FR1_PJ7F1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->FR1,7)))
AnnaBridge 184:08ed48f1de7f 2231 #define TSB_PJ_FR2_PJ7F2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->FR2,7)))
AnnaBridge 184:08ed48f1de7f 2232 #define TSB_PJ_FR3_PJ7F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->FR3,7)))
AnnaBridge 184:08ed48f1de7f 2233 #define TSB_PJ_OD_PJ0OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->OD,0)))
AnnaBridge 184:08ed48f1de7f 2234 #define TSB_PJ_OD_PJ1OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->OD,1)))
AnnaBridge 184:08ed48f1de7f 2235 #define TSB_PJ_OD_PJ2OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->OD,2)))
AnnaBridge 184:08ed48f1de7f 2236 #define TSB_PJ_OD_PJ3OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->OD,3)))
AnnaBridge 184:08ed48f1de7f 2237 #define TSB_PJ_OD_PJ4OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->OD,4)))
AnnaBridge 184:08ed48f1de7f 2238 #define TSB_PJ_OD_PJ5OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->OD,5)))
AnnaBridge 184:08ed48f1de7f 2239 #define TSB_PJ_OD_PJ6OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->OD,6)))
AnnaBridge 184:08ed48f1de7f 2240 #define TSB_PJ_OD_PJ7OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->OD,7)))
AnnaBridge 184:08ed48f1de7f 2241 #define TSB_PJ_PUP_PJ0UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->PUP,0)))
AnnaBridge 184:08ed48f1de7f 2242 #define TSB_PJ_PUP_PJ1UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->PUP,1)))
AnnaBridge 184:08ed48f1de7f 2243 #define TSB_PJ_PUP_PJ2UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->PUP,2)))
AnnaBridge 184:08ed48f1de7f 2244 #define TSB_PJ_PUP_PJ3UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->PUP,3)))
AnnaBridge 184:08ed48f1de7f 2245 #define TSB_PJ_PUP_PJ4UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->PUP,4)))
AnnaBridge 184:08ed48f1de7f 2246 #define TSB_PJ_PUP_PJ5UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->PUP,5)))
AnnaBridge 184:08ed48f1de7f 2247 #define TSB_PJ_PUP_PJ6UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->PUP,6)))
AnnaBridge 184:08ed48f1de7f 2248 #define TSB_PJ_PUP_PJ7UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->PUP,7)))
AnnaBridge 184:08ed48f1de7f 2249 #define TSB_PJ_IE_PJ0IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->IE,0)))
AnnaBridge 184:08ed48f1de7f 2250 #define TSB_PJ_IE_PJ1IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->IE,1)))
AnnaBridge 184:08ed48f1de7f 2251 #define TSB_PJ_IE_PJ2IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->IE,2)))
AnnaBridge 184:08ed48f1de7f 2252 #define TSB_PJ_IE_PJ3IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->IE,3)))
AnnaBridge 184:08ed48f1de7f 2253 #define TSB_PJ_IE_PJ4IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->IE,4)))
AnnaBridge 184:08ed48f1de7f 2254 #define TSB_PJ_IE_PJ5IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->IE,5)))
AnnaBridge 184:08ed48f1de7f 2255 #define TSB_PJ_IE_PJ6IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->IE,6)))
AnnaBridge 184:08ed48f1de7f 2256 #define TSB_PJ_IE_PJ7IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PJ->IE,7)))
AnnaBridge 184:08ed48f1de7f 2257
AnnaBridge 184:08ed48f1de7f 2258
AnnaBridge 184:08ed48f1de7f 2259 /* Port K */
AnnaBridge 184:08ed48f1de7f 2260 #define TSB_PK_DATA_PK0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->DATA,0)))
AnnaBridge 184:08ed48f1de7f 2261 #define TSB_PK_DATA_PK1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->DATA,1)))
AnnaBridge 184:08ed48f1de7f 2262 #define TSB_PK_DATA_PK2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->DATA,2)))
AnnaBridge 184:08ed48f1de7f 2263 #define TSB_PK_DATA_PK3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->DATA,3)))
AnnaBridge 184:08ed48f1de7f 2264 #define TSB_PK_DATA_PK4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->DATA,4)))
AnnaBridge 184:08ed48f1de7f 2265 #define TSB_PK_CR_PK0C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->CR,0)))
AnnaBridge 184:08ed48f1de7f 2266 #define TSB_PK_CR_PK1C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->CR,1)))
AnnaBridge 184:08ed48f1de7f 2267 #define TSB_PK_CR_PK2C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->CR,2)))
AnnaBridge 184:08ed48f1de7f 2268 #define TSB_PK_CR_PK3C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->CR,3)))
AnnaBridge 184:08ed48f1de7f 2269 #define TSB_PK_CR_PK4C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->CR,4)))
AnnaBridge 184:08ed48f1de7f 2270 #define TSB_PK_FR2_PK1F2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->FR2,1)))
AnnaBridge 184:08ed48f1de7f 2271 #define TSB_PK_FR2_PK2F2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->FR2,2)))
AnnaBridge 184:08ed48f1de7f 2272 #define TSB_PK_FR2_PK3F2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->FR2,3)))
AnnaBridge 184:08ed48f1de7f 2273 #define TSB_PK_FR2_PK4F2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->FR2,4)))
AnnaBridge 184:08ed48f1de7f 2274 #define TSB_PK_FR3_PK2F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->FR3,2)))
AnnaBridge 184:08ed48f1de7f 2275 #define TSB_PK_FR3_PK3F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->FR3,3)))
AnnaBridge 184:08ed48f1de7f 2276 #define TSB_PK_FR4_PK1F4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->FR4,1)))
AnnaBridge 184:08ed48f1de7f 2277 #define TSB_PK_OD_PK0OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->OD,0)))
AnnaBridge 184:08ed48f1de7f 2278 #define TSB_PK_OD_PK1OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->OD,1)))
AnnaBridge 184:08ed48f1de7f 2279 #define TSB_PK_OD_PK2OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->OD,2)))
AnnaBridge 184:08ed48f1de7f 2280 #define TSB_PK_OD_PK3OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->OD,3)))
AnnaBridge 184:08ed48f1de7f 2281 #define TSB_PK_OD_PK4OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->OD,4)))
AnnaBridge 184:08ed48f1de7f 2282 #define TSB_PK_PUP_PK0UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->PUP,0)))
AnnaBridge 184:08ed48f1de7f 2283 #define TSB_PK_PUP_PK1UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->PUP,1)))
AnnaBridge 184:08ed48f1de7f 2284 #define TSB_PK_PUP_PK2UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->PUP,2)))
AnnaBridge 184:08ed48f1de7f 2285 #define TSB_PK_PUP_PK3UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->PUP,3)))
AnnaBridge 184:08ed48f1de7f 2286 #define TSB_PK_PUP_PK4UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->PUP,4)))
AnnaBridge 184:08ed48f1de7f 2287 #define TSB_PK_IE_PK0IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->IE,0)))
AnnaBridge 184:08ed48f1de7f 2288 #define TSB_PK_IE_PK1IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->IE,1)))
AnnaBridge 184:08ed48f1de7f 2289 #define TSB_PK_IE_PK2IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->IE,2)))
AnnaBridge 184:08ed48f1de7f 2290 #define TSB_PK_IE_PK3IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->IE,3)))
AnnaBridge 184:08ed48f1de7f 2291 #define TSB_PK_IE_PK4IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PK->IE,4)))
AnnaBridge 184:08ed48f1de7f 2292
AnnaBridge 184:08ed48f1de7f 2293
AnnaBridge 184:08ed48f1de7f 2294 /* Port L */
AnnaBridge 184:08ed48f1de7f 2295 #define TSB_PL_DATA_PL0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->DATA,0)))
AnnaBridge 184:08ed48f1de7f 2296 #define TSB_PL_DATA_PL1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->DATA,1)))
AnnaBridge 184:08ed48f1de7f 2297 #define TSB_PL_DATA_PL2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->DATA,2)))
AnnaBridge 184:08ed48f1de7f 2298 #define TSB_PL_DATA_PL3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->DATA,3)))
AnnaBridge 184:08ed48f1de7f 2299 #define TSB_PL_CR_PL0C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->CR,0)))
AnnaBridge 184:08ed48f1de7f 2300 #define TSB_PL_CR_PL1C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->CR,1)))
AnnaBridge 184:08ed48f1de7f 2301 #define TSB_PL_CR_PL2C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->CR,2)))
AnnaBridge 184:08ed48f1de7f 2302 #define TSB_PL_CR_PL3C (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->CR,3)))
AnnaBridge 184:08ed48f1de7f 2303 #define TSB_PL_FR3_PL0F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->FR3,0)))
AnnaBridge 184:08ed48f1de7f 2304 #define TSB_PL_FR3_PL1F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->FR3,1)))
AnnaBridge 184:08ed48f1de7f 2305 #define TSB_PL_FR3_PL2F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->FR3,2)))
AnnaBridge 184:08ed48f1de7f 2306 #define TSB_PL_FR3_PL3F3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->FR3,3)))
AnnaBridge 184:08ed48f1de7f 2307 #define TSB_PL_FR4_PL0F4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->FR4,0)))
AnnaBridge 184:08ed48f1de7f 2308 #define TSB_PL_FR4_PL2F4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->FR4,2)))
AnnaBridge 184:08ed48f1de7f 2309 #define TSB_PL_FR4_PL3F4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->FR4,3)))
AnnaBridge 184:08ed48f1de7f 2310 #define TSB_PL_FR5_PL1F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->FR5,1)))
AnnaBridge 184:08ed48f1de7f 2311 #define TSB_PL_FR5_PL2F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->FR5,2)))
AnnaBridge 184:08ed48f1de7f 2312 #define TSB_PL_FR5_PL3F5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->FR5,3)))
AnnaBridge 184:08ed48f1de7f 2313 #define TSB_PL_FR6_PL3F6 (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->FR6,3)))
AnnaBridge 184:08ed48f1de7f 2314 #define TSB_PL_OD_PL0OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->OD,0)))
AnnaBridge 184:08ed48f1de7f 2315 #define TSB_PL_OD_PL1OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->OD,1)))
AnnaBridge 184:08ed48f1de7f 2316 #define TSB_PL_OD_PL2OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->OD,2)))
AnnaBridge 184:08ed48f1de7f 2317 #define TSB_PL_OD_PL3OD (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->OD,3)))
AnnaBridge 184:08ed48f1de7f 2318 #define TSB_PL_PUP_PL0UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->PUP,0)))
AnnaBridge 184:08ed48f1de7f 2319 #define TSB_PL_PUP_PL1UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->PUP,1)))
AnnaBridge 184:08ed48f1de7f 2320 #define TSB_PL_PUP_PL2UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->PUP,2)))
AnnaBridge 184:08ed48f1de7f 2321 #define TSB_PL_PUP_PL3UP (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->PUP,3)))
AnnaBridge 184:08ed48f1de7f 2322 #define TSB_PL_IE_PL0IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->IE,0)))
AnnaBridge 184:08ed48f1de7f 2323 #define TSB_PL_IE_PL1IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->IE,1)))
AnnaBridge 184:08ed48f1de7f 2324 #define TSB_PL_IE_PL2IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->IE,2)))
AnnaBridge 184:08ed48f1de7f 2325 #define TSB_PL_IE_PL3IE (*((__IO uint32_t *)BITBAND_PERI(&TSB_PL->IE,3)))
AnnaBridge 184:08ed48f1de7f 2326
AnnaBridge 184:08ed48f1de7f 2327
AnnaBridge 184:08ed48f1de7f 2328 /* 16-bit Timer/Event Counter (TB) */
AnnaBridge 184:08ed48f1de7f 2329 #define TSB_TB0_EN_TBHALT (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB0->EN,6)))
AnnaBridge 184:08ed48f1de7f 2330 #define TSB_TB0_EN_TBEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB0->EN,7)))
AnnaBridge 184:08ed48f1de7f 2331 #define TSB_TB0_RUN_TBRUN (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB0->RUN,0)))
AnnaBridge 184:08ed48f1de7f 2332 #define TSB_TB0_RUN_TBPRUN (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB0->RUN,2)))
AnnaBridge 184:08ed48f1de7f 2333 #define TSB_TB0_CR_CSSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB0->CR,0)))
AnnaBridge 184:08ed48f1de7f 2334 #define TSB_TB0_CR_TRGSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB0->CR,1)))
AnnaBridge 184:08ed48f1de7f 2335 #define TSB_TB0_CR_I2TB (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB0->CR,3)))
AnnaBridge 184:08ed48f1de7f 2336 #define TSB_TB0_CR_TBSYNC (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB0->CR,5)))
AnnaBridge 184:08ed48f1de7f 2337 #define TSB_TB0_CR_TBWBF (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB0->CR,7)))
AnnaBridge 184:08ed48f1de7f 2338 #define TSB_TB0_MOD_TBCLE (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB0->MOD,3)))
AnnaBridge 184:08ed48f1de7f 2339 #define TSB_TB0_MOD_TBCP (*((__O uint32_t *)BITBAND_PERI(&TSB_TB0->MOD,6)))
AnnaBridge 184:08ed48f1de7f 2340 #define TSB_TB0_FFCR_TBE0T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB0->FFCR,2)))
AnnaBridge 184:08ed48f1de7f 2341 #define TSB_TB0_FFCR_TBE1T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB0->FFCR,3)))
AnnaBridge 184:08ed48f1de7f 2342 #define TSB_TB0_FFCR_TBC0T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB0->FFCR,4)))
AnnaBridge 184:08ed48f1de7f 2343 #define TSB_TB0_FFCR_TBC1T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB0->FFCR,5)))
AnnaBridge 184:08ed48f1de7f 2344 #define TSB_TB0_IM_TBIM0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB0->IM,0)))
AnnaBridge 184:08ed48f1de7f 2345 #define TSB_TB0_IM_TBIM1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB0->IM,1)))
AnnaBridge 184:08ed48f1de7f 2346 #define TSB_TB0_IM_TBIMOF (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB0->IM,2)))
AnnaBridge 184:08ed48f1de7f 2347
AnnaBridge 184:08ed48f1de7f 2348 #define TSB_TB1_EN_TBHALT (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB1->EN,6)))
AnnaBridge 184:08ed48f1de7f 2349 #define TSB_TB1_EN_TBEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB1->EN,7)))
AnnaBridge 184:08ed48f1de7f 2350 #define TSB_TB1_RUN_TBRUN (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB1->RUN,0)))
AnnaBridge 184:08ed48f1de7f 2351 #define TSB_TB1_RUN_TBPRUN (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB1->RUN,2)))
AnnaBridge 184:08ed48f1de7f 2352 #define TSB_TB1_CR_CSSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB1->CR,0)))
AnnaBridge 184:08ed48f1de7f 2353 #define TSB_TB1_CR_TRGSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB1->CR,1)))
AnnaBridge 184:08ed48f1de7f 2354 #define TSB_TB1_CR_I2TB (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB1->CR,3)))
AnnaBridge 184:08ed48f1de7f 2355 #define TSB_TB1_CR_TBSYNC (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB1->CR,5)))
AnnaBridge 184:08ed48f1de7f 2356 #define TSB_TB1_CR_TBWBF (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB1->CR,7)))
AnnaBridge 184:08ed48f1de7f 2357 #define TSB_TB1_MOD_TBCLE (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB1->MOD,3)))
AnnaBridge 184:08ed48f1de7f 2358 #define TSB_TB1_MOD_TBCP (*((__O uint32_t *)BITBAND_PERI(&TSB_TB1->MOD,6)))
AnnaBridge 184:08ed48f1de7f 2359 #define TSB_TB1_FFCR_TBE0T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB1->FFCR,2)))
AnnaBridge 184:08ed48f1de7f 2360 #define TSB_TB1_FFCR_TBE1T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB1->FFCR,3)))
AnnaBridge 184:08ed48f1de7f 2361 #define TSB_TB1_FFCR_TBC0T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB1->FFCR,4)))
AnnaBridge 184:08ed48f1de7f 2362 #define TSB_TB1_FFCR_TBC1T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB1->FFCR,5)))
AnnaBridge 184:08ed48f1de7f 2363 #define TSB_TB1_IM_TBIM0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB1->IM,0)))
AnnaBridge 184:08ed48f1de7f 2364 #define TSB_TB1_IM_TBIM1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB1->IM,1)))
AnnaBridge 184:08ed48f1de7f 2365 #define TSB_TB1_IM_TBIMOF (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB1->IM,2)))
AnnaBridge 184:08ed48f1de7f 2366
AnnaBridge 184:08ed48f1de7f 2367 #define TSB_TB2_EN_TBHALT (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB2->EN,6)))
AnnaBridge 184:08ed48f1de7f 2368 #define TSB_TB2_EN_TBEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB2->EN,7)))
AnnaBridge 184:08ed48f1de7f 2369 #define TSB_TB2_RUN_TBRUN (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB2->RUN,0)))
AnnaBridge 184:08ed48f1de7f 2370 #define TSB_TB2_RUN_TBPRUN (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB2->RUN,2)))
AnnaBridge 184:08ed48f1de7f 2371 #define TSB_TB2_CR_CSSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB2->CR,0)))
AnnaBridge 184:08ed48f1de7f 2372 #define TSB_TB2_CR_TRGSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB2->CR,1)))
AnnaBridge 184:08ed48f1de7f 2373 #define TSB_TB2_CR_I2TB (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB2->CR,3)))
AnnaBridge 184:08ed48f1de7f 2374 #define TSB_TB2_CR_TBSYNC (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB2->CR,5)))
AnnaBridge 184:08ed48f1de7f 2375 #define TSB_TB2_CR_TBWBF (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB2->CR,7)))
AnnaBridge 184:08ed48f1de7f 2376 #define TSB_TB2_MOD_TBCLE (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB2->MOD,3)))
AnnaBridge 184:08ed48f1de7f 2377 #define TSB_TB2_MOD_TBCP (*((__O uint32_t *)BITBAND_PERI(&TSB_TB2->MOD,6)))
AnnaBridge 184:08ed48f1de7f 2378 #define TSB_TB2_FFCR_TBE0T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB2->FFCR,2)))
AnnaBridge 184:08ed48f1de7f 2379 #define TSB_TB2_FFCR_TBE1T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB2->FFCR,3)))
AnnaBridge 184:08ed48f1de7f 2380 #define TSB_TB2_FFCR_TBC0T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB2->FFCR,4)))
AnnaBridge 184:08ed48f1de7f 2381 #define TSB_TB2_FFCR_TBC1T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB2->FFCR,5)))
AnnaBridge 184:08ed48f1de7f 2382 #define TSB_TB2_IM_TBIM0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB2->IM,0)))
AnnaBridge 184:08ed48f1de7f 2383 #define TSB_TB2_IM_TBIM1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB2->IM,1)))
AnnaBridge 184:08ed48f1de7f 2384 #define TSB_TB2_IM_TBIMOF (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB2->IM,2)))
AnnaBridge 184:08ed48f1de7f 2385
AnnaBridge 184:08ed48f1de7f 2386 #define TSB_TB3_EN_TBHALT (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB3->EN,6)))
AnnaBridge 184:08ed48f1de7f 2387 #define TSB_TB3_EN_TBEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB3->EN,7)))
AnnaBridge 184:08ed48f1de7f 2388 #define TSB_TB3_RUN_TBRUN (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB3->RUN,0)))
AnnaBridge 184:08ed48f1de7f 2389 #define TSB_TB3_RUN_TBPRUN (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB3->RUN,2)))
AnnaBridge 184:08ed48f1de7f 2390 #define TSB_TB3_CR_CSSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB3->CR,0)))
AnnaBridge 184:08ed48f1de7f 2391 #define TSB_TB3_CR_TRGSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB3->CR,1)))
AnnaBridge 184:08ed48f1de7f 2392 #define TSB_TB3_CR_I2TB (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB3->CR,3)))
AnnaBridge 184:08ed48f1de7f 2393 #define TSB_TB3_CR_TBSYNC (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB3->CR,5)))
AnnaBridge 184:08ed48f1de7f 2394 #define TSB_TB3_CR_TBWBF (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB3->CR,7)))
AnnaBridge 184:08ed48f1de7f 2395 #define TSB_TB3_MOD_TBCLE (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB3->MOD,3)))
AnnaBridge 184:08ed48f1de7f 2396 #define TSB_TB3_MOD_TBCP (*((__O uint32_t *)BITBAND_PERI(&TSB_TB3->MOD,6)))
AnnaBridge 184:08ed48f1de7f 2397 #define TSB_TB3_FFCR_TBE0T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB3->FFCR,2)))
AnnaBridge 184:08ed48f1de7f 2398 #define TSB_TB3_FFCR_TBE1T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB3->FFCR,3)))
AnnaBridge 184:08ed48f1de7f 2399 #define TSB_TB3_FFCR_TBC0T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB3->FFCR,4)))
AnnaBridge 184:08ed48f1de7f 2400 #define TSB_TB3_FFCR_TBC1T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB3->FFCR,5)))
AnnaBridge 184:08ed48f1de7f 2401 #define TSB_TB3_IM_TBIM0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB3->IM,0)))
AnnaBridge 184:08ed48f1de7f 2402 #define TSB_TB3_IM_TBIM1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB3->IM,1)))
AnnaBridge 184:08ed48f1de7f 2403 #define TSB_TB3_IM_TBIMOF (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB3->IM,2)))
AnnaBridge 184:08ed48f1de7f 2404
AnnaBridge 184:08ed48f1de7f 2405 #define TSB_TB4_EN_TBHALT (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB4->EN,6)))
AnnaBridge 184:08ed48f1de7f 2406 #define TSB_TB4_EN_TBEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB4->EN,7)))
AnnaBridge 184:08ed48f1de7f 2407 #define TSB_TB4_RUN_TBRUN (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB4->RUN,0)))
AnnaBridge 184:08ed48f1de7f 2408 #define TSB_TB4_RUN_TBPRUN (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB4->RUN,2)))
AnnaBridge 184:08ed48f1de7f 2409 #define TSB_TB4_CR_CSSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB4->CR,0)))
AnnaBridge 184:08ed48f1de7f 2410 #define TSB_TB4_CR_TRGSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB4->CR,1)))
AnnaBridge 184:08ed48f1de7f 2411 #define TSB_TB4_CR_I2TB (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB4->CR,3)))
AnnaBridge 184:08ed48f1de7f 2412 #define TSB_TB4_CR_TBSYNC (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB4->CR,5)))
AnnaBridge 184:08ed48f1de7f 2413 #define TSB_TB4_CR_TBWBF (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB4->CR,7)))
AnnaBridge 184:08ed48f1de7f 2414 #define TSB_TB4_MOD_TBCLE (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB4->MOD,3)))
AnnaBridge 184:08ed48f1de7f 2415 #define TSB_TB4_MOD_TBCP (*((__O uint32_t *)BITBAND_PERI(&TSB_TB4->MOD,6)))
AnnaBridge 184:08ed48f1de7f 2416 #define TSB_TB4_FFCR_TBE0T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB4->FFCR,2)))
AnnaBridge 184:08ed48f1de7f 2417 #define TSB_TB4_FFCR_TBE1T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB4->FFCR,3)))
AnnaBridge 184:08ed48f1de7f 2418 #define TSB_TB4_FFCR_TBC0T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB4->FFCR,4)))
AnnaBridge 184:08ed48f1de7f 2419 #define TSB_TB4_FFCR_TBC1T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB4->FFCR,5)))
AnnaBridge 184:08ed48f1de7f 2420 #define TSB_TB4_IM_TBIM0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB4->IM,0)))
AnnaBridge 184:08ed48f1de7f 2421 #define TSB_TB4_IM_TBIM1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB4->IM,1)))
AnnaBridge 184:08ed48f1de7f 2422 #define TSB_TB4_IM_TBIMOF (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB4->IM,2)))
AnnaBridge 184:08ed48f1de7f 2423
AnnaBridge 184:08ed48f1de7f 2424 #define TSB_TB5_EN_TBHALT (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB5->EN,6)))
AnnaBridge 184:08ed48f1de7f 2425 #define TSB_TB5_EN_TBEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB5->EN,7)))
AnnaBridge 184:08ed48f1de7f 2426 #define TSB_TB5_RUN_TBRUN (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB5->RUN,0)))
AnnaBridge 184:08ed48f1de7f 2427 #define TSB_TB5_RUN_TBPRUN (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB5->RUN,2)))
AnnaBridge 184:08ed48f1de7f 2428 #define TSB_TB5_CR_CSSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB5->CR,0)))
AnnaBridge 184:08ed48f1de7f 2429 #define TSB_TB5_CR_TRGSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB5->CR,1)))
AnnaBridge 184:08ed48f1de7f 2430 #define TSB_TB5_CR_I2TB (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB5->CR,3)))
AnnaBridge 184:08ed48f1de7f 2431 #define TSB_TB5_CR_TBSYNC (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB5->CR,5)))
AnnaBridge 184:08ed48f1de7f 2432 #define TSB_TB5_CR_TBWBF (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB5->CR,7)))
AnnaBridge 184:08ed48f1de7f 2433 #define TSB_TB5_MOD_TBCLE (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB5->MOD,3)))
AnnaBridge 184:08ed48f1de7f 2434 #define TSB_TB5_MOD_TBCP (*((__O uint32_t *)BITBAND_PERI(&TSB_TB5->MOD,6)))
AnnaBridge 184:08ed48f1de7f 2435 #define TSB_TB5_FFCR_TBE0T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB5->FFCR,2)))
AnnaBridge 184:08ed48f1de7f 2436 #define TSB_TB5_FFCR_TBE1T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB5->FFCR,3)))
AnnaBridge 184:08ed48f1de7f 2437 #define TSB_TB5_FFCR_TBC0T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB5->FFCR,4)))
AnnaBridge 184:08ed48f1de7f 2438 #define TSB_TB5_FFCR_TBC1T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB5->FFCR,5)))
AnnaBridge 184:08ed48f1de7f 2439 #define TSB_TB5_IM_TBIM0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB5->IM,0)))
AnnaBridge 184:08ed48f1de7f 2440 #define TSB_TB5_IM_TBIM1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB5->IM,1)))
AnnaBridge 184:08ed48f1de7f 2441 #define TSB_TB5_IM_TBIMOF (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB5->IM,2)))
AnnaBridge 184:08ed48f1de7f 2442
AnnaBridge 184:08ed48f1de7f 2443 #define TSB_TB6_EN_TBHALT (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB6->EN,6)))
AnnaBridge 184:08ed48f1de7f 2444 #define TSB_TB6_EN_TBEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB6->EN,7)))
AnnaBridge 184:08ed48f1de7f 2445 #define TSB_TB6_RUN_TBRUN (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB6->RUN,0)))
AnnaBridge 184:08ed48f1de7f 2446 #define TSB_TB6_RUN_TBPRUN (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB6->RUN,2)))
AnnaBridge 184:08ed48f1de7f 2447 #define TSB_TB6_CR_CSSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB6->CR,0)))
AnnaBridge 184:08ed48f1de7f 2448 #define TSB_TB6_CR_TRGSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB6->CR,1)))
AnnaBridge 184:08ed48f1de7f 2449 #define TSB_TB6_CR_I2TB (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB6->CR,3)))
AnnaBridge 184:08ed48f1de7f 2450 #define TSB_TB6_CR_TBSYNC (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB6->CR,5)))
AnnaBridge 184:08ed48f1de7f 2451 #define TSB_TB6_CR_TBWBF (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB6->CR,7)))
AnnaBridge 184:08ed48f1de7f 2452 #define TSB_TB6_MOD_TBCLE (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB6->MOD,3)))
AnnaBridge 184:08ed48f1de7f 2453 #define TSB_TB6_MOD_TBCP (*((__O uint32_t *)BITBAND_PERI(&TSB_TB6->MOD,6)))
AnnaBridge 184:08ed48f1de7f 2454 #define TSB_TB6_FFCR_TBE0T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB6->FFCR,2)))
AnnaBridge 184:08ed48f1de7f 2455 #define TSB_TB6_FFCR_TBE1T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB6->FFCR,3)))
AnnaBridge 184:08ed48f1de7f 2456 #define TSB_TB6_FFCR_TBC0T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB6->FFCR,4)))
AnnaBridge 184:08ed48f1de7f 2457 #define TSB_TB6_FFCR_TBC1T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB6->FFCR,5)))
AnnaBridge 184:08ed48f1de7f 2458 #define TSB_TB6_IM_TBIM0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB6->IM,0)))
AnnaBridge 184:08ed48f1de7f 2459 #define TSB_TB6_IM_TBIM1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB6->IM,1)))
AnnaBridge 184:08ed48f1de7f 2460 #define TSB_TB6_IM_TBIMOF (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB6->IM,2)))
AnnaBridge 184:08ed48f1de7f 2461
AnnaBridge 184:08ed48f1de7f 2462 #define TSB_TB7_EN_TBHALT (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB7->EN,6)))
AnnaBridge 184:08ed48f1de7f 2463 #define TSB_TB7_EN_TBEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB7->EN,7)))
AnnaBridge 184:08ed48f1de7f 2464 #define TSB_TB7_RUN_TBRUN (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB7->RUN,0)))
AnnaBridge 184:08ed48f1de7f 2465 #define TSB_TB7_RUN_TBPRUN (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB7->RUN,2)))
AnnaBridge 184:08ed48f1de7f 2466 #define TSB_TB7_CR_CSSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB7->CR,0)))
AnnaBridge 184:08ed48f1de7f 2467 #define TSB_TB7_CR_TRGSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB7->CR,1)))
AnnaBridge 184:08ed48f1de7f 2468 #define TSB_TB7_CR_I2TB (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB7->CR,3)))
AnnaBridge 184:08ed48f1de7f 2469 #define TSB_TB7_CR_TBSYNC (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB7->CR,5)))
AnnaBridge 184:08ed48f1de7f 2470 #define TSB_TB7_CR_TBWBF (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB7->CR,7)))
AnnaBridge 184:08ed48f1de7f 2471 #define TSB_TB7_MOD_TBCLE (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB7->MOD,3)))
AnnaBridge 184:08ed48f1de7f 2472 #define TSB_TB7_MOD_TBCP (*((__O uint32_t *)BITBAND_PERI(&TSB_TB7->MOD,6)))
AnnaBridge 184:08ed48f1de7f 2473 #define TSB_TB7_FFCR_TBE0T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB7->FFCR,2)))
AnnaBridge 184:08ed48f1de7f 2474 #define TSB_TB7_FFCR_TBE1T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB7->FFCR,3)))
AnnaBridge 184:08ed48f1de7f 2475 #define TSB_TB7_FFCR_TBC0T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB7->FFCR,4)))
AnnaBridge 184:08ed48f1de7f 2476 #define TSB_TB7_FFCR_TBC1T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB7->FFCR,5)))
AnnaBridge 184:08ed48f1de7f 2477 #define TSB_TB7_IM_TBIM0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB7->IM,0)))
AnnaBridge 184:08ed48f1de7f 2478 #define TSB_TB7_IM_TBIM1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB7->IM,1)))
AnnaBridge 184:08ed48f1de7f 2479 #define TSB_TB7_IM_TBIMOF (*((__IO uint32_t *)BITBAND_PERI(&TSB_TB7->IM,2)))
AnnaBridge 184:08ed48f1de7f 2480
AnnaBridge 184:08ed48f1de7f 2481
AnnaBridge 184:08ed48f1de7f 2482 /* 16-bit Multi-Purpose Timer (MPT-TMR/IGBT) */
AnnaBridge 184:08ed48f1de7f 2483 #define TSB_MT0_EN_MTMODE (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->EN,0)))
AnnaBridge 184:08ed48f1de7f 2484 #define TSB_MT0_EN_MTHALT (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->EN,6)))
AnnaBridge 184:08ed48f1de7f 2485 #define TSB_MT0_EN_MTEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->EN,7)))
AnnaBridge 184:08ed48f1de7f 2486 #define TSB_MT0_RUN_MTRUN (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->RUN,0)))
AnnaBridge 184:08ed48f1de7f 2487 #define TSB_MT0_RUN_MTPRUN (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->RUN,2)))
AnnaBridge 184:08ed48f1de7f 2488 #define TSB_MT0_TBCR_MTTBCSSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->TBCR,0)))
AnnaBridge 184:08ed48f1de7f 2489 #define TSB_MT0_TBCR_MTTBTRGSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->TBCR,1)))
AnnaBridge 184:08ed48f1de7f 2490 #define TSB_MT0_TBCR_MTI2TB (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->TBCR,3)))
AnnaBridge 184:08ed48f1de7f 2491 #define TSB_MT0_TBCR_MTTBWBF (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->TBCR,7)))
AnnaBridge 184:08ed48f1de7f 2492 #define TSB_MT0_TBMOD_MTTBCLE (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->TBMOD,2)))
AnnaBridge 184:08ed48f1de7f 2493 #define TSB_MT0_TBMOD_MTTBCP (*((__O uint32_t *)BITBAND_PERI(&TSB_MT0->TBMOD,5)))
AnnaBridge 184:08ed48f1de7f 2494 #define TSB_MT0_TBMOD_MTTBRSWR (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->TBMOD,6)))
AnnaBridge 184:08ed48f1de7f 2495 #define TSB_MT0_TBFFCR_MTTBE0T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->TBFFCR,2)))
AnnaBridge 184:08ed48f1de7f 2496 #define TSB_MT0_TBFFCR_MTTBE1T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->TBFFCR,3)))
AnnaBridge 184:08ed48f1de7f 2497 #define TSB_MT0_TBFFCR_MTTBC0T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->TBFFCR,4)))
AnnaBridge 184:08ed48f1de7f 2498 #define TSB_MT0_TBFFCR_MTTBC1T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->TBFFCR,5)))
AnnaBridge 184:08ed48f1de7f 2499 #define TSB_MT0_TBST_MTTBINTTB0 (*((__I uint32_t *)BITBAND_PERI(&TSB_MT0->TBST,0)))
AnnaBridge 184:08ed48f1de7f 2500 #define TSB_MT0_TBST_MTTBINTTB1 (*((__I uint32_t *)BITBAND_PERI(&TSB_MT0->TBST,1)))
AnnaBridge 184:08ed48f1de7f 2501 #define TSB_MT0_TBST_MTTBINTTBOF (*((__I uint32_t *)BITBAND_PERI(&TSB_MT0->TBST,2)))
AnnaBridge 184:08ed48f1de7f 2502 #define TSB_MT0_TBIM_MTTBIM0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->TBIM,0)))
AnnaBridge 184:08ed48f1de7f 2503 #define TSB_MT0_TBIM_MTTBIM1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->TBIM,1)))
AnnaBridge 184:08ed48f1de7f 2504 #define TSB_MT0_TBIM_MTTBIMOF (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->TBIM,2)))
AnnaBridge 184:08ed48f1de7f 2505 #define TSB_MT0_IGCR_IGSNGL (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->IGCR,6)))
AnnaBridge 184:08ed48f1de7f 2506 #define TSB_MT0_IGCR_IGCLSYNC (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->IGCR,7)))
AnnaBridge 184:08ed48f1de7f 2507 #define TSB_MT0_IGCR_IGIDIS (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->IGCR,10)))
AnnaBridge 184:08ed48f1de7f 2508 #define TSB_MT0_IGRESTA_IGRESTA (*((__O uint32_t *)BITBAND_PERI(&TSB_MT0->IGRESTA,0)))
AnnaBridge 184:08ed48f1de7f 2509 #define TSB_MT0_IGST_IGST (*((__I uint32_t *)BITBAND_PERI(&TSB_MT0->IGST,0)))
AnnaBridge 184:08ed48f1de7f 2510 #define TSB_MT0_IGICR_IGTRGSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->IGICR,6)))
AnnaBridge 184:08ed48f1de7f 2511 #define TSB_MT0_IGICR_IGTRGM (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->IGICR,7)))
AnnaBridge 184:08ed48f1de7f 2512 #define TSB_MT0_IGOCR_IGOEN0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->IGOCR,0)))
AnnaBridge 184:08ed48f1de7f 2513 #define TSB_MT0_IGOCR_IGOEN1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->IGOCR,1)))
AnnaBridge 184:08ed48f1de7f 2514 #define TSB_MT0_IGOCR_IGPOL0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->IGOCR,4)))
AnnaBridge 184:08ed48f1de7f 2515 #define TSB_MT0_IGOCR_IGPOL1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->IGOCR,5)))
AnnaBridge 184:08ed48f1de7f 2516 #define TSB_MT0_IGEMGCR_IGEMGEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->IGEMGCR,0)))
AnnaBridge 184:08ed48f1de7f 2517 #define TSB_MT0_IGEMGCR_IGEMGOC (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT0->IGEMGCR,1)))
AnnaBridge 184:08ed48f1de7f 2518 #define TSB_MT0_IGEMGCR_IGEMGRS (*((__O uint32_t *)BITBAND_PERI(&TSB_MT0->IGEMGCR,2)))
AnnaBridge 184:08ed48f1de7f 2519 #define TSB_MT0_IGEMGST_IGEMGST (*((__I uint32_t *)BITBAND_PERI(&TSB_MT0->IGEMGST,0)))
AnnaBridge 184:08ed48f1de7f 2520 #define TSB_MT0_IGEMGST_IGEMGIN (*((__I uint32_t *)BITBAND_PERI(&TSB_MT0->IGEMGST,1)))
AnnaBridge 184:08ed48f1de7f 2521
AnnaBridge 184:08ed48f1de7f 2522 #define TSB_MT1_EN_MTMODE (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->EN,0)))
AnnaBridge 184:08ed48f1de7f 2523 #define TSB_MT1_EN_MTHALT (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->EN,6)))
AnnaBridge 184:08ed48f1de7f 2524 #define TSB_MT1_EN_MTEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->EN,7)))
AnnaBridge 184:08ed48f1de7f 2525 #define TSB_MT1_RUN_MTRUN (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->RUN,0)))
AnnaBridge 184:08ed48f1de7f 2526 #define TSB_MT1_RUN_MTPRUN (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->RUN,2)))
AnnaBridge 184:08ed48f1de7f 2527 #define TSB_MT1_TBCR_MTTBCSSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->TBCR,0)))
AnnaBridge 184:08ed48f1de7f 2528 #define TSB_MT1_TBCR_MTTBTRGSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->TBCR,1)))
AnnaBridge 184:08ed48f1de7f 2529 #define TSB_MT1_TBCR_MTI2TB (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->TBCR,3)))
AnnaBridge 184:08ed48f1de7f 2530 #define TSB_MT1_TBCR_MTTBWBF (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->TBCR,7)))
AnnaBridge 184:08ed48f1de7f 2531 #define TSB_MT1_TBMOD_MTTBCLE (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->TBMOD,2)))
AnnaBridge 184:08ed48f1de7f 2532 #define TSB_MT1_TBMOD_MTTBCP (*((__O uint32_t *)BITBAND_PERI(&TSB_MT1->TBMOD,5)))
AnnaBridge 184:08ed48f1de7f 2533 #define TSB_MT1_TBMOD_MTTBRSWR (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->TBMOD,6)))
AnnaBridge 184:08ed48f1de7f 2534 #define TSB_MT1_TBFFCR_MTTBE0T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->TBFFCR,2)))
AnnaBridge 184:08ed48f1de7f 2535 #define TSB_MT1_TBFFCR_MTTBE1T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->TBFFCR,3)))
AnnaBridge 184:08ed48f1de7f 2536 #define TSB_MT1_TBFFCR_MTTBC0T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->TBFFCR,4)))
AnnaBridge 184:08ed48f1de7f 2537 #define TSB_MT1_TBFFCR_MTTBC1T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->TBFFCR,5)))
AnnaBridge 184:08ed48f1de7f 2538 #define TSB_MT1_TBST_MTTBINTTB0 (*((__I uint32_t *)BITBAND_PERI(&TSB_MT1->TBST,0)))
AnnaBridge 184:08ed48f1de7f 2539 #define TSB_MT1_TBST_MTTBINTTB1 (*((__I uint32_t *)BITBAND_PERI(&TSB_MT1->TBST,1)))
AnnaBridge 184:08ed48f1de7f 2540 #define TSB_MT1_TBST_MTTBINTTBOF (*((__I uint32_t *)BITBAND_PERI(&TSB_MT1->TBST,2)))
AnnaBridge 184:08ed48f1de7f 2541 #define TSB_MT1_TBIM_MTTBIM0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->TBIM,0)))
AnnaBridge 184:08ed48f1de7f 2542 #define TSB_MT1_TBIM_MTTBIM1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->TBIM,1)))
AnnaBridge 184:08ed48f1de7f 2543 #define TSB_MT1_TBIM_MTTBIMOF (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->TBIM,2)))
AnnaBridge 184:08ed48f1de7f 2544 #define TSB_MT1_IGCR_IGSNGL (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->IGCR,6)))
AnnaBridge 184:08ed48f1de7f 2545 #define TSB_MT1_IGCR_IGCLSYNC (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->IGCR,7)))
AnnaBridge 184:08ed48f1de7f 2546 #define TSB_MT1_IGCR_IGIDIS (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->IGCR,10)))
AnnaBridge 184:08ed48f1de7f 2547 #define TSB_MT1_IGRESTA_IGRESTA (*((__O uint32_t *)BITBAND_PERI(&TSB_MT1->IGRESTA,0)))
AnnaBridge 184:08ed48f1de7f 2548 #define TSB_MT1_IGST_IGST (*((__I uint32_t *)BITBAND_PERI(&TSB_MT1->IGST,0)))
AnnaBridge 184:08ed48f1de7f 2549 #define TSB_MT1_IGICR_IGTRGSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->IGICR,6)))
AnnaBridge 184:08ed48f1de7f 2550 #define TSB_MT1_IGICR_IGTRGM (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->IGICR,7)))
AnnaBridge 184:08ed48f1de7f 2551 #define TSB_MT1_IGOCR_IGOEN0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->IGOCR,0)))
AnnaBridge 184:08ed48f1de7f 2552 #define TSB_MT1_IGOCR_IGOEN1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->IGOCR,1)))
AnnaBridge 184:08ed48f1de7f 2553 #define TSB_MT1_IGOCR_IGPOL0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->IGOCR,4)))
AnnaBridge 184:08ed48f1de7f 2554 #define TSB_MT1_IGOCR_IGPOL1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->IGOCR,5)))
AnnaBridge 184:08ed48f1de7f 2555 #define TSB_MT1_IGEMGCR_IGEMGEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->IGEMGCR,0)))
AnnaBridge 184:08ed48f1de7f 2556 #define TSB_MT1_IGEMGCR_IGEMGOC (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT1->IGEMGCR,1)))
AnnaBridge 184:08ed48f1de7f 2557 #define TSB_MT1_IGEMGCR_IGEMGRS (*((__O uint32_t *)BITBAND_PERI(&TSB_MT1->IGEMGCR,2)))
AnnaBridge 184:08ed48f1de7f 2558 #define TSB_MT1_IGEMGST_IGEMGST (*((__I uint32_t *)BITBAND_PERI(&TSB_MT1->IGEMGST,0)))
AnnaBridge 184:08ed48f1de7f 2559 #define TSB_MT1_IGEMGST_IGEMGIN (*((__I uint32_t *)BITBAND_PERI(&TSB_MT1->IGEMGST,1)))
AnnaBridge 184:08ed48f1de7f 2560
AnnaBridge 184:08ed48f1de7f 2561 #define TSB_MT2_EN_MTMODE (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->EN,0)))
AnnaBridge 184:08ed48f1de7f 2562 #define TSB_MT2_EN_MTHALT (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->EN,6)))
AnnaBridge 184:08ed48f1de7f 2563 #define TSB_MT2_EN_MTEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->EN,7)))
AnnaBridge 184:08ed48f1de7f 2564 #define TSB_MT2_RUN_MTRUN (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->RUN,0)))
AnnaBridge 184:08ed48f1de7f 2565 #define TSB_MT2_RUN_MTPRUN (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->RUN,2)))
AnnaBridge 184:08ed48f1de7f 2566 #define TSB_MT2_TBCR_MTTBCSSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->TBCR,0)))
AnnaBridge 184:08ed48f1de7f 2567 #define TSB_MT2_TBCR_MTTBTRGSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->TBCR,1)))
AnnaBridge 184:08ed48f1de7f 2568 #define TSB_MT2_TBCR_MTI2TB (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->TBCR,3)))
AnnaBridge 184:08ed48f1de7f 2569 #define TSB_MT2_TBCR_MTTBWBF (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->TBCR,7)))
AnnaBridge 184:08ed48f1de7f 2570 #define TSB_MT2_TBMOD_MTTBCLE (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->TBMOD,2)))
AnnaBridge 184:08ed48f1de7f 2571 #define TSB_MT2_TBMOD_MTTBCP (*((__O uint32_t *)BITBAND_PERI(&TSB_MT2->TBMOD,5)))
AnnaBridge 184:08ed48f1de7f 2572 #define TSB_MT2_TBMOD_MTTBRSWR (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->TBMOD,6)))
AnnaBridge 184:08ed48f1de7f 2573 #define TSB_MT2_TBFFCR_MTTBE0T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->TBFFCR,2)))
AnnaBridge 184:08ed48f1de7f 2574 #define TSB_MT2_TBFFCR_MTTBE1T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->TBFFCR,3)))
AnnaBridge 184:08ed48f1de7f 2575 #define TSB_MT2_TBFFCR_MTTBC0T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->TBFFCR,4)))
AnnaBridge 184:08ed48f1de7f 2576 #define TSB_MT2_TBFFCR_MTTBC1T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->TBFFCR,5)))
AnnaBridge 184:08ed48f1de7f 2577 #define TSB_MT2_TBST_MTTBINTTB0 (*((__I uint32_t *)BITBAND_PERI(&TSB_MT2->TBST,0)))
AnnaBridge 184:08ed48f1de7f 2578 #define TSB_MT2_TBST_MTTBINTTB1 (*((__I uint32_t *)BITBAND_PERI(&TSB_MT2->TBST,1)))
AnnaBridge 184:08ed48f1de7f 2579 #define TSB_MT2_TBST_MTTBINTTBOF (*((__I uint32_t *)BITBAND_PERI(&TSB_MT2->TBST,2)))
AnnaBridge 184:08ed48f1de7f 2580 #define TSB_MT2_TBIM_MTTBIM0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->TBIM,0)))
AnnaBridge 184:08ed48f1de7f 2581 #define TSB_MT2_TBIM_MTTBIM1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->TBIM,1)))
AnnaBridge 184:08ed48f1de7f 2582 #define TSB_MT2_TBIM_MTTBIMOF (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->TBIM,2)))
AnnaBridge 184:08ed48f1de7f 2583 #define TSB_MT2_IGCR_IGSNGL (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->IGCR,6)))
AnnaBridge 184:08ed48f1de7f 2584 #define TSB_MT2_IGCR_IGCLSYNC (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->IGCR,7)))
AnnaBridge 184:08ed48f1de7f 2585 #define TSB_MT2_IGCR_IGIDIS (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->IGCR,10)))
AnnaBridge 184:08ed48f1de7f 2586 #define TSB_MT2_IGRESTA_IGRESTA (*((__O uint32_t *)BITBAND_PERI(&TSB_MT2->IGRESTA,0)))
AnnaBridge 184:08ed48f1de7f 2587 #define TSB_MT2_IGST_IGST (*((__I uint32_t *)BITBAND_PERI(&TSB_MT2->IGST,0)))
AnnaBridge 184:08ed48f1de7f 2588 #define TSB_MT2_IGICR_IGTRGSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->IGICR,6)))
AnnaBridge 184:08ed48f1de7f 2589 #define TSB_MT2_IGICR_IGTRGM (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->IGICR,7)))
AnnaBridge 184:08ed48f1de7f 2590 #define TSB_MT2_IGOCR_IGOEN0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->IGOCR,0)))
AnnaBridge 184:08ed48f1de7f 2591 #define TSB_MT2_IGOCR_IGOEN1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->IGOCR,1)))
AnnaBridge 184:08ed48f1de7f 2592 #define TSB_MT2_IGOCR_IGPOL0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->IGOCR,4)))
AnnaBridge 184:08ed48f1de7f 2593 #define TSB_MT2_IGOCR_IGPOL1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->IGOCR,5)))
AnnaBridge 184:08ed48f1de7f 2594 #define TSB_MT2_IGEMGCR_IGEMGEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->IGEMGCR,0)))
AnnaBridge 184:08ed48f1de7f 2595 #define TSB_MT2_IGEMGCR_IGEMGOC (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT2->IGEMGCR,1)))
AnnaBridge 184:08ed48f1de7f 2596 #define TSB_MT2_IGEMGCR_IGEMGRS (*((__O uint32_t *)BITBAND_PERI(&TSB_MT2->IGEMGCR,2)))
AnnaBridge 184:08ed48f1de7f 2597 #define TSB_MT2_IGEMGST_IGEMGST (*((__I uint32_t *)BITBAND_PERI(&TSB_MT2->IGEMGST,0)))
AnnaBridge 184:08ed48f1de7f 2598 #define TSB_MT2_IGEMGST_IGEMGIN (*((__I uint32_t *)BITBAND_PERI(&TSB_MT2->IGEMGST,1)))
AnnaBridge 184:08ed48f1de7f 2599
AnnaBridge 184:08ed48f1de7f 2600 #define TSB_MT3_EN_MTMODE (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->EN,0)))
AnnaBridge 184:08ed48f1de7f 2601 #define TSB_MT3_EN_MTHALT (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->EN,6)))
AnnaBridge 184:08ed48f1de7f 2602 #define TSB_MT3_EN_MTEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->EN,7)))
AnnaBridge 184:08ed48f1de7f 2603 #define TSB_MT3_RUN_MTRUN (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->RUN,0)))
AnnaBridge 184:08ed48f1de7f 2604 #define TSB_MT3_RUN_MTPRUN (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->RUN,2)))
AnnaBridge 184:08ed48f1de7f 2605 #define TSB_MT3_TBCR_MTTBCSSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->TBCR,0)))
AnnaBridge 184:08ed48f1de7f 2606 #define TSB_MT3_TBCR_MTTBTRGSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->TBCR,1)))
AnnaBridge 184:08ed48f1de7f 2607 #define TSB_MT3_TBCR_MTI2TB (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->TBCR,3)))
AnnaBridge 184:08ed48f1de7f 2608 #define TSB_MT3_TBCR_MTTBWBF (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->TBCR,7)))
AnnaBridge 184:08ed48f1de7f 2609 #define TSB_MT3_TBMOD_MTTBCLE (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->TBMOD,2)))
AnnaBridge 184:08ed48f1de7f 2610 #define TSB_MT3_TBMOD_MTTBCP (*((__O uint32_t *)BITBAND_PERI(&TSB_MT3->TBMOD,5)))
AnnaBridge 184:08ed48f1de7f 2611 #define TSB_MT3_TBMOD_MTTBRSWR (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->TBMOD,6)))
AnnaBridge 184:08ed48f1de7f 2612 #define TSB_MT3_TBFFCR_MTTBE0T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->TBFFCR,2)))
AnnaBridge 184:08ed48f1de7f 2613 #define TSB_MT3_TBFFCR_MTTBE1T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->TBFFCR,3)))
AnnaBridge 184:08ed48f1de7f 2614 #define TSB_MT3_TBFFCR_MTTBC0T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->TBFFCR,4)))
AnnaBridge 184:08ed48f1de7f 2615 #define TSB_MT3_TBFFCR_MTTBC1T1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->TBFFCR,5)))
AnnaBridge 184:08ed48f1de7f 2616 #define TSB_MT3_TBST_MTTBINTTB0 (*((__I uint32_t *)BITBAND_PERI(&TSB_MT3->TBST,0)))
AnnaBridge 184:08ed48f1de7f 2617 #define TSB_MT3_TBST_MTTBINTTB1 (*((__I uint32_t *)BITBAND_PERI(&TSB_MT3->TBST,1)))
AnnaBridge 184:08ed48f1de7f 2618 #define TSB_MT3_TBST_MTTBINTTBOF (*((__I uint32_t *)BITBAND_PERI(&TSB_MT3->TBST,2)))
AnnaBridge 184:08ed48f1de7f 2619 #define TSB_MT3_TBIM_MTTBIM0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->TBIM,0)))
AnnaBridge 184:08ed48f1de7f 2620 #define TSB_MT3_TBIM_MTTBIM1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->TBIM,1)))
AnnaBridge 184:08ed48f1de7f 2621 #define TSB_MT3_TBIM_MTTBIMOF (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->TBIM,2)))
AnnaBridge 184:08ed48f1de7f 2622 #define TSB_MT3_IGCR_IGSNGL (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->IGCR,6)))
AnnaBridge 184:08ed48f1de7f 2623 #define TSB_MT3_IGCR_IGCLSYNC (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->IGCR,7)))
AnnaBridge 184:08ed48f1de7f 2624 #define TSB_MT3_IGCR_IGIDIS (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->IGCR,10)))
AnnaBridge 184:08ed48f1de7f 2625 #define TSB_MT3_IGRESTA_IGRESTA (*((__O uint32_t *)BITBAND_PERI(&TSB_MT3->IGRESTA,0)))
AnnaBridge 184:08ed48f1de7f 2626 #define TSB_MT3_IGST_IGST (*((__I uint32_t *)BITBAND_PERI(&TSB_MT3->IGST,0)))
AnnaBridge 184:08ed48f1de7f 2627 #define TSB_MT3_IGICR_IGTRGSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->IGICR,6)))
AnnaBridge 184:08ed48f1de7f 2628 #define TSB_MT3_IGICR_IGTRGM (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->IGICR,7)))
AnnaBridge 184:08ed48f1de7f 2629 #define TSB_MT3_IGOCR_IGOEN0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->IGOCR,0)))
AnnaBridge 184:08ed48f1de7f 2630 #define TSB_MT3_IGOCR_IGOEN1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->IGOCR,1)))
AnnaBridge 184:08ed48f1de7f 2631 #define TSB_MT3_IGOCR_IGPOL0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->IGOCR,4)))
AnnaBridge 184:08ed48f1de7f 2632 #define TSB_MT3_IGOCR_IGPOL1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->IGOCR,5)))
AnnaBridge 184:08ed48f1de7f 2633 #define TSB_MT3_IGEMGCR_IGEMGEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->IGEMGCR,0)))
AnnaBridge 184:08ed48f1de7f 2634 #define TSB_MT3_IGEMGCR_IGEMGOC (*((__IO uint32_t *)BITBAND_PERI(&TSB_MT3->IGEMGCR,1)))
AnnaBridge 184:08ed48f1de7f 2635 #define TSB_MT3_IGEMGCR_IGEMGRS (*((__O uint32_t *)BITBAND_PERI(&TSB_MT3->IGEMGCR,2)))
AnnaBridge 184:08ed48f1de7f 2636 #define TSB_MT3_IGEMGST_IGEMGST (*((__I uint32_t *)BITBAND_PERI(&TSB_MT3->IGEMGST,0)))
AnnaBridge 184:08ed48f1de7f 2637 #define TSB_MT3_IGEMGST_IGEMGIN (*((__I uint32_t *)BITBAND_PERI(&TSB_MT3->IGEMGST,1)))
AnnaBridge 184:08ed48f1de7f 2638
AnnaBridge 184:08ed48f1de7f 2639
AnnaBridge 184:08ed48f1de7f 2640 /* Real Time Clock (RTC) */
AnnaBridge 184:08ed48f1de7f 2641 #define TSB_RTC_ADJCTL_AJEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_RTC->ADJCTL,0)))
AnnaBridge 184:08ed48f1de7f 2642
AnnaBridge 184:08ed48f1de7f 2643
AnnaBridge 184:08ed48f1de7f 2644 /* Serial Channel (SC) */
AnnaBridge 184:08ed48f1de7f 2645 #define TSB_SC0_EN_SIOE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC0->EN,0)))
AnnaBridge 184:08ed48f1de7f 2646 #define TSB_SC0_EN_BRCKSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC0->EN,1)))
AnnaBridge 184:08ed48f1de7f 2647 #define TSB_SC0_MOD0_WU (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC0->MOD0,4)))
AnnaBridge 184:08ed48f1de7f 2648 #define TSB_SC0_MOD0_RXE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC0->MOD0,5)))
AnnaBridge 184:08ed48f1de7f 2649 #define TSB_SC0_MOD0_CTSE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC0->MOD0,6)))
AnnaBridge 184:08ed48f1de7f 2650 #define TSB_SC0_MOD0_TB8 (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC0->MOD0,7)))
AnnaBridge 184:08ed48f1de7f 2651 #define TSB_SC0_BRCR_BRADDE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC0->BRCR,6)))
AnnaBridge 184:08ed48f1de7f 2652 #define TSB_SC0_MOD1_TXE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC0->MOD1,4)))
AnnaBridge 184:08ed48f1de7f 2653 #define TSB_SC0_MOD1_I2SC (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC0->MOD1,7)))
AnnaBridge 184:08ed48f1de7f 2654 #define TSB_SC0_MOD2_WBUF (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC0->MOD2,2)))
AnnaBridge 184:08ed48f1de7f 2655 #define TSB_SC0_MOD2_DRCHG (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC0->MOD2,3)))
AnnaBridge 184:08ed48f1de7f 2656 #define TSB_SC0_MOD2_SBLEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC0->MOD2,4)))
AnnaBridge 184:08ed48f1de7f 2657 #define TSB_SC0_MOD2_TXRUN (*((__I uint32_t *)BITBAND_PERI(&TSB_SC0->MOD2,5)))
AnnaBridge 184:08ed48f1de7f 2658 #define TSB_SC0_MOD2_RBFLL (*((__I uint32_t *)BITBAND_PERI(&TSB_SC0->MOD2,6)))
AnnaBridge 184:08ed48f1de7f 2659 #define TSB_SC0_MOD2_TBEMP (*((__I uint32_t *)BITBAND_PERI(&TSB_SC0->MOD2,7)))
AnnaBridge 184:08ed48f1de7f 2660 #define TSB_SC0_TST_TUR (*((__I uint32_t *)BITBAND_PERI(&TSB_SC0->TST,7)))
AnnaBridge 184:08ed48f1de7f 2661 #define TSB_SC0_FCNF_CNFG (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC0->FCNF,0)))
AnnaBridge 184:08ed48f1de7f 2662 #define TSB_SC0_FCNF_RXTXCNT (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC0->FCNF,1)))
AnnaBridge 184:08ed48f1de7f 2663 #define TSB_SC0_FCNF_RFIE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC0->FCNF,2)))
AnnaBridge 184:08ed48f1de7f 2664 #define TSB_SC0_FCNF_TFIE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC0->FCNF,3)))
AnnaBridge 184:08ed48f1de7f 2665 #define TSB_SC0_FCNF_RFST (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC0->FCNF,4)))
AnnaBridge 184:08ed48f1de7f 2666
AnnaBridge 184:08ed48f1de7f 2667 #define TSB_SC1_EN_SIOE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC1->EN,0)))
AnnaBridge 184:08ed48f1de7f 2668 #define TSB_SC1_EN_BRCKSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC1->EN,1)))
AnnaBridge 184:08ed48f1de7f 2669 #define TSB_SC1_MOD0_WU (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC1->MOD0,4)))
AnnaBridge 184:08ed48f1de7f 2670 #define TSB_SC1_MOD0_RXE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC1->MOD0,5)))
AnnaBridge 184:08ed48f1de7f 2671 #define TSB_SC1_MOD0_CTSE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC1->MOD0,6)))
AnnaBridge 184:08ed48f1de7f 2672 #define TSB_SC1_MOD0_TB8 (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC1->MOD0,7)))
AnnaBridge 184:08ed48f1de7f 2673 #define TSB_SC1_BRCR_BRADDE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC1->BRCR,6)))
AnnaBridge 184:08ed48f1de7f 2674 #define TSB_SC1_MOD1_TXE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC1->MOD1,4)))
AnnaBridge 184:08ed48f1de7f 2675 #define TSB_SC1_MOD1_I2SC (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC1->MOD1,7)))
AnnaBridge 184:08ed48f1de7f 2676 #define TSB_SC1_MOD2_WBUF (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC1->MOD2,2)))
AnnaBridge 184:08ed48f1de7f 2677 #define TSB_SC1_MOD2_DRCHG (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC1->MOD2,3)))
AnnaBridge 184:08ed48f1de7f 2678 #define TSB_SC1_MOD2_SBLEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC1->MOD2,4)))
AnnaBridge 184:08ed48f1de7f 2679 #define TSB_SC1_MOD2_TXRUN (*((__I uint32_t *)BITBAND_PERI(&TSB_SC1->MOD2,5)))
AnnaBridge 184:08ed48f1de7f 2680 #define TSB_SC1_MOD2_RBFLL (*((__I uint32_t *)BITBAND_PERI(&TSB_SC1->MOD2,6)))
AnnaBridge 184:08ed48f1de7f 2681 #define TSB_SC1_MOD2_TBEMP (*((__I uint32_t *)BITBAND_PERI(&TSB_SC1->MOD2,7)))
AnnaBridge 184:08ed48f1de7f 2682 #define TSB_SC1_TST_TUR (*((__I uint32_t *)BITBAND_PERI(&TSB_SC1->TST,7)))
AnnaBridge 184:08ed48f1de7f 2683 #define TSB_SC1_FCNF_CNFG (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC1->FCNF,0)))
AnnaBridge 184:08ed48f1de7f 2684 #define TSB_SC1_FCNF_RXTXCNT (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC1->FCNF,1)))
AnnaBridge 184:08ed48f1de7f 2685 #define TSB_SC1_FCNF_RFIE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC1->FCNF,2)))
AnnaBridge 184:08ed48f1de7f 2686 #define TSB_SC1_FCNF_TFIE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC1->FCNF,3)))
AnnaBridge 184:08ed48f1de7f 2687 #define TSB_SC1_FCNF_RFST (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC1->FCNF,4)))
AnnaBridge 184:08ed48f1de7f 2688
AnnaBridge 184:08ed48f1de7f 2689 #define TSB_SC2_EN_SIOE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC2->EN,0)))
AnnaBridge 184:08ed48f1de7f 2690 #define TSB_SC2_EN_BRCKSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC2->EN,1)))
AnnaBridge 184:08ed48f1de7f 2691 #define TSB_SC2_MOD0_WU (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC2->MOD0,4)))
AnnaBridge 184:08ed48f1de7f 2692 #define TSB_SC2_MOD0_RXE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC2->MOD0,5)))
AnnaBridge 184:08ed48f1de7f 2693 #define TSB_SC2_MOD0_CTSE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC2->MOD0,6)))
AnnaBridge 184:08ed48f1de7f 2694 #define TSB_SC2_MOD0_TB8 (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC2->MOD0,7)))
AnnaBridge 184:08ed48f1de7f 2695 #define TSB_SC2_BRCR_BRADDE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC2->BRCR,6)))
AnnaBridge 184:08ed48f1de7f 2696 #define TSB_SC2_MOD1_TXE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC2->MOD1,4)))
AnnaBridge 184:08ed48f1de7f 2697 #define TSB_SC2_MOD1_I2SC (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC2->MOD1,7)))
AnnaBridge 184:08ed48f1de7f 2698 #define TSB_SC2_MOD2_WBUF (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC2->MOD2,2)))
AnnaBridge 184:08ed48f1de7f 2699 #define TSB_SC2_MOD2_DRCHG (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC2->MOD2,3)))
AnnaBridge 184:08ed48f1de7f 2700 #define TSB_SC2_MOD2_SBLEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC2->MOD2,4)))
AnnaBridge 184:08ed48f1de7f 2701 #define TSB_SC2_MOD2_TXRUN (*((__I uint32_t *)BITBAND_PERI(&TSB_SC2->MOD2,5)))
AnnaBridge 184:08ed48f1de7f 2702 #define TSB_SC2_MOD2_RBFLL (*((__I uint32_t *)BITBAND_PERI(&TSB_SC2->MOD2,6)))
AnnaBridge 184:08ed48f1de7f 2703 #define TSB_SC2_MOD2_TBEMP (*((__I uint32_t *)BITBAND_PERI(&TSB_SC2->MOD2,7)))
AnnaBridge 184:08ed48f1de7f 2704 #define TSB_SC2_TST_TUR (*((__I uint32_t *)BITBAND_PERI(&TSB_SC2->TST,7)))
AnnaBridge 184:08ed48f1de7f 2705 #define TSB_SC2_FCNF_CNFG (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC2->FCNF,0)))
AnnaBridge 184:08ed48f1de7f 2706 #define TSB_SC2_FCNF_RXTXCNT (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC2->FCNF,1)))
AnnaBridge 184:08ed48f1de7f 2707 #define TSB_SC2_FCNF_RFIE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC2->FCNF,2)))
AnnaBridge 184:08ed48f1de7f 2708 #define TSB_SC2_FCNF_TFIE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC2->FCNF,3)))
AnnaBridge 184:08ed48f1de7f 2709 #define TSB_SC2_FCNF_RFST (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC2->FCNF,4)))
AnnaBridge 184:08ed48f1de7f 2710
AnnaBridge 184:08ed48f1de7f 2711 #define TSB_SC3_EN_SIOE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC3->EN,0)))
AnnaBridge 184:08ed48f1de7f 2712 #define TSB_SC3_EN_BRCKSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC3->EN,1)))
AnnaBridge 184:08ed48f1de7f 2713 #define TSB_SC3_MOD0_WU (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC3->MOD0,4)))
AnnaBridge 184:08ed48f1de7f 2714 #define TSB_SC3_MOD0_RXE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC3->MOD0,5)))
AnnaBridge 184:08ed48f1de7f 2715 #define TSB_SC3_MOD0_CTSE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC3->MOD0,6)))
AnnaBridge 184:08ed48f1de7f 2716 #define TSB_SC3_MOD0_TB8 (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC3->MOD0,7)))
AnnaBridge 184:08ed48f1de7f 2717 #define TSB_SC3_BRCR_BRADDE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC3->BRCR,6)))
AnnaBridge 184:08ed48f1de7f 2718 #define TSB_SC3_MOD1_TXE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC3->MOD1,4)))
AnnaBridge 184:08ed48f1de7f 2719 #define TSB_SC3_MOD1_I2SC (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC3->MOD1,7)))
AnnaBridge 184:08ed48f1de7f 2720 #define TSB_SC3_MOD2_WBUF (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC3->MOD2,2)))
AnnaBridge 184:08ed48f1de7f 2721 #define TSB_SC3_MOD2_DRCHG (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC3->MOD2,3)))
AnnaBridge 184:08ed48f1de7f 2722 #define TSB_SC3_MOD2_SBLEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC3->MOD2,4)))
AnnaBridge 184:08ed48f1de7f 2723 #define TSB_SC3_MOD2_TXRUN (*((__I uint32_t *)BITBAND_PERI(&TSB_SC3->MOD2,5)))
AnnaBridge 184:08ed48f1de7f 2724 #define TSB_SC3_MOD2_RBFLL (*((__I uint32_t *)BITBAND_PERI(&TSB_SC3->MOD2,6)))
AnnaBridge 184:08ed48f1de7f 2725 #define TSB_SC3_MOD2_TBEMP (*((__I uint32_t *)BITBAND_PERI(&TSB_SC3->MOD2,7)))
AnnaBridge 184:08ed48f1de7f 2726 #define TSB_SC3_TST_TUR (*((__I uint32_t *)BITBAND_PERI(&TSB_SC3->TST,7)))
AnnaBridge 184:08ed48f1de7f 2727 #define TSB_SC3_FCNF_CNFG (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC3->FCNF,0)))
AnnaBridge 184:08ed48f1de7f 2728 #define TSB_SC3_FCNF_RXTXCNT (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC3->FCNF,1)))
AnnaBridge 184:08ed48f1de7f 2729 #define TSB_SC3_FCNF_RFIE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC3->FCNF,2)))
AnnaBridge 184:08ed48f1de7f 2730 #define TSB_SC3_FCNF_TFIE (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC3->FCNF,3)))
AnnaBridge 184:08ed48f1de7f 2731 #define TSB_SC3_FCNF_RFST (*((__IO uint32_t *)BITBAND_PERI(&TSB_SC3->FCNF,4)))
AnnaBridge 184:08ed48f1de7f 2732
AnnaBridge 184:08ed48f1de7f 2733
AnnaBridge 184:08ed48f1de7f 2734 /* Watchdog Timer (WD) */
AnnaBridge 184:08ed48f1de7f 2735 #define TSB_WD_MOD_RESCR (*((__IO uint32_t *)BITBAND_PERI(&TSB_WD->MOD,1)))
AnnaBridge 184:08ed48f1de7f 2736 #define TSB_WD_MOD_I2WDT (*((__IO uint32_t *)BITBAND_PERI(&TSB_WD->MOD,2)))
AnnaBridge 184:08ed48f1de7f 2737 #define TSB_WD_MOD_WDTE (*((__IO uint32_t *)BITBAND_PERI(&TSB_WD->MOD,7)))
AnnaBridge 184:08ed48f1de7f 2738 #define TSB_WD_FLG_FLG (*((__I uint32_t *)BITBAND_PERI(&TSB_WD->FLG,0)))
AnnaBridge 184:08ed48f1de7f 2739
AnnaBridge 184:08ed48f1de7f 2740
AnnaBridge 184:08ed48f1de7f 2741 /* Clock Generator (CG) */
AnnaBridge 184:08ed48f1de7f 2742 #define TSB_CG_SYSCR_FPSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->SYSCR,12)))
AnnaBridge 184:08ed48f1de7f 2743 #define TSB_CG_SYSCR_FCSTOP (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->SYSCR,20)))
AnnaBridge 184:08ed48f1de7f 2744 #define TSB_CG_OSCCR_XEN1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->OSCCR,0)))
AnnaBridge 184:08ed48f1de7f 2745 #define TSB_CG_OSCCR_XEN2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->OSCCR,1)))
AnnaBridge 184:08ed48f1de7f 2746 #define TSB_CG_OSCCR_XTEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->OSCCR,3)))
AnnaBridge 184:08ed48f1de7f 2747 #define TSB_CG_OSCCR_DRVOSCL (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->OSCCR,7)))
AnnaBridge 184:08ed48f1de7f 2748 #define TSB_CG_OSCCR_OSCSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->OSCCR,8)))
AnnaBridge 184:08ed48f1de7f 2749 #define TSB_CG_OSCCR_OSCF (*((__I uint32_t *)BITBAND_PERI(&TSB_CG->OSCCR,9)))
AnnaBridge 184:08ed48f1de7f 2750 #define TSB_CG_OSCCR_HOSCON (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->OSCCR,10)))
AnnaBridge 184:08ed48f1de7f 2751 #define TSB_CG_OSCCR_DRVOSCH (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->OSCCR,12)))
AnnaBridge 184:08ed48f1de7f 2752 #define TSB_CG_OSCCR_WUEON (*((__O uint32_t *)BITBAND_PERI(&TSB_CG->OSCCR,14)))
AnnaBridge 184:08ed48f1de7f 2753 #define TSB_CG_OSCCR_WUEF (*((__I uint32_t *)BITBAND_PERI(&TSB_CG->OSCCR,15)))
AnnaBridge 184:08ed48f1de7f 2754 #define TSB_CG_OSCCR_WUPSEL1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->OSCCR,16)))
AnnaBridge 184:08ed48f1de7f 2755 #define TSB_CG_OSCCR_WUPSEL2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->OSCCR,17)))
AnnaBridge 184:08ed48f1de7f 2756 #define TSB_CG_STBYCR_PTKEEP (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->STBYCR,17)))
AnnaBridge 184:08ed48f1de7f 2757 #define TSB_CG_PLLSEL_PLLON (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->PLLSEL,16)))
AnnaBridge 184:08ed48f1de7f 2758 #define TSB_CG_PLLSEL_PLLSEL (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->PLLSEL,17)))
AnnaBridge 184:08ed48f1de7f 2759 #define TSB_CG_PLLSEL_PLLST (*((__I uint32_t *)BITBAND_PERI(&TSB_CG->PLLSEL,18)))
AnnaBridge 184:08ed48f1de7f 2760 #define TSB_CG_FSYSMSKA_PORTA (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKA,0)))
AnnaBridge 184:08ed48f1de7f 2761 #define TSB_CG_FSYSMSKA_PORTB (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKA,1)))
AnnaBridge 184:08ed48f1de7f 2762 #define TSB_CG_FSYSMSKA_PORTC (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKA,2)))
AnnaBridge 184:08ed48f1de7f 2763 #define TSB_CG_FSYSMSKA_PORTD (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKA,3)))
AnnaBridge 184:08ed48f1de7f 2764 #define TSB_CG_FSYSMSKA_PORTE (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKA,4)))
AnnaBridge 184:08ed48f1de7f 2765 #define TSB_CG_FSYSMSKA_PORTF (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKA,5)))
AnnaBridge 184:08ed48f1de7f 2766 #define TSB_CG_FSYSMSKA_PORTG (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKA,6)))
AnnaBridge 184:08ed48f1de7f 2767 #define TSB_CG_FSYSMSKA_PORTH (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKA,7)))
AnnaBridge 184:08ed48f1de7f 2768 #define TSB_CG_FSYSMSKA_PORTJ (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKA,8)))
AnnaBridge 184:08ed48f1de7f 2769 #define TSB_CG_FSYSMSKA_PORTK (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKA,9)))
AnnaBridge 184:08ed48f1de7f 2770 #define TSB_CG_FSYSMSKA_PORTL (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKA,10)))
AnnaBridge 184:08ed48f1de7f 2771 #define TSB_CG_FSYSMSKA_TMRB0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKA,13)))
AnnaBridge 184:08ed48f1de7f 2772 #define TSB_CG_FSYSMSKA_TMRB1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKA,14)))
AnnaBridge 184:08ed48f1de7f 2773 #define TSB_CG_FSYSMSKA_TMRB2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKA,15)))
AnnaBridge 184:08ed48f1de7f 2774 #define TSB_CG_FSYSMSKA_TMRB3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKA,16)))
AnnaBridge 184:08ed48f1de7f 2775 #define TSB_CG_FSYSMSKA_TMRB4 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKA,17)))
AnnaBridge 184:08ed48f1de7f 2776 #define TSB_CG_FSYSMSKA_TMRB5 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKA,18)))
AnnaBridge 184:08ed48f1de7f 2777 #define TSB_CG_FSYSMSKA_TMRB6 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKA,19)))
AnnaBridge 184:08ed48f1de7f 2778 #define TSB_CG_FSYSMSKA_TMRB7 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKA,20)))
AnnaBridge 184:08ed48f1de7f 2779 #define TSB_CG_FSYSMSKA_MPT0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKA,27)))
AnnaBridge 184:08ed48f1de7f 2780 #define TSB_CG_FSYSMSKA_MPT1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKA,28)))
AnnaBridge 184:08ed48f1de7f 2781 #define TSB_CG_FSYSMSKA_MPT2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKA,29)))
AnnaBridge 184:08ed48f1de7f 2782 #define TSB_CG_FSYSMSKA_MPT3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKA,30)))
AnnaBridge 184:08ed48f1de7f 2783 #define TSB_CG_FSYSMSKA_TRACECLK (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKA,31)))
AnnaBridge 184:08ed48f1de7f 2784 #define TSB_CG_FSYSMSKB_SIO0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKB,0)))
AnnaBridge 184:08ed48f1de7f 2785 #define TSB_CG_FSYSMSKB_SIO1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKB,1)))
AnnaBridge 184:08ed48f1de7f 2786 #define TSB_CG_FSYSMSKB_SIO2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKB,2)))
AnnaBridge 184:08ed48f1de7f 2787 #define TSB_CG_FSYSMSKB_SIO3 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKB,3)))
AnnaBridge 184:08ed48f1de7f 2788 #define TSB_CG_FSYSMSKB_UART0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKB,10)))
AnnaBridge 184:08ed48f1de7f 2789 #define TSB_CG_FSYSMSKB_UART1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKB,11)))
AnnaBridge 184:08ed48f1de7f 2790 #define TSB_CG_FSYSMSKB_I2C0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKB,12)))
AnnaBridge 184:08ed48f1de7f 2791 #define TSB_CG_FSYSMSKB_I2C1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKB,13)))
AnnaBridge 184:08ed48f1de7f 2792 #define TSB_CG_FSYSMSKB_I2C2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKB,14)))
AnnaBridge 184:08ed48f1de7f 2793 #define TSB_CG_FSYSMSKB_SSP0 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKB,17)))
AnnaBridge 184:08ed48f1de7f 2794 #define TSB_CG_FSYSMSKB_SSP1 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKB,18)))
AnnaBridge 184:08ed48f1de7f 2795 #define TSB_CG_FSYSMSKB_SSP2 (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKB,19)))
AnnaBridge 184:08ed48f1de7f 2796 #define TSB_CG_FSYSMSKB_EBIF (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKB,20)))
AnnaBridge 184:08ed48f1de7f 2797 #define TSB_CG_FSYSMSKB_DMAA (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKB,21)))
AnnaBridge 184:08ed48f1de7f 2798 #define TSB_CG_FSYSMSKB_DMAB (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKB,22)))
AnnaBridge 184:08ed48f1de7f 2799 #define TSB_CG_FSYSMSKB_DMAC (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKB,23)))
AnnaBridge 184:08ed48f1de7f 2800 #define TSB_CG_FSYSMSKB_DMAIF (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKB,24)))
AnnaBridge 184:08ed48f1de7f 2801 #define TSB_CG_FSYSMSKB_ADC (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKB,25)))
AnnaBridge 184:08ed48f1de7f 2802 #define TSB_CG_FSYSMSKB_WDT (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKB,26)))
AnnaBridge 184:08ed48f1de7f 2803 #define TSB_CG_FSYSMSKB_AES (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKB,28)))
AnnaBridge 184:08ed48f1de7f 2804 #define TSB_CG_FSYSMSKB_SHA (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKB,29)))
AnnaBridge 184:08ed48f1de7f 2805 #define TSB_CG_FSYSMSKB_ESG (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKB,30)))
AnnaBridge 184:08ed48f1de7f 2806 #define TSB_CG_FSYSMSKB_MLA (*((__I uint32_t *)BITBAND_PERI(&TSB_CG->FSYSMSKB,31)))
AnnaBridge 184:08ed48f1de7f 2807 #define TSB_CG_IMCGA_INT00EN (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->IMCGA,0)))
AnnaBridge 184:08ed48f1de7f 2808 #define TSB_CG_IMCGA_INT01EN (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->IMCGA,8)))
AnnaBridge 184:08ed48f1de7f 2809 #define TSB_CG_IMCGA_INT02EN (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->IMCGA,16)))
AnnaBridge 184:08ed48f1de7f 2810 #define TSB_CG_IMCGA_INT03EN (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->IMCGA,24)))
AnnaBridge 184:08ed48f1de7f 2811 #define TSB_CG_IMCGB_INT04EN (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->IMCGB,0)))
AnnaBridge 184:08ed48f1de7f 2812 #define TSB_CG_IMCGB_INT05EN (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->IMCGB,8)))
AnnaBridge 184:08ed48f1de7f 2813 #define TSB_CG_IMCGB_INT06EN (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->IMCGB,16)))
AnnaBridge 184:08ed48f1de7f 2814 #define TSB_CG_IMCGB_INT07EN (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->IMCGB,24)))
AnnaBridge 184:08ed48f1de7f 2815 #define TSB_CG_RSTFLG_PINRSTF (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->RSTFLG,0)))
AnnaBridge 184:08ed48f1de7f 2816 #define TSB_CG_RSTFLG_OSCFLF (*((__I uint32_t *)BITBAND_PERI(&TSB_CG->RSTFLG,1)))
AnnaBridge 184:08ed48f1de7f 2817 #define TSB_CG_RSTFLG_WDTRSTF (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->RSTFLG,2)))
AnnaBridge 184:08ed48f1de7f 2818 #define TSB_CG_RSTFLG_BUPRSTF (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->RSTFLG,3)))
AnnaBridge 184:08ed48f1de7f 2819 #define TSB_CG_RSTFLG_SYSRSTF (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->RSTFLG,4)))
AnnaBridge 184:08ed48f1de7f 2820 #define TSB_CG_RSTFLG_LVDRSTF (*((__IO uint32_t *)BITBAND_PERI(&TSB_CG->RSTFLG,6)))
AnnaBridge 184:08ed48f1de7f 2821
AnnaBridge 184:08ed48f1de7f 2822
AnnaBridge 184:08ed48f1de7f 2823 /* Low voltage detecter */
AnnaBridge 184:08ed48f1de7f 2824 #define TSB_LVD_CR1_EN (*((__IO uint32_t *)BITBAND_PERI(&TSB_LVD->CR1,0)))
AnnaBridge 184:08ed48f1de7f 2825 #define TSB_LVD_CR1_INTEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_LVD->CR1,5)))
AnnaBridge 184:08ed48f1de7f 2826 #define TSB_LVD_CR1_RSTEN (*((__IO uint32_t *)BITBAND_PERI(&TSB_LVD->CR1,6)))
AnnaBridge 184:08ed48f1de7f 2827 #define TSB_LVD_CR1_ST (*((__I uint32_t *)BITBAND_PERI(&TSB_LVD->CR1,7)))
AnnaBridge 184:08ed48f1de7f 2828
AnnaBridge 184:08ed48f1de7f 2829 /** @} */ /* End of group Device_Peripheral_registers */
AnnaBridge 184:08ed48f1de7f 2830
AnnaBridge 184:08ed48f1de7f 2831 #ifdef __cplusplus
AnnaBridge 184:08ed48f1de7f 2832 }
AnnaBridge 184:08ed48f1de7f 2833 #endif
AnnaBridge 184:08ed48f1de7f 2834
AnnaBridge 184:08ed48f1de7f 2835 #endif /* __TMPM46B_H__ */
AnnaBridge 184:08ed48f1de7f 2836
AnnaBridge 184:08ed48f1de7f 2837 /** @} */ /* End of group TMPM46B */
AnnaBridge 184:08ed48f1de7f 2838 /** @} */ /* End of group TOSHIBA_TX04_MICROCONTROLLER */