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MPU6050.cpp@5:bdb6ad020352, 2013-02-20 (annotated)

Committer:: pommzorz
Date:: Wed Feb 20 18:29:30 2013 +0000
Revision:: 5:bdb6ad020352
Parent:: 4:ba1cf80aeef0
Parent:: 3:8a6a7d6b6816
Child:: 6:40ac13ef7290

Zboub

Who changed what in which revision?

User	Revision	Line number	New contents of line
garfieldsg	0:662207e34fba	1	//ported from arduino library: https://github.com/jrowberg/i2cdevlib/tree/master/Arduino/MPU6050
garfieldsg	0:662207e34fba	2	//written by szymon gaertig (email: szymon@gaertig.com.pl)
garfieldsg	0:662207e34fba	3	//
garfieldsg	0:662207e34fba	4	//Changelog:
garfieldsg	0:662207e34fba	5	//2013-01-08 - first beta release
garfieldsg	0:662207e34fba	6
garfieldsg	0:662207e34fba	7	// I2Cdev library collection - MPU6050 I2C device class
garfieldsg	0:662207e34fba	8	// Based on InvenSense MPU-6050 register map document rev. 2.0, 5/19/2011 (RM-MPU-6000A-00)
garfieldsg	0:662207e34fba	9	// 8/24/2011 by Jeff Rowberg <jeff@rowberg.net>
garfieldsg	0:662207e34fba	10	// Updates should (hopefully) always be available at https://github.com/jrowberg/i2cdevlib
garfieldsg	0:662207e34fba	11	//
garfieldsg	0:662207e34fba	12	// Changelog:
garfieldsg	0:662207e34fba	13	// ... - ongoing debug release
garfieldsg	0:662207e34fba	14
garfieldsg	0:662207e34fba	15	// NOTE: THIS IS ONLY A PARIAL RELEASE. THIS DEVICE CLASS IS CURRENTLY UNDERGOING ACTIVE
garfieldsg	0:662207e34fba	16	// DEVELOPMENT AND IS STILL MISSING SOME IMPORTANT FEATURES. PLEASE KEEP THIS IN MIND IF
garfieldsg	0:662207e34fba	17	// YOU DECIDE TO USE THIS PARTICULAR CODE FOR ANYTHING.
garfieldsg	0:662207e34fba	18
garfieldsg	0:662207e34fba	19	/* ============================================
garfieldsg	0:662207e34fba	20	I2Cdev device library code is placed under the MIT license
garfieldsg	0:662207e34fba	21	Copyright (c) 2012 Jeff Rowberg
garfieldsg	0:662207e34fba	22
garfieldsg	0:662207e34fba	23	Permission is hereby granted, free of charge, to any person obtaining a copy
garfieldsg	0:662207e34fba	24	of this software and associated documentation files (the "Software"), to deal
garfieldsg	0:662207e34fba	25	in the Software without restriction, including without limitation the rights
garfieldsg	0:662207e34fba	26	to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
garfieldsg	0:662207e34fba	27	copies of the Software, and to permit persons to whom the Software is
garfieldsg	0:662207e34fba	28	furnished to do so, subject to the following conditions:
garfieldsg	0:662207e34fba	29
garfieldsg	0:662207e34fba	30	The above copyright notice and this permission notice shall be included in
garfieldsg	0:662207e34fba	31	all copies or substantial portions of the Software.
garfieldsg	0:662207e34fba	32
garfieldsg	0:662207e34fba	33	THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
garfieldsg	0:662207e34fba	34	IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
garfieldsg	0:662207e34fba	35	FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
garfieldsg	0:662207e34fba	36	AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
garfieldsg	0:662207e34fba	37	LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
garfieldsg	0:662207e34fba	38	OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
garfieldsg	0:662207e34fba	39	THE SOFTWARE.
garfieldsg	0:662207e34fba	40	===============================================
garfieldsg	0:662207e34fba	41	*/
garfieldsg	0:662207e34fba	42
garfieldsg	0:662207e34fba	43	#include "MPU6050.h"
garfieldsg	0:662207e34fba	44
pommzorz	3:8a6a7d6b6816	45	//#define useDebugSerial
garfieldsg	0:662207e34fba	46
garfieldsg	0:662207e34fba	47	//instead of using pgmspace.h
garfieldsg	0:662207e34fba	48	typedef const unsigned char prog_uchar;
garfieldsg	0:662207e34fba	49	#define pgm_read_byte_near(x) ((prog_uchar)x)
garfieldsg	0:662207e34fba	50	#define pgm_read_byte(x) ((prog_uchar)x)
garfieldsg	0:662207e34fba	51
garfieldsg	0:662207e34fba	52	/** Default constructor, uses default I2C address.
garfieldsg	0:662207e34fba	53	* @see MPU6050_DEFAULT_ADDRESS
garfieldsg	0:662207e34fba	54	*/
garfieldsg	0:662207e34fba	55	MPU6050::MPU6050() : debugSerial(USBTX, USBRX)
garfieldsg	0:662207e34fba	56	{
garfieldsg	0:662207e34fba	57	devAddr = MPU6050_DEFAULT_ADDRESS;
garfieldsg	0:662207e34fba	58	}
garfieldsg	0:662207e34fba	59
garfieldsg	0:662207e34fba	60	/** Specific address constructor.
garfieldsg	0:662207e34fba	61	* @param address I2C address
garfieldsg	0:662207e34fba	62	* @see MPU6050_DEFAULT_ADDRESS
garfieldsg	0:662207e34fba	63	* @see MPU6050_ADDRESS_AD0_LOW
garfieldsg	0:662207e34fba	64	* @see MPU6050_ADDRESS_AD0_HIGH
garfieldsg	0:662207e34fba	65	*/
garfieldsg	0:662207e34fba	66	MPU6050::MPU6050(uint8_t address) : debugSerial(USBTX, USBRX)
garfieldsg	0:662207e34fba	67	{
garfieldsg	0:662207e34fba	68	devAddr = address;
garfieldsg	0:662207e34fba	69	}
garfieldsg	0:662207e34fba	70
garfieldsg	0:662207e34fba	71	/** Power on and prepare for general usage.
garfieldsg	0:662207e34fba	72	* This will activate the device and take it out of sleep mode (which must be done
garfieldsg	0:662207e34fba	73	* after start-up). This function also sets both the accelerometer and the gyroscope
garfieldsg	0:662207e34fba	74	* to their most sensitive settings, namely +/- 2g and +/- 250 degrees/sec, and sets
garfieldsg	0:662207e34fba	75	* the clock source to use the X Gyro for reference, which is slightly better than
garfieldsg	0:662207e34fba	76	* the default internal clock source.
garfieldsg	0:662207e34fba	77	*/
garfieldsg	0:662207e34fba	78	void MPU6050::initialize()
garfieldsg	0:662207e34fba	79	{
garfieldsg	0:662207e34fba	80
pommzorz	4:ba1cf80aeef0	81	debugSerial.baud(921600); //uses max serial speed
garfieldsg	0:662207e34fba	82	#ifdef useDebugSerial
pommzorz	3:8a6a7d6b6816	83
pommzorz	3:8a6a7d6b6816	84	debugSerial.baud(921600);
garfieldsg	0:662207e34fba	85	debugSerial.printf("MPU6050::initialize start\n");
garfieldsg	0:662207e34fba	86	#endif
garfieldsg	0:662207e34fba	87	setClockSource(MPU6050_CLOCK_PLL_XGYRO);
garfieldsg	0:662207e34fba	88	setFullScaleGyroRange(MPU6050_GYRO_FS_250);
garfieldsg	0:662207e34fba	89	setFullScaleAccelRange(MPU6050_ACCEL_FS_2);
garfieldsg	0:662207e34fba	90	setSleepEnabled(false); // thanks to Jack Elston for pointing this one out!
garfieldsg	0:662207e34fba	91
garfieldsg	0:662207e34fba	92	#ifdef useDebugSerial
garfieldsg	0:662207e34fba	93	debugSerial.printf("MPU6050::initialize end\n");
garfieldsg	0:662207e34fba	94	#endif
garfieldsg	0:662207e34fba	95	}
garfieldsg	0:662207e34fba	96
garfieldsg	0:662207e34fba	97	/** Verify the I2C connection.
garfieldsg	0:662207e34fba	98	* Make sure the device is connected and responds as expected.
garfieldsg	0:662207e34fba	99	* @return True if connection is valid, false otherwise
garfieldsg	0:662207e34fba	100	*/
garfieldsg	0:662207e34fba	101	bool MPU6050::testConnection()
garfieldsg	0:662207e34fba	102	{
garfieldsg	0:662207e34fba	103	#ifdef useDebugSerial
garfieldsg	0:662207e34fba	104	debugSerial.printf("MPU6050::testConnection start\n");
garfieldsg	0:662207e34fba	105	#endif
garfieldsg	0:662207e34fba	106	uint8_t deviceId = getDeviceID();
garfieldsg	0:662207e34fba	107	#ifdef useDebugSerial
garfieldsg	0:662207e34fba	108	debugSerial.printf("DeviceId = %d\n",deviceId);
garfieldsg	0:662207e34fba	109	#endif
garfieldsg	0:662207e34fba	110	return deviceId == 0x34;
garfieldsg	0:662207e34fba	111	}
garfieldsg	0:662207e34fba	112
garfieldsg	0:662207e34fba	113	// AUX_VDDIO register (InvenSense demo code calls this RA_*G_OFFS_TC)
garfieldsg	0:662207e34fba	114
garfieldsg	0:662207e34fba	115	/** Get the auxiliary I2C supply voltage level.
garfieldsg	0:662207e34fba	116	* When set to 1, the auxiliary I2C bus high logic level is VDD. When cleared to
garfieldsg	0:662207e34fba	117	* 0, the auxiliary I2C bus high logic level is VLOGIC. This does not apply to
garfieldsg	0:662207e34fba	118	* the MPU-6000, which does not have a VLOGIC pin.
garfieldsg	0:662207e34fba	119	* @return I2C supply voltage level (0=VLOGIC, 1=VDD)
garfieldsg	0:662207e34fba	120	*/
garfieldsg	0:662207e34fba	121	uint8_t MPU6050::getAuxVDDIOLevel()
garfieldsg	0:662207e34fba	122	{
garfieldsg	0:662207e34fba	123	i2Cdev.readBit(devAddr, MPU6050_RA_YG_OFFS_TC, MPU6050_TC_PWR_MODE_BIT, buffer);
garfieldsg	0:662207e34fba	124	return buffer[0];
garfieldsg	0:662207e34fba	125	}
garfieldsg	0:662207e34fba	126	/** Set the auxiliary I2C supply voltage level.
garfieldsg	0:662207e34fba	127	* When set to 1, the auxiliary I2C bus high logic level is VDD. When cleared to
garfieldsg	0:662207e34fba	128	* 0, the auxiliary I2C bus high logic level is VLOGIC. This does not apply to
garfieldsg	0:662207e34fba	129	* the MPU-6000, which does not have a VLOGIC pin.
garfieldsg	0:662207e34fba	130	* @param level I2C supply voltage level (0=VLOGIC, 1=VDD)
garfieldsg	0:662207e34fba	131	*/
garfieldsg	0:662207e34fba	132	void MPU6050::setAuxVDDIOLevel(uint8_t level)
garfieldsg	0:662207e34fba	133	{
garfieldsg	0:662207e34fba	134	i2Cdev.writeBit(devAddr, MPU6050_RA_YG_OFFS_TC, MPU6050_TC_PWR_MODE_BIT, level);
garfieldsg	0:662207e34fba	135	}
garfieldsg	0:662207e34fba	136
garfieldsg	0:662207e34fba	137	// SMPLRT_DIV register
garfieldsg	0:662207e34fba	138
garfieldsg	0:662207e34fba	139	/** Get gyroscope output rate divider.
garfieldsg	0:662207e34fba	140	* The sensor register output, FIFO output, DMP sampling, Motion detection, Zero
garfieldsg	0:662207e34fba	141	* Motion detection, and Free Fall detection are all based on the Sample Rate.
garfieldsg	0:662207e34fba	142	* The Sample Rate is generated by dividing the gyroscope output rate by
garfieldsg	0:662207e34fba	143	* SMPLRT_DIV:
garfieldsg	0:662207e34fba	144	*
garfieldsg	0:662207e34fba	145	* Sample Rate = Gyroscope Output Rate / (1 + SMPLRT_DIV)
garfieldsg	0:662207e34fba	146	*
garfieldsg	0:662207e34fba	147	* where Gyroscope Output Rate = 8kHz when the DLPF is disabled (DLPF_CFG = 0 or
garfieldsg	0:662207e34fba	148	* 7), and 1kHz when the DLPF is enabled (see Register 26).
garfieldsg	0:662207e34fba	149	*
garfieldsg	0:662207e34fba	150	* Note: The accelerometer output rate is 1kHz. This means that for a Sample
garfieldsg	0:662207e34fba	151	* Rate greater than 1kHz, the same accelerometer sample may be output to the
garfieldsg	0:662207e34fba	152	* FIFO, DMP, and sensor registers more than once.
garfieldsg	0:662207e34fba	153	*
garfieldsg	0:662207e34fba	154	* For a diagram of the gyroscope and accelerometer signal paths, see Section 8
garfieldsg	0:662207e34fba	155	* of the MPU-6000/MPU-6050 Product Specification document.
garfieldsg	0:662207e34fba	156	*
garfieldsg	0:662207e34fba	157	* @return Current sample rate
garfieldsg	0:662207e34fba	158	* @see MPU6050_RA_SMPLRT_DIV
garfieldsg	0:662207e34fba	159	*/
garfieldsg	0:662207e34fba	160	uint8_t MPU6050::getRate()
garfieldsg	0:662207e34fba	161	{
garfieldsg	0:662207e34fba	162	i2Cdev.readByte(devAddr, MPU6050_RA_SMPLRT_DIV, buffer);
garfieldsg	0:662207e34fba	163	return buffer[0];
garfieldsg	0:662207e34fba	164	}
garfieldsg	0:662207e34fba	165	/** Set gyroscope sample rate divider.
garfieldsg	0:662207e34fba	166	* @param rate New sample rate divider
garfieldsg	0:662207e34fba	167	* @see getRate()
garfieldsg	0:662207e34fba	168	* @see MPU6050_RA_SMPLRT_DIV
garfieldsg	0:662207e34fba	169	*/
garfieldsg	0:662207e34fba	170	void MPU6050::setRate(uint8_t rate)
garfieldsg	0:662207e34fba	171	{
garfieldsg	0:662207e34fba	172	i2Cdev.writeByte(devAddr, MPU6050_RA_SMPLRT_DIV, rate);
garfieldsg	0:662207e34fba	173	}
garfieldsg	0:662207e34fba	174
garfieldsg	0:662207e34fba	175	// CONFIG register
garfieldsg	0:662207e34fba	176
garfieldsg	0:662207e34fba	177	/** Get external FSYNC configuration.
garfieldsg	0:662207e34fba	178	* Configures the external Frame Synchronization (FSYNC) pin sampling. An
garfieldsg	0:662207e34fba	179	* external signal connected to the FSYNC pin can be sampled by configuring
garfieldsg	0:662207e34fba	180	* EXT_SYNC_SET. Signal changes to the FSYNC pin are latched so that short
garfieldsg	0:662207e34fba	181	* strobes may be captured. The latched FSYNC signal will be sampled at the
garfieldsg	0:662207e34fba	182	* Sampling Rate, as defined in register 25. After sampling, the latch will
garfieldsg	0:662207e34fba	183	* reset to the current FSYNC signal state.
garfieldsg	0:662207e34fba	184	*
garfieldsg	0:662207e34fba	185	* The sampled value will be reported in place of the least significant bit in
garfieldsg	0:662207e34fba	186	* a sensor data register determined by the value of EXT_SYNC_SET according to
garfieldsg	0:662207e34fba	187	* the following table.
garfieldsg	0:662207e34fba	188	*
garfieldsg	0:662207e34fba	189	* <pre>
garfieldsg	0:662207e34fba	190	* EXT_SYNC_SET \| FSYNC Bit Location
garfieldsg	0:662207e34fba	191	* -------------+-------------------
garfieldsg	0:662207e34fba	192	* 0 \| Input disabled
garfieldsg	0:662207e34fba	193	* 1 \| TEMP_OUT_L[0]
garfieldsg	0:662207e34fba	194	* 2 \| GYRO_XOUT_L[0]
garfieldsg	0:662207e34fba	195	* 3 \| GYRO_YOUT_L[0]
garfieldsg	0:662207e34fba	196	* 4 \| GYRO_ZOUT_L[0]
garfieldsg	0:662207e34fba	197	* 5 \| ACCEL_XOUT_L[0]
garfieldsg	0:662207e34fba	198	* 6 \| ACCEL_YOUT_L[0]
garfieldsg	0:662207e34fba	199	* 7 \| ACCEL_ZOUT_L[0]
garfieldsg	0:662207e34fba	200	* </pre>
garfieldsg	0:662207e34fba	201	*
garfieldsg	0:662207e34fba	202	* @return FSYNC configuration value
garfieldsg	0:662207e34fba	203	*/
garfieldsg	0:662207e34fba	204	uint8_t MPU6050::getExternalFrameSync()
garfieldsg	0:662207e34fba	205	{
garfieldsg	0:662207e34fba	206	i2Cdev.readBits(devAddr, MPU6050_RA_CONFIG, MPU6050_CFG_EXT_SYNC_SET_BIT, MPU6050_CFG_EXT_SYNC_SET_LENGTH, buffer);
garfieldsg	0:662207e34fba	207	return buffer[0];
garfieldsg	0:662207e34fba	208	}
garfieldsg	0:662207e34fba	209	/** Set external FSYNC configuration.
garfieldsg	0:662207e34fba	210	* @see getExternalFrameSync()
garfieldsg	0:662207e34fba	211	* @see MPU6050_RA_CONFIG
garfieldsg	0:662207e34fba	212	* @param sync New FSYNC configuration value
garfieldsg	0:662207e34fba	213	*/
garfieldsg	0:662207e34fba	214	void MPU6050::setExternalFrameSync(uint8_t sync)
garfieldsg	0:662207e34fba	215	{
garfieldsg	0:662207e34fba	216	i2Cdev.writeBits(devAddr, MPU6050_RA_CONFIG, MPU6050_CFG_EXT_SYNC_SET_BIT, MPU6050_CFG_EXT_SYNC_SET_LENGTH, sync);
garfieldsg	0:662207e34fba	217	}
garfieldsg	0:662207e34fba	218	/** Get digital low-pass filter configuration.
garfieldsg	0:662207e34fba	219	* The DLPF_CFG parameter sets the digital low pass filter configuration. It
garfieldsg	0:662207e34fba	220	* also determines the internal sampling rate used by the device as shown in
garfieldsg	0:662207e34fba	221	* the table below.
garfieldsg	0:662207e34fba	222	*
garfieldsg	0:662207e34fba	223	* Note: The accelerometer output rate is 1kHz. This means that for a Sample
garfieldsg	0:662207e34fba	224	* Rate greater than 1kHz, the same accelerometer sample may be output to the
garfieldsg	0:662207e34fba	225	* FIFO, DMP, and sensor registers more than once.
garfieldsg	0:662207e34fba	226	*
garfieldsg	0:662207e34fba	227	* <pre>
garfieldsg	0:662207e34fba	228	* \| ACCELEROMETER \| GYROSCOPE
garfieldsg	0:662207e34fba	229	* DLPF_CFG \| Bandwidth \| Delay \| Bandwidth \| Delay \| Sample Rate
garfieldsg	0:662207e34fba	230	* ---------+-----------+--------+-----------+--------+-------------
garfieldsg	0:662207e34fba	231	* 0 \| 260Hz \| 0ms \| 256Hz \| 0.98ms \| 8kHz
garfieldsg	0:662207e34fba	232	* 1 \| 184Hz \| 2.0ms \| 188Hz \| 1.9ms \| 1kHz
garfieldsg	0:662207e34fba	233	* 2 \| 94Hz \| 3.0ms \| 98Hz \| 2.8ms \| 1kHz
garfieldsg	0:662207e34fba	234	* 3 \| 44Hz \| 4.9ms \| 42Hz \| 4.8ms \| 1kHz
garfieldsg	0:662207e34fba	235	* 4 \| 21Hz \| 8.5ms \| 20Hz \| 8.3ms \| 1kHz
garfieldsg	0:662207e34fba	236	* 5 \| 10Hz \| 13.8ms \| 10Hz \| 13.4ms \| 1kHz
garfieldsg	0:662207e34fba	237	* 6 \| 5Hz \| 19.0ms \| 5Hz \| 18.6ms \| 1kHz
garfieldsg	0:662207e34fba	238	* 7 \| -- Reserved -- \| -- Reserved -- \| Reserved
garfieldsg	0:662207e34fba	239	* </pre>
garfieldsg	0:662207e34fba	240	*
garfieldsg	0:662207e34fba	241	* @return DLFP configuration
garfieldsg	0:662207e34fba	242	* @see MPU6050_RA_CONFIG
garfieldsg	0:662207e34fba	243	* @see MPU6050_CFG_DLPF_CFG_BIT
garfieldsg	0:662207e34fba	244	* @see MPU6050_CFG_DLPF_CFG_LENGTH
garfieldsg	0:662207e34fba	245	*/
garfieldsg	0:662207e34fba	246	uint8_t MPU6050::getDLPFMode()
garfieldsg	0:662207e34fba	247	{
garfieldsg	0:662207e34fba	248	i2Cdev.readBits(devAddr, MPU6050_RA_CONFIG, MPU6050_CFG_DLPF_CFG_BIT, MPU6050_CFG_DLPF_CFG_LENGTH, buffer);
garfieldsg	0:662207e34fba	249	return buffer[0];
garfieldsg	0:662207e34fba	250	}
garfieldsg	0:662207e34fba	251	/** Set digital low-pass filter configuration.
garfieldsg	0:662207e34fba	252	* @param mode New DLFP configuration setting
garfieldsg	0:662207e34fba	253	* @see getDLPFBandwidth()
garfieldsg	0:662207e34fba	254	* @see MPU6050_DLPF_BW_256
garfieldsg	0:662207e34fba	255	* @see MPU6050_RA_CONFIG
garfieldsg	0:662207e34fba	256	* @see MPU6050_CFG_DLPF_CFG_BIT
garfieldsg	0:662207e34fba	257	* @see MPU6050_CFG_DLPF_CFG_LENGTH
garfieldsg	0:662207e34fba	258	*/
garfieldsg	0:662207e34fba	259	void MPU6050::setDLPFMode(uint8_t mode)
garfieldsg	0:662207e34fba	260	{
garfieldsg	0:662207e34fba	261	i2Cdev.writeBits(devAddr, MPU6050_RA_CONFIG, MPU6050_CFG_DLPF_CFG_BIT, MPU6050_CFG_DLPF_CFG_LENGTH, mode);
garfieldsg	0:662207e34fba	262	}
garfieldsg	0:662207e34fba	263
garfieldsg	0:662207e34fba	264	// GYRO_CONFIG register
garfieldsg	0:662207e34fba	265
garfieldsg	0:662207e34fba	266	/** Get full-scale gyroscope range.
garfieldsg	0:662207e34fba	267	* The FS_SEL parameter allows setting the full-scale range of the gyro sensors,
garfieldsg	0:662207e34fba	268	* as described in the table below.
garfieldsg	0:662207e34fba	269	*
garfieldsg	0:662207e34fba	270	* <pre>
garfieldsg	0:662207e34fba	271	* 0 = +/- 250 degrees/sec
garfieldsg	0:662207e34fba	272	* 1 = +/- 500 degrees/sec
garfieldsg	0:662207e34fba	273	* 2 = +/- 1000 degrees/sec
garfieldsg	0:662207e34fba	274	* 3 = +/- 2000 degrees/sec
garfieldsg	0:662207e34fba	275	* </pre>
garfieldsg	0:662207e34fba	276	*
garfieldsg	0:662207e34fba	277	* @return Current full-scale gyroscope range setting
garfieldsg	0:662207e34fba	278	* @see MPU6050_GYRO_FS_250
garfieldsg	0:662207e34fba	279	* @see MPU6050_RA_GYRO_CONFIG
garfieldsg	0:662207e34fba	280	* @see MPU6050_GCONFIG_FS_SEL_BIT
garfieldsg	0:662207e34fba	281	* @see MPU6050_GCONFIG_FS_SEL_LENGTH
garfieldsg	0:662207e34fba	282	*/
garfieldsg	0:662207e34fba	283	uint8_t MPU6050::getFullScaleGyroRange()
garfieldsg	0:662207e34fba	284	{
garfieldsg	0:662207e34fba	285	i2Cdev.readBits(devAddr, MPU6050_RA_GYRO_CONFIG, MPU6050_GCONFIG_FS_SEL_BIT, MPU6050_GCONFIG_FS_SEL_LENGTH, buffer);
garfieldsg	0:662207e34fba	286	return buffer[0];
garfieldsg	0:662207e34fba	287	}
garfieldsg	0:662207e34fba	288	/** Set full-scale gyroscope range.
garfieldsg	0:662207e34fba	289	* @param range New full-scale gyroscope range value
garfieldsg	0:662207e34fba	290	* @see getFullScaleRange()
garfieldsg	0:662207e34fba	291	* @see MPU6050_GYRO_FS_250
garfieldsg	0:662207e34fba	292	* @see MPU6050_RA_GYRO_CONFIG
garfieldsg	0:662207e34fba	293	* @see MPU6050_GCONFIG_FS_SEL_BIT
garfieldsg	0:662207e34fba	294	* @see MPU6050_GCONFIG_FS_SEL_LENGTH
garfieldsg	0:662207e34fba	295	*/
garfieldsg	0:662207e34fba	296	void MPU6050::setFullScaleGyroRange(uint8_t range)
garfieldsg	0:662207e34fba	297	{
garfieldsg	0:662207e34fba	298	i2Cdev.writeBits(devAddr, MPU6050_RA_GYRO_CONFIG, MPU6050_GCONFIG_FS_SEL_BIT, MPU6050_GCONFIG_FS_SEL_LENGTH, range);
garfieldsg	0:662207e34fba	299	}
garfieldsg	0:662207e34fba	300
garfieldsg	0:662207e34fba	301	// ACCEL_CONFIG register
garfieldsg	0:662207e34fba	302
garfieldsg	0:662207e34fba	303	/** Get self-test enabled setting for accelerometer X axis.
garfieldsg	0:662207e34fba	304	* @return Self-test enabled value
garfieldsg	0:662207e34fba	305	* @see MPU6050_RA_ACCEL_CONFIG
garfieldsg	0:662207e34fba	306	*/
garfieldsg	0:662207e34fba	307	bool MPU6050::getAccelXSelfTest()
garfieldsg	0:662207e34fba	308	{
garfieldsg	0:662207e34fba	309	i2Cdev.readBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_XA_ST_BIT, buffer);
garfieldsg	0:662207e34fba	310	return buffer[0];
garfieldsg	0:662207e34fba	311	}
garfieldsg	0:662207e34fba	312	/** Get self-test enabled setting for accelerometer X axis.
garfieldsg	0:662207e34fba	313	* @param enabled Self-test enabled value
garfieldsg	0:662207e34fba	314	* @see MPU6050_RA_ACCEL_CONFIG
garfieldsg	0:662207e34fba	315	*/
garfieldsg	0:662207e34fba	316	void MPU6050::setAccelXSelfTest(bool enabled)
garfieldsg	0:662207e34fba	317	{
garfieldsg	0:662207e34fba	318	i2Cdev.writeBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_XA_ST_BIT, enabled);
garfieldsg	0:662207e34fba	319	}
garfieldsg	0:662207e34fba	320	/** Get self-test enabled value for accelerometer Y axis.
garfieldsg	0:662207e34fba	321	* @return Self-test enabled value
garfieldsg	0:662207e34fba	322	* @see MPU6050_RA_ACCEL_CONFIG
garfieldsg	0:662207e34fba	323	*/
garfieldsg	0:662207e34fba	324	bool MPU6050::getAccelYSelfTest()
garfieldsg	0:662207e34fba	325	{
garfieldsg	0:662207e34fba	326	i2Cdev.readBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_YA_ST_BIT, buffer);
garfieldsg	0:662207e34fba	327	return buffer[0];
garfieldsg	0:662207e34fba	328	}
garfieldsg	0:662207e34fba	329	/** Get self-test enabled value for accelerometer Y axis.
garfieldsg	0:662207e34fba	330	* @param enabled Self-test enabled value
garfieldsg	0:662207e34fba	331	* @see MPU6050_RA_ACCEL_CONFIG
garfieldsg	0:662207e34fba	332	*/
garfieldsg	0:662207e34fba	333	void MPU6050::setAccelYSelfTest(bool enabled)
garfieldsg	0:662207e34fba	334	{
garfieldsg	0:662207e34fba	335	i2Cdev.writeBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_YA_ST_BIT, enabled);
garfieldsg	0:662207e34fba	336	}
garfieldsg	0:662207e34fba	337	/** Get self-test enabled value for accelerometer Z axis.
garfieldsg	0:662207e34fba	338	* @return Self-test enabled value
garfieldsg	0:662207e34fba	339	* @see MPU6050_RA_ACCEL_CONFIG
garfieldsg	0:662207e34fba	340	*/
garfieldsg	0:662207e34fba	341	bool MPU6050::getAccelZSelfTest()
garfieldsg	0:662207e34fba	342	{
garfieldsg	0:662207e34fba	343	i2Cdev.readBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_ZA_ST_BIT, buffer);
garfieldsg	0:662207e34fba	344	return buffer[0];
garfieldsg	0:662207e34fba	345	}
garfieldsg	0:662207e34fba	346	/** Set self-test enabled value for accelerometer Z axis.
garfieldsg	0:662207e34fba	347	* @param enabled Self-test enabled value
garfieldsg	0:662207e34fba	348	* @see MPU6050_RA_ACCEL_CONFIG
garfieldsg	0:662207e34fba	349	*/
garfieldsg	0:662207e34fba	350	void MPU6050::setAccelZSelfTest(bool enabled)
garfieldsg	0:662207e34fba	351	{
garfieldsg	0:662207e34fba	352	i2Cdev.writeBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_ZA_ST_BIT, enabled);
garfieldsg	0:662207e34fba	353	}
garfieldsg	0:662207e34fba	354	/** Get full-scale accelerometer range.
garfieldsg	0:662207e34fba	355	* The FS_SEL parameter allows setting the full-scale range of the accelerometer
garfieldsg	0:662207e34fba	356	* sensors, as described in the table below.
garfieldsg	0:662207e34fba	357	*
garfieldsg	0:662207e34fba	358	* <pre>
garfieldsg	0:662207e34fba	359	* 0 = +/- 2g
garfieldsg	0:662207e34fba	360	* 1 = +/- 4g
garfieldsg	0:662207e34fba	361	* 2 = +/- 8g
garfieldsg	0:662207e34fba	362	* 3 = +/- 16g
garfieldsg	0:662207e34fba	363	* </pre>
garfieldsg	0:662207e34fba	364	*
garfieldsg	0:662207e34fba	365	* @return Current full-scale accelerometer range setting
garfieldsg	0:662207e34fba	366	* @see MPU6050_ACCEL_FS_2
garfieldsg	0:662207e34fba	367	* @see MPU6050_RA_ACCEL_CONFIG
garfieldsg	0:662207e34fba	368	* @see MPU6050_ACONFIG_AFS_SEL_BIT
garfieldsg	0:662207e34fba	369	* @see MPU6050_ACONFIG_AFS_SEL_LENGTH
garfieldsg	0:662207e34fba	370	*/
garfieldsg	0:662207e34fba	371	uint8_t MPU6050::getFullScaleAccelRange()
garfieldsg	0:662207e34fba	372	{
garfieldsg	0:662207e34fba	373	i2Cdev.readBits(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_AFS_SEL_BIT, MPU6050_ACONFIG_AFS_SEL_LENGTH, buffer);
garfieldsg	0:662207e34fba	374	return buffer[0];
garfieldsg	0:662207e34fba	375	}
garfieldsg	0:662207e34fba	376	/** Set full-scale accelerometer range.
garfieldsg	0:662207e34fba	377	* @param range New full-scale accelerometer range setting
garfieldsg	0:662207e34fba	378	* @see getFullScaleAccelRange()
garfieldsg	0:662207e34fba	379	*/
garfieldsg	0:662207e34fba	380	void MPU6050::setFullScaleAccelRange(uint8_t range)
garfieldsg	0:662207e34fba	381	{
garfieldsg	0:662207e34fba	382	i2Cdev.writeBits(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_AFS_SEL_BIT, MPU6050_ACONFIG_AFS_SEL_LENGTH, range);
garfieldsg	0:662207e34fba	383	}
garfieldsg	0:662207e34fba	384	/** Get the high-pass filter configuration.
garfieldsg	0:662207e34fba	385	* The DHPF is a filter module in the path leading to motion detectors (Free
garfieldsg	0:662207e34fba	386	* Fall, Motion threshold, and Zero Motion). The high pass filter output is not
garfieldsg	0:662207e34fba	387	* available to the data registers (see Figure in Section 8 of the MPU-6000/
garfieldsg	0:662207e34fba	388	* MPU-6050 Product Specification document).
garfieldsg	0:662207e34fba	389	*
garfieldsg	0:662207e34fba	390	* The high pass filter has three modes:
garfieldsg	0:662207e34fba	391	*
garfieldsg	0:662207e34fba	392	* <pre>
garfieldsg	0:662207e34fba	393	* Reset: The filter output settles to zero within one sample. This
garfieldsg	0:662207e34fba	394	* effectively disables the high pass filter. This mode may be toggled
garfieldsg	0:662207e34fba	395	* to quickly settle the filter.
garfieldsg	0:662207e34fba	396	*
garfieldsg	0:662207e34fba	397	* On: The high pass filter will pass signals above the cut off frequency.
garfieldsg	0:662207e34fba	398	*
garfieldsg	0:662207e34fba	399	* Hold: When triggered, the filter holds the present sample. The filter
garfieldsg	0:662207e34fba	400	* output will be the difference between the input sample and the held
garfieldsg	0:662207e34fba	401	* sample.
garfieldsg	0:662207e34fba	402	* </pre>
garfieldsg	0:662207e34fba	403	*
garfieldsg	0:662207e34fba	404	* <pre>
garfieldsg	0:662207e34fba	405	* ACCEL_HPF \| Filter Mode \| Cut-off Frequency
garfieldsg	0:662207e34fba	406	* ----------+-------------+------------------
garfieldsg	0:662207e34fba	407	* 0 \| Reset \| None
garfieldsg	0:662207e34fba	408	* 1 \| On \| 5Hz
garfieldsg	0:662207e34fba	409	* 2 \| On \| 2.5Hz
garfieldsg	0:662207e34fba	410	* 3 \| On \| 1.25Hz
garfieldsg	0:662207e34fba	411	* 4 \| On \| 0.63Hz
garfieldsg	0:662207e34fba	412	* 7 \| Hold \| None
garfieldsg	0:662207e34fba	413	* </pre>
garfieldsg	0:662207e34fba	414	*
garfieldsg	0:662207e34fba	415	* @return Current high-pass filter configuration
garfieldsg	0:662207e34fba	416	* @see MPU6050_DHPF_RESET
garfieldsg	0:662207e34fba	417	* @see MPU6050_RA_ACCEL_CONFIG
garfieldsg	0:662207e34fba	418	*/
garfieldsg	0:662207e34fba	419	uint8_t MPU6050::getDHPFMode()
garfieldsg	0:662207e34fba	420	{
garfieldsg	0:662207e34fba	421	i2Cdev.readBits(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_ACCEL_HPF_BIT, MPU6050_ACONFIG_ACCEL_HPF_LENGTH, buffer);
garfieldsg	0:662207e34fba	422	return buffer[0];
garfieldsg	0:662207e34fba	423	}
garfieldsg	0:662207e34fba	424	/** Set the high-pass filter configuration.
garfieldsg	0:662207e34fba	425	* @param bandwidth New high-pass filter configuration
garfieldsg	0:662207e34fba	426	* @see setDHPFMode()
garfieldsg	0:662207e34fba	427	* @see MPU6050_DHPF_RESET
garfieldsg	0:662207e34fba	428	* @see MPU6050_RA_ACCEL_CONFIG
garfieldsg	0:662207e34fba	429	*/
garfieldsg	0:662207e34fba	430	void MPU6050::setDHPFMode(uint8_t bandwidth)
garfieldsg	0:662207e34fba	431	{
garfieldsg	0:662207e34fba	432	i2Cdev.writeBits(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_ACCEL_HPF_BIT, MPU6050_ACONFIG_ACCEL_HPF_LENGTH, bandwidth);
garfieldsg	0:662207e34fba	433	}
garfieldsg	0:662207e34fba	434
garfieldsg	0:662207e34fba	435	// FF_THR register
garfieldsg	0:662207e34fba	436
garfieldsg	0:662207e34fba	437	/** Get free-fall event acceleration threshold.
garfieldsg	0:662207e34fba	438	* This register configures the detection threshold for Free Fall event
garfieldsg	0:662207e34fba	439	* detection. The unit of FF_THR is 1LSB = 2mg. Free Fall is detected when the
garfieldsg	0:662207e34fba	440	* absolute value of the accelerometer measurements for the three axes are each
garfieldsg	0:662207e34fba	441	* less than the detection threshold. This condition increments the Free Fall
garfieldsg	0:662207e34fba	442	* duration counter (Register 30). The Free Fall interrupt is triggered when the
garfieldsg	0:662207e34fba	443	* Free Fall duration counter reaches the time specified in FF_DUR.
garfieldsg	0:662207e34fba	444	*
garfieldsg	0:662207e34fba	445	* For more details on the Free Fall detection interrupt, see Section 8.2 of the
garfieldsg	0:662207e34fba	446	* MPU-6000/MPU-6050 Product Specification document as well as Registers 56 and
garfieldsg	0:662207e34fba	447	* 58 of this document.
garfieldsg	0:662207e34fba	448	*
garfieldsg	0:662207e34fba	449	* @return Current free-fall acceleration threshold value (LSB = 2mg)
garfieldsg	0:662207e34fba	450	* @see MPU6050_RA_FF_THR
garfieldsg	0:662207e34fba	451	*/
garfieldsg	0:662207e34fba	452	uint8_t MPU6050::getFreefallDetectionThreshold()
garfieldsg	0:662207e34fba	453	{
garfieldsg	0:662207e34fba	454	i2Cdev.readByte(devAddr, MPU6050_RA_FF_THR, buffer);
garfieldsg	0:662207e34fba	455	return buffer[0];
garfieldsg	0:662207e34fba	456	}
garfieldsg	0:662207e34fba	457	/** Get free-fall event acceleration threshold.
garfieldsg	0:662207e34fba	458	* @param threshold New free-fall acceleration threshold value (LSB = 2mg)
garfieldsg	0:662207e34fba	459	* @see getFreefallDetectionThreshold()
garfieldsg	0:662207e34fba	460	* @see MPU6050_RA_FF_THR
garfieldsg	0:662207e34fba	461	*/
garfieldsg	0:662207e34fba	462	void MPU6050::setFreefallDetectionThreshold(uint8_t threshold)
garfieldsg	0:662207e34fba	463	{
garfieldsg	0:662207e34fba	464	i2Cdev.writeByte(devAddr, MPU6050_RA_FF_THR, threshold);
garfieldsg	0:662207e34fba	465	}
garfieldsg	0:662207e34fba	466
garfieldsg	0:662207e34fba	467	// FF_DUR register
garfieldsg	0:662207e34fba	468
garfieldsg	0:662207e34fba	469	/** Get free-fall event duration threshold.
garfieldsg	0:662207e34fba	470	* This register configures the duration counter threshold for Free Fall event
garfieldsg	0:662207e34fba	471	* detection. The duration counter ticks at 1kHz, therefore FF_DUR has a unit
garfieldsg	0:662207e34fba	472	* of 1 LSB = 1 ms.
garfieldsg	0:662207e34fba	473	*
garfieldsg	0:662207e34fba	474	* The Free Fall duration counter increments while the absolute value of the
garfieldsg	0:662207e34fba	475	* accelerometer measurements are each less than the detection threshold
garfieldsg	0:662207e34fba	476	* (Register 29). The Free Fall interrupt is triggered when the Free Fall
garfieldsg	0:662207e34fba	477	* duration counter reaches the time specified in this register.
garfieldsg	0:662207e34fba	478	*
garfieldsg	0:662207e34fba	479	* For more details on the Free Fall detection interrupt, see Section 8.2 of
garfieldsg	0:662207e34fba	480	* the MPU-6000/MPU-6050 Product Specification document as well as Registers 56
garfieldsg	0:662207e34fba	481	* and 58 of this document.
garfieldsg	0:662207e34fba	482	*
garfieldsg	0:662207e34fba	483	* @return Current free-fall duration threshold value (LSB = 1ms)
garfieldsg	0:662207e34fba	484	* @see MPU6050_RA_FF_DUR
garfieldsg	0:662207e34fba	485	*/
garfieldsg	0:662207e34fba	486	uint8_t MPU6050::getFreefallDetectionDuration()
garfieldsg	0:662207e34fba	487	{
garfieldsg	0:662207e34fba	488	i2Cdev.readByte(devAddr, MPU6050_RA_FF_DUR, buffer);
garfieldsg	0:662207e34fba	489	return buffer[0];
garfieldsg	0:662207e34fba	490	}
garfieldsg	0:662207e34fba	491	/** Get free-fall event duration threshold.
garfieldsg	0:662207e34fba	492	* @param duration New free-fall duration threshold value (LSB = 1ms)
garfieldsg	0:662207e34fba	493	* @see getFreefallDetectionDuration()
garfieldsg	0:662207e34fba	494	* @see MPU6050_RA_FF_DUR
garfieldsg	0:662207e34fba	495	*/
garfieldsg	0:662207e34fba	496	void MPU6050::setFreefallDetectionDuration(uint8_t duration)
garfieldsg	0:662207e34fba	497	{
garfieldsg	0:662207e34fba	498	i2Cdev.writeByte(devAddr, MPU6050_RA_FF_DUR, duration);
garfieldsg	0:662207e34fba	499	}
garfieldsg	0:662207e34fba	500
garfieldsg	0:662207e34fba	501	// MOT_THR register
garfieldsg	0:662207e34fba	502
garfieldsg	0:662207e34fba	503	/** Get motion detection event acceleration threshold.
garfieldsg	0:662207e34fba	504	* This register configures the detection threshold for Motion interrupt
garfieldsg	0:662207e34fba	505	* generation. The unit of MOT_THR is 1LSB = 2mg. Motion is detected when the
garfieldsg	0:662207e34fba	506	* absolute value of any of the accelerometer measurements exceeds this Motion
garfieldsg	0:662207e34fba	507	* detection threshold. This condition increments the Motion detection duration
garfieldsg	0:662207e34fba	508	* counter (Register 32). The Motion detection interrupt is triggered when the
garfieldsg	0:662207e34fba	509	* Motion Detection counter reaches the time count specified in MOT_DUR
garfieldsg	0:662207e34fba	510	* (Register 32).
garfieldsg	0:662207e34fba	511	*
garfieldsg	0:662207e34fba	512	* The Motion interrupt will indicate the axis and polarity of detected motion
garfieldsg	0:662207e34fba	513	* in MOT_DETECT_STATUS (Register 97).
garfieldsg	0:662207e34fba	514	*
garfieldsg	0:662207e34fba	515	* For more details on the Motion detection interrupt, see Section 8.3 of the
garfieldsg	0:662207e34fba	516	* MPU-6000/MPU-6050 Product Specification document as well as Registers 56 and
garfieldsg	0:662207e34fba	517	* 58 of this document.
garfieldsg	0:662207e34fba	518	*
garfieldsg	0:662207e34fba	519	* @return Current motion detection acceleration threshold value (LSB = 2mg)
garfieldsg	0:662207e34fba	520	* @see MPU6050_RA_MOT_THR
garfieldsg	0:662207e34fba	521	*/
garfieldsg	0:662207e34fba	522	uint8_t MPU6050::getMotionDetectionThreshold()
garfieldsg	0:662207e34fba	523	{
garfieldsg	0:662207e34fba	524	i2Cdev.readByte(devAddr, MPU6050_RA_MOT_THR, buffer);
garfieldsg	0:662207e34fba	525	return buffer[0];
garfieldsg	0:662207e34fba	526	}
garfieldsg	0:662207e34fba	527	/** Set free-fall event acceleration threshold.
garfieldsg	0:662207e34fba	528	* @param threshold New motion detection acceleration threshold value (LSB = 2mg)
garfieldsg	0:662207e34fba	529	* @see getMotionDetectionThreshold()
garfieldsg	0:662207e34fba	530	* @see MPU6050_RA_MOT_THR
garfieldsg	0:662207e34fba	531	*/
garfieldsg	0:662207e34fba	532	void MPU6050::setMotionDetectionThreshold(uint8_t threshold)
garfieldsg	0:662207e34fba	533	{
garfieldsg	0:662207e34fba	534	i2Cdev.writeByte(devAddr, MPU6050_RA_MOT_THR, threshold);
garfieldsg	0:662207e34fba	535	}
garfieldsg	0:662207e34fba	536
garfieldsg	0:662207e34fba	537	// MOT_DUR register
garfieldsg	0:662207e34fba	538
garfieldsg	0:662207e34fba	539	/** Get motion detection event duration threshold.
garfieldsg	0:662207e34fba	540	* This register configures the duration counter threshold for Motion interrupt
garfieldsg	0:662207e34fba	541	* generation. The duration counter ticks at 1 kHz, therefore MOT_DUR has a unit
garfieldsg	0:662207e34fba	542	* of 1LSB = 1ms. The Motion detection duration counter increments when the
garfieldsg	0:662207e34fba	543	* absolute value of any of the accelerometer measurements exceeds the Motion
garfieldsg	0:662207e34fba	544	* detection threshold (Register 31). The Motion detection interrupt is
garfieldsg	0:662207e34fba	545	* triggered when the Motion detection counter reaches the time count specified
garfieldsg	0:662207e34fba	546	* in this register.
garfieldsg	0:662207e34fba	547	*
garfieldsg	0:662207e34fba	548	* For more details on the Motion detection interrupt, see Section 8.3 of the
garfieldsg	0:662207e34fba	549	* MPU-6000/MPU-6050 Product Specification document.
garfieldsg	0:662207e34fba	550	*
garfieldsg	0:662207e34fba	551	* @return Current motion detection duration threshold value (LSB = 1ms)
garfieldsg	0:662207e34fba	552	* @see MPU6050_RA_MOT_DUR
garfieldsg	0:662207e34fba	553	*/
garfieldsg	0:662207e34fba	554	uint8_t MPU6050::getMotionDetectionDuration()
garfieldsg	0:662207e34fba	555	{
garfieldsg	0:662207e34fba	556	i2Cdev.readByte(devAddr, MPU6050_RA_MOT_DUR, buffer);
garfieldsg	0:662207e34fba	557	return buffer[0];
garfieldsg	0:662207e34fba	558	}
garfieldsg	0:662207e34fba	559	/** Set motion detection event duration threshold.
garfieldsg	0:662207e34fba	560	* @param duration New motion detection duration threshold value (LSB = 1ms)
garfieldsg	0:662207e34fba	561	* @see getMotionDetectionDuration()
garfieldsg	0:662207e34fba	562	* @see MPU6050_RA_MOT_DUR
garfieldsg	0:662207e34fba	563	*/
garfieldsg	0:662207e34fba	564	void MPU6050::setMotionDetectionDuration(uint8_t duration)
garfieldsg	0:662207e34fba	565	{
garfieldsg	0:662207e34fba	566	i2Cdev.writeByte(devAddr, MPU6050_RA_MOT_DUR, duration);
garfieldsg	0:662207e34fba	567	}
garfieldsg	0:662207e34fba	568
garfieldsg	0:662207e34fba	569	// ZRMOT_THR register
garfieldsg	0:662207e34fba	570
garfieldsg	0:662207e34fba	571	/** Get zero motion detection event acceleration threshold.
garfieldsg	0:662207e34fba	572	* This register configures the detection threshold for Zero Motion interrupt
garfieldsg	0:662207e34fba	573	* generation. The unit of ZRMOT_THR is 1LSB = 2mg. Zero Motion is detected when
garfieldsg	0:662207e34fba	574	* the absolute value of the accelerometer measurements for the 3 axes are each
garfieldsg	0:662207e34fba	575	* less than the detection threshold. This condition increments the Zero Motion
garfieldsg	0:662207e34fba	576	* duration counter (Register 34). The Zero Motion interrupt is triggered when
garfieldsg	0:662207e34fba	577	* the Zero Motion duration counter reaches the time count specified in
garfieldsg	0:662207e34fba	578	* ZRMOT_DUR (Register 34).
garfieldsg	0:662207e34fba	579	*
garfieldsg	0:662207e34fba	580	* Unlike Free Fall or Motion detection, Zero Motion detection triggers an
garfieldsg	0:662207e34fba	581	* interrupt both when Zero Motion is first detected and when Zero Motion is no
garfieldsg	0:662207e34fba	582	* longer detected.
garfieldsg	0:662207e34fba	583	*
garfieldsg	0:662207e34fba	584	* When a zero motion event is detected, a Zero Motion Status will be indicated
garfieldsg	0:662207e34fba	585	* in the MOT_DETECT_STATUS register (Register 97). When a motion-to-zero-motion
garfieldsg	0:662207e34fba	586	* condition is detected, the status bit is set to 1. When a zero-motion-to-
garfieldsg	0:662207e34fba	587	* motion condition is detected, the status bit is set to 0.
garfieldsg	0:662207e34fba	588	*
garfieldsg	0:662207e34fba	589	* For more details on the Zero Motion detection interrupt, see Section 8.4 of
garfieldsg	0:662207e34fba	590	* the MPU-6000/MPU-6050 Product Specification document as well as Registers 56
garfieldsg	0:662207e34fba	591	* and 58 of this document.
garfieldsg	0:662207e34fba	592	*
garfieldsg	0:662207e34fba	593	* @return Current zero motion detection acceleration threshold value (LSB = 2mg)
garfieldsg	0:662207e34fba	594	* @see MPU6050_RA_ZRMOT_THR
garfieldsg	0:662207e34fba	595	*/
garfieldsg	0:662207e34fba	596	uint8_t MPU6050::getZeroMotionDetectionThreshold()
garfieldsg	0:662207e34fba	597	{
garfieldsg	0:662207e34fba	598	i2Cdev.readByte(devAddr, MPU6050_RA_ZRMOT_THR, buffer);
garfieldsg	0:662207e34fba	599	return buffer[0];
garfieldsg	0:662207e34fba	600	}
garfieldsg	0:662207e34fba	601	/** Set zero motion detection event acceleration threshold.
garfieldsg	0:662207e34fba	602	* @param threshold New zero motion detection acceleration threshold value (LSB = 2mg)
garfieldsg	0:662207e34fba	603	* @see getZeroMotionDetectionThreshold()
garfieldsg	0:662207e34fba	604	* @see MPU6050_RA_ZRMOT_THR
garfieldsg	0:662207e34fba	605	*/
garfieldsg	0:662207e34fba	606	void MPU6050::setZeroMotionDetectionThreshold(uint8_t threshold)
garfieldsg	0:662207e34fba	607	{
garfieldsg	0:662207e34fba	608	i2Cdev.writeByte(devAddr, MPU6050_RA_ZRMOT_THR, threshold);
garfieldsg	0:662207e34fba	609	}
garfieldsg	0:662207e34fba	610
garfieldsg	0:662207e34fba	611	// ZRMOT_DUR register
garfieldsg	0:662207e34fba	612
garfieldsg	0:662207e34fba	613	/** Get zero motion detection event duration threshold.
garfieldsg	0:662207e34fba	614	* This register configures the duration counter threshold for Zero Motion
garfieldsg	0:662207e34fba	615	* interrupt generation. The duration counter ticks at 16 Hz, therefore
garfieldsg	0:662207e34fba	616	* ZRMOT_DUR has a unit of 1 LSB = 64 ms. The Zero Motion duration counter
garfieldsg	0:662207e34fba	617	* increments while the absolute value of the accelerometer measurements are
garfieldsg	0:662207e34fba	618	* each less than the detection threshold (Register 33). The Zero Motion
garfieldsg	0:662207e34fba	619	* interrupt is triggered when the Zero Motion duration counter reaches the time
garfieldsg	0:662207e34fba	620	* count specified in this register.
garfieldsg	0:662207e34fba	621	*
garfieldsg	0:662207e34fba	622	* For more details on the Zero Motion detection interrupt, see Section 8.4 of
garfieldsg	0:662207e34fba	623	* the MPU-6000/MPU-6050 Product Specification document, as well as Registers 56
garfieldsg	0:662207e34fba	624	* and 58 of this document.
garfieldsg	0:662207e34fba	625	*
garfieldsg	0:662207e34fba	626	* @return Current zero motion detection duration threshold value (LSB = 64ms)
garfieldsg	0:662207e34fba	627	* @see MPU6050_RA_ZRMOT_DUR
garfieldsg	0:662207e34fba	628	*/
garfieldsg	0:662207e34fba	629	uint8_t MPU6050::getZeroMotionDetectionDuration()
garfieldsg	0:662207e34fba	630	{
garfieldsg	0:662207e34fba	631	i2Cdev.readByte(devAddr, MPU6050_RA_ZRMOT_DUR, buffer);
garfieldsg	0:662207e34fba	632	return buffer[0];
garfieldsg	0:662207e34fba	633	}
garfieldsg	0:662207e34fba	634	/** Set zero motion detection event duration threshold.
garfieldsg	0:662207e34fba	635	* @param duration New zero motion detection duration threshold value (LSB = 1ms)
garfieldsg	0:662207e34fba	636	* @see getZeroMotionDetectionDuration()
garfieldsg	0:662207e34fba	637	* @see MPU6050_RA_ZRMOT_DUR
garfieldsg	0:662207e34fba	638	*/
garfieldsg	0:662207e34fba	639	void MPU6050::setZeroMotionDetectionDuration(uint8_t duration)
garfieldsg	0:662207e34fba	640	{
garfieldsg	0:662207e34fba	641	i2Cdev.writeByte(devAddr, MPU6050_RA_ZRMOT_DUR, duration);
garfieldsg	0:662207e34fba	642	}
garfieldsg	0:662207e34fba	643
garfieldsg	0:662207e34fba	644	// FIFO_EN register
garfieldsg	0:662207e34fba	645
garfieldsg	0:662207e34fba	646	/** Get temperature FIFO enabled value.
garfieldsg	0:662207e34fba	647	* When set to 1, this bit enables TEMP_OUT_H and TEMP_OUT_L (Registers 65 and
garfieldsg	0:662207e34fba	648	* 66) to be written into the FIFO buffer.
garfieldsg	0:662207e34fba	649	* @return Current temperature FIFO enabled value
garfieldsg	0:662207e34fba	650	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	651	*/
garfieldsg	0:662207e34fba	652	bool MPU6050::getTempFIFOEnabled()
garfieldsg	0:662207e34fba	653	{
garfieldsg	0:662207e34fba	654	i2Cdev.readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_TEMP_FIFO_EN_BIT, buffer);
garfieldsg	0:662207e34fba	655	return buffer[0];
garfieldsg	0:662207e34fba	656	}
garfieldsg	0:662207e34fba	657	/** Set temperature FIFO enabled value.
garfieldsg	0:662207e34fba	658	* @param enabled New temperature FIFO enabled value
garfieldsg	0:662207e34fba	659	* @see getTempFIFOEnabled()
garfieldsg	0:662207e34fba	660	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	661	*/
garfieldsg	0:662207e34fba	662	void MPU6050::setTempFIFOEnabled(bool enabled)
garfieldsg	0:662207e34fba	663	{
garfieldsg	0:662207e34fba	664	i2Cdev.writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_TEMP_FIFO_EN_BIT, enabled);
garfieldsg	0:662207e34fba	665	}
garfieldsg	0:662207e34fba	666	/** Get gyroscope X-axis FIFO enabled value.
garfieldsg	0:662207e34fba	667	* When set to 1, this bit enables GYRO_XOUT_H and GYRO_XOUT_L (Registers 67 and
garfieldsg	0:662207e34fba	668	* 68) to be written into the FIFO buffer.
garfieldsg	0:662207e34fba	669	* @return Current gyroscope X-axis FIFO enabled value
garfieldsg	0:662207e34fba	670	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	671	*/
garfieldsg	0:662207e34fba	672	bool MPU6050::getXGyroFIFOEnabled()
garfieldsg	0:662207e34fba	673	{
garfieldsg	0:662207e34fba	674	i2Cdev.readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_XG_FIFO_EN_BIT, buffer);
garfieldsg	0:662207e34fba	675	return buffer[0];
garfieldsg	0:662207e34fba	676	}
garfieldsg	0:662207e34fba	677	/** Set gyroscope X-axis FIFO enabled value.
garfieldsg	0:662207e34fba	678	* @param enabled New gyroscope X-axis FIFO enabled value
garfieldsg	0:662207e34fba	679	* @see getXGyroFIFOEnabled()
garfieldsg	0:662207e34fba	680	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	681	*/
garfieldsg	0:662207e34fba	682	void MPU6050::setXGyroFIFOEnabled(bool enabled)
garfieldsg	0:662207e34fba	683	{
garfieldsg	0:662207e34fba	684	i2Cdev.writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_XG_FIFO_EN_BIT, enabled);
garfieldsg	0:662207e34fba	685	}
garfieldsg	0:662207e34fba	686	/** Get gyroscope Y-axis FIFO enabled value.
garfieldsg	0:662207e34fba	687	* When set to 1, this bit enables GYRO_YOUT_H and GYRO_YOUT_L (Registers 69 and
garfieldsg	0:662207e34fba	688	* 70) to be written into the FIFO buffer.
garfieldsg	0:662207e34fba	689	* @return Current gyroscope Y-axis FIFO enabled value
garfieldsg	0:662207e34fba	690	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	691	*/
garfieldsg	0:662207e34fba	692	bool MPU6050::getYGyroFIFOEnabled()
garfieldsg	0:662207e34fba	693	{
garfieldsg	0:662207e34fba	694	i2Cdev.readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_YG_FIFO_EN_BIT, buffer);
garfieldsg	0:662207e34fba	695	return buffer[0];
garfieldsg	0:662207e34fba	696	}
garfieldsg	0:662207e34fba	697	/** Set gyroscope Y-axis FIFO enabled value.
garfieldsg	0:662207e34fba	698	* @param enabled New gyroscope Y-axis FIFO enabled value
garfieldsg	0:662207e34fba	699	* @see getYGyroFIFOEnabled()
garfieldsg	0:662207e34fba	700	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	701	*/
garfieldsg	0:662207e34fba	702	void MPU6050::setYGyroFIFOEnabled(bool enabled)
garfieldsg	0:662207e34fba	703	{
garfieldsg	0:662207e34fba	704	i2Cdev.writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_YG_FIFO_EN_BIT, enabled);
garfieldsg	0:662207e34fba	705	}
garfieldsg	0:662207e34fba	706	/** Get gyroscope Z-axis FIFO enabled value.
garfieldsg	0:662207e34fba	707	* When set to 1, this bit enables GYRO_ZOUT_H and GYRO_ZOUT_L (Registers 71 and
garfieldsg	0:662207e34fba	708	* 72) to be written into the FIFO buffer.
garfieldsg	0:662207e34fba	709	* @return Current gyroscope Z-axis FIFO enabled value
garfieldsg	0:662207e34fba	710	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	711	*/
garfieldsg	0:662207e34fba	712	bool MPU6050::getZGyroFIFOEnabled()
garfieldsg	0:662207e34fba	713	{
garfieldsg	0:662207e34fba	714	i2Cdev.readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_ZG_FIFO_EN_BIT, buffer);
garfieldsg	0:662207e34fba	715	return buffer[0];
garfieldsg	0:662207e34fba	716	}
garfieldsg	0:662207e34fba	717	/** Set gyroscope Z-axis FIFO enabled value.
garfieldsg	0:662207e34fba	718	* @param enabled New gyroscope Z-axis FIFO enabled value
garfieldsg	0:662207e34fba	719	* @see getZGyroFIFOEnabled()
garfieldsg	0:662207e34fba	720	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	721	*/
garfieldsg	0:662207e34fba	722	void MPU6050::setZGyroFIFOEnabled(bool enabled)
garfieldsg	0:662207e34fba	723	{
garfieldsg	0:662207e34fba	724	i2Cdev.writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_ZG_FIFO_EN_BIT, enabled);
garfieldsg	0:662207e34fba	725	}
garfieldsg	0:662207e34fba	726	/** Get accelerometer FIFO enabled value.
garfieldsg	0:662207e34fba	727	* When set to 1, this bit enables ACCEL_XOUT_H, ACCEL_XOUT_L, ACCEL_YOUT_H,
garfieldsg	0:662207e34fba	728	* ACCEL_YOUT_L, ACCEL_ZOUT_H, and ACCEL_ZOUT_L (Registers 59 to 64) to be
garfieldsg	0:662207e34fba	729	* written into the FIFO buffer.
garfieldsg	0:662207e34fba	730	* @return Current accelerometer FIFO enabled value
garfieldsg	0:662207e34fba	731	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	732	*/
garfieldsg	0:662207e34fba	733	bool MPU6050::getAccelFIFOEnabled()
garfieldsg	0:662207e34fba	734	{
garfieldsg	0:662207e34fba	735	i2Cdev.readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_ACCEL_FIFO_EN_BIT, buffer);
garfieldsg	0:662207e34fba	736	return buffer[0];
garfieldsg	0:662207e34fba	737	}
garfieldsg	0:662207e34fba	738	/** Set accelerometer FIFO enabled value.
garfieldsg	0:662207e34fba	739	* @param enabled New accelerometer FIFO enabled value
garfieldsg	0:662207e34fba	740	* @see getAccelFIFOEnabled()
garfieldsg	0:662207e34fba	741	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	742	*/
garfieldsg	0:662207e34fba	743	void MPU6050::setAccelFIFOEnabled(bool enabled)
garfieldsg	0:662207e34fba	744	{
garfieldsg	0:662207e34fba	745	i2Cdev.writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_ACCEL_FIFO_EN_BIT, enabled);
garfieldsg	0:662207e34fba	746	}
garfieldsg	0:662207e34fba	747	/** Get Slave 2 FIFO enabled value.
garfieldsg	0:662207e34fba	748	* When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96)
garfieldsg	0:662207e34fba	749	* associated with Slave 2 to be written into the FIFO buffer.
garfieldsg	0:662207e34fba	750	* @return Current Slave 2 FIFO enabled value
garfieldsg	0:662207e34fba	751	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	752	*/
garfieldsg	0:662207e34fba	753	bool MPU6050::getSlave2FIFOEnabled()
garfieldsg	0:662207e34fba	754	{
garfieldsg	0:662207e34fba	755	i2Cdev.readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV2_FIFO_EN_BIT, buffer);
garfieldsg	0:662207e34fba	756	return buffer[0];
garfieldsg	0:662207e34fba	757	}
garfieldsg	0:662207e34fba	758	/** Set Slave 2 FIFO enabled value.
garfieldsg	0:662207e34fba	759	* @param enabled New Slave 2 FIFO enabled value
garfieldsg	0:662207e34fba	760	* @see getSlave2FIFOEnabled()
garfieldsg	0:662207e34fba	761	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	762	*/
garfieldsg	0:662207e34fba	763	void MPU6050::setSlave2FIFOEnabled(bool enabled)
garfieldsg	0:662207e34fba	764	{
garfieldsg	0:662207e34fba	765	i2Cdev.writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV2_FIFO_EN_BIT, enabled);
garfieldsg	0:662207e34fba	766	}
garfieldsg	0:662207e34fba	767	/** Get Slave 1 FIFO enabled value.
garfieldsg	0:662207e34fba	768	* When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96)
garfieldsg	0:662207e34fba	769	* associated with Slave 1 to be written into the FIFO buffer.
garfieldsg	0:662207e34fba	770	* @return Current Slave 1 FIFO enabled value
garfieldsg	0:662207e34fba	771	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	772	*/
garfieldsg	0:662207e34fba	773	bool MPU6050::getSlave1FIFOEnabled()
garfieldsg	0:662207e34fba	774	{
garfieldsg	0:662207e34fba	775	i2Cdev.readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV1_FIFO_EN_BIT, buffer);
garfieldsg	0:662207e34fba	776	return buffer[0];
garfieldsg	0:662207e34fba	777	}
garfieldsg	0:662207e34fba	778	/** Set Slave 1 FIFO enabled value.
garfieldsg	0:662207e34fba	779	* @param enabled New Slave 1 FIFO enabled value
garfieldsg	0:662207e34fba	780	* @see getSlave1FIFOEnabled()
garfieldsg	0:662207e34fba	781	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	782	*/
garfieldsg	0:662207e34fba	783	void MPU6050::setSlave1FIFOEnabled(bool enabled)
garfieldsg	0:662207e34fba	784	{
garfieldsg	0:662207e34fba	785	i2Cdev.writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV1_FIFO_EN_BIT, enabled);
garfieldsg	0:662207e34fba	786	}
garfieldsg	0:662207e34fba	787	/** Get Slave 0 FIFO enabled value.
garfieldsg	0:662207e34fba	788	* When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96)
garfieldsg	0:662207e34fba	789	* associated with Slave 0 to be written into the FIFO buffer.
garfieldsg	0:662207e34fba	790	* @return Current Slave 0 FIFO enabled value
garfieldsg	0:662207e34fba	791	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	792	*/
garfieldsg	0:662207e34fba	793	bool MPU6050::getSlave0FIFOEnabled()
garfieldsg	0:662207e34fba	794	{
garfieldsg	0:662207e34fba	795	i2Cdev.readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV0_FIFO_EN_BIT, buffer);
garfieldsg	0:662207e34fba	796	return buffer[0];
garfieldsg	0:662207e34fba	797	}
garfieldsg	0:662207e34fba	798	/** Set Slave 0 FIFO enabled value.
garfieldsg	0:662207e34fba	799	* @param enabled New Slave 0 FIFO enabled value
garfieldsg	0:662207e34fba	800	* @see getSlave0FIFOEnabled()
garfieldsg	0:662207e34fba	801	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	802	*/
garfieldsg	0:662207e34fba	803	void MPU6050::setSlave0FIFOEnabled(bool enabled)
garfieldsg	0:662207e34fba	804	{
garfieldsg	0:662207e34fba	805	i2Cdev.writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV0_FIFO_EN_BIT, enabled);
garfieldsg	0:662207e34fba	806	}
garfieldsg	0:662207e34fba	807
garfieldsg	0:662207e34fba	808	// I2C_MST_CTRL register
garfieldsg	0:662207e34fba	809
garfieldsg	0:662207e34fba	810	/** Get multi-master enabled value.
garfieldsg	0:662207e34fba	811	* Multi-master capability allows multiple I2C masters to operate on the same
garfieldsg	0:662207e34fba	812	* bus. In circuits where multi-master capability is required, set MULT_MST_EN
garfieldsg	0:662207e34fba	813	* to 1. This will increase current drawn by approximately 30uA.
garfieldsg	0:662207e34fba	814	*
garfieldsg	0:662207e34fba	815	* In circuits where multi-master capability is required, the state of the I2C
garfieldsg	0:662207e34fba	816	* bus must always be monitored by each separate I2C Master. Before an I2C
garfieldsg	0:662207e34fba	817	* Master can assume arbitration of the bus, it must first confirm that no other
garfieldsg	0:662207e34fba	818	* I2C Master has arbitration of the bus. When MULT_MST_EN is set to 1, the
garfieldsg	0:662207e34fba	819	* MPU-60X0's bus arbitration detection logic is turned on, enabling it to
garfieldsg	0:662207e34fba	820	* detect when the bus is available.
garfieldsg	0:662207e34fba	821	*
garfieldsg	0:662207e34fba	822	* @return Current multi-master enabled value
garfieldsg	0:662207e34fba	823	* @see MPU6050_RA_I2C_MST_CTRL
garfieldsg	0:662207e34fba	824	*/
garfieldsg	0:662207e34fba	825	bool MPU6050::getMultiMasterEnabled()
garfieldsg	0:662207e34fba	826	{
garfieldsg	0:662207e34fba	827	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_MULT_MST_EN_BIT, buffer);
garfieldsg	0:662207e34fba	828	return buffer[0];
garfieldsg	0:662207e34fba	829	}
garfieldsg	0:662207e34fba	830	/** Set multi-master enabled value.
garfieldsg	0:662207e34fba	831	* @param enabled New multi-master enabled value
garfieldsg	0:662207e34fba	832	* @see getMultiMasterEnabled()
garfieldsg	0:662207e34fba	833	* @see MPU6050_RA_I2C_MST_CTRL
garfieldsg	0:662207e34fba	834	*/
garfieldsg	0:662207e34fba	835	void MPU6050::setMultiMasterEnabled(bool enabled)
garfieldsg	0:662207e34fba	836	{
garfieldsg	0:662207e34fba	837	i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_MULT_MST_EN_BIT, enabled);
garfieldsg	0:662207e34fba	838	}
garfieldsg	0:662207e34fba	839	/** Get wait-for-external-sensor-data enabled value.
garfieldsg	0:662207e34fba	840	* When the WAIT_FOR_ES bit is set to 1, the Data Ready interrupt will be
garfieldsg	0:662207e34fba	841	* delayed until External Sensor data from the Slave Devices are loaded into the
garfieldsg	0:662207e34fba	842	* EXT_SENS_DATA registers. This is used to ensure that both the internal sensor
garfieldsg	0:662207e34fba	843	* data (i.e. from gyro and accel) and external sensor data have been loaded to
garfieldsg	0:662207e34fba	844	* their respective data registers (i.e. the data is synced) when the Data Ready
garfieldsg	0:662207e34fba	845	* interrupt is triggered.
garfieldsg	0:662207e34fba	846	*
garfieldsg	0:662207e34fba	847	* @return Current wait-for-external-sensor-data enabled value
garfieldsg	0:662207e34fba	848	* @see MPU6050_RA_I2C_MST_CTRL
garfieldsg	0:662207e34fba	849	*/
garfieldsg	0:662207e34fba	850	bool MPU6050::getWaitForExternalSensorEnabled()
garfieldsg	0:662207e34fba	851	{
garfieldsg	0:662207e34fba	852	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_WAIT_FOR_ES_BIT, buffer);
garfieldsg	0:662207e34fba	853	return buffer[0];
garfieldsg	0:662207e34fba	854	}
garfieldsg	0:662207e34fba	855	/** Set wait-for-external-sensor-data enabled value.
garfieldsg	0:662207e34fba	856	* @param enabled New wait-for-external-sensor-data enabled value
garfieldsg	0:662207e34fba	857	* @see getWaitForExternalSensorEnabled()
garfieldsg	0:662207e34fba	858	* @see MPU6050_RA_I2C_MST_CTRL
garfieldsg	0:662207e34fba	859	*/
garfieldsg	0:662207e34fba	860	void MPU6050::setWaitForExternalSensorEnabled(bool enabled)
garfieldsg	0:662207e34fba	861	{
garfieldsg	0:662207e34fba	862	i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_WAIT_FOR_ES_BIT, enabled);
garfieldsg	0:662207e34fba	863	}
garfieldsg	0:662207e34fba	864	/** Get Slave 3 FIFO enabled value.
garfieldsg	0:662207e34fba	865	* When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96)
garfieldsg	0:662207e34fba	866	* associated with Slave 3 to be written into the FIFO buffer.
garfieldsg	0:662207e34fba	867	* @return Current Slave 3 FIFO enabled value
garfieldsg	0:662207e34fba	868	* @see MPU6050_RA_MST_CTRL
garfieldsg	0:662207e34fba	869	*/
garfieldsg	0:662207e34fba	870	bool MPU6050::getSlave3FIFOEnabled()
garfieldsg	0:662207e34fba	871	{
garfieldsg	0:662207e34fba	872	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_SLV_3_FIFO_EN_BIT, buffer);
garfieldsg	0:662207e34fba	873	return buffer[0];
garfieldsg	0:662207e34fba	874	}
garfieldsg	0:662207e34fba	875	/** Set Slave 3 FIFO enabled value.
garfieldsg	0:662207e34fba	876	* @param enabled New Slave 3 FIFO enabled value
garfieldsg	0:662207e34fba	877	* @see getSlave3FIFOEnabled()
garfieldsg	0:662207e34fba	878	* @see MPU6050_RA_MST_CTRL
garfieldsg	0:662207e34fba	879	*/
garfieldsg	0:662207e34fba	880	void MPU6050::setSlave3FIFOEnabled(bool enabled)
garfieldsg	0:662207e34fba	881	{
garfieldsg	0:662207e34fba	882	i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_SLV_3_FIFO_EN_BIT, enabled);
garfieldsg	0:662207e34fba	883	}
garfieldsg	0:662207e34fba	884	/** Get slave read/write transition enabled value.
garfieldsg	0:662207e34fba	885	* The I2C_MST_P_NSR bit configures the I2C Master's transition from one slave
garfieldsg	0:662207e34fba	886	* read to the next slave read. If the bit equals 0, there will be a restart
garfieldsg	0:662207e34fba	887	* between reads. If the bit equals 1, there will be a stop followed by a start
garfieldsg	0:662207e34fba	888	* of the following read. When a write transaction follows a read transaction,
garfieldsg	0:662207e34fba	889	* the stop followed by a start of the successive write will be always used.
garfieldsg	0:662207e34fba	890	*
garfieldsg	0:662207e34fba	891	* @return Current slave read/write transition enabled value
garfieldsg	0:662207e34fba	892	* @see MPU6050_RA_I2C_MST_CTRL
garfieldsg	0:662207e34fba	893	*/
garfieldsg	0:662207e34fba	894	bool MPU6050::getSlaveReadWriteTransitionEnabled()
garfieldsg	0:662207e34fba	895	{
garfieldsg	0:662207e34fba	896	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_P_NSR_BIT, buffer);
garfieldsg	0:662207e34fba	897	return buffer[0];
garfieldsg	0:662207e34fba	898	}
garfieldsg	0:662207e34fba	899	/** Set slave read/write transition enabled value.
garfieldsg	0:662207e34fba	900	* @param enabled New slave read/write transition enabled value
garfieldsg	0:662207e34fba	901	* @see getSlaveReadWriteTransitionEnabled()
garfieldsg	0:662207e34fba	902	* @see MPU6050_RA_I2C_MST_CTRL
garfieldsg	0:662207e34fba	903	*/
garfieldsg	0:662207e34fba	904	void MPU6050::setSlaveReadWriteTransitionEnabled(bool enabled)
garfieldsg	0:662207e34fba	905	{
garfieldsg	0:662207e34fba	906	i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_P_NSR_BIT, enabled);
garfieldsg	0:662207e34fba	907	}
garfieldsg	0:662207e34fba	908	/** Get I2C master clock speed.
garfieldsg	0:662207e34fba	909	* I2C_MST_CLK is a 4 bit unsigned value which configures a divider on the
garfieldsg	0:662207e34fba	910	* MPU-60X0 internal 8MHz clock. It sets the I2C master clock speed according to
garfieldsg	0:662207e34fba	911	* the following table:
garfieldsg	0:662207e34fba	912	*
garfieldsg	0:662207e34fba	913	* <pre>
garfieldsg	0:662207e34fba	914	* I2C_MST_CLK \| I2C Master Clock Speed \| 8MHz Clock Divider
garfieldsg	0:662207e34fba	915	* ------------+------------------------+-------------------
garfieldsg	0:662207e34fba	916	* 0 \| 348kHz \| 23
garfieldsg	0:662207e34fba	917	* 1 \| 333kHz \| 24
garfieldsg	0:662207e34fba	918	* 2 \| 320kHz \| 25
garfieldsg	0:662207e34fba	919	* 3 \| 308kHz \| 26
garfieldsg	0:662207e34fba	920	* 4 \| 296kHz \| 27
garfieldsg	0:662207e34fba	921	* 5 \| 286kHz \| 28
garfieldsg	0:662207e34fba	922	* 6 \| 276kHz \| 29
garfieldsg	0:662207e34fba	923	* 7 \| 267kHz \| 30
garfieldsg	0:662207e34fba	924	* 8 \| 258kHz \| 31
garfieldsg	0:662207e34fba	925	* 9 \| 500kHz \| 16
garfieldsg	0:662207e34fba	926	* 10 \| 471kHz \| 17
garfieldsg	0:662207e34fba	927	* 11 \| 444kHz \| 18
garfieldsg	0:662207e34fba	928	* 12 \| 421kHz \| 19
garfieldsg	0:662207e34fba	929	* 13 \| 400kHz \| 20
garfieldsg	0:662207e34fba	930	* 14 \| 381kHz \| 21
garfieldsg	0:662207e34fba	931	* 15 \| 364kHz \| 22
garfieldsg	0:662207e34fba	932	* </pre>
garfieldsg	0:662207e34fba	933	*
garfieldsg	0:662207e34fba	934	* @return Current I2C master clock speed
garfieldsg	0:662207e34fba	935	* @see MPU6050_RA_I2C_MST_CTRL
garfieldsg	0:662207e34fba	936	*/
garfieldsg	0:662207e34fba	937	uint8_t MPU6050::getMasterClockSpeed()
garfieldsg	0:662207e34fba	938	{
garfieldsg	0:662207e34fba	939	i2Cdev.readBits(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_CLK_BIT, MPU6050_I2C_MST_CLK_LENGTH, buffer);
garfieldsg	0:662207e34fba	940	return buffer[0];
garfieldsg	0:662207e34fba	941	}
garfieldsg	0:662207e34fba	942	/** Set I2C master clock speed.
garfieldsg	0:662207e34fba	943	* @reparam speed Current I2C master clock speed
garfieldsg	0:662207e34fba	944	* @see MPU6050_RA_I2C_MST_CTRL
garfieldsg	0:662207e34fba	945	*/
garfieldsg	0:662207e34fba	946	void MPU6050::setMasterClockSpeed(uint8_t speed)
garfieldsg	0:662207e34fba	947	{
garfieldsg	0:662207e34fba	948	i2Cdev.writeBits(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_CLK_BIT, MPU6050_I2C_MST_CLK_LENGTH, speed);
garfieldsg	0:662207e34fba	949	}
garfieldsg	0:662207e34fba	950
garfieldsg	0:662207e34fba	951	// I2C_SLV* registers (Slave 0-3)
garfieldsg	0:662207e34fba	952
garfieldsg	0:662207e34fba	953	/** Get the I2C address of the specified slave (0-3).
garfieldsg	0:662207e34fba	954	* Note that Bit 7 (MSB) controls read/write mode. If Bit 7 is set, it's a read
garfieldsg	0:662207e34fba	955	* operation, and if it is cleared, then it's a write operation. The remaining
garfieldsg	0:662207e34fba	956	* bits (6-0) are the 7-bit device address of the slave device.
garfieldsg	0:662207e34fba	957	*
garfieldsg	0:662207e34fba	958	* In read mode, the result of the read is placed in the lowest available
garfieldsg	0:662207e34fba	959	* EXT_SENS_DATA register. For further information regarding the allocation of
garfieldsg	0:662207e34fba	960	* read results, please refer to the EXT_SENS_DATA register description
garfieldsg	0:662207e34fba	961	* (Registers 73 - 96).
garfieldsg	0:662207e34fba	962	*
garfieldsg	0:662207e34fba	963	* The MPU-6050 supports a total of five slaves, but Slave 4 has unique
garfieldsg	0:662207e34fba	964	* characteristics, and so it has its own functions (getSlave4* and setSlave4*).
garfieldsg	0:662207e34fba	965	*
garfieldsg	0:662207e34fba	966	* I2C data transactions are performed at the Sample Rate, as defined in
garfieldsg	0:662207e34fba	967	* Register 25. The user is responsible for ensuring that I2C data transactions
garfieldsg	0:662207e34fba	968	* to and from each enabled Slave can be completed within a single period of the
garfieldsg	0:662207e34fba	969	* Sample Rate.
garfieldsg	0:662207e34fba	970	*
garfieldsg	0:662207e34fba	971	* The I2C slave access rate can be reduced relative to the Sample Rate. This
garfieldsg	0:662207e34fba	972	* reduced access rate is determined by I2C_MST_DLY (Register 52). Whether a
garfieldsg	0:662207e34fba	973	* slave's access rate is reduced relative to the Sample Rate is determined by
garfieldsg	0:662207e34fba	974	* I2C_MST_DELAY_CTRL (Register 103).
garfieldsg	0:662207e34fba	975	*
garfieldsg	0:662207e34fba	976	* The processing order for the slaves is fixed. The sequence followed for
garfieldsg	0:662207e34fba	977	* processing the slaves is Slave 0, Slave 1, Slave 2, Slave 3 and Slave 4. If a
garfieldsg	0:662207e34fba	978	* particular Slave is disabled it will be skipped.
garfieldsg	0:662207e34fba	979	*
garfieldsg	0:662207e34fba	980	* Each slave can either be accessed at the sample rate or at a reduced sample
garfieldsg	0:662207e34fba	981	* rate. In a case where some slaves are accessed at the Sample Rate and some
garfieldsg	0:662207e34fba	982	* slaves are accessed at the reduced rate, the sequence of accessing the slaves
garfieldsg	0:662207e34fba	983	* (Slave 0 to Slave 4) is still followed. However, the reduced rate slaves will
garfieldsg	0:662207e34fba	984	* be skipped if their access rate dictates that they should not be accessed
garfieldsg	0:662207e34fba	985	* during that particular cycle. For further information regarding the reduced
garfieldsg	0:662207e34fba	986	* access rate, please refer to Register 52. Whether a slave is accessed at the
garfieldsg	0:662207e34fba	987	* Sample Rate or at the reduced rate is determined by the Delay Enable bits in
garfieldsg	0:662207e34fba	988	* Register 103.
garfieldsg	0:662207e34fba	989	*
garfieldsg	0:662207e34fba	990	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	991	* @return Current address for specified slave
garfieldsg	0:662207e34fba	992	* @see MPU6050_RA_I2C_SLV0_ADDR
garfieldsg	0:662207e34fba	993	*/
garfieldsg	0:662207e34fba	994	uint8_t MPU6050::getSlaveAddress(uint8_t num)
garfieldsg	0:662207e34fba	995	{
garfieldsg	0:662207e34fba	996	if (num > 3) return 0;
garfieldsg	0:662207e34fba	997	i2Cdev.readByte(devAddr, MPU6050_RA_I2C_SLV0_ADDR + num*3, buffer);
garfieldsg	0:662207e34fba	998	return buffer[0];
garfieldsg	0:662207e34fba	999	}
garfieldsg	0:662207e34fba	1000	/** Set the I2C address of the specified slave (0-3).
garfieldsg	0:662207e34fba	1001	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	1002	* @param address New address for specified slave
garfieldsg	0:662207e34fba	1003	* @see getSlaveAddress()
garfieldsg	0:662207e34fba	1004	* @see MPU6050_RA_I2C_SLV0_ADDR
garfieldsg	0:662207e34fba	1005	*/
garfieldsg	0:662207e34fba	1006	void MPU6050::setSlaveAddress(uint8_t num, uint8_t address)
garfieldsg	0:662207e34fba	1007	{
garfieldsg	0:662207e34fba	1008	if (num > 3) return;
garfieldsg	0:662207e34fba	1009	i2Cdev.writeByte(devAddr, MPU6050_RA_I2C_SLV0_ADDR + num*3, address);
garfieldsg	0:662207e34fba	1010	}
garfieldsg	0:662207e34fba	1011	/** Get the active internal register for the specified slave (0-3).
garfieldsg	0:662207e34fba	1012	* Read/write operations for this slave will be done to whatever internal
garfieldsg	0:662207e34fba	1013	* register address is stored in this MPU register.
garfieldsg	0:662207e34fba	1014	*
garfieldsg	0:662207e34fba	1015	* The MPU-6050 supports a total of five slaves, but Slave 4 has unique
garfieldsg	0:662207e34fba	1016	* characteristics, and so it has its own functions.
garfieldsg	0:662207e34fba	1017	*
garfieldsg	0:662207e34fba	1018	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	1019	* @return Current active register for specified slave
garfieldsg	0:662207e34fba	1020	* @see MPU6050_RA_I2C_SLV0_REG
garfieldsg	0:662207e34fba	1021	*/
garfieldsg	0:662207e34fba	1022	uint8_t MPU6050::getSlaveRegister(uint8_t num)
garfieldsg	0:662207e34fba	1023	{
garfieldsg	0:662207e34fba	1024	if (num > 3) return 0;
garfieldsg	0:662207e34fba	1025	i2Cdev.readByte(devAddr, MPU6050_RA_I2C_SLV0_REG + num*3, buffer);
garfieldsg	0:662207e34fba	1026	return buffer[0];
garfieldsg	0:662207e34fba	1027	}
garfieldsg	0:662207e34fba	1028	/** Set the active internal register for the specified slave (0-3).
garfieldsg	0:662207e34fba	1029	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	1030	* @param reg New active register for specified slave
garfieldsg	0:662207e34fba	1031	* @see getSlaveRegister()
garfieldsg	0:662207e34fba	1032	* @see MPU6050_RA_I2C_SLV0_REG
garfieldsg	0:662207e34fba	1033	*/
garfieldsg	0:662207e34fba	1034	void MPU6050::setSlaveRegister(uint8_t num, uint8_t reg)
garfieldsg	0:662207e34fba	1035	{
garfieldsg	0:662207e34fba	1036	if (num > 3) return;
garfieldsg	0:662207e34fba	1037	i2Cdev.writeByte(devAddr, MPU6050_RA_I2C_SLV0_REG + num*3, reg);
garfieldsg	0:662207e34fba	1038	}
garfieldsg	0:662207e34fba	1039	/** Get the enabled value for the specified slave (0-3).
garfieldsg	0:662207e34fba	1040	* When set to 1, this bit enables Slave 0 for data transfer operations. When
garfieldsg	0:662207e34fba	1041	* cleared to 0, this bit disables Slave 0 from data transfer operations.
garfieldsg	0:662207e34fba	1042	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	1043	* @return Current enabled value for specified slave
garfieldsg	0:662207e34fba	1044	* @see MPU6050_RA_I2C_SLV0_CTRL
garfieldsg	0:662207e34fba	1045	*/
garfieldsg	0:662207e34fba	1046	bool MPU6050::getSlaveEnabled(uint8_t num)
garfieldsg	0:662207e34fba	1047	{
garfieldsg	0:662207e34fba	1048	if (num > 3) return 0;
garfieldsg	0:662207e34fba	1049	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_EN_BIT, buffer);
garfieldsg	0:662207e34fba	1050	return buffer[0];
garfieldsg	0:662207e34fba	1051	}
garfieldsg	0:662207e34fba	1052	/** Set the enabled value for the specified slave (0-3).
garfieldsg	0:662207e34fba	1053	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	1054	* @param enabled New enabled value for specified slave
garfieldsg	0:662207e34fba	1055	* @see getSlaveEnabled()
garfieldsg	0:662207e34fba	1056	* @see MPU6050_RA_I2C_SLV0_CTRL
garfieldsg	0:662207e34fba	1057	*/
garfieldsg	0:662207e34fba	1058	void MPU6050::setSlaveEnabled(uint8_t num, bool enabled)
garfieldsg	0:662207e34fba	1059	{
garfieldsg	0:662207e34fba	1060	if (num > 3) return;
garfieldsg	0:662207e34fba	1061	i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_EN_BIT, enabled);
garfieldsg	0:662207e34fba	1062	}
garfieldsg	0:662207e34fba	1063	/** Get word pair byte-swapping enabled for the specified slave (0-3).
garfieldsg	0:662207e34fba	1064	* When set to 1, this bit enables byte swapping. When byte swapping is enabled,
garfieldsg	0:662207e34fba	1065	* the high and low bytes of a word pair are swapped. Please refer to
garfieldsg	0:662207e34fba	1066	* I2C_SLV0_GRP for the pairing convention of the word pairs. When cleared to 0,
garfieldsg	0:662207e34fba	1067	* bytes transferred to and from Slave 0 will be written to EXT_SENS_DATA
garfieldsg	0:662207e34fba	1068	* registers in the order they were transferred.
garfieldsg	0:662207e34fba	1069	*
garfieldsg	0:662207e34fba	1070	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	1071	* @return Current word pair byte-swapping enabled value for specified slave
garfieldsg	0:662207e34fba	1072	* @see MPU6050_RA_I2C_SLV0_CTRL
garfieldsg	0:662207e34fba	1073	*/
garfieldsg	0:662207e34fba	1074	bool MPU6050::getSlaveWordByteSwap(uint8_t num)
garfieldsg	0:662207e34fba	1075	{
garfieldsg	0:662207e34fba	1076	if (num > 3) return 0;
garfieldsg	0:662207e34fba	1077	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_BYTE_SW_BIT, buffer);
garfieldsg	0:662207e34fba	1078	return buffer[0];
garfieldsg	0:662207e34fba	1079	}
garfieldsg	0:662207e34fba	1080	/** Set word pair byte-swapping enabled for the specified slave (0-3).
garfieldsg	0:662207e34fba	1081	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	1082	* @param enabled New word pair byte-swapping enabled value for specified slave
garfieldsg	0:662207e34fba	1083	* @see getSlaveWordByteSwap()
garfieldsg	0:662207e34fba	1084	* @see MPU6050_RA_I2C_SLV0_CTRL
garfieldsg	0:662207e34fba	1085	*/
garfieldsg	0:662207e34fba	1086	void MPU6050::setSlaveWordByteSwap(uint8_t num, bool enabled)
garfieldsg	0:662207e34fba	1087	{
garfieldsg	0:662207e34fba	1088	if (num > 3) return;
garfieldsg	0:662207e34fba	1089	i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_BYTE_SW_BIT, enabled);
garfieldsg	0:662207e34fba	1090	}
garfieldsg	0:662207e34fba	1091	/** Get write mode for the specified slave (0-3).
garfieldsg	0:662207e34fba	1092	* When set to 1, the transaction will read or write data only. When cleared to
garfieldsg	0:662207e34fba	1093	* 0, the transaction will write a register address prior to reading or writing
garfieldsg	0:662207e34fba	1094	* data. This should equal 0 when specifying the register address within the
garfieldsg	0:662207e34fba	1095	* Slave device to/from which the ensuing data transaction will take place.
garfieldsg	0:662207e34fba	1096	*
garfieldsg	0:662207e34fba	1097	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	1098	* @return Current write mode for specified slave (0 = register address + data, 1 = data only)
garfieldsg	0:662207e34fba	1099	* @see MPU6050_RA_I2C_SLV0_CTRL
garfieldsg	0:662207e34fba	1100	*/
garfieldsg	0:662207e34fba	1101	bool MPU6050::getSlaveWriteMode(uint8_t num)
garfieldsg	0:662207e34fba	1102	{
garfieldsg	0:662207e34fba	1103	if (num > 3) return 0;
garfieldsg	0:662207e34fba	1104	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_REG_DIS_BIT, buffer);
garfieldsg	0:662207e34fba	1105	return buffer[0];
garfieldsg	0:662207e34fba	1106	}
garfieldsg	0:662207e34fba	1107	/** Set write mode for the specified slave (0-3).
garfieldsg	0:662207e34fba	1108	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	1109	* @param mode New write mode for specified slave (0 = register address + data, 1 = data only)
garfieldsg	0:662207e34fba	1110	* @see getSlaveWriteMode()
garfieldsg	0:662207e34fba	1111	* @see MPU6050_RA_I2C_SLV0_CTRL
garfieldsg	0:662207e34fba	1112	*/
garfieldsg	0:662207e34fba	1113	void MPU6050::setSlaveWriteMode(uint8_t num, bool mode)
garfieldsg	0:662207e34fba	1114	{
garfieldsg	0:662207e34fba	1115	if (num > 3) return;
garfieldsg	0:662207e34fba	1116	i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_REG_DIS_BIT, mode);
garfieldsg	0:662207e34fba	1117	}
garfieldsg	0:662207e34fba	1118	/** Get word pair grouping order offset for the specified slave (0-3).
garfieldsg	0:662207e34fba	1119	* This sets specifies the grouping order of word pairs received from registers.
garfieldsg	0:662207e34fba	1120	* When cleared to 0, bytes from register addresses 0 and 1, 2 and 3, etc (even,
garfieldsg	0:662207e34fba	1121	* then odd register addresses) are paired to form a word. When set to 1, bytes
garfieldsg	0:662207e34fba	1122	* from register addresses are paired 1 and 2, 3 and 4, etc. (odd, then even
garfieldsg	0:662207e34fba	1123	* register addresses) are paired to form a word.
garfieldsg	0:662207e34fba	1124	*
garfieldsg	0:662207e34fba	1125	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	1126	* @return Current word pair grouping order offset for specified slave
garfieldsg	0:662207e34fba	1127	* @see MPU6050_RA_I2C_SLV0_CTRL
garfieldsg	0:662207e34fba	1128	*/
garfieldsg	0:662207e34fba	1129	bool MPU6050::getSlaveWordGroupOffset(uint8_t num)
garfieldsg	0:662207e34fba	1130	{
garfieldsg	0:662207e34fba	1131	if (num > 3) return 0;
garfieldsg	0:662207e34fba	1132	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_GRP_BIT, buffer);
garfieldsg	0:662207e34fba	1133	return buffer[0];
garfieldsg	0:662207e34fba	1134	}
garfieldsg	0:662207e34fba	1135	/** Set word pair grouping order offset for the specified slave (0-3).
garfieldsg	0:662207e34fba	1136	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	1137	* @param enabled New word pair grouping order offset for specified slave
garfieldsg	0:662207e34fba	1138	* @see getSlaveWordGroupOffset()
garfieldsg	0:662207e34fba	1139	* @see MPU6050_RA_I2C_SLV0_CTRL
garfieldsg	0:662207e34fba	1140	*/
garfieldsg	0:662207e34fba	1141	void MPU6050::setSlaveWordGroupOffset(uint8_t num, bool enabled)
garfieldsg	0:662207e34fba	1142	{
garfieldsg	0:662207e34fba	1143	if (num > 3) return;
garfieldsg	0:662207e34fba	1144	i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_GRP_BIT, enabled);
garfieldsg	0:662207e34fba	1145	}
garfieldsg	0:662207e34fba	1146	/** Get number of bytes to read for the specified slave (0-3).
garfieldsg	0:662207e34fba	1147	* Specifies the number of bytes transferred to and from Slave 0. Clearing this
garfieldsg	0:662207e34fba	1148	* bit to 0 is equivalent to disabling the register by writing 0 to I2C_SLV0_EN.
garfieldsg	0:662207e34fba	1149	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	1150	* @return Number of bytes to read for specified slave
garfieldsg	0:662207e34fba	1151	* @see MPU6050_RA_I2C_SLV0_CTRL
garfieldsg	0:662207e34fba	1152	*/
garfieldsg	0:662207e34fba	1153	uint8_t MPU6050::getSlaveDataLength(uint8_t num)
garfieldsg	0:662207e34fba	1154	{
garfieldsg	0:662207e34fba	1155	if (num > 3) return 0;
garfieldsg	0:662207e34fba	1156	i2Cdev.readBits(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_LEN_BIT, MPU6050_I2C_SLV_LEN_LENGTH, buffer);
garfieldsg	0:662207e34fba	1157	return buffer[0];
garfieldsg	0:662207e34fba	1158	}
garfieldsg	0:662207e34fba	1159	/** Set number of bytes to read for the specified slave (0-3).
garfieldsg	0:662207e34fba	1160	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	1161	* @param length Number of bytes to read for specified slave
garfieldsg	0:662207e34fba	1162	* @see getSlaveDataLength()
garfieldsg	0:662207e34fba	1163	* @see MPU6050_RA_I2C_SLV0_CTRL
garfieldsg	0:662207e34fba	1164	*/
garfieldsg	0:662207e34fba	1165	void MPU6050::setSlaveDataLength(uint8_t num, uint8_t length)
garfieldsg	0:662207e34fba	1166	{
garfieldsg	0:662207e34fba	1167	if (num > 3) return;
garfieldsg	0:662207e34fba	1168	i2Cdev.writeBits(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_LEN_BIT, MPU6050_I2C_SLV_LEN_LENGTH, length);
garfieldsg	0:662207e34fba	1169	}
garfieldsg	0:662207e34fba	1170
garfieldsg	0:662207e34fba	1171	// I2C_SLV* registers (Slave 4)
garfieldsg	0:662207e34fba	1172
garfieldsg	0:662207e34fba	1173	/** Get the I2C address of Slave 4.
garfieldsg	0:662207e34fba	1174	* Note that Bit 7 (MSB) controls read/write mode. If Bit 7 is set, it's a read
garfieldsg	0:662207e34fba	1175	* operation, and if it is cleared, then it's a write operation. The remaining
garfieldsg	0:662207e34fba	1176	* bits (6-0) are the 7-bit device address of the slave device.
garfieldsg	0:662207e34fba	1177	*
garfieldsg	0:662207e34fba	1178	* @return Current address for Slave 4
garfieldsg	0:662207e34fba	1179	* @see getSlaveAddress()
garfieldsg	0:662207e34fba	1180	* @see MPU6050_RA_I2C_SLV4_ADDR
garfieldsg	0:662207e34fba	1181	*/
garfieldsg	0:662207e34fba	1182	uint8_t MPU6050::getSlave4Address()
garfieldsg	0:662207e34fba	1183	{
garfieldsg	0:662207e34fba	1184	i2Cdev.readByte(devAddr, MPU6050_RA_I2C_SLV4_ADDR, buffer);
garfieldsg	0:662207e34fba	1185	return buffer[0];
garfieldsg	0:662207e34fba	1186	}
garfieldsg	0:662207e34fba	1187	/** Set the I2C address of Slave 4.
garfieldsg	0:662207e34fba	1188	* @param address New address for Slave 4
garfieldsg	0:662207e34fba	1189	* @see getSlave4Address()
garfieldsg	0:662207e34fba	1190	* @see MPU6050_RA_I2C_SLV4_ADDR
garfieldsg	0:662207e34fba	1191	*/
garfieldsg	0:662207e34fba	1192	void MPU6050::setSlave4Address(uint8_t address)
garfieldsg	0:662207e34fba	1193	{
garfieldsg	0:662207e34fba	1194	i2Cdev.writeByte(devAddr, MPU6050_RA_I2C_SLV4_ADDR, address);
garfieldsg	0:662207e34fba	1195	}
garfieldsg	0:662207e34fba	1196	/** Get the active internal register for the Slave 4.
garfieldsg	0:662207e34fba	1197	* Read/write operations for this slave will be done to whatever internal
garfieldsg	0:662207e34fba	1198	* register address is stored in this MPU register.
garfieldsg	0:662207e34fba	1199	*
garfieldsg	0:662207e34fba	1200	* @return Current active register for Slave 4
garfieldsg	0:662207e34fba	1201	* @see MPU6050_RA_I2C_SLV4_REG
garfieldsg	0:662207e34fba	1202	*/
garfieldsg	0:662207e34fba	1203	uint8_t MPU6050::getSlave4Register()
garfieldsg	0:662207e34fba	1204	{
garfieldsg	0:662207e34fba	1205	i2Cdev.readByte(devAddr, MPU6050_RA_I2C_SLV4_REG, buffer);
garfieldsg	0:662207e34fba	1206	return buffer[0];
garfieldsg	0:662207e34fba	1207	}
garfieldsg	0:662207e34fba	1208	/** Set the active internal register for Slave 4.
garfieldsg	0:662207e34fba	1209	* @param reg New active register for Slave 4
garfieldsg	0:662207e34fba	1210	* @see getSlave4Register()
garfieldsg	0:662207e34fba	1211	* @see MPU6050_RA_I2C_SLV4_REG
garfieldsg	0:662207e34fba	1212	*/
garfieldsg	0:662207e34fba	1213	void MPU6050::setSlave4Register(uint8_t reg)
garfieldsg	0:662207e34fba	1214	{
garfieldsg	0:662207e34fba	1215	i2Cdev.writeByte(devAddr, MPU6050_RA_I2C_SLV4_REG, reg);
garfieldsg	0:662207e34fba	1216	}
garfieldsg	0:662207e34fba	1217	/** Set new byte to write to Slave 4.
garfieldsg	0:662207e34fba	1218	* This register stores the data to be written into the Slave 4. If I2C_SLV4_RW
garfieldsg	0:662207e34fba	1219	* is set 1 (set to read), this register has no effect.
garfieldsg	0:662207e34fba	1220	* @param data New byte to write to Slave 4
garfieldsg	0:662207e34fba	1221	* @see MPU6050_RA_I2C_SLV4_DO
garfieldsg	0:662207e34fba	1222	*/
garfieldsg	0:662207e34fba	1223	void MPU6050::setSlave4OutputByte(uint8_t data)
garfieldsg	0:662207e34fba	1224	{
garfieldsg	0:662207e34fba	1225	i2Cdev.writeByte(devAddr, MPU6050_RA_I2C_SLV4_DO, data);
garfieldsg	0:662207e34fba	1226	}
garfieldsg	0:662207e34fba	1227	/** Get the enabled value for the Slave 4.
garfieldsg	0:662207e34fba	1228	* When set to 1, this bit enables Slave 4 for data transfer operations. When
garfieldsg	0:662207e34fba	1229	* cleared to 0, this bit disables Slave 4 from data transfer operations.
garfieldsg	0:662207e34fba	1230	* @return Current enabled value for Slave 4
garfieldsg	0:662207e34fba	1231	* @see MPU6050_RA_I2C_SLV4_CTRL
garfieldsg	0:662207e34fba	1232	*/
garfieldsg	0:662207e34fba	1233	bool MPU6050::getSlave4Enabled()
garfieldsg	0:662207e34fba	1234	{
garfieldsg	0:662207e34fba	1235	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_EN_BIT, buffer);
garfieldsg	0:662207e34fba	1236	return buffer[0];
garfieldsg	0:662207e34fba	1237	}
garfieldsg	0:662207e34fba	1238	/** Set the enabled value for Slave 4.
garfieldsg	0:662207e34fba	1239	* @param enabled New enabled value for Slave 4
garfieldsg	0:662207e34fba	1240	* @see getSlave4Enabled()
garfieldsg	0:662207e34fba	1241	* @see MPU6050_RA_I2C_SLV4_CTRL
garfieldsg	0:662207e34fba	1242	*/
garfieldsg	0:662207e34fba	1243	void MPU6050::setSlave4Enabled(bool enabled)
garfieldsg	0:662207e34fba	1244	{
garfieldsg	0:662207e34fba	1245	i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_EN_BIT, enabled);
garfieldsg	0:662207e34fba	1246	}
garfieldsg	0:662207e34fba	1247	/** Get the enabled value for Slave 4 transaction interrupts.
garfieldsg	0:662207e34fba	1248	* When set to 1, this bit enables the generation of an interrupt signal upon
garfieldsg	0:662207e34fba	1249	* completion of a Slave 4 transaction. When cleared to 0, this bit disables the
garfieldsg	0:662207e34fba	1250	* generation of an interrupt signal upon completion of a Slave 4 transaction.
garfieldsg	0:662207e34fba	1251	* The interrupt status can be observed in Register 54.
garfieldsg	0:662207e34fba	1252	*
garfieldsg	0:662207e34fba	1253	* @return Current enabled value for Slave 4 transaction interrupts.
garfieldsg	0:662207e34fba	1254	* @see MPU6050_RA_I2C_SLV4_CTRL
garfieldsg	0:662207e34fba	1255	*/
garfieldsg	0:662207e34fba	1256	bool MPU6050::getSlave4InterruptEnabled()
garfieldsg	0:662207e34fba	1257	{
garfieldsg	0:662207e34fba	1258	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_INT_EN_BIT, buffer);
garfieldsg	0:662207e34fba	1259	return buffer[0];
garfieldsg	0:662207e34fba	1260	}
garfieldsg	0:662207e34fba	1261	/** Set the enabled value for Slave 4 transaction interrupts.
garfieldsg	0:662207e34fba	1262	* @param enabled New enabled value for Slave 4 transaction interrupts.
garfieldsg	0:662207e34fba	1263	* @see getSlave4InterruptEnabled()
garfieldsg	0:662207e34fba	1264	* @see MPU6050_RA_I2C_SLV4_CTRL
garfieldsg	0:662207e34fba	1265	*/
garfieldsg	0:662207e34fba	1266	void MPU6050::setSlave4InterruptEnabled(bool enabled)
garfieldsg	0:662207e34fba	1267	{
garfieldsg	0:662207e34fba	1268	i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_INT_EN_BIT, enabled);
garfieldsg	0:662207e34fba	1269	}
garfieldsg	0:662207e34fba	1270	/** Get write mode for Slave 4.
garfieldsg	0:662207e34fba	1271	* When set to 1, the transaction will read or write data only. When cleared to
garfieldsg	0:662207e34fba	1272	* 0, the transaction will write a register address prior to reading or writing
garfieldsg	0:662207e34fba	1273	* data. This should equal 0 when specifying the register address within the
garfieldsg	0:662207e34fba	1274	* Slave device to/from which the ensuing data transaction will take place.
garfieldsg	0:662207e34fba	1275	*
garfieldsg	0:662207e34fba	1276	* @return Current write mode for Slave 4 (0 = register address + data, 1 = data only)
garfieldsg	0:662207e34fba	1277	* @see MPU6050_RA_I2C_SLV4_CTRL
garfieldsg	0:662207e34fba	1278	*/
garfieldsg	0:662207e34fba	1279	bool MPU6050::getSlave4WriteMode()
garfieldsg	0:662207e34fba	1280	{
garfieldsg	0:662207e34fba	1281	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_REG_DIS_BIT, buffer);
garfieldsg	0:662207e34fba	1282	return buffer[0];
garfieldsg	0:662207e34fba	1283	}
garfieldsg	0:662207e34fba	1284	/** Set write mode for the Slave 4.
garfieldsg	0:662207e34fba	1285	* @param mode New write mode for Slave 4 (0 = register address + data, 1 = data only)
garfieldsg	0:662207e34fba	1286	* @see getSlave4WriteMode()
garfieldsg	0:662207e34fba	1287	* @see MPU6050_RA_I2C_SLV4_CTRL
garfieldsg	0:662207e34fba	1288	*/
garfieldsg	0:662207e34fba	1289	void MPU6050::setSlave4WriteMode(bool mode)
garfieldsg	0:662207e34fba	1290	{
garfieldsg	0:662207e34fba	1291	i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_REG_DIS_BIT, mode);
garfieldsg	0:662207e34fba	1292	}
garfieldsg	0:662207e34fba	1293	/** Get Slave 4 master delay value.
garfieldsg	0:662207e34fba	1294	* This configures the reduced access rate of I2C slaves relative to the Sample
garfieldsg	0:662207e34fba	1295	* Rate. When a slave's access rate is decreased relative to the Sample Rate,
garfieldsg	0:662207e34fba	1296	* the slave is accessed every:
garfieldsg	0:662207e34fba	1297	*
garfieldsg	0:662207e34fba	1298	* 1 / (1 + I2C_MST_DLY) samples
garfieldsg	0:662207e34fba	1299	*
garfieldsg	0:662207e34fba	1300	* This base Sample Rate in turn is determined by SMPLRT_DIV (register 25) and
garfieldsg	0:662207e34fba	1301	* DLPF_CFG (register 26). Whether a slave's access rate is reduced relative to
garfieldsg	0:662207e34fba	1302	* the Sample Rate is determined by I2C_MST_DELAY_CTRL (register 103). For
garfieldsg	0:662207e34fba	1303	* further information regarding the Sample Rate, please refer to register 25.
garfieldsg	0:662207e34fba	1304	*
garfieldsg	0:662207e34fba	1305	* @return Current Slave 4 master delay value
garfieldsg	0:662207e34fba	1306	* @see MPU6050_RA_I2C_SLV4_CTRL
garfieldsg	0:662207e34fba	1307	*/
garfieldsg	0:662207e34fba	1308	uint8_t MPU6050::getSlave4MasterDelay()
garfieldsg	0:662207e34fba	1309	{
garfieldsg	0:662207e34fba	1310	i2Cdev.readBits(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_MST_DLY_BIT, MPU6050_I2C_SLV4_MST_DLY_LENGTH, buffer);
garfieldsg	0:662207e34fba	1311	return buffer[0];
garfieldsg	0:662207e34fba	1312	}
garfieldsg	0:662207e34fba	1313	/** Set Slave 4 master delay value.
garfieldsg	0:662207e34fba	1314	* @param delay New Slave 4 master delay value
garfieldsg	0:662207e34fba	1315	* @see getSlave4MasterDelay()
garfieldsg	0:662207e34fba	1316	* @see MPU6050_RA_I2C_SLV4_CTRL
garfieldsg	0:662207e34fba	1317	*/
garfieldsg	0:662207e34fba	1318	void MPU6050::setSlave4MasterDelay(uint8_t delay)
garfieldsg	0:662207e34fba	1319	{
garfieldsg	0:662207e34fba	1320	i2Cdev.writeBits(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_MST_DLY_BIT, MPU6050_I2C_SLV4_MST_DLY_LENGTH, delay);
garfieldsg	0:662207e34fba	1321	}
garfieldsg	0:662207e34fba	1322	/** Get last available byte read from Slave 4.
garfieldsg	0:662207e34fba	1323	* This register stores the data read from Slave 4. This field is populated
garfieldsg	0:662207e34fba	1324	* after a read transaction.
garfieldsg	0:662207e34fba	1325	* @return Last available byte read from to Slave 4
garfieldsg	0:662207e34fba	1326	* @see MPU6050_RA_I2C_SLV4_DI
garfieldsg	0:662207e34fba	1327	*/
garfieldsg	0:662207e34fba	1328	uint8_t MPU6050::getSlate4InputByte()
garfieldsg	0:662207e34fba	1329	{
garfieldsg	0:662207e34fba	1330	i2Cdev.readByte(devAddr, MPU6050_RA_I2C_SLV4_DI, buffer);
garfieldsg	0:662207e34fba	1331	return buffer[0];
garfieldsg	0:662207e34fba	1332	}
garfieldsg	0:662207e34fba	1333
garfieldsg	0:662207e34fba	1334	// I2C_MST_STATUS register
garfieldsg	0:662207e34fba	1335
garfieldsg	0:662207e34fba	1336	/** Get FSYNC interrupt status.
garfieldsg	0:662207e34fba	1337	* This bit reflects the status of the FSYNC interrupt from an external device
garfieldsg	0:662207e34fba	1338	* into the MPU-60X0. This is used as a way to pass an external interrupt
garfieldsg	0:662207e34fba	1339	* through the MPU-60X0 to the host application processor. When set to 1, this
garfieldsg	0:662207e34fba	1340	* bit will cause an interrupt if FSYNC_INT_EN is asserted in INT_PIN_CFG
garfieldsg	0:662207e34fba	1341	* (Register 55).
garfieldsg	0:662207e34fba	1342	* @return FSYNC interrupt status
garfieldsg	0:662207e34fba	1343	* @see MPU6050_RA_I2C_MST_STATUS
garfieldsg	0:662207e34fba	1344	*/
garfieldsg	0:662207e34fba	1345	bool MPU6050::getPassthroughStatus()
garfieldsg	0:662207e34fba	1346	{
garfieldsg	0:662207e34fba	1347	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_PASS_THROUGH_BIT, buffer);
garfieldsg	0:662207e34fba	1348	return buffer[0];
garfieldsg	0:662207e34fba	1349	}
garfieldsg	0:662207e34fba	1350	/** Get Slave 4 transaction done status.
garfieldsg	0:662207e34fba	1351	* Automatically sets to 1 when a Slave 4 transaction has completed. This
garfieldsg	0:662207e34fba	1352	* triggers an interrupt if the I2C_MST_INT_EN bit in the INT_ENABLE register
garfieldsg	0:662207e34fba	1353	* (Register 56) is asserted and if the SLV_4_DONE_INT bit is asserted in the
garfieldsg	0:662207e34fba	1354	* I2C_SLV4_CTRL register (Register 52).
garfieldsg	0:662207e34fba	1355	* @return Slave 4 transaction done status
garfieldsg	0:662207e34fba	1356	* @see MPU6050_RA_I2C_MST_STATUS
garfieldsg	0:662207e34fba	1357	*/
garfieldsg	0:662207e34fba	1358	bool MPU6050::getSlave4IsDone()
garfieldsg	0:662207e34fba	1359	{
garfieldsg	0:662207e34fba	1360	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV4_DONE_BIT, buffer);
garfieldsg	0:662207e34fba	1361	return buffer[0];
garfieldsg	0:662207e34fba	1362	}
garfieldsg	0:662207e34fba	1363	/** Get master arbitration lost status.
garfieldsg	0:662207e34fba	1364	* This bit automatically sets to 1 when the I2C Master has lost arbitration of
garfieldsg	0:662207e34fba	1365	* the auxiliary I2C bus (an error condition). This triggers an interrupt if the
garfieldsg	0:662207e34fba	1366	* I2C_MST_INT_EN bit in the INT_ENABLE register (Register 56) is asserted.
garfieldsg	0:662207e34fba	1367	* @return Master arbitration lost status
garfieldsg	0:662207e34fba	1368	* @see MPU6050_RA_I2C_MST_STATUS
garfieldsg	0:662207e34fba	1369	*/
garfieldsg	0:662207e34fba	1370	bool MPU6050::getLostArbitration()
garfieldsg	0:662207e34fba	1371	{
garfieldsg	0:662207e34fba	1372	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_LOST_ARB_BIT, buffer);
garfieldsg	0:662207e34fba	1373	return buffer[0];
garfieldsg	0:662207e34fba	1374	}
garfieldsg	0:662207e34fba	1375	/** Get Slave 4 NACK status.
garfieldsg	0:662207e34fba	1376	* This bit automatically sets to 1 when the I2C Master receives a NACK in a
garfieldsg	0:662207e34fba	1377	* transaction with Slave 4. This triggers an interrupt if the I2C_MST_INT_EN
garfieldsg	0:662207e34fba	1378	* bit in the INT_ENABLE register (Register 56) is asserted.
garfieldsg	0:662207e34fba	1379	* @return Slave 4 NACK interrupt status
garfieldsg	0:662207e34fba	1380	* @see MPU6050_RA_I2C_MST_STATUS
garfieldsg	0:662207e34fba	1381	*/
garfieldsg	0:662207e34fba	1382	bool MPU6050::getSlave4Nack()
garfieldsg	0:662207e34fba	1383	{
garfieldsg	0:662207e34fba	1384	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV4_NACK_BIT, buffer);
garfieldsg	0:662207e34fba	1385	return buffer[0];
garfieldsg	0:662207e34fba	1386	}
garfieldsg	0:662207e34fba	1387	/** Get Slave 3 NACK status.
garfieldsg	0:662207e34fba	1388	* This bit automatically sets to 1 when the I2C Master receives a NACK in a
garfieldsg	0:662207e34fba	1389	* transaction with Slave 3. This triggers an interrupt if the I2C_MST_INT_EN
garfieldsg	0:662207e34fba	1390	* bit in the INT_ENABLE register (Register 56) is asserted.
garfieldsg	0:662207e34fba	1391	* @return Slave 3 NACK interrupt status
garfieldsg	0:662207e34fba	1392	* @see MPU6050_RA_I2C_MST_STATUS
garfieldsg	0:662207e34fba	1393	*/
garfieldsg	0:662207e34fba	1394	bool MPU6050::getSlave3Nack()
garfieldsg	0:662207e34fba	1395	{
garfieldsg	0:662207e34fba	1396	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV3_NACK_BIT, buffer);
garfieldsg	0:662207e34fba	1397	return buffer[0];
garfieldsg	0:662207e34fba	1398	}
garfieldsg	0:662207e34fba	1399	/** Get Slave 2 NACK status.
garfieldsg	0:662207e34fba	1400	* This bit automatically sets to 1 when the I2C Master receives a NACK in a
garfieldsg	0:662207e34fba	1401	* transaction with Slave 2. This triggers an interrupt if the I2C_MST_INT_EN
garfieldsg	0:662207e34fba	1402	* bit in the INT_ENABLE register (Register 56) is asserted.
garfieldsg	0:662207e34fba	1403	* @return Slave 2 NACK interrupt status
garfieldsg	0:662207e34fba	1404	* @see MPU6050_RA_I2C_MST_STATUS
garfieldsg	0:662207e34fba	1405	*/
garfieldsg	0:662207e34fba	1406	bool MPU6050::getSlave2Nack()
garfieldsg	0:662207e34fba	1407	{
garfieldsg	0:662207e34fba	1408	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV2_NACK_BIT, buffer);
garfieldsg	0:662207e34fba	1409	return buffer[0];
garfieldsg	0:662207e34fba	1410	}
garfieldsg	0:662207e34fba	1411	/** Get Slave 1 NACK status.
garfieldsg	0:662207e34fba	1412	* This bit automatically sets to 1 when the I2C Master receives a NACK in a
garfieldsg	0:662207e34fba	1413	* transaction with Slave 1. This triggers an interrupt if the I2C_MST_INT_EN
garfieldsg	0:662207e34fba	1414	* bit in the INT_ENABLE register (Register 56) is asserted.
garfieldsg	0:662207e34fba	1415	* @return Slave 1 NACK interrupt status
garfieldsg	0:662207e34fba	1416	* @see MPU6050_RA_I2C_MST_STATUS
garfieldsg	0:662207e34fba	1417	*/
garfieldsg	0:662207e34fba	1418	bool MPU6050::getSlave1Nack()
garfieldsg	0:662207e34fba	1419	{
garfieldsg	0:662207e34fba	1420	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV1_NACK_BIT, buffer);
garfieldsg	0:662207e34fba	1421	return buffer[0];
garfieldsg	0:662207e34fba	1422	}
garfieldsg	0:662207e34fba	1423	/** Get Slave 0 NACK status.
garfieldsg	0:662207e34fba	1424	* This bit automatically sets to 1 when the I2C Master receives a NACK in a
garfieldsg	0:662207e34fba	1425	* transaction with Slave 0. This triggers an interrupt if the I2C_MST_INT_EN
garfieldsg	0:662207e34fba	1426	* bit in the INT_ENABLE register (Register 56) is asserted.
garfieldsg	0:662207e34fba	1427	* @return Slave 0 NACK interrupt status
garfieldsg	0:662207e34fba	1428	* @see MPU6050_RA_I2C_MST_STATUS
garfieldsg	0:662207e34fba	1429	*/
garfieldsg	0:662207e34fba	1430	bool MPU6050::getSlave0Nack()
garfieldsg	0:662207e34fba	1431	{
garfieldsg	0:662207e34fba	1432	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV0_NACK_BIT, buffer);
garfieldsg	0:662207e34fba	1433	return buffer[0];
garfieldsg	0:662207e34fba	1434	}
garfieldsg	0:662207e34fba	1435
garfieldsg	0:662207e34fba	1436	// INT_PIN_CFG register
garfieldsg	0:662207e34fba	1437
garfieldsg	0:662207e34fba	1438	/** Get interrupt logic level mode.
garfieldsg	0:662207e34fba	1439	* Will be set 0 for active-high, 1 for active-low.
garfieldsg	0:662207e34fba	1440	* @return Current interrupt mode (0=active-high, 1=active-low)
garfieldsg	0:662207e34fba	1441	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1442	* @see MPU6050_INTCFG_INT_LEVEL_BIT
garfieldsg	0:662207e34fba	1443	*/
garfieldsg	0:662207e34fba	1444	bool MPU6050::getInterruptMode()
garfieldsg	0:662207e34fba	1445	{
garfieldsg	0:662207e34fba	1446	i2Cdev.readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_LEVEL_BIT, buffer);
garfieldsg	0:662207e34fba	1447	return buffer[0];
garfieldsg	0:662207e34fba	1448	}
garfieldsg	0:662207e34fba	1449	/** Set interrupt logic level mode.
garfieldsg	0:662207e34fba	1450	* @param mode New interrupt mode (0=active-high, 1=active-low)
garfieldsg	0:662207e34fba	1451	* @see getInterruptMode()
garfieldsg	0:662207e34fba	1452	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1453	* @see MPU6050_INTCFG_INT_LEVEL_BIT
garfieldsg	0:662207e34fba	1454	*/
garfieldsg	0:662207e34fba	1455	void MPU6050::setInterruptMode(bool mode)
garfieldsg	0:662207e34fba	1456	{
garfieldsg	0:662207e34fba	1457	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_LEVEL_BIT, mode);
garfieldsg	0:662207e34fba	1458	}
garfieldsg	0:662207e34fba	1459	/** Get interrupt drive mode.
garfieldsg	0:662207e34fba	1460	* Will be set 0 for push-pull, 1 for open-drain.
garfieldsg	0:662207e34fba	1461	* @return Current interrupt drive mode (0=push-pull, 1=open-drain)
garfieldsg	0:662207e34fba	1462	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1463	* @see MPU6050_INTCFG_INT_OPEN_BIT
garfieldsg	0:662207e34fba	1464	*/
garfieldsg	0:662207e34fba	1465	bool MPU6050::getInterruptDrive()
garfieldsg	0:662207e34fba	1466	{
garfieldsg	0:662207e34fba	1467	i2Cdev.readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_OPEN_BIT, buffer);
garfieldsg	0:662207e34fba	1468	return buffer[0];
garfieldsg	0:662207e34fba	1469	}
garfieldsg	0:662207e34fba	1470	/** Set interrupt drive mode.
garfieldsg	0:662207e34fba	1471	* @param drive New interrupt drive mode (0=push-pull, 1=open-drain)
garfieldsg	0:662207e34fba	1472	* @see getInterruptDrive()
garfieldsg	0:662207e34fba	1473	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1474	* @see MPU6050_INTCFG_INT_OPEN_BIT
garfieldsg	0:662207e34fba	1475	*/
garfieldsg	0:662207e34fba	1476	void MPU6050::setInterruptDrive(bool drive)
garfieldsg	0:662207e34fba	1477	{
garfieldsg	0:662207e34fba	1478	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_OPEN_BIT, drive);
garfieldsg	0:662207e34fba	1479	}
garfieldsg	0:662207e34fba	1480	/** Get interrupt latch mode.
garfieldsg	0:662207e34fba	1481	* Will be set 0 for 50us-pulse, 1 for latch-until-int-cleared.
garfieldsg	0:662207e34fba	1482	* @return Current latch mode (0=50us-pulse, 1=latch-until-int-cleared)
garfieldsg	0:662207e34fba	1483	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1484	* @see MPU6050_INTCFG_LATCH_INT_EN_BIT
garfieldsg	0:662207e34fba	1485	*/
garfieldsg	0:662207e34fba	1486	bool MPU6050::getInterruptLatch()
garfieldsg	0:662207e34fba	1487	{
garfieldsg	0:662207e34fba	1488	i2Cdev.readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_LATCH_INT_EN_BIT, buffer);
garfieldsg	0:662207e34fba	1489	return buffer[0];
garfieldsg	0:662207e34fba	1490	}
garfieldsg	0:662207e34fba	1491	/** Set interrupt latch mode.
garfieldsg	0:662207e34fba	1492	* @param latch New latch mode (0=50us-pulse, 1=latch-until-int-cleared)
garfieldsg	0:662207e34fba	1493	* @see getInterruptLatch()
garfieldsg	0:662207e34fba	1494	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1495	* @see MPU6050_INTCFG_LATCH_INT_EN_BIT
garfieldsg	0:662207e34fba	1496	*/
garfieldsg	0:662207e34fba	1497	void MPU6050::setInterruptLatch(bool latch)
garfieldsg	0:662207e34fba	1498	{
garfieldsg	0:662207e34fba	1499	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_LATCH_INT_EN_BIT, latch);
garfieldsg	0:662207e34fba	1500	}
garfieldsg	0:662207e34fba	1501	/** Get interrupt latch clear mode.
garfieldsg	0:662207e34fba	1502	* Will be set 0 for status-read-only, 1 for any-register-read.
garfieldsg	0:662207e34fba	1503	* @return Current latch clear mode (0=status-read-only, 1=any-register-read)
garfieldsg	0:662207e34fba	1504	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1505	* @see MPU6050_INTCFG_INT_RD_CLEAR_BIT
garfieldsg	0:662207e34fba	1506	*/
garfieldsg	0:662207e34fba	1507	bool MPU6050::getInterruptLatchClear()
garfieldsg	0:662207e34fba	1508	{
garfieldsg	0:662207e34fba	1509	i2Cdev.readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_RD_CLEAR_BIT, buffer);
garfieldsg	0:662207e34fba	1510	return buffer[0];
garfieldsg	0:662207e34fba	1511	}
garfieldsg	0:662207e34fba	1512	/** Set interrupt latch clear mode.
garfieldsg	0:662207e34fba	1513	* @param clear New latch clear mode (0=status-read-only, 1=any-register-read)
garfieldsg	0:662207e34fba	1514	* @see getInterruptLatchClear()
garfieldsg	0:662207e34fba	1515	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1516	* @see MPU6050_INTCFG_INT_RD_CLEAR_BIT
garfieldsg	0:662207e34fba	1517	*/
garfieldsg	0:662207e34fba	1518	void MPU6050::setInterruptLatchClear(bool clear)
garfieldsg	0:662207e34fba	1519	{
garfieldsg	0:662207e34fba	1520	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_RD_CLEAR_BIT, clear);
garfieldsg	0:662207e34fba	1521	}
garfieldsg	0:662207e34fba	1522	/** Get FSYNC interrupt logic level mode.
garfieldsg	0:662207e34fba	1523	* @return Current FSYNC interrupt mode (0=active-high, 1=active-low)
garfieldsg	0:662207e34fba	1524	* @see getFSyncInterruptMode()
garfieldsg	0:662207e34fba	1525	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1526	* @see MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT
garfieldsg	0:662207e34fba	1527	*/
garfieldsg	0:662207e34fba	1528	bool MPU6050::getFSyncInterruptLevel()
garfieldsg	0:662207e34fba	1529	{
garfieldsg	0:662207e34fba	1530	i2Cdev.readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT, buffer);
garfieldsg	0:662207e34fba	1531	return buffer[0];
garfieldsg	0:662207e34fba	1532	}
garfieldsg	0:662207e34fba	1533	/** Set FSYNC interrupt logic level mode.
garfieldsg	0:662207e34fba	1534	* @param mode New FSYNC interrupt mode (0=active-high, 1=active-low)
garfieldsg	0:662207e34fba	1535	* @see getFSyncInterruptMode()
garfieldsg	0:662207e34fba	1536	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1537	* @see MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT
garfieldsg	0:662207e34fba	1538	*/
garfieldsg	0:662207e34fba	1539	void MPU6050::setFSyncInterruptLevel(bool level)
garfieldsg	0:662207e34fba	1540	{
garfieldsg	0:662207e34fba	1541	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT, level);
garfieldsg	0:662207e34fba	1542	}
garfieldsg	0:662207e34fba	1543	/** Get FSYNC pin interrupt enabled setting.
garfieldsg	0:662207e34fba	1544	* Will be set 0 for disabled, 1 for enabled.
garfieldsg	0:662207e34fba	1545	* @return Current interrupt enabled setting
garfieldsg	0:662207e34fba	1546	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1547	* @see MPU6050_INTCFG_FSYNC_INT_EN_BIT
garfieldsg	0:662207e34fba	1548	*/
garfieldsg	0:662207e34fba	1549	bool MPU6050::getFSyncInterruptEnabled()
garfieldsg	0:662207e34fba	1550	{
garfieldsg	0:662207e34fba	1551	i2Cdev.readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_EN_BIT, buffer);
garfieldsg	0:662207e34fba	1552	return buffer[0];
garfieldsg	0:662207e34fba	1553	}
garfieldsg	0:662207e34fba	1554	/** Set FSYNC pin interrupt enabled setting.
garfieldsg	0:662207e34fba	1555	* @param enabled New FSYNC pin interrupt enabled setting
garfieldsg	0:662207e34fba	1556	* @see getFSyncInterruptEnabled()
garfieldsg	0:662207e34fba	1557	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1558	* @see MPU6050_INTCFG_FSYNC_INT_EN_BIT
garfieldsg	0:662207e34fba	1559	*/
garfieldsg	0:662207e34fba	1560	void MPU6050::setFSyncInterruptEnabled(bool enabled)
garfieldsg	0:662207e34fba	1561	{
garfieldsg	0:662207e34fba	1562	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_EN_BIT, enabled);
garfieldsg	0:662207e34fba	1563	}
garfieldsg	0:662207e34fba	1564	/** Get I2C bypass enabled status.
garfieldsg	0:662207e34fba	1565	* When this bit is equal to 1 and I2C_MST_EN (Register 106 bit[5]) is equal to
garfieldsg	0:662207e34fba	1566	* 0, the host application processor will be able to directly access the
garfieldsg	0:662207e34fba	1567	* auxiliary I2C bus of the MPU-60X0. When this bit is equal to 0, the host
garfieldsg	0:662207e34fba	1568	* application processor will not be able to directly access the auxiliary I2C
garfieldsg	0:662207e34fba	1569	* bus of the MPU-60X0 regardless of the state of I2C_MST_EN (Register 106
garfieldsg	0:662207e34fba	1570	* bit[5]).
garfieldsg	0:662207e34fba	1571	* @return Current I2C bypass enabled status
garfieldsg	0:662207e34fba	1572	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1573	* @see MPU6050_INTCFG_I2C_BYPASS_EN_BIT
garfieldsg	0:662207e34fba	1574	*/
garfieldsg	0:662207e34fba	1575	bool MPU6050::getI2CBypassEnabled()
garfieldsg	0:662207e34fba	1576	{
garfieldsg	0:662207e34fba	1577	i2Cdev.readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_I2C_BYPASS_EN_BIT, buffer);
garfieldsg	0:662207e34fba	1578	return buffer[0];
garfieldsg	0:662207e34fba	1579	}
garfieldsg	0:662207e34fba	1580	/** Set I2C bypass enabled status.
garfieldsg	0:662207e34fba	1581	* When this bit is equal to 1 and I2C_MST_EN (Register 106 bit[5]) is equal to
garfieldsg	0:662207e34fba	1582	* 0, the host application processor will be able to directly access the
garfieldsg	0:662207e34fba	1583	* auxiliary I2C bus of the MPU-60X0. When this bit is equal to 0, the host
garfieldsg	0:662207e34fba	1584	* application processor will not be able to directly access the auxiliary I2C
garfieldsg	0:662207e34fba	1585	* bus of the MPU-60X0 regardless of the state of I2C_MST_EN (Register 106
garfieldsg	0:662207e34fba	1586	* bit[5]).
garfieldsg	0:662207e34fba	1587	* @param enabled New I2C bypass enabled status
garfieldsg	0:662207e34fba	1588	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1589	* @see MPU6050_INTCFG_I2C_BYPASS_EN_BIT
garfieldsg	0:662207e34fba	1590	*/
garfieldsg	0:662207e34fba	1591	void MPU6050::setI2CBypassEnabled(bool enabled)
garfieldsg	0:662207e34fba	1592	{
garfieldsg	0:662207e34fba	1593	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_I2C_BYPASS_EN_BIT, enabled);
garfieldsg	0:662207e34fba	1594	}
garfieldsg	0:662207e34fba	1595	/** Get reference clock output enabled status.
garfieldsg	0:662207e34fba	1596	* When this bit is equal to 1, a reference clock output is provided at the
garfieldsg	0:662207e34fba	1597	* CLKOUT pin. When this bit is equal to 0, the clock output is disabled. For
garfieldsg	0:662207e34fba	1598	* further information regarding CLKOUT, please refer to the MPU-60X0 Product
garfieldsg	0:662207e34fba	1599	* Specification document.
garfieldsg	0:662207e34fba	1600	* @return Current reference clock output enabled status
garfieldsg	0:662207e34fba	1601	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1602	* @see MPU6050_INTCFG_CLKOUT_EN_BIT
garfieldsg	0:662207e34fba	1603	*/
garfieldsg	0:662207e34fba	1604	bool MPU6050::getClockOutputEnabled()
garfieldsg	0:662207e34fba	1605	{
garfieldsg	0:662207e34fba	1606	i2Cdev.readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_CLKOUT_EN_BIT, buffer);
garfieldsg	0:662207e34fba	1607	return buffer[0];
garfieldsg	0:662207e34fba	1608	}
garfieldsg	0:662207e34fba	1609	/** Set reference clock output enabled status.
garfieldsg	0:662207e34fba	1610	* When this bit is equal to 1, a reference clock output is provided at the
garfieldsg	0:662207e34fba	1611	* CLKOUT pin. When this bit is equal to 0, the clock output is disabled. For
garfieldsg	0:662207e34fba	1612	* further information regarding CLKOUT, please refer to the MPU-60X0 Product
garfieldsg	0:662207e34fba	1613	* Specification document.
garfieldsg	0:662207e34fba	1614	* @param enabled New reference clock output enabled status
garfieldsg	0:662207e34fba	1615	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1616	* @see MPU6050_INTCFG_CLKOUT_EN_BIT
garfieldsg	0:662207e34fba	1617	*/
garfieldsg	0:662207e34fba	1618	void MPU6050::setClockOutputEnabled(bool enabled)
garfieldsg	0:662207e34fba	1619	{
garfieldsg	0:662207e34fba	1620	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_CLKOUT_EN_BIT, enabled);
garfieldsg	0:662207e34fba	1621	}
garfieldsg	0:662207e34fba	1622
garfieldsg	0:662207e34fba	1623	// INT_ENABLE register
garfieldsg	0:662207e34fba	1624
garfieldsg	0:662207e34fba	1625	/** Get full interrupt enabled status.
garfieldsg	0:662207e34fba	1626	* Full register byte for all interrupts, for quick reading. Each bit will be
garfieldsg	0:662207e34fba	1627	* set 0 for disabled, 1 for enabled.
garfieldsg	0:662207e34fba	1628	* @return Current interrupt enabled status
garfieldsg	0:662207e34fba	1629	* @see MPU6050_RA_INT_ENABLE
garfieldsg	0:662207e34fba	1630	* @see MPU6050_INTERRUPT_FF_BIT
garfieldsg	0:662207e34fba	1631	**/
garfieldsg	0:662207e34fba	1632	uint8_t MPU6050::getIntEnabled()
garfieldsg	0:662207e34fba	1633	{
garfieldsg	0:662207e34fba	1634	i2Cdev.readByte(devAddr, MPU6050_RA_INT_ENABLE, buffer);
garfieldsg	0:662207e34fba	1635	return buffer[0];
garfieldsg	0:662207e34fba	1636	}
garfieldsg	0:662207e34fba	1637	/** Set full interrupt enabled status.
garfieldsg	0:662207e34fba	1638	* Full register byte for all interrupts, for quick reading. Each bit should be
garfieldsg	0:662207e34fba	1639	* set 0 for disabled, 1 for enabled.
garfieldsg	0:662207e34fba	1640	* @param enabled New interrupt enabled status
garfieldsg	0:662207e34fba	1641	* @see getIntFreefallEnabled()
garfieldsg	0:662207e34fba	1642	* @see MPU6050_RA_INT_ENABLE
garfieldsg	0:662207e34fba	1643	* @see MPU6050_INTERRUPT_FF_BIT
garfieldsg	0:662207e34fba	1644	**/
garfieldsg	0:662207e34fba	1645	void MPU6050::setIntEnabled(uint8_t enabled)
garfieldsg	0:662207e34fba	1646	{
garfieldsg	0:662207e34fba	1647	i2Cdev.writeByte(devAddr, MPU6050_RA_INT_ENABLE, enabled);
garfieldsg	0:662207e34fba	1648	}
garfieldsg	0:662207e34fba	1649	/** Get Free Fall interrupt enabled status.
garfieldsg	0:662207e34fba	1650	* Will be set 0 for disabled, 1 for enabled.
garfieldsg	0:662207e34fba	1651	* @return Current interrupt enabled status
garfieldsg	0:662207e34fba	1652	* @see MPU6050_RA_INT_ENABLE
garfieldsg	0:662207e34fba	1653	* @see MPU6050_INTERRUPT_FF_BIT
garfieldsg	0:662207e34fba	1654	**/
garfieldsg	0:662207e34fba	1655	bool MPU6050::getIntFreefallEnabled()
garfieldsg	0:662207e34fba	1656	{
garfieldsg	0:662207e34fba	1657	i2Cdev.readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_FF_BIT, buffer);
garfieldsg	0:662207e34fba	1658	return buffer[0];
garfieldsg	0:662207e34fba	1659	}
garfieldsg	0:662207e34fba	1660	/** Set Free Fall interrupt enabled status.
garfieldsg	0:662207e34fba	1661	* @param enabled New interrupt enabled status
garfieldsg	0:662207e34fba	1662	* @see getIntFreefallEnabled()
garfieldsg	0:662207e34fba	1663	* @see MPU6050_RA_INT_ENABLE
garfieldsg	0:662207e34fba	1664	* @see MPU6050_INTERRUPT_FF_BIT
garfieldsg	0:662207e34fba	1665	**/
garfieldsg	0:662207e34fba	1666	void MPU6050::setIntFreefallEnabled(bool enabled)
garfieldsg	0:662207e34fba	1667	{
garfieldsg	0:662207e34fba	1668	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_FF_BIT, enabled);
garfieldsg	0:662207e34fba	1669	}
garfieldsg	0:662207e34fba	1670	/** Get Motion Detection interrupt enabled status.
garfieldsg	0:662207e34fba	1671	* Will be set 0 for disabled, 1 for enabled.
garfieldsg	0:662207e34fba	1672	* @return Current interrupt enabled status
garfieldsg	0:662207e34fba	1673	* @see MPU6050_RA_INT_ENABLE
garfieldsg	0:662207e34fba	1674	* @see MPU6050_INTERRUPT_MOT_BIT
garfieldsg	0:662207e34fba	1675	**/
garfieldsg	0:662207e34fba	1676	bool MPU6050::getIntMotionEnabled()
garfieldsg	0:662207e34fba	1677	{
garfieldsg	0:662207e34fba	1678	i2Cdev.readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_MOT_BIT, buffer);
garfieldsg	0:662207e34fba	1679	return buffer[0];
garfieldsg	0:662207e34fba	1680	}
garfieldsg	0:662207e34fba	1681	/** Set Motion Detection interrupt enabled status.
garfieldsg	0:662207e34fba	1682	* @param enabled New interrupt enabled status
garfieldsg	0:662207e34fba	1683	* @see getIntMotionEnabled()
garfieldsg	0:662207e34fba	1684	* @see MPU6050_RA_INT_ENABLE
garfieldsg	0:662207e34fba	1685	* @see MPU6050_INTERRUPT_MOT_BIT
garfieldsg	0:662207e34fba	1686	**/
garfieldsg	0:662207e34fba	1687	void MPU6050::setIntMotionEnabled(bool enabled)
garfieldsg	0:662207e34fba	1688	{
garfieldsg	0:662207e34fba	1689	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_MOT_BIT, enabled);
garfieldsg	0:662207e34fba	1690	}
garfieldsg	0:662207e34fba	1691	/** Get Zero Motion Detection interrupt enabled status.
garfieldsg	0:662207e34fba	1692	* Will be set 0 for disabled, 1 for enabled.
garfieldsg	0:662207e34fba	1693	* @return Current interrupt enabled status
garfieldsg	0:662207e34fba	1694	* @see MPU6050_RA_INT_ENABLE
garfieldsg	0:662207e34fba	1695	* @see MPU6050_INTERRUPT_ZMOT_BIT
garfieldsg	0:662207e34fba	1696	**/
garfieldsg	0:662207e34fba	1697	bool MPU6050::getIntZeroMotionEnabled()
garfieldsg	0:662207e34fba	1698	{
garfieldsg	0:662207e34fba	1699	i2Cdev.readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_ZMOT_BIT, buffer);
garfieldsg	0:662207e34fba	1700	return buffer[0];
garfieldsg	0:662207e34fba	1701	}
garfieldsg	0:662207e34fba	1702	/** Set Zero Motion Detection interrupt enabled status.
garfieldsg	0:662207e34fba	1703	* @param enabled New interrupt enabled status
garfieldsg	0:662207e34fba	1704	* @see getIntZeroMotionEnabled()
garfieldsg	0:662207e34fba	1705	* @see MPU6050_RA_INT_ENABLE
garfieldsg	0:662207e34fba	1706	* @see MPU6050_INTERRUPT_ZMOT_BIT
garfieldsg	0:662207e34fba	1707	**/
garfieldsg	0:662207e34fba	1708	void MPU6050::setIntZeroMotionEnabled(bool enabled)
garfieldsg	0:662207e34fba	1709	{
garfieldsg	0:662207e34fba	1710	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_ZMOT_BIT, enabled);
garfieldsg	0:662207e34fba	1711	}
garfieldsg	0:662207e34fba	1712	/** Get FIFO Buffer Overflow interrupt enabled status.
garfieldsg	0:662207e34fba	1713	* Will be set 0 for disabled, 1 for enabled.
garfieldsg	0:662207e34fba	1714	* @return Current interrupt enabled status
garfieldsg	0:662207e34fba	1715	* @see MPU6050_RA_INT_ENABLE
garfieldsg	0:662207e34fba	1716	* @see MPU6050_INTERRUPT_FIFO_OFLOW_BIT
garfieldsg	0:662207e34fba	1717	**/
garfieldsg	0:662207e34fba	1718	bool MPU6050::getIntFIFOBufferOverflowEnabled()
garfieldsg	0:662207e34fba	1719	{
garfieldsg	0:662207e34fba	1720	i2Cdev.readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_FIFO_OFLOW_BIT, buffer);
garfieldsg	0:662207e34fba	1721	return buffer[0];
garfieldsg	0:662207e34fba	1722	}
garfieldsg	0:662207e34fba	1723	/** Set FIFO Buffer Overflow interrupt enabled status.
garfieldsg	0:662207e34fba	1724	* @param enabled New interrupt enabled status
garfieldsg	0:662207e34fba	1725	* @see getIntFIFOBufferOverflowEnabled()
garfieldsg	0:662207e34fba	1726	* @see MPU6050_RA_INT_ENABLE
garfieldsg	0:662207e34fba	1727	* @see MPU6050_INTERRUPT_FIFO_OFLOW_BIT
garfieldsg	0:662207e34fba	1728	**/
garfieldsg	0:662207e34fba	1729	void MPU6050::setIntFIFOBufferOverflowEnabled(bool enabled)
garfieldsg	0:662207e34fba	1730	{
garfieldsg	0:662207e34fba	1731	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_FIFO_OFLOW_BIT, enabled);
garfieldsg	0:662207e34fba	1732	}
garfieldsg	0:662207e34fba	1733	/** Get I2C Master interrupt enabled status.
garfieldsg	0:662207e34fba	1734	* This enables any of the I2C Master interrupt sources to generate an
garfieldsg	0:662207e34fba	1735	* interrupt. Will be set 0 for disabled, 1 for enabled.
garfieldsg	0:662207e34fba	1736	* @return Current interrupt enabled status
garfieldsg	0:662207e34fba	1737	* @see MPU6050_RA_INT_ENABLE
garfieldsg	0:662207e34fba	1738	* @see MPU6050_INTERRUPT_I2C_MST_INT_BIT
garfieldsg	0:662207e34fba	1739	**/
garfieldsg	0:662207e34fba	1740	bool MPU6050::getIntI2CMasterEnabled()
garfieldsg	0:662207e34fba	1741	{
garfieldsg	0:662207e34fba	1742	i2Cdev.readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_I2C_MST_INT_BIT, buffer);
garfieldsg	0:662207e34fba	1743	return buffer[0];
garfieldsg	0:662207e34fba	1744	}
garfieldsg	0:662207e34fba	1745	/** Set I2C Master interrupt enabled status.
garfieldsg	0:662207e34fba	1746	* @param enabled New interrupt enabled status
garfieldsg	0:662207e34fba	1747	* @see getIntI2CMasterEnabled()
garfieldsg	0:662207e34fba	1748	* @see MPU6050_RA_INT_ENABLE
garfieldsg	0:662207e34fba	1749	* @see MPU6050_INTERRUPT_I2C_MST_INT_BIT
garfieldsg	0:662207e34fba	1750	**/
garfieldsg	0:662207e34fba	1751	void MPU6050::setIntI2CMasterEnabled(bool enabled)
garfieldsg	0:662207e34fba	1752	{
garfieldsg	0:662207e34fba	1753	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_I2C_MST_INT_BIT, enabled);
garfieldsg	0:662207e34fba	1754	}
garfieldsg	0:662207e34fba	1755	/** Get Data Ready interrupt enabled setting.
garfieldsg	0:662207e34fba	1756	* This event occurs each time a write operation to all of the sensor registers
garfieldsg	0:662207e34fba	1757	* has been completed. Will be set 0 for disabled, 1 for enabled.
garfieldsg	0:662207e34fba	1758	* @return Current interrupt enabled status
garfieldsg	0:662207e34fba	1759	* @see MPU6050_RA_INT_ENABLE
garfieldsg	0:662207e34fba	1760	* @see MPU6050_INTERRUPT_DATA_RDY_BIT
garfieldsg	0:662207e34fba	1761	*/
garfieldsg	0:662207e34fba	1762	bool MPU6050::getIntDataReadyEnabled()
garfieldsg	0:662207e34fba	1763	{
garfieldsg	0:662207e34fba	1764	i2Cdev.readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DATA_RDY_BIT, buffer);
garfieldsg	0:662207e34fba	1765	return buffer[0];
garfieldsg	0:662207e34fba	1766	}
garfieldsg	0:662207e34fba	1767	/** Set Data Ready interrupt enabled status.
garfieldsg	0:662207e34fba	1768	* @param enabled New interrupt enabled status
garfieldsg	0:662207e34fba	1769	* @see getIntDataReadyEnabled()
garfieldsg	0:662207e34fba	1770	* @see MPU6050_RA_INT_CFG
garfieldsg	0:662207e34fba	1771	* @see MPU6050_INTERRUPT_DATA_RDY_BIT
garfieldsg	0:662207e34fba	1772	*/
garfieldsg	0:662207e34fba	1773	void MPU6050::setIntDataReadyEnabled(bool enabled)
garfieldsg	0:662207e34fba	1774	{
garfieldsg	0:662207e34fba	1775	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DATA_RDY_BIT, enabled);
garfieldsg	0:662207e34fba	1776	}
garfieldsg	0:662207e34fba	1777
garfieldsg	0:662207e34fba	1778	// INT_STATUS register
garfieldsg	0:662207e34fba	1779
garfieldsg	0:662207e34fba	1780	/** Get full set of interrupt status bits.
garfieldsg	0:662207e34fba	1781	* These bits clear to 0 after the register has been read. Very useful
garfieldsg	0:662207e34fba	1782	* for getting multiple INT statuses, since each single bit read clears
garfieldsg	0:662207e34fba	1783	* all of them because it has to read the whole byte.
garfieldsg	0:662207e34fba	1784	* @return Current interrupt status
garfieldsg	0:662207e34fba	1785	* @see MPU6050_RA_INT_STATUS
garfieldsg	0:662207e34fba	1786	*/
garfieldsg	0:662207e34fba	1787	uint8_t MPU6050::getIntStatus()
garfieldsg	0:662207e34fba	1788	{
garfieldsg	0:662207e34fba	1789	i2Cdev.readByte(devAddr, MPU6050_RA_INT_STATUS, buffer);
garfieldsg	0:662207e34fba	1790	return buffer[0];
garfieldsg	0:662207e34fba	1791	}
garfieldsg	0:662207e34fba	1792	/** Get Free Fall interrupt status.
garfieldsg	0:662207e34fba	1793	* This bit automatically sets to 1 when a Free Fall interrupt has been
garfieldsg	0:662207e34fba	1794	* generated. The bit clears to 0 after the register has been read.
garfieldsg	0:662207e34fba	1795	* @return Current interrupt status
garfieldsg	0:662207e34fba	1796	* @see MPU6050_RA_INT_STATUS
garfieldsg	0:662207e34fba	1797	* @see MPU6050_INTERRUPT_FF_BIT
garfieldsg	0:662207e34fba	1798	*/
garfieldsg	0:662207e34fba	1799	bool MPU6050::getIntFreefallStatus()
garfieldsg	0:662207e34fba	1800	{
garfieldsg	0:662207e34fba	1801	i2Cdev.readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_FF_BIT, buffer);
garfieldsg	0:662207e34fba	1802	return buffer[0];
garfieldsg	0:662207e34fba	1803	}
garfieldsg	0:662207e34fba	1804	/** Get Motion Detection interrupt status.
garfieldsg	0:662207e34fba	1805	* This bit automatically sets to 1 when a Motion Detection interrupt has been
garfieldsg	0:662207e34fba	1806	* generated. The bit clears to 0 after the register has been read.
garfieldsg	0:662207e34fba	1807	* @return Current interrupt status
garfieldsg	0:662207e34fba	1808	* @see MPU6050_RA_INT_STATUS
garfieldsg	0:662207e34fba	1809	* @see MPU6050_INTERRUPT_MOT_BIT
garfieldsg	0:662207e34fba	1810	*/
garfieldsg	0:662207e34fba	1811	bool MPU6050::getIntMotionStatus()
garfieldsg	0:662207e34fba	1812	{
garfieldsg	0:662207e34fba	1813	i2Cdev.readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_MOT_BIT, buffer);
garfieldsg	0:662207e34fba	1814	return buffer[0];
garfieldsg	0:662207e34fba	1815	}
garfieldsg	0:662207e34fba	1816	/** Get Zero Motion Detection interrupt status.
garfieldsg	0:662207e34fba	1817	* This bit automatically sets to 1 when a Zero Motion Detection interrupt has
garfieldsg	0:662207e34fba	1818	* been generated. The bit clears to 0 after the register has been read.
garfieldsg	0:662207e34fba	1819	* @return Current interrupt status
garfieldsg	0:662207e34fba	1820	* @see MPU6050_RA_INT_STATUS
garfieldsg	0:662207e34fba	1821	* @see MPU6050_INTERRUPT_ZMOT_BIT
garfieldsg	0:662207e34fba	1822	*/
garfieldsg	0:662207e34fba	1823	bool MPU6050::getIntZeroMotionStatus()
garfieldsg	0:662207e34fba	1824	{
garfieldsg	0:662207e34fba	1825	i2Cdev.readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_ZMOT_BIT, buffer);
garfieldsg	0:662207e34fba	1826	return buffer[0];
garfieldsg	0:662207e34fba	1827	}
garfieldsg	0:662207e34fba	1828	/** Get FIFO Buffer Overflow interrupt status.
garfieldsg	0:662207e34fba	1829	* This bit automatically sets to 1 when a Free Fall interrupt has been
garfieldsg	0:662207e34fba	1830	* generated. The bit clears to 0 after the register has been read.
garfieldsg	0:662207e34fba	1831	* @return Current interrupt status
garfieldsg	0:662207e34fba	1832	* @see MPU6050_RA_INT_STATUS
garfieldsg	0:662207e34fba	1833	* @see MPU6050_INTERRUPT_FIFO_OFLOW_BIT
garfieldsg	0:662207e34fba	1834	*/
garfieldsg	0:662207e34fba	1835	bool MPU6050::getIntFIFOBufferOverflowStatus()
garfieldsg	0:662207e34fba	1836	{
garfieldsg	0:662207e34fba	1837	i2Cdev.readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_FIFO_OFLOW_BIT, buffer);
garfieldsg	0:662207e34fba	1838	return buffer[0];
garfieldsg	0:662207e34fba	1839	}
garfieldsg	0:662207e34fba	1840	/** Get I2C Master interrupt status.
garfieldsg	0:662207e34fba	1841	* This bit automatically sets to 1 when an I2C Master interrupt has been
garfieldsg	0:662207e34fba	1842	* generated. For a list of I2C Master interrupts, please refer to Register 54.
garfieldsg	0:662207e34fba	1843	* The bit clears to 0 after the register has been read.
garfieldsg	0:662207e34fba	1844	* @return Current interrupt status
garfieldsg	0:662207e34fba	1845	* @see MPU6050_RA_INT_STATUS
garfieldsg	0:662207e34fba	1846	* @see MPU6050_INTERRUPT_I2C_MST_INT_BIT
garfieldsg	0:662207e34fba	1847	*/
garfieldsg	0:662207e34fba	1848	bool MPU6050::getIntI2CMasterStatus()
garfieldsg	0:662207e34fba	1849	{
garfieldsg	0:662207e34fba	1850	i2Cdev.readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_I2C_MST_INT_BIT, buffer);
garfieldsg	0:662207e34fba	1851	return buffer[0];
garfieldsg	0:662207e34fba	1852	}
garfieldsg	0:662207e34fba	1853	/** Get Data Ready interrupt status.
garfieldsg	0:662207e34fba	1854	* This bit automatically sets to 1 when a Data Ready interrupt has been
garfieldsg	0:662207e34fba	1855	* generated. The bit clears to 0 after the register has been read.
garfieldsg	0:662207e34fba	1856	* @return Current interrupt status
garfieldsg	0:662207e34fba	1857	* @see MPU6050_RA_INT_STATUS
garfieldsg	0:662207e34fba	1858	* @see MPU6050_INTERRUPT_DATA_RDY_BIT
garfieldsg	0:662207e34fba	1859	*/
garfieldsg	0:662207e34fba	1860	bool MPU6050::getIntDataReadyStatus()
garfieldsg	0:662207e34fba	1861	{
garfieldsg	0:662207e34fba	1862	i2Cdev.readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_DATA_RDY_BIT, buffer);
garfieldsg	0:662207e34fba	1863	return buffer[0];
garfieldsg	0:662207e34fba	1864	}
garfieldsg	0:662207e34fba	1865
garfieldsg	0:662207e34fba	1866	// ACCEL_OUT_ registers
garfieldsg	0:662207e34fba	1867
garfieldsg	0:662207e34fba	1868	/** Get raw 9-axis motion sensor readings (accel/gyro/compass).
garfieldsg	0:662207e34fba	1869	* FUNCTION NOT FULLY IMPLEMENTED YET.
garfieldsg	0:662207e34fba	1870	* @param ax 16-bit signed integer container for accelerometer X-axis value
garfieldsg	0:662207e34fba	1871	* @param ay 16-bit signed integer container for accelerometer Y-axis value
garfieldsg	0:662207e34fba	1872	* @param az 16-bit signed integer container for accelerometer Z-axis value
garfieldsg	0:662207e34fba	1873	* @param gx 16-bit signed integer container for gyroscope X-axis value
garfieldsg	0:662207e34fba	1874	* @param gy 16-bit signed integer container for gyroscope Y-axis value
garfieldsg	0:662207e34fba	1875	* @param gz 16-bit signed integer container for gyroscope Z-axis value
garfieldsg	0:662207e34fba	1876	* @param mx 16-bit signed integer container for magnetometer X-axis value
garfieldsg	0:662207e34fba	1877	* @param my 16-bit signed integer container for magnetometer Y-axis value
garfieldsg	0:662207e34fba	1878	* @param mz 16-bit signed integer container for magnetometer Z-axis value
garfieldsg	0:662207e34fba	1879	* @see getMotion6()
garfieldsg	0:662207e34fba	1880	* @see getAcceleration()
garfieldsg	0:662207e34fba	1881	* @see getRotation()
garfieldsg	0:662207e34fba	1882	* @see MPU6050_RA_ACCEL_XOUT_H
garfieldsg	0:662207e34fba	1883	*/
garfieldsg	0:662207e34fba	1884	void MPU6050::getMotion9(int16_t* ax, int16_t* ay, int16_t* az, int16_t* gx, int16_t* gy, int16_t* gz, int16_t* mx, int16_t* my, int16_t* mz)
garfieldsg	0:662207e34fba	1885	{
garfieldsg	0:662207e34fba	1886	getMotion6(ax, ay, az, gx, gy, gz);
garfieldsg	0:662207e34fba	1887	// TODO: magnetometer integration
garfieldsg	0:662207e34fba	1888	}
garfieldsg	0:662207e34fba	1889	/** Get raw 6-axis motion sensor readings (accel/gyro).
garfieldsg	0:662207e34fba	1890	* Retrieves all currently available motion sensor values.
garfieldsg	0:662207e34fba	1891	* @param ax 16-bit signed integer container for accelerometer X-axis value
garfieldsg	0:662207e34fba	1892	* @param ay 16-bit signed integer container for accelerometer Y-axis value
garfieldsg	0:662207e34fba	1893	* @param az 16-bit signed integer container for accelerometer Z-axis value
garfieldsg	0:662207e34fba	1894	* @param gx 16-bit signed integer container for gyroscope X-axis value
garfieldsg	0:662207e34fba	1895	* @param gy 16-bit signed integer container for gyroscope Y-axis value
garfieldsg	0:662207e34fba	1896	* @param gz 16-bit signed integer container for gyroscope Z-axis value
garfieldsg	0:662207e34fba	1897	* @see getAcceleration()
garfieldsg	0:662207e34fba	1898	* @see getRotation()
garfieldsg	0:662207e34fba	1899	* @see MPU6050_RA_ACCEL_XOUT_H
garfieldsg	0:662207e34fba	1900	*/
garfieldsg	0:662207e34fba	1901	void MPU6050::getMotion6(int16_t* ax, int16_t* ay, int16_t* az, int16_t* gx, int16_t* gy, int16_t* gz)
garfieldsg	0:662207e34fba	1902	{
garfieldsg	0:662207e34fba	1903	i2Cdev.readBytes(devAddr, MPU6050_RA_ACCEL_XOUT_H, 14, buffer);
garfieldsg	0:662207e34fba	1904	*ax = (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	1905	*ay = (((int16_t)buffer[2]) << 8) \| buffer[3];
garfieldsg	0:662207e34fba	1906	*az = (((int16_t)buffer[4]) << 8) \| buffer[5];
garfieldsg	0:662207e34fba	1907	*gx = (((int16_t)buffer[8]) << 8) \| buffer[9];
garfieldsg	0:662207e34fba	1908	*gy = (((int16_t)buffer[10]) << 8) \| buffer[11];
garfieldsg	0:662207e34fba	1909	*gz = (((int16_t)buffer[12]) << 8) \| buffer[13];
garfieldsg	0:662207e34fba	1910	}
garfieldsg	0:662207e34fba	1911	/** Get 3-axis accelerometer readings.
garfieldsg	0:662207e34fba	1912	* These registers store the most recent accelerometer measurements.
garfieldsg	0:662207e34fba	1913	* Accelerometer measurements are written to these registers at the Sample Rate
garfieldsg	0:662207e34fba	1914	* as defined in Register 25.
garfieldsg	0:662207e34fba	1915	*
garfieldsg	0:662207e34fba	1916	* The accelerometer measurement registers, along with the temperature
garfieldsg	0:662207e34fba	1917	* measurement registers, gyroscope measurement registers, and external sensor
garfieldsg	0:662207e34fba	1918	* data registers, are composed of two sets of registers: an internal register
garfieldsg	0:662207e34fba	1919	* set and a user-facing read register set.
garfieldsg	0:662207e34fba	1920	*
garfieldsg	0:662207e34fba	1921	* The data within the accelerometer sensors' internal register set is always
garfieldsg	0:662207e34fba	1922	* updated at the Sample Rate. Meanwhile, the user-facing read register set
garfieldsg	0:662207e34fba	1923	* duplicates the internal register set's data values whenever the serial
garfieldsg	0:662207e34fba	1924	* interface is idle. This guarantees that a burst read of sensor registers will
garfieldsg	0:662207e34fba	1925	* read measurements from the same sampling instant. Note that if burst reads
garfieldsg	0:662207e34fba	1926	* are not used, the user is responsible for ensuring a set of single byte reads
garfieldsg	0:662207e34fba	1927	* correspond to a single sampling instant by checking the Data Ready interrupt.
garfieldsg	0:662207e34fba	1928	*
garfieldsg	0:662207e34fba	1929	* Each 16-bit accelerometer measurement has a full scale defined in ACCEL_FS
garfieldsg	0:662207e34fba	1930	* (Register 28). For each full scale setting, the accelerometers' sensitivity
garfieldsg	0:662207e34fba	1931	* per LSB in ACCEL_xOUT is shown in the table below:
garfieldsg	0:662207e34fba	1932	*
garfieldsg	0:662207e34fba	1933	* <pre>
garfieldsg	0:662207e34fba	1934	* AFS_SEL \| Full Scale Range \| LSB Sensitivity
garfieldsg	0:662207e34fba	1935	* --------+------------------+----------------
garfieldsg	0:662207e34fba	1936	* 0 \| +/- 2g \| 8192 LSB/mg
garfieldsg	0:662207e34fba	1937	* 1 \| +/- 4g \| 4096 LSB/mg
garfieldsg	0:662207e34fba	1938	* 2 \| +/- 8g \| 2048 LSB/mg
garfieldsg	0:662207e34fba	1939	* 3 \| +/- 16g \| 1024 LSB/mg
garfieldsg	0:662207e34fba	1940	* </pre>
garfieldsg	0:662207e34fba	1941	*
garfieldsg	0:662207e34fba	1942	* @param x 16-bit signed integer container for X-axis acceleration
garfieldsg	0:662207e34fba	1943	* @param y 16-bit signed integer container for Y-axis acceleration
garfieldsg	0:662207e34fba	1944	* @param z 16-bit signed integer container for Z-axis acceleration
garfieldsg	0:662207e34fba	1945	* @see MPU6050_RA_GYRO_XOUT_H
garfieldsg	0:662207e34fba	1946	*/
garfieldsg	0:662207e34fba	1947	void MPU6050::getAcceleration(int16_t* x, int16_t* y, int16_t* z)
garfieldsg	0:662207e34fba	1948	{
garfieldsg	0:662207e34fba	1949	i2Cdev.readBytes(devAddr, MPU6050_RA_ACCEL_XOUT_H, 6, buffer);
garfieldsg	0:662207e34fba	1950	*x = (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	1951	*y = (((int16_t)buffer[2]) << 8) \| buffer[3];
garfieldsg	0:662207e34fba	1952	*z = (((int16_t)buffer[4]) << 8) \| buffer[5];
garfieldsg	0:662207e34fba	1953	}
garfieldsg	0:662207e34fba	1954	/** Get X-axis accelerometer reading.
garfieldsg	0:662207e34fba	1955	* @return X-axis acceleration measurement in 16-bit 2's complement format
garfieldsg	0:662207e34fba	1956	* @see getMotion6()
garfieldsg	0:662207e34fba	1957	* @see MPU6050_RA_ACCEL_XOUT_H
garfieldsg	0:662207e34fba	1958	*/
garfieldsg	0:662207e34fba	1959	int16_t MPU6050::getAccelerationX()
garfieldsg	0:662207e34fba	1960	{
garfieldsg	0:662207e34fba	1961	i2Cdev.readBytes(devAddr, MPU6050_RA_ACCEL_XOUT_H, 2, buffer);
garfieldsg	0:662207e34fba	1962	return (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	1963	}
garfieldsg	0:662207e34fba	1964	/** Get Y-axis accelerometer reading.
garfieldsg	0:662207e34fba	1965	* @return Y-axis acceleration measurement in 16-bit 2's complement format
garfieldsg	0:662207e34fba	1966	* @see getMotion6()
garfieldsg	0:662207e34fba	1967	* @see MPU6050_RA_ACCEL_YOUT_H
garfieldsg	0:662207e34fba	1968	*/
garfieldsg	0:662207e34fba	1969	int16_t MPU6050::getAccelerationY()
garfieldsg	0:662207e34fba	1970	{
garfieldsg	0:662207e34fba	1971	i2Cdev.readBytes(devAddr, MPU6050_RA_ACCEL_YOUT_H, 2, buffer);
garfieldsg	0:662207e34fba	1972	return (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	1973	}
garfieldsg	0:662207e34fba	1974	/** Get Z-axis accelerometer reading.
garfieldsg	0:662207e34fba	1975	* @return Z-axis acceleration measurement in 16-bit 2's complement format
garfieldsg	0:662207e34fba	1976	* @see getMotion6()
garfieldsg	0:662207e34fba	1977	* @see MPU6050_RA_ACCEL_ZOUT_H
garfieldsg	0:662207e34fba	1978	*/
garfieldsg	0:662207e34fba	1979	int16_t MPU6050::getAccelerationZ()
garfieldsg	0:662207e34fba	1980	{
garfieldsg	0:662207e34fba	1981	i2Cdev.readBytes(devAddr, MPU6050_RA_ACCEL_ZOUT_H, 2, buffer);
garfieldsg	0:662207e34fba	1982	return (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	1983	}
garfieldsg	0:662207e34fba	1984
garfieldsg	0:662207e34fba	1985	// TEMP_OUT_* registers
garfieldsg	0:662207e34fba	1986
garfieldsg	0:662207e34fba	1987	/** Get current internal temperature.
garfieldsg	0:662207e34fba	1988	* @return Temperature reading in 16-bit 2's complement format
garfieldsg	0:662207e34fba	1989	* @see MPU6050_RA_TEMP_OUT_H
garfieldsg	0:662207e34fba	1990	*/
garfieldsg	0:662207e34fba	1991	int16_t MPU6050::getTemperature()
garfieldsg	0:662207e34fba	1992	{
garfieldsg	0:662207e34fba	1993	i2Cdev.readBytes(devAddr, MPU6050_RA_TEMP_OUT_H, 2, buffer);
garfieldsg	0:662207e34fba	1994	return (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	1995	}
garfieldsg	0:662207e34fba	1996
garfieldsg	0:662207e34fba	1997	// GYRO_OUT_ registers
garfieldsg	0:662207e34fba	1998
garfieldsg	0:662207e34fba	1999	/** Get 3-axis gyroscope readings.
garfieldsg	0:662207e34fba	2000	* These gyroscope measurement registers, along with the accelerometer
garfieldsg	0:662207e34fba	2001	* measurement registers, temperature measurement registers, and external sensor
garfieldsg	0:662207e34fba	2002	* data registers, are composed of two sets of registers: an internal register
garfieldsg	0:662207e34fba	2003	* set and a user-facing read register set.
garfieldsg	0:662207e34fba	2004	* The data within the gyroscope sensors' internal register set is always
garfieldsg	0:662207e34fba	2005	* updated at the Sample Rate. Meanwhile, the user-facing read register set
garfieldsg	0:662207e34fba	2006	* duplicates the internal register set's data values whenever the serial
garfieldsg	0:662207e34fba	2007	* interface is idle. This guarantees that a burst read of sensor registers will
garfieldsg	0:662207e34fba	2008	* read measurements from the same sampling instant. Note that if burst reads
garfieldsg	0:662207e34fba	2009	* are not used, the user is responsible for ensuring a set of single byte reads
garfieldsg	0:662207e34fba	2010	* correspond to a single sampling instant by checking the Data Ready interrupt.
garfieldsg	0:662207e34fba	2011	*
garfieldsg	0:662207e34fba	2012	* Each 16-bit gyroscope measurement has a full scale defined in FS_SEL
garfieldsg	0:662207e34fba	2013	* (Register 27). For each full scale setting, the gyroscopes' sensitivity per
garfieldsg	0:662207e34fba	2014	* LSB in GYRO_xOUT is shown in the table below:
garfieldsg	0:662207e34fba	2015	*
garfieldsg	0:662207e34fba	2016	* <pre>
garfieldsg	0:662207e34fba	2017	* FS_SEL \| Full Scale Range \| LSB Sensitivity
garfieldsg	0:662207e34fba	2018	* -------+--------------------+----------------
garfieldsg	0:662207e34fba	2019	* 0 \| +/- 250 degrees/s \| 131 LSB/deg/s
garfieldsg	0:662207e34fba	2020	* 1 \| +/- 500 degrees/s \| 65.5 LSB/deg/s
garfieldsg	0:662207e34fba	2021	* 2 \| +/- 1000 degrees/s \| 32.8 LSB/deg/s
garfieldsg	0:662207e34fba	2022	* 3 \| +/- 2000 degrees/s \| 16.4 LSB/deg/s
garfieldsg	0:662207e34fba	2023	* </pre>
garfieldsg	0:662207e34fba	2024	*
garfieldsg	0:662207e34fba	2025	* @param x 16-bit signed integer container for X-axis rotation
garfieldsg	0:662207e34fba	2026	* @param y 16-bit signed integer container for Y-axis rotation
garfieldsg	0:662207e34fba	2027	* @param z 16-bit signed integer container for Z-axis rotation
garfieldsg	0:662207e34fba	2028	* @see getMotion6()
garfieldsg	0:662207e34fba	2029	* @see MPU6050_RA_GYRO_XOUT_H
garfieldsg	0:662207e34fba	2030	*/
garfieldsg	0:662207e34fba	2031	void MPU6050::getRotation(int16_t* x, int16_t* y, int16_t* z)
garfieldsg	0:662207e34fba	2032	{
garfieldsg	0:662207e34fba	2033	i2Cdev.readBytes(devAddr, MPU6050_RA_GYRO_XOUT_H, 6, buffer);
garfieldsg	0:662207e34fba	2034	*x = (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	2035	*y = (((int16_t)buffer[2]) << 8) \| buffer[3];
garfieldsg	0:662207e34fba	2036	*z = (((int16_t)buffer[4]) << 8) \| buffer[5];
garfieldsg	0:662207e34fba	2037	}
garfieldsg	0:662207e34fba	2038	/** Get X-axis gyroscope reading.
garfieldsg	0:662207e34fba	2039	* @return X-axis rotation measurement in 16-bit 2's complement format
garfieldsg	0:662207e34fba	2040	* @see getMotion6()
garfieldsg	0:662207e34fba	2041	* @see MPU6050_RA_GYRO_XOUT_H
garfieldsg	0:662207e34fba	2042	*/
garfieldsg	0:662207e34fba	2043	int16_t MPU6050::getRotationX()
garfieldsg	0:662207e34fba	2044	{
garfieldsg	0:662207e34fba	2045	i2Cdev.readBytes(devAddr, MPU6050_RA_GYRO_XOUT_H, 2, buffer);
garfieldsg	0:662207e34fba	2046	return (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	2047	}
garfieldsg	0:662207e34fba	2048	/** Get Y-axis gyroscope reading.
garfieldsg	0:662207e34fba	2049	* @return Y-axis rotation measurement in 16-bit 2's complement format
garfieldsg	0:662207e34fba	2050	* @see getMotion6()
garfieldsg	0:662207e34fba	2051	* @see MPU6050_RA_GYRO_YOUT_H
garfieldsg	0:662207e34fba	2052	*/
garfieldsg	0:662207e34fba	2053	int16_t MPU6050::getRotationY()
garfieldsg	0:662207e34fba	2054	{
garfieldsg	0:662207e34fba	2055	i2Cdev.readBytes(devAddr, MPU6050_RA_GYRO_YOUT_H, 2, buffer);
garfieldsg	0:662207e34fba	2056	return (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	2057	}
garfieldsg	0:662207e34fba	2058	/** Get Z-axis gyroscope reading.
garfieldsg	0:662207e34fba	2059	* @return Z-axis rotation measurement in 16-bit 2's complement format
garfieldsg	0:662207e34fba	2060	* @see getMotion6()
garfieldsg	0:662207e34fba	2061	* @see MPU6050_RA_GYRO_ZOUT_H
garfieldsg	0:662207e34fba	2062	*/
garfieldsg	0:662207e34fba	2063	int16_t MPU6050::getRotationZ()
garfieldsg	0:662207e34fba	2064	{
garfieldsg	0:662207e34fba	2065	i2Cdev.readBytes(devAddr, MPU6050_RA_GYRO_ZOUT_H, 2, buffer);
garfieldsg	0:662207e34fba	2066	return (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	2067	}
garfieldsg	0:662207e34fba	2068
garfieldsg	0:662207e34fba	2069	// EXT_SENS_DATA_* registers
garfieldsg	0:662207e34fba	2070
garfieldsg	0:662207e34fba	2071	/** Read single byte from external sensor data register.
garfieldsg	0:662207e34fba	2072	* These registers store data read from external sensors by the Slave 0, 1, 2,
garfieldsg	0:662207e34fba	2073	* and 3 on the auxiliary I2C interface. Data read by Slave 4 is stored in
garfieldsg	0:662207e34fba	2074	* I2C_SLV4_DI (Register 53).
garfieldsg	0:662207e34fba	2075	*
garfieldsg	0:662207e34fba	2076	* External sensor data is written to these registers at the Sample Rate as
garfieldsg	0:662207e34fba	2077	* defined in Register 25. This access rate can be reduced by using the Slave
garfieldsg	0:662207e34fba	2078	* Delay Enable registers (Register 103).
garfieldsg	0:662207e34fba	2079	*
garfieldsg	0:662207e34fba	2080	* External sensor data registers, along with the gyroscope measurement
garfieldsg	0:662207e34fba	2081	* registers, accelerometer measurement registers, and temperature measurement
garfieldsg	0:662207e34fba	2082	* registers, are composed of two sets of registers: an internal register set
garfieldsg	0:662207e34fba	2083	* and a user-facing read register set.
garfieldsg	0:662207e34fba	2084	*
garfieldsg	0:662207e34fba	2085	* The data within the external sensors' internal register set is always updated
garfieldsg	0:662207e34fba	2086	* at the Sample Rate (or the reduced access rate) whenever the serial interface
garfieldsg	0:662207e34fba	2087	* is idle. This guarantees that a burst read of sensor registers will read
garfieldsg	0:662207e34fba	2088	* measurements from the same sampling instant. Note that if burst reads are not
garfieldsg	0:662207e34fba	2089	* used, the user is responsible for ensuring a set of single byte reads
garfieldsg	0:662207e34fba	2090	* correspond to a single sampling instant by checking the Data Ready interrupt.
garfieldsg	0:662207e34fba	2091	*
garfieldsg	0:662207e34fba	2092	* Data is placed in these external sensor data registers according to
garfieldsg	0:662207e34fba	2093	* I2C_SLV0_CTRL, I2C_SLV1_CTRL, I2C_SLV2_CTRL, and I2C_SLV3_CTRL (Registers 39,
garfieldsg	0:662207e34fba	2094	* 42, 45, and 48). When more than zero bytes are read (I2C_SLVx_LEN > 0) from
garfieldsg	0:662207e34fba	2095	* an enabled slave (I2C_SLVx_EN = 1), the slave is read at the Sample Rate (as
garfieldsg	0:662207e34fba	2096	* defined in Register 25) or delayed rate (if specified in Register 52 and
garfieldsg	0:662207e34fba	2097	* 103). During each Sample cycle, slave reads are performed in order of Slave
garfieldsg	0:662207e34fba	2098	* number. If all slaves are enabled with more than zero bytes to be read, the
garfieldsg	0:662207e34fba	2099	* order will be Slave 0, followed by Slave 1, Slave 2, and Slave 3.
garfieldsg	0:662207e34fba	2100	*
garfieldsg	0:662207e34fba	2101	* Each enabled slave will have EXT_SENS_DATA registers associated with it by
garfieldsg	0:662207e34fba	2102	* number of bytes read (I2C_SLVx_LEN) in order of slave number, starting from
garfieldsg	0:662207e34fba	2103	* EXT_SENS_DATA_00. Note that this means enabling or disabling a slave may
garfieldsg	0:662207e34fba	2104	* change the higher numbered slaves' associated registers. Furthermore, if
garfieldsg	0:662207e34fba	2105	* fewer total bytes are being read from the external sensors as a result of
garfieldsg	0:662207e34fba	2106	* such a change, then the data remaining in the registers which no longer have
garfieldsg	0:662207e34fba	2107	* an associated slave device (i.e. high numbered registers) will remain in
garfieldsg	0:662207e34fba	2108	* these previously allocated registers unless reset.
garfieldsg	0:662207e34fba	2109	*
garfieldsg	0:662207e34fba	2110	* If the sum of the read lengths of all SLVx transactions exceed the number of
garfieldsg	0:662207e34fba	2111	* available EXT_SENS_DATA registers, the excess bytes will be dropped. There
garfieldsg	0:662207e34fba	2112	* are 24 EXT_SENS_DATA registers and hence the total read lengths between all
garfieldsg	0:662207e34fba	2113	* the slaves cannot be greater than 24 or some bytes will be lost.
garfieldsg	0:662207e34fba	2114	*
garfieldsg	0:662207e34fba	2115	* Note: Slave 4's behavior is distinct from that of Slaves 0-3. For further
garfieldsg	0:662207e34fba	2116	* information regarding the characteristics of Slave 4, please refer to
garfieldsg	0:662207e34fba	2117	* Registers 49 to 53.
garfieldsg	0:662207e34fba	2118	*
garfieldsg	0:662207e34fba	2119	* EXAMPLE:
garfieldsg	0:662207e34fba	2120	* Suppose that Slave 0 is enabled with 4 bytes to be read (I2C_SLV0_EN = 1 and
garfieldsg	0:662207e34fba	2121	* I2C_SLV0_LEN = 4) while Slave 1 is enabled with 2 bytes to be read so that
garfieldsg	0:662207e34fba	2122	* I2C_SLV1_EN = 1 and I2C_SLV1_LEN = 2. In such a situation, EXT_SENS_DATA _00
garfieldsg	0:662207e34fba	2123	* through _03 will be associated with Slave 0, while EXT_SENS_DATA _04 and 05
garfieldsg	0:662207e34fba	2124	* will be associated with Slave 1. If Slave 2 is enabled as well, registers
garfieldsg	0:662207e34fba	2125	* starting from EXT_SENS_DATA_06 will be allocated to Slave 2.
garfieldsg	0:662207e34fba	2126	*
garfieldsg	0:662207e34fba	2127	* If Slave 2 is disabled while Slave 3 is enabled in this same situation, then
garfieldsg	0:662207e34fba	2128	* registers starting from EXT_SENS_DATA_06 will be allocated to Slave 3
garfieldsg	0:662207e34fba	2129	* instead.
garfieldsg	0:662207e34fba	2130	*
garfieldsg	0:662207e34fba	2131	* REGISTER ALLOCATION FOR DYNAMIC DISABLE VS. NORMAL DISABLE:
garfieldsg	0:662207e34fba	2132	* If a slave is disabled at any time, the space initially allocated to the
garfieldsg	0:662207e34fba	2133	* slave in the EXT_SENS_DATA register, will remain associated with that slave.
garfieldsg	0:662207e34fba	2134	* This is to avoid dynamic adjustment of the register allocation.
garfieldsg	0:662207e34fba	2135	*
garfieldsg	0:662207e34fba	2136	* The allocation of the EXT_SENS_DATA registers is recomputed only when (1) all
garfieldsg	0:662207e34fba	2137	* slaves are disabled, or (2) the I2C_MST_RST bit is set (Register 106).
garfieldsg	0:662207e34fba	2138	*
garfieldsg	0:662207e34fba	2139	* This above is also true if one of the slaves gets NACKed and stops
garfieldsg	0:662207e34fba	2140	* functioning.
garfieldsg	0:662207e34fba	2141	*
garfieldsg	0:662207e34fba	2142	* @param position Starting position (0-23)
garfieldsg	0:662207e34fba	2143	* @return Byte read from register
garfieldsg	0:662207e34fba	2144	*/
garfieldsg	0:662207e34fba	2145	uint8_t MPU6050::getExternalSensorByte(int position)
garfieldsg	0:662207e34fba	2146	{
garfieldsg	0:662207e34fba	2147	i2Cdev.readByte(devAddr, MPU6050_RA_EXT_SENS_DATA_00 + position, buffer);
garfieldsg	0:662207e34fba	2148	return buffer[0];
garfieldsg	0:662207e34fba	2149	}
garfieldsg	0:662207e34fba	2150	/** Read word (2 bytes) from external sensor data registers.
garfieldsg	0:662207e34fba	2151	* @param position Starting position (0-21)
garfieldsg	0:662207e34fba	2152	* @return Word read from register
garfieldsg	0:662207e34fba	2153	* @see getExternalSensorByte()
garfieldsg	0:662207e34fba	2154	*/
garfieldsg	0:662207e34fba	2155	uint16_t MPU6050::getExternalSensorWord(int position)
garfieldsg	0:662207e34fba	2156	{
garfieldsg	0:662207e34fba	2157	i2Cdev.readBytes(devAddr, MPU6050_RA_EXT_SENS_DATA_00 + position, 2, buffer);
garfieldsg	0:662207e34fba	2158	return (((uint16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	2159	}
garfieldsg	0:662207e34fba	2160	/** Read double word (4 bytes) from external sensor data registers.
garfieldsg	0:662207e34fba	2161	* @param position Starting position (0-20)
garfieldsg	0:662207e34fba	2162	* @return Double word read from registers
garfieldsg	0:662207e34fba	2163	* @see getExternalSensorByte()
garfieldsg	0:662207e34fba	2164	*/
garfieldsg	0:662207e34fba	2165	uint32_t MPU6050::getExternalSensorDWord(int position)
garfieldsg	0:662207e34fba	2166	{
garfieldsg	0:662207e34fba	2167	i2Cdev.readBytes(devAddr, MPU6050_RA_EXT_SENS_DATA_00 + position, 4, buffer);
garfieldsg	0:662207e34fba	2168	return (((uint32_t)buffer[0]) << 24) \| (((uint32_t)buffer[1]) << 16) \| (((uint16_t)buffer[2]) << 8) \| buffer[3];
garfieldsg	0:662207e34fba	2169	}
garfieldsg	0:662207e34fba	2170
garfieldsg	0:662207e34fba	2171	// MOT_DETECT_STATUS register
garfieldsg	0:662207e34fba	2172
garfieldsg	0:662207e34fba	2173	/** Get X-axis negative motion detection interrupt status.
garfieldsg	0:662207e34fba	2174	* @return Motion detection status
garfieldsg	0:662207e34fba	2175	* @see MPU6050_RA_MOT_DETECT_STATUS
garfieldsg	0:662207e34fba	2176	* @see MPU6050_MOTION_MOT_XNEG_BIT
garfieldsg	0:662207e34fba	2177	*/
garfieldsg	0:662207e34fba	2178	bool MPU6050::getXNegMotionDetected()
garfieldsg	0:662207e34fba	2179	{
garfieldsg	0:662207e34fba	2180	i2Cdev.readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_XNEG_BIT, buffer);
garfieldsg	0:662207e34fba	2181	return buffer[0];
garfieldsg	0:662207e34fba	2182	}
garfieldsg	0:662207e34fba	2183	/** Get X-axis positive motion detection interrupt status.
garfieldsg	0:662207e34fba	2184	* @return Motion detection status
garfieldsg	0:662207e34fba	2185	* @see MPU6050_RA_MOT_DETECT_STATUS
garfieldsg	0:662207e34fba	2186	* @see MPU6050_MOTION_MOT_XPOS_BIT
garfieldsg	0:662207e34fba	2187	*/
garfieldsg	0:662207e34fba	2188	bool MPU6050::getXPosMotionDetected()
garfieldsg	0:662207e34fba	2189	{
garfieldsg	0:662207e34fba	2190	i2Cdev.readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_XPOS_BIT, buffer);
garfieldsg	0:662207e34fba	2191	return buffer[0];
garfieldsg	0:662207e34fba	2192	}
garfieldsg	0:662207e34fba	2193	/** Get Y-axis negative motion detection interrupt status.
garfieldsg	0:662207e34fba	2194	* @return Motion detection status
garfieldsg	0:662207e34fba	2195	* @see MPU6050_RA_MOT_DETECT_STATUS
garfieldsg	0:662207e34fba	2196	* @see MPU6050_MOTION_MOT_YNEG_BIT
garfieldsg	0:662207e34fba	2197	*/
garfieldsg	0:662207e34fba	2198	bool MPU6050::getYNegMotionDetected()
garfieldsg	0:662207e34fba	2199	{
garfieldsg	0:662207e34fba	2200	i2Cdev.readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_YNEG_BIT, buffer);
garfieldsg	0:662207e34fba	2201	return buffer[0];
garfieldsg	0:662207e34fba	2202	}
garfieldsg	0:662207e34fba	2203	/** Get Y-axis positive motion detection interrupt status.
garfieldsg	0:662207e34fba	2204	* @return Motion detection status
garfieldsg	0:662207e34fba	2205	* @see MPU6050_RA_MOT_DETECT_STATUS
garfieldsg	0:662207e34fba	2206	* @see MPU6050_MOTION_MOT_YPOS_BIT
garfieldsg	0:662207e34fba	2207	*/
garfieldsg	0:662207e34fba	2208	bool MPU6050::getYPosMotionDetected()
garfieldsg	0:662207e34fba	2209	{
garfieldsg	0:662207e34fba	2210	i2Cdev.readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_YPOS_BIT, buffer);
garfieldsg	0:662207e34fba	2211	return buffer[0];
garfieldsg	0:662207e34fba	2212	}
garfieldsg	0:662207e34fba	2213	/** Get Z-axis negative motion detection interrupt status.
garfieldsg	0:662207e34fba	2214	* @return Motion detection status
garfieldsg	0:662207e34fba	2215	* @see MPU6050_RA_MOT_DETECT_STATUS
garfieldsg	0:662207e34fba	2216	* @see MPU6050_MOTION_MOT_ZNEG_BIT
garfieldsg	0:662207e34fba	2217	*/
garfieldsg	0:662207e34fba	2218	bool MPU6050::getZNegMotionDetected()
garfieldsg	0:662207e34fba	2219	{
garfieldsg	0:662207e34fba	2220	i2Cdev.readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_ZNEG_BIT, buffer);
garfieldsg	0:662207e34fba	2221	return buffer[0];
garfieldsg	0:662207e34fba	2222	}
garfieldsg	0:662207e34fba	2223	/** Get Z-axis positive motion detection interrupt status.
garfieldsg	0:662207e34fba	2224	* @return Motion detection status
garfieldsg	0:662207e34fba	2225	* @see MPU6050_RA_MOT_DETECT_STATUS
garfieldsg	0:662207e34fba	2226	* @see MPU6050_MOTION_MOT_ZPOS_BIT
garfieldsg	0:662207e34fba	2227	*/
garfieldsg	0:662207e34fba	2228	bool MPU6050::getZPosMotionDetected()
garfieldsg	0:662207e34fba	2229	{
garfieldsg	0:662207e34fba	2230	i2Cdev.readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_ZPOS_BIT, buffer);
garfieldsg	0:662207e34fba	2231	return buffer[0];
garfieldsg	0:662207e34fba	2232	}
garfieldsg	0:662207e34fba	2233	/** Get zero motion detection interrupt status.
garfieldsg	0:662207e34fba	2234	* @return Motion detection status
garfieldsg	0:662207e34fba	2235	* @see MPU6050_RA_MOT_DETECT_STATUS
garfieldsg	0:662207e34fba	2236	* @see MPU6050_MOTION_MOT_ZRMOT_BIT
garfieldsg	0:662207e34fba	2237	*/
garfieldsg	0:662207e34fba	2238	bool MPU6050::getZeroMotionDetected()
garfieldsg	0:662207e34fba	2239	{
garfieldsg	0:662207e34fba	2240	i2Cdev.readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_ZRMOT_BIT, buffer);
garfieldsg	0:662207e34fba	2241	return buffer[0];
garfieldsg	0:662207e34fba	2242	}
garfieldsg	0:662207e34fba	2243
garfieldsg	0:662207e34fba	2244	// I2C_SLV*_DO register
garfieldsg	0:662207e34fba	2245
garfieldsg	0:662207e34fba	2246	/** Write byte to Data Output container for specified slave.
garfieldsg	0:662207e34fba	2247	* This register holds the output data written into Slave when Slave is set to
garfieldsg	0:662207e34fba	2248	* write mode. For further information regarding Slave control, please
garfieldsg	0:662207e34fba	2249	* refer to Registers 37 to 39 and immediately following.
garfieldsg	0:662207e34fba	2250	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	2251	* @param data Byte to write
garfieldsg	0:662207e34fba	2252	* @see MPU6050_RA_I2C_SLV0_DO
garfieldsg	0:662207e34fba	2253	*/
garfieldsg	0:662207e34fba	2254	void MPU6050::setSlaveOutputByte(uint8_t num, uint8_t data)
garfieldsg	0:662207e34fba	2255	{
garfieldsg	0:662207e34fba	2256	if (num > 3) return;
garfieldsg	0:662207e34fba	2257	i2Cdev.writeByte(devAddr, MPU6050_RA_I2C_SLV0_DO + num, data);
garfieldsg	0:662207e34fba	2258	}
garfieldsg	0:662207e34fba	2259
garfieldsg	0:662207e34fba	2260	// I2C_MST_DELAY_CTRL register
garfieldsg	0:662207e34fba	2261
garfieldsg	0:662207e34fba	2262	/** Get external data shadow delay enabled status.
garfieldsg	0:662207e34fba	2263	* This register is used to specify the timing of external sensor data
garfieldsg	0:662207e34fba	2264	* shadowing. When DELAY_ES_SHADOW is set to 1, shadowing of external
garfieldsg	0:662207e34fba	2265	* sensor data is delayed until all data has been received.
garfieldsg	0:662207e34fba	2266	* @return Current external data shadow delay enabled status.
garfieldsg	0:662207e34fba	2267	* @see MPU6050_RA_I2C_MST_DELAY_CTRL
garfieldsg	0:662207e34fba	2268	* @see MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT
garfieldsg	0:662207e34fba	2269	*/
garfieldsg	0:662207e34fba	2270	bool MPU6050::getExternalShadowDelayEnabled()
garfieldsg	0:662207e34fba	2271	{
garfieldsg	0:662207e34fba	2272	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_DELAY_CTRL, MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT, buffer);
garfieldsg	0:662207e34fba	2273	return buffer[0];
garfieldsg	0:662207e34fba	2274	}
garfieldsg	0:662207e34fba	2275	/** Set external data shadow delay enabled status.
garfieldsg	0:662207e34fba	2276	* @param enabled New external data shadow delay enabled status.
garfieldsg	0:662207e34fba	2277	* @see getExternalShadowDelayEnabled()
garfieldsg	0:662207e34fba	2278	* @see MPU6050_RA_I2C_MST_DELAY_CTRL
garfieldsg	0:662207e34fba	2279	* @see MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT
garfieldsg	0:662207e34fba	2280	*/
garfieldsg	0:662207e34fba	2281	void MPU6050::setExternalShadowDelayEnabled(bool enabled)
garfieldsg	0:662207e34fba	2282	{
garfieldsg	0:662207e34fba	2283	i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_MST_DELAY_CTRL, MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT, enabled);
garfieldsg	0:662207e34fba	2284	}
garfieldsg	0:662207e34fba	2285	/** Get slave delay enabled status.
garfieldsg	0:662207e34fba	2286	* When a particular slave delay is enabled, the rate of access for the that
garfieldsg	0:662207e34fba	2287	* slave device is reduced. When a slave's access rate is decreased relative to
garfieldsg	0:662207e34fba	2288	* the Sample Rate, the slave is accessed every:
garfieldsg	0:662207e34fba	2289	*
garfieldsg	0:662207e34fba	2290	* 1 / (1 + I2C_MST_DLY) Samples
garfieldsg	0:662207e34fba	2291	*
garfieldsg	0:662207e34fba	2292	* This base Sample Rate in turn is determined by SMPLRT_DIV (register * 25)
garfieldsg	0:662207e34fba	2293	* and DLPF_CFG (register 26).
garfieldsg	0:662207e34fba	2294	*
garfieldsg	0:662207e34fba	2295	* For further information regarding I2C_MST_DLY, please refer to register 52.
garfieldsg	0:662207e34fba	2296	* For further information regarding the Sample Rate, please refer to register 25.
garfieldsg	0:662207e34fba	2297	*
garfieldsg	0:662207e34fba	2298	* @param num Slave number (0-4)
garfieldsg	0:662207e34fba	2299	* @return Current slave delay enabled status.
garfieldsg	0:662207e34fba	2300	* @see MPU6050_RA_I2C_MST_DELAY_CTRL
garfieldsg	0:662207e34fba	2301	* @see MPU6050_DELAYCTRL_I2C_SLV0_DLY_EN_BIT
garfieldsg	0:662207e34fba	2302	*/
garfieldsg	0:662207e34fba	2303	bool MPU6050::getSlaveDelayEnabled(uint8_t num)
garfieldsg	0:662207e34fba	2304	{
garfieldsg	0:662207e34fba	2305	// MPU6050_DELAYCTRL_I2C_SLV4_DLY_EN_BIT is 4, SLV3 is 3, etc.
garfieldsg	0:662207e34fba	2306	if (num > 4) return 0;
garfieldsg	0:662207e34fba	2307	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_DELAY_CTRL, num, buffer);
garfieldsg	0:662207e34fba	2308	return buffer[0];
garfieldsg	0:662207e34fba	2309	}
garfieldsg	0:662207e34fba	2310	/** Set slave delay enabled status.
garfieldsg	0:662207e34fba	2311	* @param num Slave number (0-4)
garfieldsg	0:662207e34fba	2312	* @param enabled New slave delay enabled status.
garfieldsg	0:662207e34fba	2313	* @see MPU6050_RA_I2C_MST_DELAY_CTRL
garfieldsg	0:662207e34fba	2314	* @see MPU6050_DELAYCTRL_I2C_SLV0_DLY_EN_BIT
garfieldsg	0:662207e34fba	2315	*/
garfieldsg	0:662207e34fba	2316	void MPU6050::setSlaveDelayEnabled(uint8_t num, bool enabled)
garfieldsg	0:662207e34fba	2317	{
garfieldsg	0:662207e34fba	2318	i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_MST_DELAY_CTRL, num, enabled);
garfieldsg	0:662207e34fba	2319	}
garfieldsg	0:662207e34fba	2320
garfieldsg	0:662207e34fba	2321	// SIGNAL_PATH_RESET register
garfieldsg	0:662207e34fba	2322
garfieldsg	0:662207e34fba	2323	/** Reset gyroscope signal path.
garfieldsg	0:662207e34fba	2324	* The reset will revert the signal path analog to digital converters and
garfieldsg	0:662207e34fba	2325	* filters to their power up configurations.
garfieldsg	0:662207e34fba	2326	* @see MPU6050_RA_SIGNAL_PATH_RESET
garfieldsg	0:662207e34fba	2327	* @see MPU6050_PATHRESET_GYRO_RESET_BIT
garfieldsg	0:662207e34fba	2328	*/
garfieldsg	0:662207e34fba	2329	void MPU6050::resetGyroscopePath()
garfieldsg	0:662207e34fba	2330	{
garfieldsg	0:662207e34fba	2331	i2Cdev.writeBit(devAddr, MPU6050_RA_SIGNAL_PATH_RESET, MPU6050_PATHRESET_GYRO_RESET_BIT, true);
garfieldsg	0:662207e34fba	2332	}
garfieldsg	0:662207e34fba	2333	/** Reset accelerometer signal path.
garfieldsg	0:662207e34fba	2334	* The reset will revert the signal path analog to digital converters and
garfieldsg	0:662207e34fba	2335	* filters to their power up configurations.
garfieldsg	0:662207e34fba	2336	* @see MPU6050_RA_SIGNAL_PATH_RESET
garfieldsg	0:662207e34fba	2337	* @see MPU6050_PATHRESET_ACCEL_RESET_BIT
garfieldsg	0:662207e34fba	2338	*/
garfieldsg	0:662207e34fba	2339	void MPU6050::resetAccelerometerPath()
garfieldsg	0:662207e34fba	2340	{
garfieldsg	0:662207e34fba	2341	i2Cdev.writeBit(devAddr, MPU6050_RA_SIGNAL_PATH_RESET, MPU6050_PATHRESET_ACCEL_RESET_BIT, true);
garfieldsg	0:662207e34fba	2342	}
garfieldsg	0:662207e34fba	2343	/** Reset temperature sensor signal path.
garfieldsg	0:662207e34fba	2344	* The reset will revert the signal path analog to digital converters and
garfieldsg	0:662207e34fba	2345	* filters to their power up configurations.
garfieldsg	0:662207e34fba	2346	* @see MPU6050_RA_SIGNAL_PATH_RESET
garfieldsg	0:662207e34fba	2347	* @see MPU6050_PATHRESET_TEMP_RESET_BIT
garfieldsg	0:662207e34fba	2348	*/
garfieldsg	0:662207e34fba	2349	void MPU6050::resetTemperaturePath()
garfieldsg	0:662207e34fba	2350	{
garfieldsg	0:662207e34fba	2351	i2Cdev.writeBit(devAddr, MPU6050_RA_SIGNAL_PATH_RESET, MPU6050_PATHRESET_TEMP_RESET_BIT, true);
garfieldsg	0:662207e34fba	2352	}
garfieldsg	0:662207e34fba	2353
garfieldsg	0:662207e34fba	2354	// MOT_DETECT_CTRL register
garfieldsg	0:662207e34fba	2355
garfieldsg	0:662207e34fba	2356	/** Get accelerometer power-on delay.
garfieldsg	0:662207e34fba	2357	* The accelerometer data path provides samples to the sensor registers, Motion
garfieldsg	0:662207e34fba	2358	* detection, Zero Motion detection, and Free Fall detection modules. The
garfieldsg	0:662207e34fba	2359	* signal path contains filters which must be flushed on wake-up with new
garfieldsg	0:662207e34fba	2360	* samples before the detection modules begin operations. The default wake-up
garfieldsg	0:662207e34fba	2361	* delay, of 4ms can be lengthened by up to 3ms. This additional delay is
garfieldsg	0:662207e34fba	2362	* specified in ACCEL_ON_DELAY in units of 1 LSB = 1 ms. The user may select
garfieldsg	0:662207e34fba	2363	* any value above zero unless instructed otherwise by InvenSense. Please refer
garfieldsg	0:662207e34fba	2364	* to Section 8 of the MPU-6000/MPU-6050 Product Specification document for
garfieldsg	0:662207e34fba	2365	* further information regarding the detection modules.
garfieldsg	0:662207e34fba	2366	* @return Current accelerometer power-on delay
garfieldsg	0:662207e34fba	2367	* @see MPU6050_RA_MOT_DETECT_CTRL
garfieldsg	0:662207e34fba	2368	* @see MPU6050_DETECT_ACCEL_ON_DELAY_BIT
garfieldsg	0:662207e34fba	2369	*/
garfieldsg	0:662207e34fba	2370	uint8_t MPU6050::getAccelerometerPowerOnDelay()
garfieldsg	0:662207e34fba	2371	{
garfieldsg	0:662207e34fba	2372	i2Cdev.readBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_ACCEL_ON_DELAY_BIT, MPU6050_DETECT_ACCEL_ON_DELAY_LENGTH, buffer);
garfieldsg	0:662207e34fba	2373	return buffer[0];
garfieldsg	0:662207e34fba	2374	}
garfieldsg	0:662207e34fba	2375	/** Set accelerometer power-on delay.
garfieldsg	0:662207e34fba	2376	* @param delay New accelerometer power-on delay (0-3)
garfieldsg	0:662207e34fba	2377	* @see getAccelerometerPowerOnDelay()
garfieldsg	0:662207e34fba	2378	* @see MPU6050_RA_MOT_DETECT_CTRL
garfieldsg	0:662207e34fba	2379	* @see MPU6050_DETECT_ACCEL_ON_DELAY_BIT
garfieldsg	0:662207e34fba	2380	*/
garfieldsg	0:662207e34fba	2381	void MPU6050::setAccelerometerPowerOnDelay(uint8_t delay)
garfieldsg	0:662207e34fba	2382	{
garfieldsg	0:662207e34fba	2383	i2Cdev.writeBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_ACCEL_ON_DELAY_BIT, MPU6050_DETECT_ACCEL_ON_DELAY_LENGTH, delay);
garfieldsg	0:662207e34fba	2384	}
garfieldsg	0:662207e34fba	2385	/** Get Free Fall detection counter decrement configuration.
garfieldsg	0:662207e34fba	2386	* Detection is registered by the Free Fall detection module after accelerometer
garfieldsg	0:662207e34fba	2387	* measurements meet their respective threshold conditions over a specified
garfieldsg	0:662207e34fba	2388	* number of samples. When the threshold conditions are met, the corresponding
garfieldsg	0:662207e34fba	2389	* detection counter increments by 1. The user may control the rate at which the
garfieldsg	0:662207e34fba	2390	* detection counter decrements when the threshold condition is not met by
garfieldsg	0:662207e34fba	2391	* configuring FF_COUNT. The decrement rate can be set according to the
garfieldsg	0:662207e34fba	2392	* following table:
garfieldsg	0:662207e34fba	2393	*
garfieldsg	0:662207e34fba	2394	* <pre>
garfieldsg	0:662207e34fba	2395	* FF_COUNT \| Counter Decrement
garfieldsg	0:662207e34fba	2396	* ---------+------------------
garfieldsg	0:662207e34fba	2397	* 0 \| Reset
garfieldsg	0:662207e34fba	2398	* 1 \| 1
garfieldsg	0:662207e34fba	2399	* 2 \| 2
garfieldsg	0:662207e34fba	2400	* 3 \| 4
garfieldsg	0:662207e34fba	2401	* </pre>
garfieldsg	0:662207e34fba	2402	*
garfieldsg	0:662207e34fba	2403	* When FF_COUNT is configured to 0 (reset), any non-qualifying sample will
garfieldsg	0:662207e34fba	2404	* reset the counter to 0. For further information on Free Fall detection,
garfieldsg	0:662207e34fba	2405	* please refer to Registers 29 to 32.
garfieldsg	0:662207e34fba	2406	*
garfieldsg	0:662207e34fba	2407	* @return Current decrement configuration
garfieldsg	0:662207e34fba	2408	* @see MPU6050_RA_MOT_DETECT_CTRL
garfieldsg	0:662207e34fba	2409	* @see MPU6050_DETECT_FF_COUNT_BIT
garfieldsg	0:662207e34fba	2410	*/
garfieldsg	0:662207e34fba	2411	uint8_t MPU6050::getFreefallDetectionCounterDecrement()
garfieldsg	0:662207e34fba	2412	{
garfieldsg	0:662207e34fba	2413	i2Cdev.readBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_FF_COUNT_BIT, MPU6050_DETECT_FF_COUNT_LENGTH, buffer);
garfieldsg	0:662207e34fba	2414	return buffer[0];
garfieldsg	0:662207e34fba	2415	}
garfieldsg	0:662207e34fba	2416	/** Set Free Fall detection counter decrement configuration.
garfieldsg	0:662207e34fba	2417	* @param decrement New decrement configuration value
garfieldsg	0:662207e34fba	2418	* @see getFreefallDetectionCounterDecrement()
garfieldsg	0:662207e34fba	2419	* @see MPU6050_RA_MOT_DETECT_CTRL
garfieldsg	0:662207e34fba	2420	* @see MPU6050_DETECT_FF_COUNT_BIT
garfieldsg	0:662207e34fba	2421	*/
garfieldsg	0:662207e34fba	2422	void MPU6050::setFreefallDetectionCounterDecrement(uint8_t decrement)
garfieldsg	0:662207e34fba	2423	{
garfieldsg	0:662207e34fba	2424	i2Cdev.writeBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_FF_COUNT_BIT, MPU6050_DETECT_FF_COUNT_LENGTH, decrement);
garfieldsg	0:662207e34fba	2425	}
garfieldsg	0:662207e34fba	2426	/** Get Motion detection counter decrement configuration.
garfieldsg	0:662207e34fba	2427	* Detection is registered by the Motion detection module after accelerometer
garfieldsg	0:662207e34fba	2428	* measurements meet their respective threshold conditions over a specified
garfieldsg	0:662207e34fba	2429	* number of samples. When the threshold conditions are met, the corresponding
garfieldsg	0:662207e34fba	2430	* detection counter increments by 1. The user may control the rate at which the
garfieldsg	0:662207e34fba	2431	* detection counter decrements when the threshold condition is not met by
garfieldsg	0:662207e34fba	2432	* configuring MOT_COUNT. The decrement rate can be set according to the
garfieldsg	0:662207e34fba	2433	* following table:
garfieldsg	0:662207e34fba	2434	*
garfieldsg	0:662207e34fba	2435	* <pre>
garfieldsg	0:662207e34fba	2436	* MOT_COUNT \| Counter Decrement
garfieldsg	0:662207e34fba	2437	* ----------+------------------
garfieldsg	0:662207e34fba	2438	* 0 \| Reset
garfieldsg	0:662207e34fba	2439	* 1 \| 1
garfieldsg	0:662207e34fba	2440	* 2 \| 2
garfieldsg	0:662207e34fba	2441	* 3 \| 4
garfieldsg	0:662207e34fba	2442	* </pre>
garfieldsg	0:662207e34fba	2443	*
garfieldsg	0:662207e34fba	2444	* When MOT_COUNT is configured to 0 (reset), any non-qualifying sample will
garfieldsg	0:662207e34fba	2445	* reset the counter to 0. For further information on Motion detection,
garfieldsg	0:662207e34fba	2446	* please refer to Registers 29 to 32.
garfieldsg	0:662207e34fba	2447	*
garfieldsg	0:662207e34fba	2448	*/
garfieldsg	0:662207e34fba	2449	uint8_t MPU6050::getMotionDetectionCounterDecrement()
garfieldsg	0:662207e34fba	2450	{
garfieldsg	0:662207e34fba	2451	i2Cdev.readBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_MOT_COUNT_BIT, MPU6050_DETECT_MOT_COUNT_LENGTH, buffer);
garfieldsg	0:662207e34fba	2452	return buffer[0];
garfieldsg	0:662207e34fba	2453	}
garfieldsg	0:662207e34fba	2454	/** Set Motion detection counter decrement configuration.
garfieldsg	0:662207e34fba	2455	* @param decrement New decrement configuration value
garfieldsg	0:662207e34fba	2456	* @see getMotionDetectionCounterDecrement()
garfieldsg	0:662207e34fba	2457	* @see MPU6050_RA_MOT_DETECT_CTRL
garfieldsg	0:662207e34fba	2458	* @see MPU6050_DETECT_MOT_COUNT_BIT
garfieldsg	0:662207e34fba	2459	*/
garfieldsg	0:662207e34fba	2460	void MPU6050::setMotionDetectionCounterDecrement(uint8_t decrement)
garfieldsg	0:662207e34fba	2461	{
garfieldsg	0:662207e34fba	2462	i2Cdev.writeBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_MOT_COUNT_BIT, MPU6050_DETECT_MOT_COUNT_LENGTH, decrement);
garfieldsg	0:662207e34fba	2463	}
garfieldsg	0:662207e34fba	2464
garfieldsg	0:662207e34fba	2465	// USER_CTRL register
garfieldsg	0:662207e34fba	2466
garfieldsg	0:662207e34fba	2467	/** Get FIFO enabled status.
garfieldsg	0:662207e34fba	2468	* When this bit is set to 0, the FIFO buffer is disabled. The FIFO buffer
garfieldsg	0:662207e34fba	2469	* cannot be written to or read from while disabled. The FIFO buffer's state
garfieldsg	0:662207e34fba	2470	* does not change unless the MPU-60X0 is power cycled.
garfieldsg	0:662207e34fba	2471	* @return Current FIFO enabled status
garfieldsg	0:662207e34fba	2472	* @see MPU6050_RA_USER_CTRL
garfieldsg	0:662207e34fba	2473	* @see MPU6050_USERCTRL_FIFO_EN_BIT
garfieldsg	0:662207e34fba	2474	*/
garfieldsg	0:662207e34fba	2475	bool MPU6050::getFIFOEnabled()
garfieldsg	0:662207e34fba	2476	{
garfieldsg	0:662207e34fba	2477	i2Cdev.readBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_FIFO_EN_BIT, buffer);
garfieldsg	0:662207e34fba	2478	return buffer[0];
garfieldsg	0:662207e34fba	2479	}
garfieldsg	0:662207e34fba	2480	/** Set FIFO enabled status.
garfieldsg	0:662207e34fba	2481	* @param enabled New FIFO enabled status
garfieldsg	0:662207e34fba	2482	* @see getFIFOEnabled()
garfieldsg	0:662207e34fba	2483	* @see MPU6050_RA_USER_CTRL
garfieldsg	0:662207e34fba	2484	* @see MPU6050_USERCTRL_FIFO_EN_BIT
garfieldsg	0:662207e34fba	2485	*/
garfieldsg	0:662207e34fba	2486	void MPU6050::setFIFOEnabled(bool enabled)
garfieldsg	0:662207e34fba	2487	{
garfieldsg	0:662207e34fba	2488	i2Cdev.writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_FIFO_EN_BIT, enabled);
garfieldsg	0:662207e34fba	2489	}
garfieldsg	0:662207e34fba	2490	/** Get I2C Master Mode enabled status.
garfieldsg	0:662207e34fba	2491	* When this mode is enabled, the MPU-60X0 acts as the I2C Master to the
garfieldsg	0:662207e34fba	2492	* external sensor slave devices on the auxiliary I2C bus. When this bit is
garfieldsg	0:662207e34fba	2493	* cleared to 0, the auxiliary I2C bus lines (AUX_DA and AUX_CL) are logically
garfieldsg	0:662207e34fba	2494	* driven by the primary I2C bus (SDA and SCL). This is a precondition to
garfieldsg	0:662207e34fba	2495	* enabling Bypass Mode. For further information regarding Bypass Mode, please
garfieldsg	0:662207e34fba	2496	* refer to Register 55.
garfieldsg	0:662207e34fba	2497	* @return Current I2C Master Mode enabled status
garfieldsg	0:662207e34fba	2498	* @see MPU6050_RA_USER_CTRL
garfieldsg	0:662207e34fba	2499	* @see MPU6050_USERCTRL_I2C_MST_EN_BIT
garfieldsg	0:662207e34fba	2500	*/
garfieldsg	0:662207e34fba	2501	bool MPU6050::getI2CMasterModeEnabled()
garfieldsg	0:662207e34fba	2502	{
garfieldsg	0:662207e34fba	2503	i2Cdev.readBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_MST_EN_BIT, buffer);
garfieldsg	0:662207e34fba	2504	return buffer[0];
garfieldsg	0:662207e34fba	2505	}
garfieldsg	0:662207e34fba	2506	/** Set I2C Master Mode enabled status.
garfieldsg	0:662207e34fba	2507	* @param enabled New I2C Master Mode enabled status
garfieldsg	0:662207e34fba	2508	* @see getI2CMasterModeEnabled()
garfieldsg	0:662207e34fba	2509	* @see MPU6050_RA_USER_CTRL
garfieldsg	0:662207e34fba	2510	* @see MPU6050_USERCTRL_I2C_MST_EN_BIT
garfieldsg	0:662207e34fba	2511	*/
garfieldsg	0:662207e34fba	2512	void MPU6050::setI2CMasterModeEnabled(bool enabled)
garfieldsg	0:662207e34fba	2513	{
garfieldsg	0:662207e34fba	2514	i2Cdev.writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_MST_EN_BIT, enabled);
garfieldsg	0:662207e34fba	2515	}
garfieldsg	0:662207e34fba	2516	/** Switch from I2C to SPI mode (MPU-6000 only)
garfieldsg	0:662207e34fba	2517	* If this is set, the primary SPI interface will be enabled in place of the
garfieldsg	0:662207e34fba	2518	* disabled primary I2C interface.
garfieldsg	0:662207e34fba	2519	*/
garfieldsg	0:662207e34fba	2520	void MPU6050::switchSPIEnabled(bool enabled)
garfieldsg	0:662207e34fba	2521	{
garfieldsg	0:662207e34fba	2522	i2Cdev.writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_IF_DIS_BIT, enabled);
garfieldsg	0:662207e34fba	2523	}
garfieldsg	0:662207e34fba	2524	/** Reset the FIFO.
garfieldsg	0:662207e34fba	2525	* This bit resets the FIFO buffer when set to 1 while FIFO_EN equals 0. This
garfieldsg	0:662207e34fba	2526	* bit automatically clears to 0 after the reset has been triggered.
garfieldsg	0:662207e34fba	2527	* @see MPU6050_RA_USER_CTRL
garfieldsg	0:662207e34fba	2528	* @see MPU6050_USERCTRL_FIFO_RESET_BIT
garfieldsg	0:662207e34fba	2529	*/
garfieldsg	0:662207e34fba	2530	void MPU6050::resetFIFO()
garfieldsg	0:662207e34fba	2531	{
garfieldsg	0:662207e34fba	2532	i2Cdev.writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_FIFO_RESET_BIT, true);
garfieldsg	0:662207e34fba	2533	}
garfieldsg	0:662207e34fba	2534	/** Reset the I2C Master.
garfieldsg	0:662207e34fba	2535	* This bit resets the I2C Master when set to 1 while I2C_MST_EN equals 0.
garfieldsg	0:662207e34fba	2536	* This bit automatically clears to 0 after the reset has been triggered.
garfieldsg	0:662207e34fba	2537	* @see MPU6050_RA_USER_CTRL
garfieldsg	0:662207e34fba	2538	* @see MPU6050_USERCTRL_I2C_MST_RESET_BIT
garfieldsg	0:662207e34fba	2539	*/
garfieldsg	0:662207e34fba	2540	void MPU6050::resetI2CMaster()
garfieldsg	0:662207e34fba	2541	{
garfieldsg	0:662207e34fba	2542	i2Cdev.writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_MST_RESET_BIT, true);
garfieldsg	0:662207e34fba	2543	}
garfieldsg	0:662207e34fba	2544	/** Reset all sensor registers and signal paths.
garfieldsg	0:662207e34fba	2545	* When set to 1, this bit resets the signal paths for all sensors (gyroscopes,
garfieldsg	0:662207e34fba	2546	* accelerometers, and temperature sensor). This operation will also clear the
garfieldsg	0:662207e34fba	2547	* sensor registers. This bit automatically clears to 0 after the reset has been
garfieldsg	0:662207e34fba	2548	* triggered.
garfieldsg	0:662207e34fba	2549	*
garfieldsg	0:662207e34fba	2550	* When resetting only the signal path (and not the sensor registers), please
garfieldsg	0:662207e34fba	2551	* use Register 104, SIGNAL_PATH_RESET.
garfieldsg	0:662207e34fba	2552	*
garfieldsg	0:662207e34fba	2553	* @see MPU6050_RA_USER_CTRL
garfieldsg	0:662207e34fba	2554	* @see MPU6050_USERCTRL_SIG_COND_RESET_BIT
garfieldsg	0:662207e34fba	2555	*/
garfieldsg	0:662207e34fba	2556	void MPU6050::resetSensors()
garfieldsg	0:662207e34fba	2557	{
garfieldsg	0:662207e34fba	2558	i2Cdev.writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_SIG_COND_RESET_BIT, true);
garfieldsg	0:662207e34fba	2559	}
garfieldsg	0:662207e34fba	2560
garfieldsg	0:662207e34fba	2561	// PWR_MGMT_1 register
garfieldsg	0:662207e34fba	2562
garfieldsg	0:662207e34fba	2563	/** Trigger a full device reset.
garfieldsg	0:662207e34fba	2564	* A small delay of ~50ms may be desirable after triggering a reset.
garfieldsg	0:662207e34fba	2565	* @see MPU6050_RA_PWR_MGMT_1
garfieldsg	0:662207e34fba	2566	* @see MPU6050_PWR1_DEVICE_RESET_BIT
garfieldsg	0:662207e34fba	2567	*/
garfieldsg	0:662207e34fba	2568	void MPU6050::reset()
garfieldsg	0:662207e34fba	2569	{
garfieldsg	0:662207e34fba	2570	i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_DEVICE_RESET_BIT, true);
garfieldsg	0:662207e34fba	2571	}
garfieldsg	0:662207e34fba	2572	/** Get sleep mode status.
garfieldsg	0:662207e34fba	2573	* Setting the SLEEP bit in the register puts the device into very low power
garfieldsg	0:662207e34fba	2574	* sleep mode. In this mode, only the serial interface and internal registers
garfieldsg	0:662207e34fba	2575	* remain active, allowing for a very low standby current. Clearing this bit
garfieldsg	0:662207e34fba	2576	* puts the device back into normal mode. To save power, the individual standby
garfieldsg	0:662207e34fba	2577	* selections for each of the gyros should be used if any gyro axis is not used
garfieldsg	0:662207e34fba	2578	* by the application.
garfieldsg	0:662207e34fba	2579	* @return Current sleep mode enabled status
garfieldsg	0:662207e34fba	2580	* @see MPU6050_RA_PWR_MGMT_1
garfieldsg	0:662207e34fba	2581	* @see MPU6050_PWR1_SLEEP_BIT
garfieldsg	0:662207e34fba	2582	*/
garfieldsg	0:662207e34fba	2583	bool MPU6050::getSleepEnabled()
garfieldsg	0:662207e34fba	2584	{
garfieldsg	0:662207e34fba	2585	i2Cdev.readBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_SLEEP_BIT, buffer);
garfieldsg	0:662207e34fba	2586	return buffer[0];
garfieldsg	0:662207e34fba	2587	}
garfieldsg	0:662207e34fba	2588	/** Set sleep mode status.
garfieldsg	0:662207e34fba	2589	* @param enabled New sleep mode enabled status
garfieldsg	0:662207e34fba	2590	* @see getSleepEnabled()
garfieldsg	0:662207e34fba	2591	* @see MPU6050_RA_PWR_MGMT_1
garfieldsg	0:662207e34fba	2592	* @see MPU6050_PWR1_SLEEP_BIT
garfieldsg	0:662207e34fba	2593	*/
garfieldsg	0:662207e34fba	2594	void MPU6050::setSleepEnabled(bool enabled)
garfieldsg	0:662207e34fba	2595	{
garfieldsg	0:662207e34fba	2596	i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_SLEEP_BIT, enabled);
garfieldsg	0:662207e34fba	2597	}
garfieldsg	0:662207e34fba	2598	/** Get wake cycle enabled status.
garfieldsg	0:662207e34fba	2599	* When this bit is set to 1 and SLEEP is disabled, the MPU-60X0 will cycle
garfieldsg	0:662207e34fba	2600	* between sleep mode and waking up to take a single sample of data from active
garfieldsg	0:662207e34fba	2601	* sensors at a rate determined by LP_WAKE_CTRL (register 108).
garfieldsg	0:662207e34fba	2602	* @return Current sleep mode enabled status
garfieldsg	0:662207e34fba	2603	* @see MPU6050_RA_PWR_MGMT_1
garfieldsg	0:662207e34fba	2604	* @see MPU6050_PWR1_CYCLE_BIT
garfieldsg	0:662207e34fba	2605	*/
garfieldsg	0:662207e34fba	2606	bool MPU6050::getWakeCycleEnabled()
garfieldsg	0:662207e34fba	2607	{
garfieldsg	0:662207e34fba	2608	i2Cdev.readBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CYCLE_BIT, buffer);
garfieldsg	0:662207e34fba	2609	return buffer[0];
garfieldsg	0:662207e34fba	2610	}
garfieldsg	0:662207e34fba	2611	/** Set wake cycle enabled status.
garfieldsg	0:662207e34fba	2612	* @param enabled New sleep mode enabled status
garfieldsg	0:662207e34fba	2613	* @see getWakeCycleEnabled()
garfieldsg	0:662207e34fba	2614	* @see MPU6050_RA_PWR_MGMT_1
garfieldsg	0:662207e34fba	2615	* @see MPU6050_PWR1_CYCLE_BIT
garfieldsg	0:662207e34fba	2616	*/
garfieldsg	0:662207e34fba	2617	void MPU6050::setWakeCycleEnabled(bool enabled)
garfieldsg	0:662207e34fba	2618	{
garfieldsg	0:662207e34fba	2619	i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CYCLE_BIT, enabled);
garfieldsg	0:662207e34fba	2620	}
garfieldsg	0:662207e34fba	2621	/** Get temperature sensor enabled status.
garfieldsg	0:662207e34fba	2622	* Control the usage of the internal temperature sensor.
garfieldsg	0:662207e34fba	2623	*
garfieldsg	0:662207e34fba	2624	* Note: this register stores the disabled value, but for consistency with the
garfieldsg	0:662207e34fba	2625	* rest of the code, the function is named and used with standard true/false
garfieldsg	0:662207e34fba	2626	* values to indicate whether the sensor is enabled or disabled, respectively.
garfieldsg	0:662207e34fba	2627	*
garfieldsg	0:662207e34fba	2628	* @return Current temperature sensor enabled status
garfieldsg	0:662207e34fba	2629	* @see MPU6050_RA_PWR_MGMT_1
garfieldsg	0:662207e34fba	2630	* @see MPU6050_PWR1_TEMP_DIS_BIT
garfieldsg	0:662207e34fba	2631	*/
garfieldsg	0:662207e34fba	2632	bool MPU6050::getTempSensorEnabled()
garfieldsg	0:662207e34fba	2633	{
garfieldsg	0:662207e34fba	2634	i2Cdev.readBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_TEMP_DIS_BIT, buffer);
garfieldsg	0:662207e34fba	2635	return buffer[0] == 0; // 1 is actually disabled here
garfieldsg	0:662207e34fba	2636	}
garfieldsg	0:662207e34fba	2637	/** Set temperature sensor enabled status.
garfieldsg	0:662207e34fba	2638	* Note: this register stores the disabled value, but for consistency with the
garfieldsg	0:662207e34fba	2639	* rest of the code, the function is named and used with standard true/false
garfieldsg	0:662207e34fba	2640	* values to indicate whether the sensor is enabled or disabled, respectively.
garfieldsg	0:662207e34fba	2641	*
garfieldsg	0:662207e34fba	2642	* @param enabled New temperature sensor enabled status
garfieldsg	0:662207e34fba	2643	* @see getTempSensorEnabled()
garfieldsg	0:662207e34fba	2644	* @see MPU6050_RA_PWR_MGMT_1
garfieldsg	0:662207e34fba	2645	* @see MPU6050_PWR1_TEMP_DIS_BIT
garfieldsg	0:662207e34fba	2646	*/
garfieldsg	0:662207e34fba	2647	void MPU6050::setTempSensorEnabled(bool enabled)
garfieldsg	0:662207e34fba	2648	{
garfieldsg	0:662207e34fba	2649	// 1 is actually disabled here
garfieldsg	0:662207e34fba	2650	i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_TEMP_DIS_BIT, !enabled);
garfieldsg	0:662207e34fba	2651	}
garfieldsg	0:662207e34fba	2652	/** Get clock source setting.
garfieldsg	0:662207e34fba	2653	* @return Current clock source setting
garfieldsg	0:662207e34fba	2654	* @see MPU6050_RA_PWR_MGMT_1
garfieldsg	0:662207e34fba	2655	* @see MPU6050_PWR1_CLKSEL_BIT
garfieldsg	0:662207e34fba	2656	* @see MPU6050_PWR1_CLKSEL_LENGTH
garfieldsg	0:662207e34fba	2657	*/
garfieldsg	0:662207e34fba	2658	uint8_t MPU6050::getClockSource()
garfieldsg	0:662207e34fba	2659	{
garfieldsg	0:662207e34fba	2660	i2Cdev.readBits(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CLKSEL_BIT, MPU6050_PWR1_CLKSEL_LENGTH, buffer);
garfieldsg	0:662207e34fba	2661	return buffer[0];
garfieldsg	0:662207e34fba	2662	}
garfieldsg	0:662207e34fba	2663	/** Set clock source setting.
garfieldsg	0:662207e34fba	2664	* An internal 8MHz oscillator, gyroscope based clock, or external sources can
garfieldsg	0:662207e34fba	2665	* be selected as the MPU-60X0 clock source. When the internal 8 MHz oscillator
garfieldsg	0:662207e34fba	2666	* or an external source is chosen as the clock source, the MPU-60X0 can operate
garfieldsg	0:662207e34fba	2667	* in low power modes with the gyroscopes disabled.
garfieldsg	0:662207e34fba	2668	*
garfieldsg	0:662207e34fba	2669	* Upon power up, the MPU-60X0 clock source defaults to the internal oscillator.
garfieldsg	0:662207e34fba	2670	* However, it is highly recommended that the device be configured to use one of
garfieldsg	0:662207e34fba	2671	* the gyroscopes (or an external clock source) as the clock reference for
garfieldsg	0:662207e34fba	2672	* improved stability. The clock source can be selected according to the following table:
garfieldsg	0:662207e34fba	2673	*
garfieldsg	0:662207e34fba	2674	* <pre>
garfieldsg	0:662207e34fba	2675	* CLK_SEL \| Clock Source
garfieldsg	0:662207e34fba	2676	* --------+--------------------------------------
garfieldsg	0:662207e34fba	2677	* 0 \| Internal oscillator
garfieldsg	0:662207e34fba	2678	* 1 \| PLL with X Gyro reference
garfieldsg	0:662207e34fba	2679	* 2 \| PLL with Y Gyro reference
garfieldsg	0:662207e34fba	2680	* 3 \| PLL with Z Gyro reference
garfieldsg	0:662207e34fba	2681	* 4 \| PLL with external 32.768kHz reference
garfieldsg	0:662207e34fba	2682	* 5 \| PLL with external 19.2MHz reference
garfieldsg	0:662207e34fba	2683	* 6 \| Reserved
garfieldsg	0:662207e34fba	2684	* 7 \| Stops the clock and keeps the timing generator in reset
garfieldsg	0:662207e34fba	2685	* </pre>
garfieldsg	0:662207e34fba	2686	*
garfieldsg	0:662207e34fba	2687	* @param source New clock source setting
garfieldsg	0:662207e34fba	2688	* @see getClockSource()
garfieldsg	0:662207e34fba	2689	* @see MPU6050_RA_PWR_MGMT_1
garfieldsg	0:662207e34fba	2690	* @see MPU6050_PWR1_CLKSEL_BIT
garfieldsg	0:662207e34fba	2691	* @see MPU6050_PWR1_CLKSEL_LENGTH
garfieldsg	0:662207e34fba	2692	*/
garfieldsg	0:662207e34fba	2693	void MPU6050::setClockSource(uint8_t source)
garfieldsg	0:662207e34fba	2694	{
garfieldsg	0:662207e34fba	2695	i2Cdev.writeBits(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CLKSEL_BIT, MPU6050_PWR1_CLKSEL_LENGTH, source);
garfieldsg	0:662207e34fba	2696	}
garfieldsg	0:662207e34fba	2697
garfieldsg	0:662207e34fba	2698	// PWR_MGMT_2 register
garfieldsg	0:662207e34fba	2699
garfieldsg	0:662207e34fba	2700	/** Get wake frequency in Accel-Only Low Power Mode.
garfieldsg	0:662207e34fba	2701	* The MPU-60X0 can be put into Accerlerometer Only Low Power Mode by setting
garfieldsg	0:662207e34fba	2702	* PWRSEL to 1 in the Power Management 1 register (Register 107). In this mode,
garfieldsg	0:662207e34fba	2703	* the device will power off all devices except for the primary I2C interface,
garfieldsg	0:662207e34fba	2704	* waking only the accelerometer at fixed intervals to take a single
garfieldsg	0:662207e34fba	2705	* measurement. The frequency of wake-ups can be configured with LP_WAKE_CTRL
garfieldsg	0:662207e34fba	2706	* as shown below:
garfieldsg	0:662207e34fba	2707	*
garfieldsg	0:662207e34fba	2708	* <pre>
garfieldsg	0:662207e34fba	2709	* LP_WAKE_CTRL \| Wake-up Frequency
garfieldsg	0:662207e34fba	2710	* -------------+------------------
garfieldsg	0:662207e34fba	2711	* 0 \| 1.25 Hz
garfieldsg	0:662207e34fba	2712	* 1 \| 2.5 Hz
garfieldsg	0:662207e34fba	2713	* 2 \| 5 Hz
garfieldsg	0:662207e34fba	2714	* 3 \| 10 Hz
garfieldsg	0:662207e34fba	2715	* <pre>
garfieldsg	0:662207e34fba	2716	*
garfieldsg	0:662207e34fba	2717	* For further information regarding the MPU-60X0's power modes, please refer to
garfieldsg	0:662207e34fba	2718	* Register 107.
garfieldsg	0:662207e34fba	2719	*
garfieldsg	0:662207e34fba	2720	* @return Current wake frequency
garfieldsg	0:662207e34fba	2721	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2722	*/
garfieldsg	0:662207e34fba	2723	uint8_t MPU6050::getWakeFrequency()
garfieldsg	0:662207e34fba	2724	{
garfieldsg	0:662207e34fba	2725	i2Cdev.readBits(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_LP_WAKE_CTRL_BIT, MPU6050_PWR2_LP_WAKE_CTRL_LENGTH, buffer);
garfieldsg	0:662207e34fba	2726	return buffer[0];
garfieldsg	0:662207e34fba	2727	}
garfieldsg	0:662207e34fba	2728	/** Set wake frequency in Accel-Only Low Power Mode.
garfieldsg	0:662207e34fba	2729	* @param frequency New wake frequency
garfieldsg	0:662207e34fba	2730	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2731	*/
garfieldsg	0:662207e34fba	2732	void MPU6050::setWakeFrequency(uint8_t frequency)
garfieldsg	0:662207e34fba	2733	{
garfieldsg	0:662207e34fba	2734	i2Cdev.writeBits(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_LP_WAKE_CTRL_BIT, MPU6050_PWR2_LP_WAKE_CTRL_LENGTH, frequency);
garfieldsg	0:662207e34fba	2735	}
garfieldsg	0:662207e34fba	2736
garfieldsg	0:662207e34fba	2737	/** Get X-axis accelerometer standby enabled status.
garfieldsg	0:662207e34fba	2738	* If enabled, the X-axis will not gather or report data (or use power).
garfieldsg	0:662207e34fba	2739	* @return Current X-axis standby enabled status
garfieldsg	0:662207e34fba	2740	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2741	* @see MPU6050_PWR2_STBY_XA_BIT
garfieldsg	0:662207e34fba	2742	*/
garfieldsg	0:662207e34fba	2743	bool MPU6050::getStandbyXAccelEnabled()
garfieldsg	0:662207e34fba	2744	{
garfieldsg	0:662207e34fba	2745	i2Cdev.readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XA_BIT, buffer);
garfieldsg	0:662207e34fba	2746	return buffer[0];
garfieldsg	0:662207e34fba	2747	}
garfieldsg	0:662207e34fba	2748	/** Set X-axis accelerometer standby enabled status.
garfieldsg	0:662207e34fba	2749	* @param New X-axis standby enabled status
garfieldsg	0:662207e34fba	2750	* @see getStandbyXAccelEnabled()
garfieldsg	0:662207e34fba	2751	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2752	* @see MPU6050_PWR2_STBY_XA_BIT
garfieldsg	0:662207e34fba	2753	*/
garfieldsg	0:662207e34fba	2754	void MPU6050::setStandbyXAccelEnabled(bool enabled)
garfieldsg	0:662207e34fba	2755	{
garfieldsg	0:662207e34fba	2756	i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XA_BIT, enabled);
garfieldsg	0:662207e34fba	2757	}
garfieldsg	0:662207e34fba	2758	/** Get Y-axis accelerometer standby enabled status.
garfieldsg	0:662207e34fba	2759	* If enabled, the Y-axis will not gather or report data (or use power).
garfieldsg	0:662207e34fba	2760	* @return Current Y-axis standby enabled status
garfieldsg	0:662207e34fba	2761	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2762	* @see MPU6050_PWR2_STBY_YA_BIT
garfieldsg	0:662207e34fba	2763	*/
garfieldsg	0:662207e34fba	2764	bool MPU6050::getStandbyYAccelEnabled()
garfieldsg	0:662207e34fba	2765	{
garfieldsg	0:662207e34fba	2766	i2Cdev.readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YA_BIT, buffer);
garfieldsg	0:662207e34fba	2767	return buffer[0];
garfieldsg	0:662207e34fba	2768	}
garfieldsg	0:662207e34fba	2769	/** Set Y-axis accelerometer standby enabled status.
garfieldsg	0:662207e34fba	2770	* @param New Y-axis standby enabled status
garfieldsg	0:662207e34fba	2771	* @see getStandbyYAccelEnabled()
garfieldsg	0:662207e34fba	2772	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2773	* @see MPU6050_PWR2_STBY_YA_BIT
garfieldsg	0:662207e34fba	2774	*/
garfieldsg	0:662207e34fba	2775	void MPU6050::setStandbyYAccelEnabled(bool enabled)
garfieldsg	0:662207e34fba	2776	{
garfieldsg	0:662207e34fba	2777	i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YA_BIT, enabled);
garfieldsg	0:662207e34fba	2778	}
garfieldsg	0:662207e34fba	2779	/** Get Z-axis accelerometer standby enabled status.
garfieldsg	0:662207e34fba	2780	* If enabled, the Z-axis will not gather or report data (or use power).
garfieldsg	0:662207e34fba	2781	* @return Current Z-axis standby enabled status
garfieldsg	0:662207e34fba	2782	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2783	* @see MPU6050_PWR2_STBY_ZA_BIT
garfieldsg	0:662207e34fba	2784	*/
garfieldsg	0:662207e34fba	2785	bool MPU6050::getStandbyZAccelEnabled()
garfieldsg	0:662207e34fba	2786	{
garfieldsg	0:662207e34fba	2787	i2Cdev.readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZA_BIT, buffer);
garfieldsg	0:662207e34fba	2788	return buffer[0];
garfieldsg	0:662207e34fba	2789	}
garfieldsg	0:662207e34fba	2790	/** Set Z-axis accelerometer standby enabled status.
garfieldsg	0:662207e34fba	2791	* @param New Z-axis standby enabled status
garfieldsg	0:662207e34fba	2792	* @see getStandbyZAccelEnabled()
garfieldsg	0:662207e34fba	2793	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2794	* @see MPU6050_PWR2_STBY_ZA_BIT
garfieldsg	0:662207e34fba	2795	*/
garfieldsg	0:662207e34fba	2796	void MPU6050::setStandbyZAccelEnabled(bool enabled)
garfieldsg	0:662207e34fba	2797	{
garfieldsg	0:662207e34fba	2798	i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZA_BIT, enabled);
garfieldsg	0:662207e34fba	2799	}
garfieldsg	0:662207e34fba	2800	/** Get X-axis gyroscope standby enabled status.
garfieldsg	0:662207e34fba	2801	* If enabled, the X-axis will not gather or report data (or use power).
garfieldsg	0:662207e34fba	2802	* @return Current X-axis standby enabled status
garfieldsg	0:662207e34fba	2803	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2804	* @see MPU6050_PWR2_STBY_XG_BIT
garfieldsg	0:662207e34fba	2805	*/
garfieldsg	0:662207e34fba	2806	bool MPU6050::getStandbyXGyroEnabled()
garfieldsg	0:662207e34fba	2807	{
garfieldsg	0:662207e34fba	2808	i2Cdev.readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XG_BIT, buffer);
garfieldsg	0:662207e34fba	2809	return buffer[0];
garfieldsg	0:662207e34fba	2810	}
garfieldsg	0:662207e34fba	2811	/** Set X-axis gyroscope standby enabled status.
garfieldsg	0:662207e34fba	2812	* @param New X-axis standby enabled status
garfieldsg	0:662207e34fba	2813	* @see getStandbyXGyroEnabled()
garfieldsg	0:662207e34fba	2814	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2815	* @see MPU6050_PWR2_STBY_XG_BIT
garfieldsg	0:662207e34fba	2816	*/
garfieldsg	0:662207e34fba	2817	void MPU6050::setStandbyXGyroEnabled(bool enabled)
garfieldsg	0:662207e34fba	2818	{
garfieldsg	0:662207e34fba	2819	i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XG_BIT, enabled);
garfieldsg	0:662207e34fba	2820	}
garfieldsg	0:662207e34fba	2821	/** Get Y-axis gyroscope standby enabled status.
garfieldsg	0:662207e34fba	2822	* If enabled, the Y-axis will not gather or report data (or use power).
garfieldsg	0:662207e34fba	2823	* @return Current Y-axis standby enabled status
garfieldsg	0:662207e34fba	2824	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2825	* @see MPU6050_PWR2_STBY_YG_BIT
garfieldsg	0:662207e34fba	2826	*/
garfieldsg	0:662207e34fba	2827	bool MPU6050::getStandbyYGyroEnabled()
garfieldsg	0:662207e34fba	2828	{
garfieldsg	0:662207e34fba	2829	i2Cdev.readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YG_BIT, buffer);
garfieldsg	0:662207e34fba	2830	return buffer[0];
garfieldsg	0:662207e34fba	2831	}
garfieldsg	0:662207e34fba	2832	/** Set Y-axis gyroscope standby enabled status.
garfieldsg	0:662207e34fba	2833	* @param New Y-axis standby enabled status
garfieldsg	0:662207e34fba	2834	* @see getStandbyYGyroEnabled()
garfieldsg	0:662207e34fba	2835	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2836	* @see MPU6050_PWR2_STBY_YG_BIT
garfieldsg	0:662207e34fba	2837	*/
garfieldsg	0:662207e34fba	2838	void MPU6050::setStandbyYGyroEnabled(bool enabled)
garfieldsg	0:662207e34fba	2839	{
garfieldsg	0:662207e34fba	2840	i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YG_BIT, enabled);
garfieldsg	0:662207e34fba	2841	}
garfieldsg	0:662207e34fba	2842	/** Get Z-axis gyroscope standby enabled status.
garfieldsg	0:662207e34fba	2843	* If enabled, the Z-axis will not gather or report data (or use power).
garfieldsg	0:662207e34fba	2844	* @return Current Z-axis standby enabled status
garfieldsg	0:662207e34fba	2845	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2846	* @see MPU6050_PWR2_STBY_ZG_BIT
garfieldsg	0:662207e34fba	2847	*/
garfieldsg	0:662207e34fba	2848	bool MPU6050::getStandbyZGyroEnabled()
garfieldsg	0:662207e34fba	2849	{
garfieldsg	0:662207e34fba	2850	i2Cdev.readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZG_BIT, buffer);
garfieldsg	0:662207e34fba	2851	return buffer[0];
garfieldsg	0:662207e34fba	2852	}
garfieldsg	0:662207e34fba	2853	/** Set Z-axis gyroscope standby enabled status.
garfieldsg	0:662207e34fba	2854	* @param New Z-axis standby enabled status
garfieldsg	0:662207e34fba	2855	* @see getStandbyZGyroEnabled()
garfieldsg	0:662207e34fba	2856	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2857	* @see MPU6050_PWR2_STBY_ZG_BIT
garfieldsg	0:662207e34fba	2858	*/
garfieldsg	0:662207e34fba	2859	void MPU6050::setStandbyZGyroEnabled(bool enabled)
garfieldsg	0:662207e34fba	2860	{
garfieldsg	0:662207e34fba	2861	i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZG_BIT, enabled);
garfieldsg	0:662207e34fba	2862	}
garfieldsg	0:662207e34fba	2863
garfieldsg	0:662207e34fba	2864	// FIFO_COUNT* registers
garfieldsg	0:662207e34fba	2865
garfieldsg	0:662207e34fba	2866	/** Get current FIFO buffer size.
garfieldsg	0:662207e34fba	2867	* This value indicates the number of bytes stored in the FIFO buffer. This
garfieldsg	0:662207e34fba	2868	* number is in turn the number of bytes that can be read from the FIFO buffer
garfieldsg	0:662207e34fba	2869	* and it is directly proportional to the number of samples available given the
garfieldsg	0:662207e34fba	2870	* set of sensor data bound to be stored in the FIFO (register 35 and 36).
garfieldsg	0:662207e34fba	2871	* @return Current FIFO buffer size
garfieldsg	0:662207e34fba	2872	*/
garfieldsg	0:662207e34fba	2873	uint16_t MPU6050::getFIFOCount()
garfieldsg	0:662207e34fba	2874	{
garfieldsg	0:662207e34fba	2875	i2Cdev.readBytes(devAddr, MPU6050_RA_FIFO_COUNTH, 2, buffer);
garfieldsg	0:662207e34fba	2876	return (((uint16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	2877	}
garfieldsg	0:662207e34fba	2878
garfieldsg	0:662207e34fba	2879	// FIFO_R_W register
garfieldsg	0:662207e34fba	2880
garfieldsg	0:662207e34fba	2881	/** Get byte from FIFO buffer.
garfieldsg	0:662207e34fba	2882	* This register is used to read and write data from the FIFO buffer. Data is
garfieldsg	0:662207e34fba	2883	* written to the FIFO in order of register number (from lowest to highest). If
garfieldsg	0:662207e34fba	2884	* all the FIFO enable flags (see below) are enabled and all External Sensor
garfieldsg	0:662207e34fba	2885	* Data registers (Registers 73 to 96) are associated with a Slave device, the
garfieldsg	0:662207e34fba	2886	* contents of registers 59 through 96 will be written in order at the Sample
garfieldsg	0:662207e34fba	2887	* Rate.
garfieldsg	0:662207e34fba	2888	*
garfieldsg	0:662207e34fba	2889	* The contents of the sensor data registers (Registers 59 to 96) are written
garfieldsg	0:662207e34fba	2890	* into the FIFO buffer when their corresponding FIFO enable flags are set to 1
garfieldsg	0:662207e34fba	2891	* in FIFO_EN (Register 35). An additional flag for the sensor data registers
garfieldsg	0:662207e34fba	2892	* associated with I2C Slave 3 can be found in I2C_MST_CTRL (Register 36).
garfieldsg	0:662207e34fba	2893	*
garfieldsg	0:662207e34fba	2894	* If the FIFO buffer has overflowed, the status bit FIFO_OFLOW_INT is
garfieldsg	0:662207e34fba	2895	* automatically set to 1. This bit is located in INT_STATUS (Register 58).
garfieldsg	0:662207e34fba	2896	* When the FIFO buffer has overflowed, the oldest data will be lost and new
garfieldsg	0:662207e34fba	2897	* data will be written to the FIFO.
garfieldsg	0:662207e34fba	2898	*
garfieldsg	0:662207e34fba	2899	* If the FIFO buffer is empty, reading this register will return the last byte
garfieldsg	0:662207e34fba	2900	* that was previously read from the FIFO until new data is available. The user
garfieldsg	0:662207e34fba	2901	* should check FIFO_COUNT to ensure that the FIFO buffer is not read when
garfieldsg	0:662207e34fba	2902	* empty.
garfieldsg	0:662207e34fba	2903	*
garfieldsg	0:662207e34fba	2904	* @return Byte from FIFO buffer
garfieldsg	0:662207e34fba	2905	*/
garfieldsg	0:662207e34fba	2906	uint8_t MPU6050::getFIFOByte()
garfieldsg	0:662207e34fba	2907	{
garfieldsg	0:662207e34fba	2908	i2Cdev.readByte(devAddr, MPU6050_RA_FIFO_R_W, buffer);
garfieldsg	0:662207e34fba	2909	return buffer[0];
garfieldsg	0:662207e34fba	2910	}
garfieldsg	0:662207e34fba	2911	void MPU6050::getFIFOBytes(uint8_t *data, uint8_t length)
garfieldsg	0:662207e34fba	2912	{
garfieldsg	0:662207e34fba	2913	i2Cdev.readBytes(devAddr, MPU6050_RA_FIFO_R_W, length, data);
garfieldsg	0:662207e34fba	2914	}
garfieldsg	0:662207e34fba	2915	/** Write byte to FIFO buffer.
garfieldsg	0:662207e34fba	2916	* @see getFIFOByte()
garfieldsg	0:662207e34fba	2917	* @see MPU6050_RA_FIFO_R_W
garfieldsg	0:662207e34fba	2918	*/
garfieldsg	0:662207e34fba	2919	void MPU6050::setFIFOByte(uint8_t data)
garfieldsg	0:662207e34fba	2920	{
garfieldsg	0:662207e34fba	2921	i2Cdev.writeByte(devAddr, MPU6050_RA_FIFO_R_W, data);
garfieldsg	0:662207e34fba	2922	}
garfieldsg	0:662207e34fba	2923
garfieldsg	0:662207e34fba	2924	// WHO_AM_I register
garfieldsg	0:662207e34fba	2925
garfieldsg	0:662207e34fba	2926	/** Get Device ID.
garfieldsg	0:662207e34fba	2927	* This register is used to verify the identity of the device (0b110100, 0x34).
garfieldsg	0:662207e34fba	2928	* @return Device ID (6 bits only! should be 0x34)
garfieldsg	0:662207e34fba	2929	* @see MPU6050_RA_WHO_AM_I
garfieldsg	0:662207e34fba	2930	* @see MPU6050_WHO_AM_I_BIT
garfieldsg	0:662207e34fba	2931	* @see MPU6050_WHO_AM_I_LENGTH
garfieldsg	0:662207e34fba	2932	*/
garfieldsg	0:662207e34fba	2933	uint8_t MPU6050::getDeviceID()
garfieldsg	0:662207e34fba	2934	{
garfieldsg	0:662207e34fba	2935	i2Cdev.readBits(devAddr, MPU6050_RA_WHO_AM_I, MPU6050_WHO_AM_I_BIT, MPU6050_WHO_AM_I_LENGTH, buffer);
garfieldsg	0:662207e34fba	2936	return buffer[0];
garfieldsg	0:662207e34fba	2937	}
garfieldsg	0:662207e34fba	2938	/** Set Device ID.
garfieldsg	0:662207e34fba	2939	* Write a new ID into the WHO_AM_I register (no idea why this should ever be
garfieldsg	0:662207e34fba	2940	* necessary though).
garfieldsg	0:662207e34fba	2941	* @param id New device ID to set.
garfieldsg	0:662207e34fba	2942	* @see getDeviceID()
garfieldsg	0:662207e34fba	2943	* @see MPU6050_RA_WHO_AM_I
garfieldsg	0:662207e34fba	2944	* @see MPU6050_WHO_AM_I_BIT
garfieldsg	0:662207e34fba	2945	* @see MPU6050_WHO_AM_I_LENGTH
garfieldsg	0:662207e34fba	2946	*/
garfieldsg	0:662207e34fba	2947	void MPU6050::setDeviceID(uint8_t id)
garfieldsg	0:662207e34fba	2948	{
garfieldsg	0:662207e34fba	2949	i2Cdev.writeBits(devAddr, MPU6050_RA_WHO_AM_I, MPU6050_WHO_AM_I_BIT, MPU6050_WHO_AM_I_LENGTH, id);
garfieldsg	0:662207e34fba	2950	}
garfieldsg	0:662207e34fba	2951
garfieldsg	0:662207e34fba	2952	// ======== UNDOCUMENTED/DMP REGISTERS/METHODS ========
garfieldsg	0:662207e34fba	2953
garfieldsg	0:662207e34fba	2954	// XG_OFFS_TC register
garfieldsg	0:662207e34fba	2955
garfieldsg	0:662207e34fba	2956	uint8_t MPU6050::getOTPBankValid()
garfieldsg	0:662207e34fba	2957	{
garfieldsg	0:662207e34fba	2958	i2Cdev.readBit(devAddr, MPU6050_RA_XG_OFFS_TC, MPU6050_TC_OTP_BNK_VLD_BIT, buffer);
garfieldsg	0:662207e34fba	2959	return buffer[0];
garfieldsg	0:662207e34fba	2960	}
garfieldsg	0:662207e34fba	2961	void MPU6050::setOTPBankValid(bool enabled)
garfieldsg	0:662207e34fba	2962	{
garfieldsg	0:662207e34fba	2963	i2Cdev.writeBit(devAddr, MPU6050_RA_XG_OFFS_TC, MPU6050_TC_OTP_BNK_VLD_BIT, enabled);
garfieldsg	0:662207e34fba	2964	}
garfieldsg	0:662207e34fba	2965	int8_t MPU6050::getXGyroOffset()
garfieldsg	0:662207e34fba	2966	{
garfieldsg	0:662207e34fba	2967	i2Cdev.readBits(devAddr, MPU6050_RA_XG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, buffer);
garfieldsg	0:662207e34fba	2968	return buffer[0];
garfieldsg	0:662207e34fba	2969	}
garfieldsg	0:662207e34fba	2970	void MPU6050::setXGyroOffset(int8_t offset)
garfieldsg	0:662207e34fba	2971	{
garfieldsg	0:662207e34fba	2972	i2Cdev.writeBits(devAddr, MPU6050_RA_XG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, offset);
garfieldsg	0:662207e34fba	2973	}
garfieldsg	0:662207e34fba	2974
garfieldsg	0:662207e34fba	2975	// YG_OFFS_TC register
garfieldsg	0:662207e34fba	2976
garfieldsg	0:662207e34fba	2977	int8_t MPU6050::getYGyroOffset()
garfieldsg	0:662207e34fba	2978	{
garfieldsg	0:662207e34fba	2979	i2Cdev.readBits(devAddr, MPU6050_RA_YG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, buffer);
garfieldsg	0:662207e34fba	2980	return buffer[0];
garfieldsg	0:662207e34fba	2981	}
garfieldsg	0:662207e34fba	2982	void MPU6050::setYGyroOffset(int8_t offset)
garfieldsg	0:662207e34fba	2983	{
garfieldsg	0:662207e34fba	2984	i2Cdev.writeBits(devAddr, MPU6050_RA_YG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, offset);
garfieldsg	0:662207e34fba	2985	}
garfieldsg	0:662207e34fba	2986
garfieldsg	0:662207e34fba	2987	// ZG_OFFS_TC register
garfieldsg	0:662207e34fba	2988
garfieldsg	0:662207e34fba	2989	int8_t MPU6050::getZGyroOffset()
garfieldsg	0:662207e34fba	2990	{
garfieldsg	0:662207e34fba	2991	i2Cdev.readBits(devAddr, MPU6050_RA_ZG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, buffer);
garfieldsg	0:662207e34fba	2992	return buffer[0];
garfieldsg	0:662207e34fba	2993	}
garfieldsg	0:662207e34fba	2994	void MPU6050::setZGyroOffset(int8_t offset)
garfieldsg	0:662207e34fba	2995	{
garfieldsg	0:662207e34fba	2996	i2Cdev.writeBits(devAddr, MPU6050_RA_ZG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, offset);
garfieldsg	0:662207e34fba	2997	}
garfieldsg	0:662207e34fba	2998
garfieldsg	0:662207e34fba	2999	// X_FINE_GAIN register
garfieldsg	0:662207e34fba	3000
garfieldsg	0:662207e34fba	3001	int8_t MPU6050::getXFineGain()
garfieldsg	0:662207e34fba	3002	{
garfieldsg	0:662207e34fba	3003	i2Cdev.readByte(devAddr, MPU6050_RA_X_FINE_GAIN, buffer);
garfieldsg	0:662207e34fba	3004	return buffer[0];
garfieldsg	0:662207e34fba	3005	}
garfieldsg	0:662207e34fba	3006	void MPU6050::setXFineGain(int8_t gain)
garfieldsg	0:662207e34fba	3007	{
garfieldsg	0:662207e34fba	3008	i2Cdev.writeByte(devAddr, MPU6050_RA_X_FINE_GAIN, gain);
garfieldsg	0:662207e34fba	3009	}
garfieldsg	0:662207e34fba	3010
garfieldsg	0:662207e34fba	3011	// Y_FINE_GAIN register
garfieldsg	0:662207e34fba	3012
garfieldsg	0:662207e34fba	3013	int8_t MPU6050::getYFineGain()
garfieldsg	0:662207e34fba	3014	{
garfieldsg	0:662207e34fba	3015	i2Cdev.readByte(devAddr, MPU6050_RA_Y_FINE_GAIN, buffer);
garfieldsg	0:662207e34fba	3016	return buffer[0];
garfieldsg	0:662207e34fba	3017	}
garfieldsg	0:662207e34fba	3018	void MPU6050::setYFineGain(int8_t gain)
garfieldsg	0:662207e34fba	3019	{
garfieldsg	0:662207e34fba	3020	i2Cdev.writeByte(devAddr, MPU6050_RA_Y_FINE_GAIN, gain);
garfieldsg	0:662207e34fba	3021	}
garfieldsg	0:662207e34fba	3022
garfieldsg	0:662207e34fba	3023	// Z_FINE_GAIN register
garfieldsg	0:662207e34fba	3024
garfieldsg	0:662207e34fba	3025	int8_t MPU6050::getZFineGain()
garfieldsg	0:662207e34fba	3026	{
garfieldsg	0:662207e34fba	3027	i2Cdev.readByte(devAddr, MPU6050_RA_Z_FINE_GAIN, buffer);
garfieldsg	0:662207e34fba	3028	return buffer[0];
garfieldsg	0:662207e34fba	3029	}
garfieldsg	0:662207e34fba	3030	void MPU6050::setZFineGain(int8_t gain)
garfieldsg	0:662207e34fba	3031	{
garfieldsg	0:662207e34fba	3032	i2Cdev.writeByte(devAddr, MPU6050_RA_Z_FINE_GAIN, gain);
garfieldsg	0:662207e34fba	3033	}
garfieldsg	0:662207e34fba	3034
garfieldsg	0:662207e34fba	3035	// XA_OFFS_* registers
garfieldsg	0:662207e34fba	3036
garfieldsg	0:662207e34fba	3037	int16_t MPU6050::getXAccelOffset()
garfieldsg	0:662207e34fba	3038	{
garfieldsg	0:662207e34fba	3039	i2Cdev.readBytes(devAddr, MPU6050_RA_XA_OFFS_H, 2, buffer);
garfieldsg	0:662207e34fba	3040	return (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	3041	}
garfieldsg	0:662207e34fba	3042	void MPU6050::setXAccelOffset(int16_t offset)
garfieldsg	0:662207e34fba	3043	{
garfieldsg	0:662207e34fba	3044	i2Cdev.writeWord(devAddr, MPU6050_RA_XA_OFFS_H, offset);
garfieldsg	0:662207e34fba	3045	}
garfieldsg	0:662207e34fba	3046
garfieldsg	0:662207e34fba	3047	// YA_OFFS_* register
garfieldsg	0:662207e34fba	3048
garfieldsg	0:662207e34fba	3049	int16_t MPU6050::getYAccelOffset()
garfieldsg	0:662207e34fba	3050	{
garfieldsg	0:662207e34fba	3051	i2Cdev.readBytes(devAddr, MPU6050_RA_YA_OFFS_H, 2, buffer);
garfieldsg	0:662207e34fba	3052	return (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	3053	}
garfieldsg	0:662207e34fba	3054	void MPU6050::setYAccelOffset(int16_t offset)
garfieldsg	0:662207e34fba	3055	{
garfieldsg	0:662207e34fba	3056	i2Cdev.writeWord(devAddr, MPU6050_RA_YA_OFFS_H, offset);
garfieldsg	0:662207e34fba	3057	}
garfieldsg	0:662207e34fba	3058
garfieldsg	0:662207e34fba	3059	// ZA_OFFS_* register
garfieldsg	0:662207e34fba	3060
garfieldsg	0:662207e34fba	3061	int16_t MPU6050::getZAccelOffset()
garfieldsg	0:662207e34fba	3062	{
garfieldsg	0:662207e34fba	3063	i2Cdev.readBytes(devAddr, MPU6050_RA_ZA_OFFS_H, 2, buffer);
garfieldsg	0:662207e34fba	3064	return (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	3065	}
garfieldsg	0:662207e34fba	3066	void MPU6050::setZAccelOffset(int16_t offset)
garfieldsg	0:662207e34fba	3067	{
garfieldsg	0:662207e34fba	3068	i2Cdev.writeWord(devAddr, MPU6050_RA_ZA_OFFS_H, offset);
garfieldsg	0:662207e34fba	3069	}
garfieldsg	0:662207e34fba	3070
garfieldsg	0:662207e34fba	3071	// XG_OFFS_USR* registers
garfieldsg	0:662207e34fba	3072
garfieldsg	0:662207e34fba	3073	int16_t MPU6050::getXGyroOffsetUser()
garfieldsg	0:662207e34fba	3074	{
garfieldsg	0:662207e34fba	3075	i2Cdev.readBytes(devAddr, MPU6050_RA_XG_OFFS_USRH, 2, buffer);
garfieldsg	0:662207e34fba	3076	return (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	3077	}
garfieldsg	0:662207e34fba	3078	void MPU6050::setXGyroOffsetUser(int16_t offset)
garfieldsg	0:662207e34fba	3079	{
garfieldsg	0:662207e34fba	3080	i2Cdev.writeWord(devAddr, MPU6050_RA_XG_OFFS_USRH, offset);
garfieldsg	0:662207e34fba	3081	}
garfieldsg	0:662207e34fba	3082
garfieldsg	0:662207e34fba	3083	// YG_OFFS_USR* register
garfieldsg	0:662207e34fba	3084
garfieldsg	0:662207e34fba	3085	int16_t MPU6050::getYGyroOffsetUser()
garfieldsg	0:662207e34fba	3086	{
garfieldsg	0:662207e34fba	3087	i2Cdev.readBytes(devAddr, MPU6050_RA_YG_OFFS_USRH, 2, buffer);
garfieldsg	0:662207e34fba	3088	return (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	3089	}
garfieldsg	0:662207e34fba	3090	void MPU6050::setYGyroOffsetUser(int16_t offset)
garfieldsg	0:662207e34fba	3091	{
garfieldsg	0:662207e34fba	3092	i2Cdev.writeWord(devAddr, MPU6050_RA_YG_OFFS_USRH, offset);
garfieldsg	0:662207e34fba	3093	}
garfieldsg	0:662207e34fba	3094
garfieldsg	0:662207e34fba	3095	// ZG_OFFS_USR* register
garfieldsg	0:662207e34fba	3096
garfieldsg	0:662207e34fba	3097	int16_t MPU6050::getZGyroOffsetUser()
garfieldsg	0:662207e34fba	3098	{
garfieldsg	0:662207e34fba	3099	i2Cdev.readBytes(devAddr, MPU6050_RA_ZG_OFFS_USRH, 2, buffer);
garfieldsg	0:662207e34fba	3100	return (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	3101	}
garfieldsg	0:662207e34fba	3102	void MPU6050::setZGyroOffsetUser(int16_t offset)
garfieldsg	0:662207e34fba	3103	{
garfieldsg	0:662207e34fba	3104	i2Cdev.writeWord(devAddr, MPU6050_RA_ZG_OFFS_USRH, offset);
garfieldsg	0:662207e34fba	3105	}
garfieldsg	0:662207e34fba	3106
garfieldsg	0:662207e34fba	3107	// INT_ENABLE register (DMP functions)
garfieldsg	0:662207e34fba	3108
garfieldsg	0:662207e34fba	3109	bool MPU6050::getIntPLLReadyEnabled()
garfieldsg	0:662207e34fba	3110	{
garfieldsg	0:662207e34fba	3111	i2Cdev.readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_PLL_RDY_INT_BIT, buffer);
garfieldsg	0:662207e34fba	3112	return buffer[0];
garfieldsg	0:662207e34fba	3113	}
garfieldsg	0:662207e34fba	3114	void MPU6050::setIntPLLReadyEnabled(bool enabled)
garfieldsg	0:662207e34fba	3115	{
garfieldsg	0:662207e34fba	3116	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_PLL_RDY_INT_BIT, enabled);
garfieldsg	0:662207e34fba	3117	}
garfieldsg	0:662207e34fba	3118	bool MPU6050::getIntDMPEnabled()
garfieldsg	0:662207e34fba	3119	{
garfieldsg	0:662207e34fba	3120	i2Cdev.readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DMP_INT_BIT, buffer);
garfieldsg	0:662207e34fba	3121	return buffer[0];
garfieldsg	0:662207e34fba	3122	}
garfieldsg	0:662207e34fba	3123	void MPU6050::setIntDMPEnabled(bool enabled)
garfieldsg	0:662207e34fba	3124	{
garfieldsg	0:662207e34fba	3125	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DMP_INT_BIT, enabled);
garfieldsg	0:662207e34fba	3126	}
garfieldsg	0:662207e34fba	3127
garfieldsg	0:662207e34fba	3128	// DMP_INT_STATUS
garfieldsg	0:662207e34fba	3129
garfieldsg	0:662207e34fba	3130	bool MPU6050::getDMPInt5Status()
garfieldsg	0:662207e34fba	3131	{
garfieldsg	0:662207e34fba	3132	i2Cdev.readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_5_BIT, buffer);
garfieldsg	0:662207e34fba	3133	return buffer[0];
garfieldsg	0:662207e34fba	3134	}
garfieldsg	0:662207e34fba	3135	bool MPU6050::getDMPInt4Status()
garfieldsg	0:662207e34fba	3136	{
garfieldsg	0:662207e34fba	3137	i2Cdev.readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_4_BIT, buffer);
garfieldsg	0:662207e34fba	3138	return buffer[0];
garfieldsg	0:662207e34fba	3139	}
garfieldsg	0:662207e34fba	3140	bool MPU6050::getDMPInt3Status()
garfieldsg	0:662207e34fba	3141	{
garfieldsg	0:662207e34fba	3142	i2Cdev.readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_3_BIT, buffer);
garfieldsg	0:662207e34fba	3143	return buffer[0];
garfieldsg	0:662207e34fba	3144	}
garfieldsg	0:662207e34fba	3145	bool MPU6050::getDMPInt2Status()
garfieldsg	0:662207e34fba	3146	{
garfieldsg	0:662207e34fba	3147	i2Cdev.readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_2_BIT, buffer);
garfieldsg	0:662207e34fba	3148	return buffer[0];
garfieldsg	0:662207e34fba	3149	}
garfieldsg	0:662207e34fba	3150	bool MPU6050::getDMPInt1Status()
garfieldsg	0:662207e34fba	3151	{
garfieldsg	0:662207e34fba	3152	i2Cdev.readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_1_BIT, buffer);
garfieldsg	0:662207e34fba	3153	return buffer[0];
garfieldsg	0:662207e34fba	3154	}
garfieldsg	0:662207e34fba	3155	bool MPU6050::getDMPInt0Status()
garfieldsg	0:662207e34fba	3156	{
garfieldsg	0:662207e34fba	3157	i2Cdev.readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_0_BIT, buffer);
garfieldsg	0:662207e34fba	3158	return buffer[0];
garfieldsg	0:662207e34fba	3159	}
garfieldsg	0:662207e34fba	3160
garfieldsg	0:662207e34fba	3161	// INT_STATUS register (DMP functions)
garfieldsg	0:662207e34fba	3162
garfieldsg	0:662207e34fba	3163	bool MPU6050::getIntPLLReadyStatus()
garfieldsg	0:662207e34fba	3164	{
garfieldsg	0:662207e34fba	3165	i2Cdev.readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_PLL_RDY_INT_BIT, buffer);
garfieldsg	0:662207e34fba	3166	return buffer[0];
garfieldsg	0:662207e34fba	3167	}
garfieldsg	0:662207e34fba	3168	bool MPU6050::getIntDMPStatus()
garfieldsg	0:662207e34fba	3169	{
garfieldsg	0:662207e34fba	3170	i2Cdev.readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_DMP_INT_BIT, buffer);
garfieldsg	0:662207e34fba	3171	return buffer[0];
garfieldsg	0:662207e34fba	3172	}
garfieldsg	0:662207e34fba	3173
garfieldsg	0:662207e34fba	3174	// USER_CTRL register (DMP functions)
garfieldsg	0:662207e34fba	3175
garfieldsg	0:662207e34fba	3176	bool MPU6050::getDMPEnabled()
garfieldsg	0:662207e34fba	3177	{
garfieldsg	0:662207e34fba	3178	i2Cdev.readBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_DMP_EN_BIT, buffer);
garfieldsg	0:662207e34fba	3179	return buffer[0];
garfieldsg	0:662207e34fba	3180	}
garfieldsg	0:662207e34fba	3181	void MPU6050::setDMPEnabled(bool enabled)
garfieldsg	0:662207e34fba	3182	{
garfieldsg	0:662207e34fba	3183	i2Cdev.writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_DMP_EN_BIT, enabled);
garfieldsg	0:662207e34fba	3184	}
garfieldsg	0:662207e34fba	3185	void MPU6050::resetDMP()
garfieldsg	0:662207e34fba	3186	{
garfieldsg	0:662207e34fba	3187	i2Cdev.writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_DMP_RESET_BIT, true);
garfieldsg	0:662207e34fba	3188	}
garfieldsg	0:662207e34fba	3189
garfieldsg	0:662207e34fba	3190	// BANK_SEL register
garfieldsg	0:662207e34fba	3191
garfieldsg	0:662207e34fba	3192	void MPU6050::setMemoryBank(uint8_t bank, bool prefetchEnabled, bool userBank)
garfieldsg	0:662207e34fba	3193	{
garfieldsg	0:662207e34fba	3194	bank &= 0x1F;
garfieldsg	0:662207e34fba	3195	if (userBank) bank \|= 0x20;
garfieldsg	0:662207e34fba	3196	if (prefetchEnabled) bank \|= 0x40;
garfieldsg	0:662207e34fba	3197	i2Cdev.writeByte(devAddr, MPU6050_RA_BANK_SEL, bank);
garfieldsg	0:662207e34fba	3198	}
garfieldsg	0:662207e34fba	3199
garfieldsg	0:662207e34fba	3200	// MEM_START_ADDR register
garfieldsg	0:662207e34fba	3201
garfieldsg	0:662207e34fba	3202	void MPU6050::setMemoryStartAddress(uint8_t address)
garfieldsg	0:662207e34fba	3203	{
garfieldsg	0:662207e34fba	3204	i2Cdev.writeByte(devAddr, MPU6050_RA_MEM_START_ADDR, address);
garfieldsg	0:662207e34fba	3205	}
garfieldsg	0:662207e34fba	3206
garfieldsg	0:662207e34fba	3207	// MEM_R_W register
garfieldsg	0:662207e34fba	3208
garfieldsg	0:662207e34fba	3209	uint8_t MPU6050::readMemoryByte()
garfieldsg	0:662207e34fba	3210	{
garfieldsg	0:662207e34fba	3211	i2Cdev.readByte(devAddr, MPU6050_RA_MEM_R_W, buffer);
garfieldsg	0:662207e34fba	3212	return buffer[0];
garfieldsg	0:662207e34fba	3213	}
garfieldsg	0:662207e34fba	3214	void MPU6050::writeMemoryByte(uint8_t data)
garfieldsg	0:662207e34fba	3215	{
garfieldsg	0:662207e34fba	3216	i2Cdev.writeByte(devAddr, MPU6050_RA_MEM_R_W, data);
garfieldsg	0:662207e34fba	3217	}
garfieldsg	0:662207e34fba	3218	void MPU6050::readMemoryBlock(uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address)
garfieldsg	0:662207e34fba	3219	{
garfieldsg	0:662207e34fba	3220	setMemoryBank(bank);
garfieldsg	0:662207e34fba	3221	setMemoryStartAddress(address);
garfieldsg	0:662207e34fba	3222	uint8_t chunkSize;
garfieldsg	0:662207e34fba	3223	for (uint16_t i = 0; i < dataSize;) {
garfieldsg	0:662207e34fba	3224	// determine correct chunk size according to bank position and data size
garfieldsg	0:662207e34fba	3225	chunkSize = MPU6050_DMP_MEMORY_CHUNK_SIZE;
garfieldsg	0:662207e34fba	3226
garfieldsg	0:662207e34fba	3227	// make sure we don't go past the data size
garfieldsg	0:662207e34fba	3228	if (i + chunkSize > dataSize) chunkSize = dataSize - i;
garfieldsg	0:662207e34fba	3229
garfieldsg	0:662207e34fba	3230	// make sure this chunk doesn't go past the bank boundary (256 bytes)
garfieldsg	0:662207e34fba	3231	if (chunkSize > 256 - address) chunkSize = 256 - address;
garfieldsg	0:662207e34fba	3232
garfieldsg	0:662207e34fba	3233	// read the chunk of data as specified
garfieldsg	0:662207e34fba	3234	i2Cdev.readBytes(devAddr, MPU6050_RA_MEM_R_W, chunkSize, data + i);
garfieldsg	0:662207e34fba	3235
garfieldsg	0:662207e34fba	3236	// increase byte index by [chunkSize]
garfieldsg	0:662207e34fba	3237	i += chunkSize;
garfieldsg	0:662207e34fba	3238
garfieldsg	0:662207e34fba	3239	// uint8_t automatically wraps to 0 at 256
garfieldsg	0:662207e34fba	3240	address += chunkSize;
garfieldsg	0:662207e34fba	3241
garfieldsg	0:662207e34fba	3242	// if we aren't done, update bank (if necessary) and address
garfieldsg	0:662207e34fba	3243	if (i < dataSize) {
garfieldsg	0:662207e34fba	3244	if (address == 0) bank++;
garfieldsg	0:662207e34fba	3245	setMemoryBank(bank);
garfieldsg	0:662207e34fba	3246	setMemoryStartAddress(address);
garfieldsg	0:662207e34fba	3247	}
garfieldsg	0:662207e34fba	3248	}
garfieldsg	0:662207e34fba	3249	}
garfieldsg	0:662207e34fba	3250	bool MPU6050::writeMemoryBlock(const uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address, bool verify, bool useProgMem)
garfieldsg	0:662207e34fba	3251	{
garfieldsg	0:662207e34fba	3252	setMemoryBank(bank);
garfieldsg	0:662207e34fba	3253	setMemoryStartAddress(address);
garfieldsg	0:662207e34fba	3254	uint8_t chunkSize;
garfieldsg	0:662207e34fba	3255	uint8_t *verifyBuffer;
garfieldsg	0:662207e34fba	3256	uint8_t *progBuffer;
garfieldsg	0:662207e34fba	3257	uint16_t i;
garfieldsg	0:662207e34fba	3258	uint8_t j;
garfieldsg	0:662207e34fba	3259	if (verify) verifyBuffer = (uint8_t *)malloc(MPU6050_DMP_MEMORY_CHUNK_SIZE);
garfieldsg	0:662207e34fba	3260	if (useProgMem) progBuffer = (uint8_t *)malloc(MPU6050_DMP_MEMORY_CHUNK_SIZE);
garfieldsg	0:662207e34fba	3261	for (i = 0; i < dataSize;) {
garfieldsg	0:662207e34fba	3262	// determine correct chunk size according to bank position and data size
garfieldsg	0:662207e34fba	3263	chunkSize = MPU6050_DMP_MEMORY_CHUNK_SIZE;
garfieldsg	0:662207e34fba	3264
garfieldsg	0:662207e34fba	3265	// make sure we don't go past the data size
garfieldsg	0:662207e34fba	3266	if (i + chunkSize > dataSize) chunkSize = dataSize - i;
garfieldsg	0:662207e34fba	3267
garfieldsg	0:662207e34fba	3268	// make sure this chunk doesn't go past the bank boundary (256 bytes)
garfieldsg	0:662207e34fba	3269	if (chunkSize > 256 - address) chunkSize = 256 - address;
garfieldsg	0:662207e34fba	3270
garfieldsg	0:662207e34fba	3271	if (useProgMem) {
garfieldsg	0:662207e34fba	3272	// write the chunk of data as specified
garfieldsg	0:662207e34fba	3273	for (j = 0; j < chunkSize; j++) progBuffer[j] = pgm_read_byte(data + i + j);
garfieldsg	0:662207e34fba	3274	} else {
garfieldsg	0:662207e34fba	3275	// write the chunk of data as specified
garfieldsg	0:662207e34fba	3276	progBuffer = (uint8_t *)data + i;
garfieldsg	0:662207e34fba	3277	}
garfieldsg	0:662207e34fba	3278
garfieldsg	0:662207e34fba	3279	i2Cdev.writeBytes(devAddr, MPU6050_RA_MEM_R_W, chunkSize, progBuffer);
garfieldsg	0:662207e34fba	3280
garfieldsg	0:662207e34fba	3281	// verify data if needed
garfieldsg	0:662207e34fba	3282	if (verify && verifyBuffer) {
garfieldsg	0:662207e34fba	3283	setMemoryBank(bank);
garfieldsg	0:662207e34fba	3284	setMemoryStartAddress(address);
garfieldsg	0:662207e34fba	3285	i2Cdev.readBytes(devAddr, MPU6050_RA_MEM_R_W, chunkSize, verifyBuffer);
garfieldsg	0:662207e34fba	3286	if (memcmp(progBuffer, verifyBuffer, chunkSize) != 0) {
garfieldsg	0:662207e34fba	3287	/*Serial.print("Block write verification error, bank ");
garfieldsg	0:662207e34fba	3288	Serial.print(bank, DEC);
garfieldsg	0:662207e34fba	3289	Serial.print(", address ");
garfieldsg	0:662207e34fba	3290	Serial.print(address, DEC);
garfieldsg	0:662207e34fba	3291	Serial.print("!\nExpected:");
garfieldsg	0:662207e34fba	3292	for (j = 0; j < chunkSize; j++) {
garfieldsg	0:662207e34fba	3293	Serial.print(" 0x");
garfieldsg	0:662207e34fba	3294	if (progBuffer[j] < 16) Serial.print("0");
garfieldsg	0:662207e34fba	3295	Serial.print(progBuffer[j], HEX);
garfieldsg	0:662207e34fba	3296	}
garfieldsg	0:662207e34fba	3297	Serial.print("\nReceived:");
garfieldsg	0:662207e34fba	3298	for (uint8_t j = 0; j < chunkSize; j++) {
garfieldsg	0:662207e34fba	3299	Serial.print(" 0x");
garfieldsg	0:662207e34fba	3300	if (verifyBuffer[i + j] < 16) Serial.print("0");
garfieldsg	0:662207e34fba	3301	Serial.print(verifyBuffer[i + j], HEX);
garfieldsg	0:662207e34fba	3302	}
garfieldsg	0:662207e34fba	3303	Serial.print("\n");*/
garfieldsg	0:662207e34fba	3304	free(verifyBuffer);
garfieldsg	0:662207e34fba	3305	if (useProgMem) free(progBuffer);
garfieldsg	0:662207e34fba	3306	return false; // uh oh.
garfieldsg	0:662207e34fba	3307	}
garfieldsg	0:662207e34fba	3308	}
garfieldsg	0:662207e34fba	3309
garfieldsg	0:662207e34fba	3310	// increase byte index by [chunkSize]
garfieldsg	0:662207e34fba	3311	i += chunkSize;
garfieldsg	0:662207e34fba	3312
garfieldsg	0:662207e34fba	3313	// uint8_t automatically wraps to 0 at 256
garfieldsg	0:662207e34fba	3314	address += chunkSize;
garfieldsg	0:662207e34fba	3315
garfieldsg	0:662207e34fba	3316	// if we aren't done, update bank (if necessary) and address
garfieldsg	0:662207e34fba	3317	if (i < dataSize) {
garfieldsg	0:662207e34fba	3318	if (address == 0) bank++;
garfieldsg	0:662207e34fba	3319	setMemoryBank(bank);
garfieldsg	0:662207e34fba	3320	setMemoryStartAddress(address);
garfieldsg	0:662207e34fba	3321	}
garfieldsg	0:662207e34fba	3322	}
garfieldsg	0:662207e34fba	3323	if (verify) free(verifyBuffer);
garfieldsg	0:662207e34fba	3324	if (useProgMem) free(progBuffer);
garfieldsg	0:662207e34fba	3325	return true;
garfieldsg	0:662207e34fba	3326	}
garfieldsg	0:662207e34fba	3327	bool MPU6050::writeProgMemoryBlock(const uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address, bool verify)
garfieldsg	0:662207e34fba	3328	{
garfieldsg	0:662207e34fba	3329	return writeMemoryBlock(data, dataSize, bank, address, verify, true);
garfieldsg	0:662207e34fba	3330	}
garfieldsg	0:662207e34fba	3331	bool MPU6050::writeDMPConfigurationSet(const uint8_t *data, uint16_t dataSize, bool useProgMem)
garfieldsg	0:662207e34fba	3332	{
garfieldsg	0:662207e34fba	3333	uint8_t *progBuffer, success, special;
garfieldsg	0:662207e34fba	3334	uint16_t i, j;
garfieldsg	0:662207e34fba	3335	if (useProgMem) {
garfieldsg	0:662207e34fba	3336	progBuffer = (uint8_t *)malloc(8); // assume 8-byte blocks, realloc later if necessary
garfieldsg	0:662207e34fba	3337	}
garfieldsg	0:662207e34fba	3338
garfieldsg	0:662207e34fba	3339	// config set data is a long string of blocks with the following structure:
garfieldsg	0:662207e34fba	3340	// [bank] [offset] [length] [byte[0], byte[1], ..., byte[length]]
garfieldsg	0:662207e34fba	3341	uint8_t bank, offset, length;
garfieldsg	0:662207e34fba	3342	for (i = 0; i < dataSize;) {
garfieldsg	0:662207e34fba	3343	if (useProgMem) {
garfieldsg	0:662207e34fba	3344	bank = pgm_read_byte(data + i++);
garfieldsg	0:662207e34fba	3345	offset = pgm_read_byte(data + i++);
garfieldsg	0:662207e34fba	3346	length = pgm_read_byte(data + i++);
garfieldsg	0:662207e34fba	3347	} else {
garfieldsg	0:662207e34fba	3348	bank = data[i++];
garfieldsg	0:662207e34fba	3349	offset = data[i++];
garfieldsg	0:662207e34fba	3350	length = data[i++];
garfieldsg	0:662207e34fba	3351	}
garfieldsg	0:662207e34fba	3352
garfieldsg	0:662207e34fba	3353	// write data or perform special action
garfieldsg	0:662207e34fba	3354	if (length > 0) {
garfieldsg	0:662207e34fba	3355	// regular block of data to write
garfieldsg	0:662207e34fba	3356	/*Serial.print("Writing config block to bank ");
garfieldsg	0:662207e34fba	3357	Serial.print(bank);
garfieldsg	0:662207e34fba	3358	Serial.print(", offset ");
garfieldsg	0:662207e34fba	3359	Serial.print(offset);
garfieldsg	0:662207e34fba	3360	Serial.print(", length=");
garfieldsg	0:662207e34fba	3361	Serial.println(length);*/
garfieldsg	0:662207e34fba	3362	if (useProgMem) {
garfieldsg	0:662207e34fba	3363	if (sizeof(progBuffer) < length) progBuffer = (uint8_t *)realloc(progBuffer, length);
garfieldsg	0:662207e34fba	3364	for (j = 0; j < length; j++) progBuffer[j] = pgm_read_byte(data + i + j);
garfieldsg	0:662207e34fba	3365	} else {
garfieldsg	0:662207e34fba	3366	progBuffer = (uint8_t *)data + i;
garfieldsg	0:662207e34fba	3367	}
garfieldsg	0:662207e34fba	3368	success = writeMemoryBlock(progBuffer, length, bank, offset, true);
garfieldsg	0:662207e34fba	3369	i += length;
garfieldsg	0:662207e34fba	3370	} else {
garfieldsg	0:662207e34fba	3371	// special instruction
garfieldsg	0:662207e34fba	3372	// NOTE: this kind of behavior (what and when to do certain things)
garfieldsg	0:662207e34fba	3373	// is totally undocumented. This code is in here based on observed
garfieldsg	0:662207e34fba	3374	// behavior only, and exactly why (or even whether) it has to be here
garfieldsg	0:662207e34fba	3375	// is anybody's guess for now.
garfieldsg	0:662207e34fba	3376	if (useProgMem) {
garfieldsg	0:662207e34fba	3377	special = pgm_read_byte(data + i++);
garfieldsg	0:662207e34fba	3378	} else {
garfieldsg	0:662207e34fba	3379	special = data[i++];
garfieldsg	0:662207e34fba	3380	}
garfieldsg	0:662207e34fba	3381	/*Serial.print("Special command code ");
garfieldsg	0:662207e34fba	3382	Serial.print(special, HEX);
garfieldsg	0:662207e34fba	3383	Serial.println(" found...");*/
garfieldsg	0:662207e34fba	3384	if (special == 0x01) {
garfieldsg	0:662207e34fba	3385	// enable DMP-related interrupts
garfieldsg	0:662207e34fba	3386
garfieldsg	0:662207e34fba	3387	//setIntZeroMotionEnabled(true);
garfieldsg	0:662207e34fba	3388	//setIntFIFOBufferOverflowEnabled(true);
garfieldsg	0:662207e34fba	3389	//setIntDMPEnabled(true);
garfieldsg	0:662207e34fba	3390	i2Cdev.writeByte(devAddr, MPU6050_RA_INT_ENABLE, 0x32); // single operation
garfieldsg	0:662207e34fba	3391
garfieldsg	0:662207e34fba	3392	success = true;
garfieldsg	0:662207e34fba	3393	} else {
garfieldsg	0:662207e34fba	3394	// unknown special command
garfieldsg	0:662207e34fba	3395	success = false;
garfieldsg	0:662207e34fba	3396	}
garfieldsg	0:662207e34fba	3397	}
garfieldsg	0:662207e34fba	3398
garfieldsg	0:662207e34fba	3399	if (!success) {
garfieldsg	0:662207e34fba	3400	if (useProgMem) free(progBuffer);
garfieldsg	0:662207e34fba	3401	return false; // uh oh
garfieldsg	0:662207e34fba	3402	}
garfieldsg	0:662207e34fba	3403	}
garfieldsg	0:662207e34fba	3404	if (useProgMem) free(progBuffer);
garfieldsg	0:662207e34fba	3405	return true;
garfieldsg	0:662207e34fba	3406	}
garfieldsg	0:662207e34fba	3407	bool MPU6050::writeProgDMPConfigurationSet(const uint8_t *data, uint16_t dataSize)
garfieldsg	0:662207e34fba	3408	{
garfieldsg	0:662207e34fba	3409	return writeDMPConfigurationSet(data, dataSize, false);
garfieldsg	0:662207e34fba	3410	}
garfieldsg	0:662207e34fba	3411
garfieldsg	0:662207e34fba	3412	// DMP_CFG_1 register
garfieldsg	0:662207e34fba	3413
garfieldsg	0:662207e34fba	3414	uint8_t MPU6050::getDMPConfig1()
garfieldsg	0:662207e34fba	3415	{
garfieldsg	0:662207e34fba	3416	i2Cdev.readByte(devAddr, MPU6050_RA_DMP_CFG_1, buffer);
garfieldsg	0:662207e34fba	3417	return buffer[0];
garfieldsg	0:662207e34fba	3418	}
garfieldsg	0:662207e34fba	3419	void MPU6050::setDMPConfig1(uint8_t config)
garfieldsg	0:662207e34fba	3420	{
garfieldsg	0:662207e34fba	3421	i2Cdev.writeByte(devAddr, MPU6050_RA_DMP_CFG_1, config);
garfieldsg	0:662207e34fba	3422	}
garfieldsg	0:662207e34fba	3423
garfieldsg	0:662207e34fba	3424	// DMP_CFG_2 register
garfieldsg	0:662207e34fba	3425
garfieldsg	0:662207e34fba	3426	uint8_t MPU6050::getDMPConfig2()
garfieldsg	0:662207e34fba	3427	{
garfieldsg	0:662207e34fba	3428	i2Cdev.readByte(devAddr, MPU6050_RA_DMP_CFG_2, buffer);
garfieldsg	0:662207e34fba	3429	return buffer[0];
garfieldsg	0:662207e34fba	3430	}
garfieldsg	0:662207e34fba	3431	void MPU6050::setDMPConfig2(uint8_t config)
garfieldsg	0:662207e34fba	3432	{
garfieldsg	0:662207e34fba	3433	i2Cdev.writeByte(devAddr, MPU6050_RA_DMP_CFG_2, config);
garfieldsg	0:662207e34fba	3434	}

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Type:	Library
Created:	28 Mar 2018
Imports:	7
Forks:	0
Commits:	23
Dependents:	1
Dependencies:	0
Followers:	2

MPU6050.cpp@5:bdb6ad020352, 2013-02-20 (annotated)

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