Nathan Yonkee
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__init__.py
00001 """ 00002 mbed SDK 00003 Copyright (c) 2011-2017 ARM Limited 00004 00005 Licensed under the Apache License, Version 2.0 (the "License"); 00006 you may not use this file except in compliance with the License. 00007 You may obtain a copy of the License at 00008 00009 http://www.apache.org/licenses/LICENSE-2.0 00010 00011 Unless required by applicable law or agreed to in writing, software 00012 distributed under the License is distributed on an "AS IS" BASIS, 00013 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 00014 See the License for the specific language governing permissions and 00015 limitations under the License. 00016 """ 00017 00018 from os.path import splitext, basename, join 00019 from tools.utils import mkdir 00020 from tools.export.gnuarmeclipse import GNUARMEclipse 00021 from tools.export.gnuarmeclipse import UID 00022 from tools.build_api import prepare_toolchain 00023 from tools.targets import TARGET_MAP 00024 from sys import flags, platform 00025 00026 # Global random number generator instance. 00027 u = UID() 00028 00029 00030 class Sw4STM32 (GNUARMEclipse): 00031 """ 00032 Sw4STM32 class 00033 """ 00034 NAME = 'Sw4STM32' 00035 TOOLCHAIN = 'GCC_ARM' 00036 00037 BOARDS = { 00038 'B96B_F446VE': 00039 { 00040 'name': 'B96B-F446VE', 00041 'mcuId': 'STM32F446VETx' 00042 }, 00043 'DISCO_F051R8': 00044 { 00045 'name': 'STM32F0DISCOVERY', 00046 'mcuId': 'STM32F051R8Tx' 00047 }, 00048 'DISCO_F303VC': 00049 { 00050 'name': 'STM32F3DISCOVERY', 00051 'mcuId': 'STM32F303VCTx' 00052 }, 00053 'DISCO_F334C8': 00054 { 00055 'name': 'STM32F3348DISCOVERY', 00056 'mcuId': 'STM32F334C8Tx' 00057 }, 00058 'DISCO_F401VC': 00059 { 00060 'name': 'STM32F401C-DISCO', 00061 'mcuId': 'STM32F401VCTx' 00062 }, 00063 'DISCO_F407VG': 00064 { 00065 'name': 'STM32F4DISCOVERY', 00066 'mcuId': 'STM32F407VGTx' 00067 }, 00068 'DISCO_F413ZH': 00069 { 00070 'name': 'DISCO_F413', 00071 'mcuId': 'STM32F413ZHTx' 00072 }, 00073 'DISCO_F429ZI': 00074 { 00075 'name': 'STM32F429I-DISCO', 00076 'mcuId': 'STM32F429ZITx' 00077 }, 00078 'DISCO_F469NI': 00079 { 00080 'name': 'DISCO-F469NI', 00081 'mcuId': 'STM32F469NIHx' 00082 }, 00083 'DISCO_F746NG': 00084 { 00085 'name': 'STM32F746G-DISCO', 00086 'mcuId': 'STM32F746NGHx' 00087 }, 00088 'DISCO_F769NI': 00089 { 00090 'name': 'DISCO-F769NI', 00091 'mcuId': 'STM32F769NIHx' 00092 }, 00093 'DISCO_L053C8': 00094 { 00095 'name': 'STM32L0538DISCOVERY', 00096 'mcuId': 'STM32L053C8Tx' 00097 }, 00098 'DISCO_L072CZ_LRWAN1': 00099 { 00100 'name': 'DISCO-L072CZ-LRWAN1', 00101 'mcuId': 'STM32L072CZTx' 00102 }, 00103 'MTB_MURATA_ABZ': 00104 { 00105 'name': 'MTB-MURATA-ABZ', 00106 'mcuId': 'STM32L0x2xZ' 00107 }, 00108 'DISCO_L475VG_IOT01A': 00109 { 00110 'name': 'STM32L475G-DISCO', 00111 'mcuId': 'STM32L475VGTx' 00112 }, 00113 'DISCO_L476VG': 00114 { 00115 'name': 'STM32L476G-DISCO', 00116 'mcuId': 'STM32L476VGTx' 00117 }, 00118 'NUCLEO_F030R8': 00119 { 00120 'name': 'NUCLEO-F030R8', 00121 'mcuId': 'STM32F030R8Tx' 00122 }, 00123 'NUCLEO_F031K6': 00124 { 00125 'name': 'NUCLEO-F031K6', 00126 'mcuId': 'STM32F031K6Tx' 00127 }, 00128 'NUCLEO_F042K6': 00129 { 00130 'name': 'NUCLEO-F042K6', 00131 'mcuId': 'STM32F042K6Tx' 00132 }, 00133 'NUCLEO_F070RB': 00134 { 00135 'name': 'NUCLEO-F070RB', 00136 'mcuId': 'STM32F070RBTx' 00137 }, 00138 'NUCLEO_F072RB': 00139 { 00140 'name': 'NUCLEO-F072RB', 00141 'mcuId': 'STM32F072RBTx' 00142 }, 00143 'NUCLEO_F091RC': 00144 { 00145 'name': 'NUCLEO-F091RC', 00146 'mcuId': 'STM32F091RCTx' 00147 }, 00148 'NUCLEO_F103RB': 00149 { 00150 'name': 'NUCLEO-F103RB', 00151 'mcuId': 'STM32F103RBTx' 00152 }, 00153 'NUCLEO_F207ZG': 00154 { 00155 'name': 'NUCLEO-F207ZG', 00156 'mcuId': 'STM32F207ZGTx' 00157 }, 00158 'NUCLEO_F302R8': 00159 { 00160 'name': 'NUCLEO-F302R8', 00161 'mcuId': 'STM32F302R8Tx' 00162 }, 00163 'NUCLEO_F303K8': 00164 { 00165 'name': 'NUCLEO-F303K8', 00166 'mcuId': 'STM32F303K8Tx' 00167 }, 00168 'NUCLEO_F303RE': 00169 { 00170 'name': 'NUCLEO-F303RE', 00171 'mcuId': 'STM32F303RETx' 00172 }, 00173 'NUCLEO_F303ZE': 00174 { 00175 'name': 'NUCLEO-F303ZE', 00176 'mcuId': 'STM32F303ZETx' 00177 }, 00178 'NUCLEO_F334R8': 00179 { 00180 'name': 'NUCLEO-F334R8', 00181 'mcuId': 'STM32F334R8Tx' 00182 }, 00183 'NUCLEO_F401RE': 00184 { 00185 'name': 'NUCLEO-F401RE', 00186 'mcuId': 'STM32F401RETx' 00187 }, 00188 'NUCLEO_F410RB': 00189 { 00190 'name': 'NUCLEO-F410RB', 00191 'mcuId': 'STM32F410RBTx' 00192 }, 00193 'NUCLEO_F411RE': 00194 { 00195 'name': 'NUCLEO-F411RE', 00196 'mcuId': 'STM32F411RETx' 00197 }, 00198 'NUCLEO_F413ZH': 00199 { 00200 'name': 'NUCLEO-F413ZH', 00201 'mcuId': 'STM32F413ZHTx' 00202 }, 00203 'NUCLEO_F429ZI': 00204 { 00205 'name': 'NUCLEO-F429ZI', 00206 'mcuId': 'STM32F429ZITx' 00207 }, 00208 'NUCLEO_F446RE': 00209 { 00210 'name': 'NUCLEO-F446RE', 00211 'mcuId': 'STM32F446RETx' 00212 }, 00213 'NUCLEO_F446ZE': 00214 { 00215 'name': 'NUCLEO-F446ZE', 00216 'mcuId': 'STM32F446ZETx' 00217 }, 00218 'NUCLEO_F746ZG': 00219 { 00220 'name': 'NUCLEO-F746ZG', 00221 'mcuId': 'STM32F746ZGTx' 00222 }, 00223 'NUCLEO_F767ZI': 00224 { 00225 'name': 'NUCLEO-F767ZI', 00226 'mcuId': 'STM32F767ZITx' 00227 }, 00228 'NUCLEO_L011K4': 00229 { 00230 'name': 'NUCLEO-L011K4', 00231 'mcuId': 'STM32L011K4Tx' 00232 }, 00233 'NUCLEO_L031K6': 00234 { 00235 'name': 'NUCLEO-L031K6', 00236 'mcuId': 'STM32L031K6Tx' 00237 }, 00238 'NUCLEO_L053R8': 00239 { 00240 'name': 'NUCLEO-L053R8', 00241 'mcuId': 'STM32L053R8Tx' 00242 }, 00243 'NUCLEO_L073RZ': 00244 { 00245 'name': 'NUCLEO-L073RZ', 00246 'mcuId': 'STM32L073RZTx' 00247 }, 00248 'NUCLEO_L152RE': 00249 { 00250 'name': 'NUCLEO-L152RE', 00251 'mcuId': 'STM32L152RETx' 00252 }, 00253 'NUCLEO_L432KC': 00254 { 00255 'name': 'NUCLEO-L432KC', 00256 'mcuId': 'STM32L432KCUx' 00257 }, 00258 'MTB_ADV_WISE_1510': 00259 { 00260 'name': 'MTB-ADV-WISE-1510', 00261 'mcuId': 'STM32L443xC' 00262 }, 00263 'NUCLEO_L476RG': 00264 { 00265 'name': 'NUCLEO-L476RG', 00266 'mcuId': 'STM32L476RGTx' 00267 }, 00268 'NUCLEO_L486RG': 00269 { 00270 'name': 'NUCLEO-L486RG', 00271 'mcuId': 'STM32L486RGTx' 00272 }, 00273 'NUCLEO_L496ZG': 00274 { 00275 'name': 'NUCLEO-L496ZG', 00276 'mcuId': 'STM32L496ZGTx' 00277 }, 00278 'NUCLEO_L496ZG_P': 00279 { 00280 'name': 'NUCLEO-L496ZG', 00281 'mcuId': 'STM32L496ZGTx' 00282 }, 00283 } 00284 00285 00286 @classmethod 00287 def is_target_supported (cls, target_name): 00288 target = TARGET_MAP[target_name] 00289 target_supported = bool(set(target.resolution_order_names) 00290 .intersection(set(cls.BOARDS.keys()))) 00291 toolchain_supported = cls.TOOLCHAIN in target.supported_toolchains 00292 return target_supported and toolchain_supported 00293 00294 def __gen_dir(self, dir_name): 00295 """ 00296 Method that creates directory 00297 """ 00298 settings = join(self.export_dir, dir_name) 00299 mkdir(settings) 00300 00301 def get_fpu_hardware (self, fpu_unit): 00302 """ 00303 Convert fpu unit name into hardware name. 00304 """ 00305 hw = '' 00306 fpus = { 00307 'fpv4spd16': 'fpv4-sp-d16', 00308 'fpv5d16': 'fpv5-d16', 00309 'fpv5spd16': 'fpv5-sp-d16' 00310 } 00311 if fpu_unit in fpus: 00312 hw = fpus[fpu_unit] 00313 return hw 00314 00315 def process_sw_options (self, opts, flags_in): 00316 """ 00317 Process System Workbench specific options. 00318 00319 System Workbench for STM32 has some compile options, which are not recognized by the GNUARMEclipse exporter. 00320 Those are handled in this method. 00321 """ 00322 opts['c']['preprocess'] = False 00323 if '-E' in flags_in['c_flags']: 00324 opts['c']['preprocess'] = True 00325 opts['cpp']['preprocess'] = False 00326 if '-E' in flags_in['cxx_flags']: 00327 opts['cpp']['preprocess'] = True 00328 opts['c']['slowflashdata'] = False 00329 if '-mslow-flash-data' in flags_in['c_flags']: 00330 opts['c']['slowflashdata'] = True 00331 opts['cpp']['slowflashdata'] = False 00332 if '-mslow-flash-data' in flags_in['cxx_flags']: 00333 opts['cpp']['slowflashdata'] = True 00334 if opts['common']['optimization.messagelength']: 00335 opts['common']['optimization.other'] += ' -fmessage-length=0' 00336 if opts['common']['optimization.signedchar']: 00337 opts['common']['optimization.other'] += ' -fsigned-char' 00338 if opts['common']['optimization.nocommon']: 00339 opts['common']['optimization.other'] += ' -fno-common' 00340 if opts['common']['optimization.noinlinefunctions']: 00341 opts['common']['optimization.other'] += ' -fno-inline-functions' 00342 if opts['common']['optimization.freestanding']: 00343 opts['common']['optimization.other'] += ' -ffreestanding' 00344 if opts['common']['optimization.nobuiltin']: 00345 opts['common']['optimization.other'] += ' -fno-builtin' 00346 if opts['common']['optimization.spconstant']: 00347 opts['common']['optimization.other'] += ' -fsingle-precision-constant' 00348 if opts['common']['optimization.nomoveloopinvariants']: 00349 opts['common']['optimization.other'] += ' -fno-move-loop-invariants' 00350 if opts['common']['warnings.unused']: 00351 opts['common']['warnings.other'] += ' -Wunused' 00352 if opts['common']['warnings.uninitialized']: 00353 opts['common']['warnings.other'] += ' -Wuninitialized' 00354 if opts['common']['warnings.missingdeclaration']: 00355 opts['common']['warnings.other'] += ' -Wmissing-declarations' 00356 if opts['common']['warnings.pointerarith']: 00357 opts['common']['warnings.other'] += ' -Wpointer-arith' 00358 if opts['common']['warnings.padded']: 00359 opts['common']['warnings.other'] += ' -Wpadded' 00360 if opts['common']['warnings.shadow']: 00361 opts['common']['warnings.other'] += ' -Wshadow' 00362 if opts['common']['warnings.logicalop']: 00363 opts['common']['warnings.other'] += ' -Wlogical-op' 00364 if opts['common']['warnings.agreggatereturn']: 00365 opts['common']['warnings.other'] += ' -Waggregate-return' 00366 if opts['common']['warnings.floatequal']: 00367 opts['common']['warnings.other'] += ' -Wfloat-equal' 00368 opts['ld']['strip'] = False 00369 if '-s' in flags_in['ld_flags']: 00370 opts['ld']['strip'] = True 00371 opts['ld']['shared'] = False 00372 if '-shared' in flags_in['ld_flags']: 00373 opts['ld']['shared'] = True 00374 opts['ld']['soname'] = '' 00375 opts['ld']['implname'] = '' 00376 opts['ld']['defname'] = '' 00377 for item in flags_in['ld_flags']: 00378 if item.startswith('-Wl,-soname='): 00379 opts['ld']['soname'] = item[len('-Wl,-soname='):] 00380 if item.startswith('-Wl,--out-implib='): 00381 opts['ld']['implname'] = item[len('-Wl,--out-implib='):] 00382 if item.startswith('-Wl,--output-def='): 00383 opts['ld']['defname'] = item[len('-Wl,--output-def='):] 00384 opts['common']['arm.target.fpu.hardware'] = self.get_fpu_hardware ( 00385 opts['common']['arm.target.fpu.unit']) 00386 opts['common']['debugging.codecov'] = False 00387 if '-fprofile-arcs' in flags_in['common_flags'] and '-ftest-coverage' in flags_in['common_flags']: 00388 opts['common']['debugging.codecov'] = True 00389 # Passing linker options to linker with '-Wl,'-prefix. 00390 for index in range(len(opts['ld']['flags'])): 00391 item = opts['ld']['flags'][index] 00392 if not item.startswith('-Wl,'): 00393 opts['ld']['flags'][index] = '-Wl,' + item 00394 # Strange System Workbench feature: If first parameter in Other flags is a 00395 # define (-D...), Other flags will be replaced by defines and other flags 00396 # are completely ignored. Moving -D parameters to defines. 00397 for compiler in ['c', 'cpp', 'as']: 00398 tmpList = opts[compiler]['other'].split(' ') 00399 otherList = [] 00400 for item in tmpList: 00401 if item.startswith('-D'): 00402 opts[compiler]['defines'].append(str(item[2:])) 00403 else: 00404 otherList.append(item) 00405 opts[compiler]['other'] = ' '.join(otherList) 00406 # Assembler options 00407 for as_def in opts['as']['defines']: 00408 if '=' in as_def: 00409 opts['as']['other'] += ' --defsym ' + as_def 00410 else: 00411 opts['as']['other'] += ' --defsym ' + as_def + '=1' 00412 00413 def generate (self): 00414 """ 00415 Generate the .project and .cproject files. 00416 """ 00417 options = {} 00418 00419 if not self.resources.linker_script: 00420 raise NotSupportedException("No linker script found.") 00421 00422 print ('\nCreate a System Workbench for STM32 managed project') 00423 print ('Project name: {0}'.format(self.project_name)) 00424 print ('Target: {0}'.format(self.toolchain.target.name)) 00425 print ('Toolchain: {0}'.format(self.TOOLCHAIN ) + '\n') 00426 00427 self.resources.win_to_unix() 00428 00429 config_header = self.filter_dot(self.toolchain.get_config_header()) 00430 00431 libraries = [] 00432 for lib in self.resources.libraries: 00433 library, _ = splitext(basename(lib)) 00434 libraries.append(library[3:]) 00435 00436 self.system_libraries = [ 00437 'stdc++', 'supc++', 'm', 'c', 'gcc', 'nosys' 00438 ] 00439 00440 profiles = self.get_all_profiles() 00441 self.as_defines = [s.replace('"', '"') 00442 for s in self.toolchain.get_symbols(True)] 00443 self.c_defines = [s.replace('"', '"') 00444 for s in self.toolchain.get_symbols()] 00445 self.cpp_defines = self.c_defines 00446 print 'Symbols: {0}'.format(len(self.c_defines )) 00447 00448 self.include_path = [] 00449 for s in self.resources.inc_dirs: 00450 self.include_path .append("../" + self.filter_dot(s)) 00451 print ('Include folders: {0}'.format(len(self.include_path ))) 00452 00453 self.compute_exclusions() 00454 00455 print ('Exclude folders: {0}'.format(len(self.excluded_folders))) 00456 00457 ld_script = self.filter_dot(self.resources.linker_script) 00458 print ('Linker script: {0}'.format(ld_script)) 00459 00460 lib_dirs = [self.filter_dot(s) for s in self.resources.lib_dirs] 00461 00462 preproc_cmd = basename(self.toolchain.preproc[0]) + " " + " ".join(self.toolchain.preproc[1:]) 00463 00464 for id in ['debug', 'release']: 00465 opts = {} 00466 opts['common'] = {} 00467 opts['as'] = {} 00468 opts['c'] = {} 00469 opts['cpp'] = {} 00470 opts['ld'] = {} 00471 00472 opts['id'] = id 00473 opts['name'] = opts['id'].capitalize() 00474 00475 # TODO: Add prints to log or console in verbose mode. 00476 #print ('\nBuild configuration: {0}'.format(opts['name'])) 00477 00478 profile = profiles[id] 00479 00480 # A small hack, do not bother with src_path again, 00481 # pass an empty string to avoid crashing. 00482 src_paths = [''] 00483 toolchain = prepare_toolchain( 00484 src_paths, "", self.toolchain.target.name, self.TOOLCHAIN , build_profile=[profile]) 00485 00486 # Hack to fill in build_dir 00487 toolchain.build_dir = self.toolchain.build_dir 00488 00489 flags = self.toolchain_flags(toolchain) 00490 00491 # TODO: Add prints to log or console in verbose mode. 00492 # print 'Common flags:', ' '.join(flags['common_flags']) 00493 # print 'C++ flags:', ' '.join(flags['cxx_flags']) 00494 # print 'C flags:', ' '.join(flags['c_flags']) 00495 # print 'ASM flags:', ' '.join(flags['asm_flags']) 00496 # print 'Linker flags:', ' '.join(flags['ld_flags']) 00497 00498 # Most GNU ARM Eclipse options have a parent, 00499 # either debug or release. 00500 if '-O0' in flags['common_flags'] or '-Og' in flags['common_flags']: 00501 opts['parent_id'] = 'debug' 00502 else: 00503 opts['parent_id'] = 'release' 00504 00505 self.process_options(opts, flags) 00506 00507 opts['c']['defines'] = self.c_defines 00508 opts['cpp']['defines'] = self.cpp_defines 00509 opts['as']['defines'] = self.as_defines 00510 00511 self.process_sw_options (opts, flags) 00512 00513 opts['ld']['library_paths'] = [ 00514 self.filter_dot(s) for s in self.resources.lib_dirs] 00515 00516 opts['ld']['user_libraries'] = libraries 00517 opts['ld']['system_libraries'] = self.system_libraries 00518 opts['ld']['script'] = "linker-script-" + id + ".ld" 00519 00520 # Unique IDs used in multiple places. 00521 uid = {} 00522 uid['config'] = u.id 00523 uid['tool_c_compiler'] = u.id 00524 uid['tool_c_compiler_input'] = u.id 00525 uid['tool_cpp_compiler'] = u.id 00526 uid['tool_cpp_compiler_input'] = u.id 00527 00528 opts['uid'] = uid 00529 00530 options[id] = opts 00531 00532 ctx = { 00533 'name': self.project_name, 00534 'platform': platform, 00535 'include_paths': self.include_path , 00536 'config_header': config_header, 00537 'exclude_paths': '|'.join(self.excluded_folders), 00538 'ld_script': ld_script, 00539 'library_paths': lib_dirs, 00540 'object_files': self.resources.objects, 00541 'libraries': libraries, 00542 'board_name': self.BOARDS [self.target.upper()]['name'], 00543 'mcu_name': self.BOARDS [self.target.upper()]['mcuId'], 00544 'cpp_cmd': preproc_cmd, 00545 'options': options, 00546 # id property of 'u' will generate new random identifier every time 00547 # when called. 00548 'u': u 00549 } 00550 00551 self.__gen_dir ('.settings') 00552 self.gen_file('sw4stm32/language_settings_commom.tmpl', 00553 ctx, '.settings/language.settings.xml') 00554 self.gen_file('sw4stm32/project_common.tmpl', ctx, '.project') 00555 self.gen_file('sw4stm32/cproject_common.tmpl', ctx, '.cproject') 00556 self.gen_file('sw4stm32/makefile.targets.tmpl', ctx, 00557 'makefile.targets', trim_blocks=True, lstrip_blocks=True) 00558 self.gen_file('sw4stm32/launch.tmpl', ctx, self.project_name + 00559 ' ' + options['debug']['name'] + '.launch')
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