Satoshi Togawa / MSCFileSystem

Change HOSTBASEADDR　ｆor use with the RTOS.

Dependents:   mpod_nhk_english mpod_picasa_photoframe mpod_nhk_english_spxml vmConfort_v6

Fork of MSCFileSystem by Chris Styles

USBHostLite/usbhost_lpc17xx.h@5:e8786b7cfc82, 2012-08-15 (annotated)

Committer:
togayan
Date:
Wed Aug 15 10:10:06 2012 +0000
Revision:
5:e8786b7cfc82
Parent:
0:3e7d2baed4b4 
Change the way the arrangement of HOSTBASEADDR

Who changed what in which revision?

UserRevisionLine numberNew contents of line
chris 0:3e7d2baed4b4 1 /*
chris 0:3e7d2baed4b4 2 **************************************************************************************************************
chris 0:3e7d2baed4b4 3 * NXP USB Host Stack
chris 0:3e7d2baed4b4 4 *
chris 0:3e7d2baed4b4 5 * (c) Copyright 2008, NXP SemiConductors
chris 0:3e7d2baed4b4 6 * (c) Copyright 2008, OnChip Technologies LLC
chris 0:3e7d2baed4b4 7 * All Rights Reserved
chris 0:3e7d2baed4b4 8 *
chris 0:3e7d2baed4b4 9 * www.nxp.com
chris 0:3e7d2baed4b4 10 * www.onchiptech.com
chris 0:3e7d2baed4b4 11 *
chris 0:3e7d2baed4b4 12 * File : usbhost_lpc17xx.h
chris 0:3e7d2baed4b4 13 * Programmer(s) : Ravikanth.P
chris 0:3e7d2baed4b4 14 * Version :
chris 0:3e7d2baed4b4 15 *
chris 0:3e7d2baed4b4 16 **************************************************************************************************************
chris 0:3e7d2baed4b4 17 */
chris 0:3e7d2baed4b4 18
chris 0:3e7d2baed4b4 19 #ifndef USBHOST_LPC17xx_H
chris 0:3e7d2baed4b4 20 #define USBHOST_LPC17xx_H
chris 0:3e7d2baed4b4 21
chris 0:3e7d2baed4b4 22 /*
chris 0:3e7d2baed4b4 23 **************************************************************************************************************
chris 0:3e7d2baed4b4 24 * INCLUDE HEADER FILES
chris 0:3e7d2baed4b4 25 **************************************************************************************************************
chris 0:3e7d2baed4b4 26 */
chris 0:3e7d2baed4b4 27
chris 0:3e7d2baed4b4 28 #include "usbhost_inc.h"
chris 0:3e7d2baed4b4 29
chris 0:3e7d2baed4b4 30 /*
chris 0:3e7d2baed4b4 31 **************************************************************************************************************
chris 0:3e7d2baed4b4 32 * PRINT CONFIGURATION
chris 0:3e7d2baed4b4 33 **************************************************************************************************************
chris 0:3e7d2baed4b4 34 */
chris 0:3e7d2baed4b4 35
chris 0:3e7d2baed4b4 36 #define PRINT_ENABLE 1
chris 0:3e7d2baed4b4 37
chris 0:3e7d2baed4b4 38 #if PRINT_ENABLE
chris 0:3e7d2baed4b4 39 #define PRINT_Log(...) printf(__VA_ARGS__)
chris 0:3e7d2baed4b4 40 #define PRINT_Err(rc) printf("ERROR: In %s at Line %u - rc = %d\n", __FUNCTION__, __LINE__, rc)
chris 0:3e7d2baed4b4 41
chris 0:3e7d2baed4b4 42 #else
chris 0:3e7d2baed4b4 43 #define PRINT_Log(...) do {} while(0)
chris 0:3e7d2baed4b4 44 #define PRINT_Err(rc) do {} while(0)
chris 0:3e7d2baed4b4 45
chris 0:3e7d2baed4b4 46 #endif
chris 0:3e7d2baed4b4 47
chris 0:3e7d2baed4b4 48 /*
chris 0:3e7d2baed4b4 49 **************************************************************************************************************
chris 0:3e7d2baed4b4 50 * GENERAL DEFINITIONS
chris 0:3e7d2baed4b4 51 **************************************************************************************************************
chris 0:3e7d2baed4b4 52 */
chris 0:3e7d2baed4b4 53
chris 0:3e7d2baed4b4 54 #define DESC_LENGTH(x) x[0]
chris 0:3e7d2baed4b4 55 #define DESC_TYPE(x) x[1]
chris 0:3e7d2baed4b4 56
chris 0:3e7d2baed4b4 57
chris 0:3e7d2baed4b4 58 #define HOST_GET_DESCRIPTOR(descType, descIndex, data, length) \
chris 0:3e7d2baed4b4 59 Host_CtrlRecv(USB_DEVICE_TO_HOST | USB_RECIPIENT_DEVICE, GET_DESCRIPTOR, \
chris 0:3e7d2baed4b4 60 (descType << 8)|(descIndex), 0, length, data)
chris 0:3e7d2baed4b4 61
chris 0:3e7d2baed4b4 62 #define HOST_SET_ADDRESS(new_addr) \
chris 0:3e7d2baed4b4 63 Host_CtrlSend(USB_HOST_TO_DEVICE | USB_RECIPIENT_DEVICE, SET_ADDRESS, \
chris 0:3e7d2baed4b4 64 new_addr, 0, 0, NULL)
chris 0:3e7d2baed4b4 65
chris 0:3e7d2baed4b4 66 #define USBH_SET_CONFIGURATION(configNum) \
chris 0:3e7d2baed4b4 67 Host_CtrlSend(USB_HOST_TO_DEVICE | USB_RECIPIENT_DEVICE, SET_CONFIGURATION, \
chris 0:3e7d2baed4b4 68 configNum, 0, 0, NULL)
chris 0:3e7d2baed4b4 69
chris 0:3e7d2baed4b4 70 #define USBH_SET_INTERFACE(ifNum, altNum) \
chris 0:3e7d2baed4b4 71 Host_CtrlSend(USB_HOST_TO_DEVICE | USB_RECIPIENT_INTERFACE, SET_INTERFACE, \
chris 0:3e7d2baed4b4 72 altNum, ifNum, 0, NULL)
chris 0:3e7d2baed4b4 73
chris 0:3e7d2baed4b4 74 /*
chris 0:3e7d2baed4b4 75 **************************************************************************************************************
chris 0:3e7d2baed4b4 76 * OHCI OPERATIONAL REGISTER FIELD DEFINITIONS
chris 0:3e7d2baed4b4 77 **************************************************************************************************************
chris 0:3e7d2baed4b4 78 */
chris 0:3e7d2baed4b4 79
chris 0:3e7d2baed4b4 80 /* ------------------ HcControl Register --------------------- */
chris 0:3e7d2baed4b4 81 #define OR_CONTROL_CLE 0x00000010
chris 0:3e7d2baed4b4 82 #define OR_CONTROL_BLE 0x00000020
chris 0:3e7d2baed4b4 83 #define OR_CONTROL_HCFS 0x000000C0
chris 0:3e7d2baed4b4 84 #define OR_CONTROL_HC_OPER 0x00000080
chris 0:3e7d2baed4b4 85 /* ----------------- HcCommandStatus Register ----------------- */
chris 0:3e7d2baed4b4 86 #define OR_CMD_STATUS_HCR 0x00000001
chris 0:3e7d2baed4b4 87 #define OR_CMD_STATUS_CLF 0x00000002
chris 0:3e7d2baed4b4 88 #define OR_CMD_STATUS_BLF 0x00000004
chris 0:3e7d2baed4b4 89 /* --------------- HcInterruptStatus Register ----------------- */
chris 0:3e7d2baed4b4 90 #define OR_INTR_STATUS_WDH 0x00000002
chris 0:3e7d2baed4b4 91 #define OR_INTR_STATUS_RHSC 0x00000040
chris 0:3e7d2baed4b4 92 /* --------------- HcInterruptEnable Register ----------------- */
chris 0:3e7d2baed4b4 93 #define OR_INTR_ENABLE_WDH 0x00000002
chris 0:3e7d2baed4b4 94 #define OR_INTR_ENABLE_RHSC 0x00000040
chris 0:3e7d2baed4b4 95 #define OR_INTR_ENABLE_MIE 0x80000000
chris 0:3e7d2baed4b4 96 /* ---------------- HcRhDescriptorA Register ------------------ */
chris 0:3e7d2baed4b4 97 #define OR_RH_STATUS_LPSC 0x00010000
chris 0:3e7d2baed4b4 98 #define OR_RH_STATUS_DRWE 0x00008000
chris 0:3e7d2baed4b4 99 /* -------------- HcRhPortStatus[1:NDP] Register -------------- */
chris 0:3e7d2baed4b4 100 #define OR_RH_PORT_CCS 0x00000001
chris 0:3e7d2baed4b4 101 #define OR_RH_PORT_PRS 0x00000010
chris 0:3e7d2baed4b4 102 #define OR_RH_PORT_CSC 0x00010000
chris 0:3e7d2baed4b4 103 #define OR_RH_PORT_PRSC 0x00100000
chris 0:3e7d2baed4b4 104
chris 0:3e7d2baed4b4 105
chris 0:3e7d2baed4b4 106 /*
chris 0:3e7d2baed4b4 107 **************************************************************************************************************
chris 0:3e7d2baed4b4 108 * FRAME INTERVAL
chris 0:3e7d2baed4b4 109 **************************************************************************************************************
chris 0:3e7d2baed4b4 110 */
chris 0:3e7d2baed4b4 111
chris 0:3e7d2baed4b4 112 #define FI 0x2EDF /* 12000 bits per frame (-1) */
chris 0:3e7d2baed4b4 113 #define DEFAULT_FMINTERVAL ((((6 * (FI - 210)) / 7) << 16) | FI)
chris 0:3e7d2baed4b4 114
chris 0:3e7d2baed4b4 115 /*
chris 0:3e7d2baed4b4 116 **************************************************************************************************************
chris 0:3e7d2baed4b4 117 * TRANSFER DESCRIPTOR CONTROL FIELDS
chris 0:3e7d2baed4b4 118 **************************************************************************************************************
chris 0:3e7d2baed4b4 119 */
chris 0:3e7d2baed4b4 120
chris 0:3e7d2baed4b4 121 #define TD_ROUNDING (USB_INT32U) (0x00040000) /* Buffer Rounding */
chris 0:3e7d2baed4b4 122 #define TD_SETUP (USB_INT32U)(0) /* Direction of Setup Packet */
chris 0:3e7d2baed4b4 123 #define TD_IN (USB_INT32U)(0x00100000) /* Direction In */
chris 0:3e7d2baed4b4 124 #define TD_OUT (USB_INT32U)(0x00080000) /* Direction Out */
chris 0:3e7d2baed4b4 125 #define TD_DELAY_INT(x) (USB_INT32U)((x) << 21) /* Delay Interrupt */
chris 0:3e7d2baed4b4 126 #define TD_TOGGLE_0 (USB_INT32U)(0x02000000) /* Toggle 0 */
chris 0:3e7d2baed4b4 127 #define TD_TOGGLE_1 (USB_INT32U)(0x03000000) /* Toggle 1 */
chris 0:3e7d2baed4b4 128 #define TD_CC (USB_INT32U)(0xF0000000) /* Completion Code */
chris 0:3e7d2baed4b4 129
chris 0:3e7d2baed4b4 130 /*
chris 0:3e7d2baed4b4 131 **************************************************************************************************************
chris 0:3e7d2baed4b4 132 * USB STANDARD REQUEST DEFINITIONS
chris 0:3e7d2baed4b4 133 **************************************************************************************************************
chris 0:3e7d2baed4b4 134 */
chris 0:3e7d2baed4b4 135
chris 0:3e7d2baed4b4 136 #define USB_DESCRIPTOR_TYPE_DEVICE 1
chris 0:3e7d2baed4b4 137 #define USB_DESCRIPTOR_TYPE_CONFIGURATION 2
chris 0:3e7d2baed4b4 138 #define USB_DESCRIPTOR_TYPE_INTERFACE 4
chris 0:3e7d2baed4b4 139 #define USB_DESCRIPTOR_TYPE_ENDPOINT 5
chris 0:3e7d2baed4b4 140 /* ----------- Control RequestType Fields ----------- */
chris 0:3e7d2baed4b4 141 #define USB_DEVICE_TO_HOST 0x80
chris 0:3e7d2baed4b4 142 #define USB_HOST_TO_DEVICE 0x00
chris 0:3e7d2baed4b4 143 #define USB_REQUEST_TYPE_CLASS 0x20
chris 0:3e7d2baed4b4 144 #define USB_RECIPIENT_DEVICE 0x00
chris 0:3e7d2baed4b4 145 #define USB_RECIPIENT_INTERFACE 0x01
chris 0:3e7d2baed4b4 146 /* -------------- USB Standard Requests -------------- */
chris 0:3e7d2baed4b4 147 #define SET_ADDRESS 5
chris 0:3e7d2baed4b4 148 #define GET_DESCRIPTOR 6
chris 0:3e7d2baed4b4 149 #define SET_CONFIGURATION 9
chris 0:3e7d2baed4b4 150 #define SET_INTERFACE 11
chris 0:3e7d2baed4b4 151
chris 0:3e7d2baed4b4 152 /*
chris 0:3e7d2baed4b4 153 **************************************************************************************************************
chris 0:3e7d2baed4b4 154 * TYPE DEFINITIONS
chris 0:3e7d2baed4b4 155 **************************************************************************************************************
chris 0:3e7d2baed4b4 156 */
chris 0:3e7d2baed4b4 157
chris 0:3e7d2baed4b4 158 typedef struct hcEd { /* ----------- HostController EndPoint Descriptor ------------- */
chris 0:3e7d2baed4b4 159 volatile USB_INT32U Control; /* Endpoint descriptor control */
chris 0:3e7d2baed4b4 160 volatile USB_INT32U TailTd; /* Physical address of tail in Transfer descriptor list */
chris 0:3e7d2baed4b4 161 volatile USB_INT32U HeadTd; /* Physcial address of head in Transfer descriptor list */
chris 0:3e7d2baed4b4 162 volatile USB_INT32U Next; /* Physical address of next Endpoint descriptor */
chris 0:3e7d2baed4b4 163 } HCED;
chris 0:3e7d2baed4b4 164
chris 0:3e7d2baed4b4 165 typedef struct hcTd { /* ------------ HostController Transfer Descriptor ------------ */
chris 0:3e7d2baed4b4 166 volatile USB_INT32U Control; /* Transfer descriptor control */
chris 0:3e7d2baed4b4 167 volatile USB_INT32U CurrBufPtr; /* Physical address of current buffer pointer */
chris 0:3e7d2baed4b4 168 volatile USB_INT32U Next; /* Physical pointer to next Transfer Descriptor */
chris 0:3e7d2baed4b4 169 volatile USB_INT32U BufEnd; /* Physical address of end of buffer */
chris 0:3e7d2baed4b4 170 } HCTD;
chris 0:3e7d2baed4b4 171
chris 0:3e7d2baed4b4 172 typedef struct hcca { /* ----------- Host Controller Communication Area ------------ */
chris 0:3e7d2baed4b4 173 volatile USB_INT32U IntTable[32]; /* Interrupt Table */
chris 0:3e7d2baed4b4 174 volatile USB_INT32U FrameNumber; /* Frame Number */
chris 0:3e7d2baed4b4 175 volatile USB_INT32U DoneHead; /* Done Head */
chris 0:3e7d2baed4b4 176 volatile USB_INT08U Reserved[116]; /* Reserved for future use */
chris 0:3e7d2baed4b4 177 volatile USB_INT08U Unknown[4]; /* Unused */
chris 0:3e7d2baed4b4 178 } HCCA;
chris 0:3e7d2baed4b4 179
chris 0:3e7d2baed4b4 180 /*
chris 0:3e7d2baed4b4 181 **************************************************************************************************************
chris 0:3e7d2baed4b4 182 * EXTERN DECLARATIONS
chris 0:3e7d2baed4b4 183 **************************************************************************************************************
chris 0:3e7d2baed4b4 184 */
chris 0:3e7d2baed4b4 185
chris 0:3e7d2baed4b4 186 extern volatile HCED *EDBulkIn; /* BulkIn endpoint descriptor structure */
chris 0:3e7d2baed4b4 187 extern volatile HCED *EDBulkOut; /* BulkOut endpoint descriptor structure */
chris 0:3e7d2baed4b4 188 extern volatile HCTD *TDHead; /* Head transfer descriptor structure */
chris 0:3e7d2baed4b4 189 extern volatile HCTD *TDTail; /* Tail transfer descriptor structure */
chris 0:3e7d2baed4b4 190 extern volatile USB_INT08U *TDBuffer; /* Current Buffer Pointer of transfer descriptor */
chris 0:3e7d2baed4b4 191
chris 0:3e7d2baed4b4 192 /*
chris 0:3e7d2baed4b4 193 **************************************************************************************************************
chris 0:3e7d2baed4b4 194 * FUNCTION PROTOTYPES
chris 0:3e7d2baed4b4 195 **************************************************************************************************************
chris 0:3e7d2baed4b4 196 */
chris 0:3e7d2baed4b4 197
chris 0:3e7d2baed4b4 198 void Host_Init (void);
chris 0:3e7d2baed4b4 199
chris 0:3e7d2baed4b4 200 extern "C" void USB_IRQHandler(void) __irq;
chris 0:3e7d2baed4b4 201
chris 0:3e7d2baed4b4 202 USB_INT32S Host_EnumDev (void);
chris 0:3e7d2baed4b4 203
chris 0:3e7d2baed4b4 204 USB_INT32S Host_ProcessTD(volatile HCED *ed,
chris 0:3e7d2baed4b4 205 volatile USB_INT32U token,
chris 0:3e7d2baed4b4 206 volatile USB_INT08U *buffer,
chris 0:3e7d2baed4b4 207 USB_INT32U buffer_len);
chris 0:3e7d2baed4b4 208
chris 0:3e7d2baed4b4 209 void Host_DelayUS ( USB_INT32U delay);
chris 0:3e7d2baed4b4 210 void Host_DelayMS ( USB_INT32U delay);
chris 0:3e7d2baed4b4 211
chris 0:3e7d2baed4b4 212
chris 0:3e7d2baed4b4 213 void Host_TDInit (volatile HCTD *td);
chris 0:3e7d2baed4b4 214 void Host_EDInit (volatile HCED *ed);
chris 0:3e7d2baed4b4 215 void Host_HCCAInit (volatile HCCA *hcca);
chris 0:3e7d2baed4b4 216
chris 0:3e7d2baed4b4 217 USB_INT32S Host_CtrlRecv ( USB_INT08U bm_request_type,
chris 0:3e7d2baed4b4 218 USB_INT08U b_request,
chris 0:3e7d2baed4b4 219 USB_INT16U w_value,
chris 0:3e7d2baed4b4 220 USB_INT16U w_index,
chris 0:3e7d2baed4b4 221 USB_INT16U w_length,
chris 0:3e7d2baed4b4 222 volatile USB_INT08U *buffer);
chris 0:3e7d2baed4b4 223
chris 0:3e7d2baed4b4 224 USB_INT32S Host_CtrlSend ( USB_INT08U bm_request_type,
chris 0:3e7d2baed4b4 225 USB_INT08U b_request,
chris 0:3e7d2baed4b4 226 USB_INT16U w_value,
chris 0:3e7d2baed4b4 227 USB_INT16U w_index,
chris 0:3e7d2baed4b4 228 USB_INT16U w_length,
chris 0:3e7d2baed4b4 229 volatile USB_INT08U *buffer);
chris 0:3e7d2baed4b4 230
chris 0:3e7d2baed4b4 231 void Host_FillSetup( USB_INT08U bm_request_type,
chris 0:3e7d2baed4b4 232 USB_INT08U b_request,
chris 0:3e7d2baed4b4 233 USB_INT16U w_value,
chris 0:3e7d2baed4b4 234 USB_INT16U w_index,
chris 0:3e7d2baed4b4 235 USB_INT16U w_length);
chris 0:3e7d2baed4b4 236
chris 0:3e7d2baed4b4 237
chris 0:3e7d2baed4b4 238 void Host_WDHWait (void);
chris 0:3e7d2baed4b4 239
chris 0:3e7d2baed4b4 240
chris 0:3e7d2baed4b4 241 USB_INT32U ReadLE32U (volatile USB_INT08U *pmem);
chris 0:3e7d2baed4b4 242 void WriteLE32U (volatile USB_INT08U *pmem,
chris 0:3e7d2baed4b4 243 USB_INT32U val);
chris 0:3e7d2baed4b4 244 USB_INT16U ReadLE16U (volatile USB_INT08U *pmem);
chris 0:3e7d2baed4b4 245 void WriteLE16U (volatile USB_INT08U *pmem,
chris 0:3e7d2baed4b4 246 USB_INT16U val);
chris 0:3e7d2baed4b4 247 USB_INT32U ReadBE32U (volatile USB_INT08U *pmem);
chris 0:3e7d2baed4b4 248 void WriteBE32U (volatile USB_INT08U *pmem,
chris 0:3e7d2baed4b4 249 USB_INT32U val);
chris 0:3e7d2baed4b4 250 USB_INT16U ReadBE16U (volatile USB_INT08U *pmem);
chris 0:3e7d2baed4b4 251 void WriteBE16U (volatile USB_INT08U *pmem,
chris 0:3e7d2baed4b4 252 USB_INT16U val);
chris 0:3e7d2baed4b4 253
chris 0:3e7d2baed4b4 254 #endif