Timothy Mulrooney / SX1272Lib

pin pong

Dependents:   SX1272PingPong

Fork of SX1276Lib by Semtech

sx1272/sx1272-hal.cpp@24:9100348e6c28, 2016-02-17 (annotated)

Committer:
tmulrooney
Date:
Wed Feb 17 00:47:12 2016 +0000
Revision:
24:9100348e6c28
Parent:
23:273a2f93ae99 
pin changes for FRDK-K22F

Who changed what in which revision?

UserRevisionLine numberNew contents of line
tmulrooney 23:273a2f93ae99 1 /*
tmulrooney 23:273a2f93ae99 2 / _____) _ | |
tmulrooney 23:273a2f93ae99 3 ( (____ _____ ____ _| |_ _____ ____| |__
tmulrooney 23:273a2f93ae99 4 \____ \| ___ | (_ _) ___ |/ ___) _ \
tmulrooney 23:273a2f93ae99 5 _____) ) ____| | | || |_| ____( (___| | | |
tmulrooney 23:273a2f93ae99 6 (______/|_____)_|_|_| \__)_____)\____)_| |_|
tmulrooney 23:273a2f93ae99 7 (C) 2014 Semtech
tmulrooney 23:273a2f93ae99 8
tmulrooney 23:273a2f93ae99 9 Description: -
tmulrooney 23:273a2f93ae99 10
tmulrooney 23:273a2f93ae99 11 License: Revised BSD License, see LICENSE.TXT file include in the project
tmulrooney 23:273a2f93ae99 12
tmulrooney 23:273a2f93ae99 13 Maintainers: Miguel Luis, Gregory Cristian and Nicolas Huguenin
tmulrooney 23:273a2f93ae99 14 */
tmulrooney 23:273a2f93ae99 15 #include "sx1272-hal.h"
tmulrooney 23:273a2f93ae99 16 #include "debug.h"
tmulrooney 23:273a2f93ae99 17
tmulrooney 23:273a2f93ae99 18 const RadioRegisters_t SX1272MB1xAS::RadioRegsInit[] = RADIO_INIT_REGISTERS_VALUE;
tmulrooney 23:273a2f93ae99 19
tmulrooney 23:273a2f93ae99 20 SX1272MB1xAS::SX1272MB1xAS( RadioEvents_t *events,
tmulrooney 23:273a2f93ae99 21 PinName mosi, PinName miso, PinName sclk, PinName nss, PinName reset,
tmulrooney 23:273a2f93ae99 22 PinName dio0, PinName dio1, PinName dio2, PinName dio3, PinName dio4, PinName dio5,
tmulrooney 23:273a2f93ae99 23 PinName antSwitch )
tmulrooney 23:273a2f93ae99 24 : SX1272( events, mosi, miso, sclk, nss, reset, dio0, dio1, dio2, dio3, dio4, dio5 ),
tmulrooney 23:273a2f93ae99 25 antSwitch( antSwitch ),
tmulrooney 23:273a2f93ae99 26 #if( defined ( TARGET_NUCLEO_L152RE ) )
tmulrooney 23:273a2f93ae99 27 fake( D8 )
tmulrooney 23:273a2f93ae99 28 #else
tmulrooney 23:273a2f93ae99 29 fake( A3 )
tmulrooney 23:273a2f93ae99 30 #endif
tmulrooney 23:273a2f93ae99 31 {
tmulrooney 23:273a2f93ae99 32 debug("SX1272MB1xAS constructor\r\n");
tmulrooney 23:273a2f93ae99 33 this->RadioEvents = events;
tmulrooney 23:273a2f93ae99 34
tmulrooney 23:273a2f93ae99 35 Reset( );
tmulrooney 23:273a2f93ae99 36
tmulrooney 23:273a2f93ae99 37 RxChainCalibration( );
tmulrooney 23:273a2f93ae99 38
tmulrooney 23:273a2f93ae99 39 IoInit( );
tmulrooney 23:273a2f93ae99 40
tmulrooney 23:273a2f93ae99 41 SetOpMode( RF_OPMODE_SLEEP );
tmulrooney 23:273a2f93ae99 42
tmulrooney 23:273a2f93ae99 43 IoIrqInit( dioIrq );
tmulrooney 23:273a2f93ae99 44
tmulrooney 23:273a2f93ae99 45 RadioRegistersInit( );
tmulrooney 23:273a2f93ae99 46
tmulrooney 23:273a2f93ae99 47 SetModem( MODEM_FSK );
tmulrooney 24:9100348e6c28 48
tmulrooney 23:273a2f93ae99 49
tmulrooney 23:273a2f93ae99 50 this->settings.State = RF_IDLE ;
tmulrooney 23:273a2f93ae99 51 }
tmulrooney 23:273a2f93ae99 52
tmulrooney 23:273a2f93ae99 53 SX1272MB1xAS::SX1272MB1xAS( RadioEvents_t *events )
tmulrooney 23:273a2f93ae99 54 #if defined ( TARGET_NUCLEO_L152RE )
tmulrooney 23:273a2f93ae99 55 : SX1272( events, D11, D12, D13, D10, A0, D2, D3, D4, D5, A3, D9 ), // For NUCLEO L152RE dio4 is on port A3
tmulrooney 23:273a2f93ae99 56 antSwitch( A4 ),
tmulrooney 23:273a2f93ae99 57 fake( D8 )
tmulrooney 23:273a2f93ae99 58 #elif defined( TARGET_LPC11U6X )
tmulrooney 23:273a2f93ae99 59 : SX1272( events, D11, D12, D13, D10, A0, D2, D3, D4, D5, D8, D9 ),
tmulrooney 23:273a2f93ae99 60 antSwitch( P0_23 ),
tmulrooney 23:273a2f93ae99 61 fake( A3 )
tmulrooney 23:273a2f93ae99 62 #else
tmulrooney 23:273a2f93ae99 63 : SX1272( events, D11, D12, D13, D10, A0, D2, D3, D4, D5, D8, D9 ),
tmulrooney 24:9100348e6c28 64 antSwitch( PTC6 ), //changed from A4 to PTC6 by jlc
tmulrooney 23:273a2f93ae99 65 fake( A3 )
tmulrooney 23:273a2f93ae99 66 #endif
tmulrooney 23:273a2f93ae99 67 {
tmulrooney 23:273a2f93ae99 68 debug("SX1272MB1xAS constructor1\r\n");
tmulrooney 23:273a2f93ae99 69 this->RadioEvents = events;
tmulrooney 23:273a2f93ae99 70
tmulrooney 23:273a2f93ae99 71 Reset( );
tmulrooney 23:273a2f93ae99 72
tmulrooney 23:273a2f93ae99 73 boardConnected = UNKNOWN;
tmulrooney 23:273a2f93ae99 74
tmulrooney 23:273a2f93ae99 75 DetectBoardType( );
tmulrooney 23:273a2f93ae99 76
tmulrooney 23:273a2f93ae99 77 RxChainCalibration( );
tmulrooney 23:273a2f93ae99 78
tmulrooney 23:273a2f93ae99 79 IoInit( );
tmulrooney 23:273a2f93ae99 80
tmulrooney 23:273a2f93ae99 81 SetOpMode( RF_OPMODE_SLEEP );
tmulrooney 23:273a2f93ae99 82 IoIrqInit( dioIrq );
tmulrooney 23:273a2f93ae99 83
tmulrooney 23:273a2f93ae99 84 RadioRegistersInit( );
tmulrooney 23:273a2f93ae99 85
tmulrooney 24:9100348e6c28 86
tmulrooney 23:273a2f93ae99 87 // SetModem( MODEM_LORA );
tmulrooney 23:273a2f93ae99 88
tmulrooney 23:273a2f93ae99 89 this->settings.State = RF_IDLE ;
tmulrooney 23:273a2f93ae99 90 }
tmulrooney 23:273a2f93ae99 91
tmulrooney 23:273a2f93ae99 92 //-------------------------------------------------------------------------
tmulrooney 23:273a2f93ae99 93 // Board relative functions
tmulrooney 23:273a2f93ae99 94 //-------------------------------------------------------------------------
tmulrooney 23:273a2f93ae99 95 uint8_t SX1272MB1xAS::DetectBoardType( void )
tmulrooney 23:273a2f93ae99 96 {
tmulrooney 23:273a2f93ae99 97 debug("DetectBoardType\r\n");
tmulrooney 23:273a2f93ae99 98 if( boardConnected == UNKNOWN )
tmulrooney 23:273a2f93ae99 99 {
tmulrooney 23:273a2f93ae99 100 antSwitch.input( );
tmulrooney 23:273a2f93ae99 101 wait_ms( 1 );
tmulrooney 23:273a2f93ae99 102 if( antSwitch == 1 )
tmulrooney 23:273a2f93ae99 103 {
tmulrooney 23:273a2f93ae99 104 boardConnected = SX1272RF1;
tmulrooney 23:273a2f93ae99 105 }
tmulrooney 23:273a2f93ae99 106 else
tmulrooney 23:273a2f93ae99 107 {
tmulrooney 23:273a2f93ae99 108 boardConnected = SX1272RF1;
tmulrooney 23:273a2f93ae99 109 }
tmulrooney 23:273a2f93ae99 110 antSwitch.output( );
tmulrooney 23:273a2f93ae99 111 wait_ms( 1 );
tmulrooney 23:273a2f93ae99 112 }
tmulrooney 23:273a2f93ae99 113 return ( boardConnected );
tmulrooney 23:273a2f93ae99 114 }
tmulrooney 23:273a2f93ae99 115
tmulrooney 23:273a2f93ae99 116 void SX1272MB1xAS::IoInit( void )
tmulrooney 23:273a2f93ae99 117 {
tmulrooney 23:273a2f93ae99 118 debug("IoInit\r\n");
tmulrooney 23:273a2f93ae99 119 AntSwInit( );
tmulrooney 23:273a2f93ae99 120 SpiInit( );
tmulrooney 23:273a2f93ae99 121 }
tmulrooney 23:273a2f93ae99 122
tmulrooney 23:273a2f93ae99 123 void SX1272MB1xAS::RadioRegistersInit( )
tmulrooney 23:273a2f93ae99 124 {
tmulrooney 23:273a2f93ae99 125 uint8_t i = 0;
tmulrooney 23:273a2f93ae99 126 for( i = 0; i < sizeof( RadioRegsInit ) / sizeof( RadioRegisters_t ); i++ )
tmulrooney 23:273a2f93ae99 127 {
tmulrooney 23:273a2f93ae99 128 debug("RadioRegistersInit %d %02X %02X\r\n",RadioRegsInit[i].Modem ,RadioRegsInit[i].Addr, RadioRegsInit[i].Value );
tmulrooney 23:273a2f93ae99 129 SetModem( RadioRegsInit[i].Modem );
tmulrooney 23:273a2f93ae99 130 Write( RadioRegsInit[i].Addr, RadioRegsInit[i].Value );
tmulrooney 23:273a2f93ae99 131 }
tmulrooney 23:273a2f93ae99 132 }
tmulrooney 23:273a2f93ae99 133
tmulrooney 23:273a2f93ae99 134 void SX1272MB1xAS::SpiInit( void )
tmulrooney 23:273a2f93ae99 135 {
tmulrooney 23:273a2f93ae99 136 debug("SpiInit\r\n");
tmulrooney 23:273a2f93ae99 137 nss = 1;
tmulrooney 23:273a2f93ae99 138 spi.format( 8,0 );
tmulrooney 23:273a2f93ae99 139 uint32_t frequencyToSet = 1000000;
tmulrooney 23:273a2f93ae99 140 // uint32_t frequencyToSet = 8000000;
tmulrooney 23:273a2f93ae99 141 // #if( defined ( TARGET_NUCLEO_L152RE ) || defined ( TARGET_LPC11U6X ) )
tmulrooney 23:273a2f93ae99 142 spi.frequency( frequencyToSet );
tmulrooney 23:273a2f93ae99 143 // #elif( defined ( TARGET_KL25Z ) ) //busclock frequency is halved -> double the spi frequency to compensate
tmulrooney 23:273a2f93ae99 144 // spi.frequency( frequencyToSet * 2 );
tmulrooney 23:273a2f93ae99 145 // #else
tmulrooney 23:273a2f93ae99 146 // #warning "Check the board's SPI frequency"
tmulrooney 23:273a2f93ae99 147 // #endif
tmulrooney 23:273a2f93ae99 148 wait(0.1);
tmulrooney 23:273a2f93ae99 149 }
tmulrooney 23:273a2f93ae99 150
tmulrooney 23:273a2f93ae99 151 void SX1272MB1xAS::IoIrqInit( DioIrqHandler *irqHandlers )
tmulrooney 23:273a2f93ae99 152 {
tmulrooney 23:273a2f93ae99 153 debug("IoIrqInit\r\n");
tmulrooney 23:273a2f93ae99 154 #if( defined ( TARGET_NUCLEO_L152RE ) || defined ( TARGET_LPC11U6X ) )
tmulrooney 23:273a2f93ae99 155 dio0.mode(PullDown);
tmulrooney 23:273a2f93ae99 156 dio1.mode(PullDown);
tmulrooney 23:273a2f93ae99 157 dio2.mode(PullDown);
tmulrooney 23:273a2f93ae99 158 dio3.mode(PullDown);
tmulrooney 23:273a2f93ae99 159 dio4.mode(PullDown);
tmulrooney 23:273a2f93ae99 160 #endif
tmulrooney 23:273a2f93ae99 161 dio0.rise( this, static_cast< TriggerMB1xAS > ( irqHandlers[0] ) );
tmulrooney 23:273a2f93ae99 162 dio1.rise( this, static_cast< TriggerMB1xAS > ( irqHandlers[1] ) );
tmulrooney 23:273a2f93ae99 163 dio2.rise( this, static_cast< TriggerMB1xAS > ( irqHandlers[2] ) );
tmulrooney 23:273a2f93ae99 164 dio3.rise( this, static_cast< TriggerMB1xAS > ( irqHandlers[3] ) );
tmulrooney 23:273a2f93ae99 165 dio4.rise( this, static_cast< TriggerMB1xAS > ( irqHandlers[4] ) );
tmulrooney 23:273a2f93ae99 166 }
tmulrooney 23:273a2f93ae99 167
tmulrooney 23:273a2f93ae99 168 void SX1272MB1xAS::IoDeInit( void )
tmulrooney 23:273a2f93ae99 169 {
tmulrooney 23:273a2f93ae99 170 debug("IoDeInit\r\n");
tmulrooney 23:273a2f93ae99 171 //nothing
tmulrooney 23:273a2f93ae99 172 }
tmulrooney 23:273a2f93ae99 173
tmulrooney 23:273a2f93ae99 174 uint8_t SX1272MB1xAS::GetPaSelect( uint32_t channel )
tmulrooney 23:273a2f93ae99 175 {
tmulrooney 23:273a2f93ae99 176 debug("GetPaSelect\r\n");
tmulrooney 23:273a2f93ae99 177 if( channel > RF_MID_BAND_THRESH )
tmulrooney 23:273a2f93ae99 178 {
tmulrooney 23:273a2f93ae99 179 if( boardConnected == SX1276MB1LAS )
tmulrooney 23:273a2f93ae99 180 {
tmulrooney 23:273a2f93ae99 181 return RF_PACONFIG_PASELECT_PABOOST;
tmulrooney 23:273a2f93ae99 182 }
tmulrooney 23:273a2f93ae99 183 else
tmulrooney 23:273a2f93ae99 184 {
tmulrooney 23:273a2f93ae99 185 return RF_PACONFIG_PASELECT_RFO;
tmulrooney 23:273a2f93ae99 186 }
tmulrooney 23:273a2f93ae99 187 }
tmulrooney 23:273a2f93ae99 188 else
tmulrooney 23:273a2f93ae99 189 {
tmulrooney 23:273a2f93ae99 190 return RF_PACONFIG_PASELECT_RFO;
tmulrooney 23:273a2f93ae99 191 }
tmulrooney 23:273a2f93ae99 192 }
tmulrooney 23:273a2f93ae99 193
tmulrooney 23:273a2f93ae99 194 void SX1272MB1xAS::SetAntSwLowPower( bool status )
tmulrooney 23:273a2f93ae99 195 {
tmulrooney 23:273a2f93ae99 196 debug("SetAntSwLowPower %d\r\n",status);
tmulrooney 23:273a2f93ae99 197 if( isRadioActive != status )
tmulrooney 23:273a2f93ae99 198 {
tmulrooney 23:273a2f93ae99 199 isRadioActive = status;
tmulrooney 23:273a2f93ae99 200
tmulrooney 23:273a2f93ae99 201 if( status == false )
tmulrooney 23:273a2f93ae99 202 {
tmulrooney 23:273a2f93ae99 203 AntSwInit( );
tmulrooney 23:273a2f93ae99 204 }
tmulrooney 23:273a2f93ae99 205 else
tmulrooney 23:273a2f93ae99 206 {
tmulrooney 23:273a2f93ae99 207 AntSwDeInit( );
tmulrooney 23:273a2f93ae99 208 }
tmulrooney 23:273a2f93ae99 209 }
tmulrooney 23:273a2f93ae99 210 }
tmulrooney 23:273a2f93ae99 211
tmulrooney 23:273a2f93ae99 212 void SX1272MB1xAS::AntSwInit( void )
tmulrooney 23:273a2f93ae99 213 {
tmulrooney 23:273a2f93ae99 214 debug("AntSwInit\r\n");
tmulrooney 23:273a2f93ae99 215 antSwitch = 0;
tmulrooney 23:273a2f93ae99 216 }
tmulrooney 23:273a2f93ae99 217
tmulrooney 23:273a2f93ae99 218 void SX1272MB1xAS::AntSwDeInit( void )
tmulrooney 23:273a2f93ae99 219 {
tmulrooney 23:273a2f93ae99 220 debug("AntSwDeInit\r\n");
tmulrooney 23:273a2f93ae99 221 antSwitch = 0;
tmulrooney 23:273a2f93ae99 222 }
tmulrooney 23:273a2f93ae99 223
tmulrooney 23:273a2f93ae99 224 void SX1272MB1xAS::SetAntSw( uint8_t rxTx )
tmulrooney 23:273a2f93ae99 225 {
tmulrooney 24:9100348e6c28 226 debug("SetAntSw %d\r\n",rxTx);
tmulrooney 23:273a2f93ae99 227 if( this->rxTx == rxTx )
tmulrooney 23:273a2f93ae99 228 {
tmulrooney 23:273a2f93ae99 229 //no need to go further
tmulrooney 23:273a2f93ae99 230 return;
tmulrooney 23:273a2f93ae99 231 }
tmulrooney 23:273a2f93ae99 232
tmulrooney 23:273a2f93ae99 233 this->rxTx = rxTx;
tmulrooney 23:273a2f93ae99 234
tmulrooney 23:273a2f93ae99 235 if( rxTx != 0 )
tmulrooney 23:273a2f93ae99 236 {
tmulrooney 23:273a2f93ae99 237 antSwitch = 1;
tmulrooney 23:273a2f93ae99 238 }
tmulrooney 23:273a2f93ae99 239 else
tmulrooney 23:273a2f93ae99 240 {
tmulrooney 23:273a2f93ae99 241 antSwitch = 0;
tmulrooney 23:273a2f93ae99 242 }
tmulrooney 23:273a2f93ae99 243 }
tmulrooney 23:273a2f93ae99 244
tmulrooney 23:273a2f93ae99 245 bool SX1272MB1xAS::CheckRfFrequency( uint32_t frequency )
tmulrooney 23:273a2f93ae99 246 {
tmulrooney 23:273a2f93ae99 247 debug("CheckRfFrequency\r\n");
tmulrooney 23:273a2f93ae99 248 //TODO: Implement check, currently all frequencies are supported
tmulrooney 23:273a2f93ae99 249 return true;
tmulrooney 23:273a2f93ae99 250 }
tmulrooney 23:273a2f93ae99 251
tmulrooney 23:273a2f93ae99 252
tmulrooney 23:273a2f93ae99 253 void SX1272MB1xAS::Reset( void )
tmulrooney 23:273a2f93ae99 254 {
tmulrooney 23:273a2f93ae99 255 debug("Reset\r\n");
tmulrooney 23:273a2f93ae99 256 reset.output();
tmulrooney 23:273a2f93ae99 257 reset = 0;
tmulrooney 23:273a2f93ae99 258 wait_ms( 1 );
tmulrooney 23:273a2f93ae99 259 reset.input();
tmulrooney 23:273a2f93ae99 260 wait_ms( 6 );
tmulrooney 23:273a2f93ae99 261 }
tmulrooney 23:273a2f93ae99 262
tmulrooney 23:273a2f93ae99 263 void SX1272MB1xAS::Write( uint8_t addr, uint8_t data )
tmulrooney 23:273a2f93ae99 264 {
tmulrooney 23:273a2f93ae99 265 debug("Write %02X %02X\r\n",addr, data);
tmulrooney 23:273a2f93ae99 266 Write( addr, &data, 1 );
tmulrooney 23:273a2f93ae99 267 }
tmulrooney 23:273a2f93ae99 268
tmulrooney 23:273a2f93ae99 269 uint8_t SX1272MB1xAS::Read( uint8_t addr )
tmulrooney 23:273a2f93ae99 270 {
tmulrooney 23:273a2f93ae99 271 uint8_t data;
tmulrooney 23:273a2f93ae99 272 Read( addr, &data, 1 );
tmulrooney 23:273a2f93ae99 273 debug("Read %02X %02X\r\n",addr ,data);
tmulrooney 23:273a2f93ae99 274 return data;
tmulrooney 23:273a2f93ae99 275 }
tmulrooney 23:273a2f93ae99 276
tmulrooney 23:273a2f93ae99 277 void SX1272MB1xAS::Write( uint8_t addr, uint8_t *buffer, uint8_t size )
tmulrooney 23:273a2f93ae99 278 {
tmulrooney 23:273a2f93ae99 279 uint8_t i;
tmulrooney 23:273a2f93ae99 280
tmulrooney 23:273a2f93ae99 281 nss = 0;
tmulrooney 23:273a2f93ae99 282 spi.write( addr | 0x80 );
tmulrooney 23:273a2f93ae99 283 for( i = 0; i < size; i++ )
tmulrooney 23:273a2f93ae99 284 {
tmulrooney 23:273a2f93ae99 285 spi.write( buffer[i] );
tmulrooney 23:273a2f93ae99 286 }
tmulrooney 23:273a2f93ae99 287 nss = 1;
tmulrooney 23:273a2f93ae99 288 }
tmulrooney 23:273a2f93ae99 289
tmulrooney 23:273a2f93ae99 290 void SX1272MB1xAS::Read( uint8_t addr, uint8_t *buffer, uint8_t size )
tmulrooney 23:273a2f93ae99 291 {
tmulrooney 23:273a2f93ae99 292 uint8_t i;
tmulrooney 23:273a2f93ae99 293
tmulrooney 23:273a2f93ae99 294 nss = 0;
tmulrooney 23:273a2f93ae99 295 spi.write( addr & 0x7F );
tmulrooney 23:273a2f93ae99 296 for( i = 0; i < size; i++ )
tmulrooney 23:273a2f93ae99 297 {
tmulrooney 23:273a2f93ae99 298 buffer[i] = spi.write( 0 );
tmulrooney 23:273a2f93ae99 299 }
tmulrooney 23:273a2f93ae99 300 nss = 1;
tmulrooney 23:273a2f93ae99 301 }
tmulrooney 23:273a2f93ae99 302
tmulrooney 23:273a2f93ae99 303 void SX1272MB1xAS::WriteFifo( uint8_t *buffer, uint8_t size )
tmulrooney 23:273a2f93ae99 304 {
tmulrooney 23:273a2f93ae99 305 debug("WriteFifo\r\n");
tmulrooney 23:273a2f93ae99 306 Write( 0, buffer, size );
tmulrooney 23:273a2f93ae99 307 }
tmulrooney 23:273a2f93ae99 308
tmulrooney 23:273a2f93ae99 309 void SX1272MB1xAS::ReadFifo( uint8_t *buffer, uint8_t size )
tmulrooney 23:273a2f93ae99 310 {
tmulrooney 23:273a2f93ae99 311 debug("ReadFifo\r\n");
tmulrooney 23:273a2f93ae99 312 Read( 0, buffer, size );
tmulrooney 23:273a2f93ae99 313 }