KBrat-SSD645-HW-8_1_SLCD

Fork of SLCD by Erik -

Committer:
Tomo2k
Date:
Sun Mar 23 19:10:10 2014 +0000
Revision:
9:dae947a658f0
Parent:
6:f4773221794b
Added #pragma once guards

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Tomo2k 9:dae947a658f0 1 #pragma once
Sissors 0:d04758e76d5b 2 /*^^^^^^^^^^^^^^^^ LCD HARDWARE CONECTION ^^^^^^^^^^^^^^^^^^^^^^^^*/
star297 1:1579bcd31410 3 #define _LCDFRONTPLANES (8) // # of frontPlanes
star297 1:1579bcd31410 4 #define _LCDBACKPLANES (4) // # of backplanes
Sissors 0:d04758e76d5b 5
Sissors 0:d04758e76d5b 6 /*
Sissors 0:d04758e76d5b 7 LCD logical organization definition
star297 3:f70873bc6121 8 This section indicates how the LCD is distributed how many characteres of (7-seg, 14,seg, 16 seg, or colums in case of Dot Matrix) does it contain
Sissors 0:d04758e76d5b 9 First character is forced only one can be written
Sissors 0:d04758e76d5b 10
Sissors 0:d04758e76d5b 11 */
Sissors 0:d04758e76d5b 12 // HARDWARE_CONFIG Changing LCD pins Allows to verify all LCD pins easily
Tomo2k 6:f4773221794b 13 // if HARDWARE_CONFIG == 0 FRDM-KL46 RevB
Sissors 0:d04758e76d5b 14 // if HARDWARE_CONFIG == 1 FRDM-KL46 RevA
Sissors 0:d04758e76d5b 15 #ifdef FRDM_REVA
Sissors 0:d04758e76d5b 16 #define HARDWARE_CONFIG 1
Sissors 0:d04758e76d5b 17 #else
Sissors 0:d04758e76d5b 18 #define HARDWARE_CONFIG 0
Sissors 0:d04758e76d5b 19 #endif
Sissors 0:d04758e76d5b 20
Sissors 0:d04758e76d5b 21 #define _CHARNUM (4) //number of chars that can be written
Sissors 0:d04758e76d5b 22 #define _CHAR_SIZE (2) // Used only when Dot Matrix is used
star297 3:f70873bc6121 23 #define _LCDTYPE (2) //indicate how many LCD_WF are required to write a single Character
Sissors 0:d04758e76d5b 24
Sissors 0:d04758e76d5b 25 /*
Sissors 0:d04758e76d5b 26 Following definitions indicate how characters are associated to waveform
Sissors 0:d04758e76d5b 27 */
Sissors 0:d04758e76d5b 28 /* Hardware configuration */
Sissors 0:d04758e76d5b 29 #if HARDWARE_CONFIG == 0
Sissors 0:d04758e76d5b 30
Sissors 0:d04758e76d5b 31 // LCD PIN1 to LCDWF0 Rev B
star297 3:f70873bc6121 32 #define CHAR1a 37 // LCD Pin 5
star297 3:f70873bc6121 33 #define CHAR1b 17 // LCD Pin 6
star297 3:f70873bc6121 34 #define CHAR2a 7 // LCD Pin 7
star297 3:f70873bc6121 35 #define CHAR2b 8 // LCD Pin 8
star297 3:f70873bc6121 36 #define CHAR3a 53 // LCD Pin 9
star297 3:f70873bc6121 37 #define CHAR3b 38 // LCD Pin 10
star297 3:f70873bc6121 38 #define CHAR4a 10 // LCD Pin 11
star297 3:f70873bc6121 39 #define CHAR4b 11 // LCD Pin 12
star297 3:f70873bc6121 40 #define CHARCOM0 40 // LCD Pin 1
star297 3:f70873bc6121 41 #define CHARCOM1 52 // LCD Pin 2
star297 3:f70873bc6121 42 #define CHARCOM2 19 // LCD Pin 3
star297 3:f70873bc6121 43 #define CHARCOM3 18 // LCD Pin 4
Sissors 0:d04758e76d5b 44
Sissors 0:d04758e76d5b 45 // LCD PIN1 to LCDWF2 for FRDM-KL46Z
Sissors 0:d04758e76d5b 46 #elif HARDWARE_CONFIG == 1
star297 3:f70873bc6121 47 #define CHAR1a 37 // LCD Pin 5
star297 3:f70873bc6121 48 #define CHAR1b 17 // LCD Pin 6
star297 3:f70873bc6121 49 #define CHAR2a 7 // LCD Pin 7
star297 3:f70873bc6121 50 #define CHAR2b 8 // LCD Pin 8
star297 3:f70873bc6121 51 #define CHAR3a 12 // LCD Pin 9
star297 3:f70873bc6121 52 #define CHAR3b 26 // LCD Pin 10
star297 3:f70873bc6121 53 #define CHAR4a 10 // LCD Pin 11
star297 3:f70873bc6121 54 #define CHAR4b 11 // LCD Pin 12
star297 3:f70873bc6121 55 #define CHARCOM0 51 // LCD Pin 1
star297 3:f70873bc6121 56 #define CHARCOM1 52 // LCD Pin 2
star297 3:f70873bc6121 57 #define CHARCOM2 19 // LCD Pin 3
star297 3:f70873bc6121 58 #define CHARCOM3 16 // LCD Pin 4
Sissors 0:d04758e76d5b 59
Sissors 0:d04758e76d5b 60 #endif
Sissors 0:d04758e76d5b 61
Sissors 0:d04758e76d5b 62
Sissors 0:d04758e76d5b 63 /*Ascii Codification table information */
Sissors 0:d04758e76d5b 64 #define ASCCI_TABLE_START '0' // indicates which is the first Ascii character in the table
Sissors 0:d04758e76d5b 65 #define ASCCI_TABLE_END 'Z' // indicates which is the first Ascii character in the table
Sissors 0:d04758e76d5b 66 #define BLANK_CHARACTER '>' // Indicate which ASCII character is a blank character (depends on ASCII table)
Sissors 0:d04758e76d5b 67
Sissors 0:d04758e76d5b 68 #define _ALLON 0xFF // Used for ALL_on function
Sissors 0:d04758e76d5b 69
Sissors 0:d04758e76d5b 70 #define SEGDP 0x01
Sissors 0:d04758e76d5b 71 #define SEGC 0x02
Sissors 0:d04758e76d5b 72 #define SEGB 0x04
Sissors 0:d04758e76d5b 73 #define SEGA 0x08
Sissors 0:d04758e76d5b 74
Sissors 0:d04758e76d5b 75 #define SEGD 0x01
Sissors 0:d04758e76d5b 76 #define SEGE 0x02
Sissors 0:d04758e76d5b 77 #define SEGG 0x04
Sissors 0:d04758e76d5b 78 #define SEGF 0x08
Sissors 0:d04758e76d5b 79
Sissors 0:d04758e76d5b 80
Sissors 0:d04758e76d5b 81 /* Fault detect initial limits */
Sissors 0:d04758e76d5b 82
Sissors 0:d04758e76d5b 83 /* Fault detect initial parameters and limits */
Sissors 0:d04758e76d5b 84 #define FAULTD_FP_FDPRS FDPRS_32
Sissors 0:d04758e76d5b 85 #define FAULTD_FP_FDSWW FDSWW_128
Sissors 0:d04758e76d5b 86 #define FAULTD_BP_FDPRS FDPRS_64
Sissors 0:d04758e76d5b 87 #define FAULTD_BP_FDSWW FDSWW_128
Sissors 0:d04758e76d5b 88
Sissors 0:d04758e76d5b 89 #define FAULTD_FP_HI 127
Sissors 0:d04758e76d5b 90 #define FAULTD_FP_LO 110
Sissors 0:d04758e76d5b 91 #define FAULTD_BP_HI 127
Sissors 0:d04758e76d5b 92 #define FAULTD_BP_LO 110
Sissors 0:d04758e76d5b 93 #define FAULTD_TIME 6
Sissors 0:d04758e76d5b 94
star297 3:f70873bc6121 95 extern const uint8_t WF_ORDERING_TABLE[]; // Logical Front plane N to LCD_WFx
Sissors 0:d04758e76d5b 96
star297 1:1579bcd31410 97