Dependents:   Kamal_CAN ReadFromSerial446 USNA-UMBC-KF-02_v3-noise USNA-UMBC-KF-01

Files at this revision

API Documentation at this revision

Comitter:
tecnosys
Date:
Sat Jan 30 08:46:04 2010 +0000
Child:
1:dbc44582f2f8
Commit message:

Changed in this revision

mbed.bld Show annotated file Show diff for this revision Revisions of this file
mcp2515.cpp Show annotated file Show diff for this revision Revisions of this file
mcp2515.h Show annotated file Show diff for this revision Revisions of this file
mcp2515_bittime.h Show annotated file Show diff for this revision Revisions of this file
mcp2515_can.h Show annotated file Show diff for this revision Revisions of this file
mcp2515_defs.h Show annotated file Show diff for this revision Revisions of this file
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/mbed.bld	Sat Jan 30 08:46:04 2010 +0000
@@ -0,0 +1,1 @@
+http://mbed.org/users/mbed_official/code/mbed/builds/49a220cc26e0
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/mcp2515.cpp	Sat Jan 30 08:46:04 2010 +0000
@@ -0,0 +1,452 @@
+/******************************************************************************
+ * 
+ * Controller Area Network (CAN) Demo-Application
+ * Atmel AVR with Microchip MCP2515 
+ * 
+ * Copyright (C) 2005 Martin THOMAS, Kaiserslautern, Germany
+ * <eversmith@heizung-thomas.de>
+ * http://www.siwawi.arubi.uni-kl.de/avr_projects
+ *
+ *****************************************************************************
+ *
+ * File    : mcp2515.c
+ * Version : 0.9
+ * 
+ * Summary : MCP2515 "low-level" driver
+ *
+ * Parts of this code are adapted from a MCP2510 sample-application 
+ * by KVASER AB, http://www.kvaser.com (KVASER-code is marked as free)
+ *
+ * This code-module is free to use but you have to keep the copyright
+ * notice.
+ *
+ *
+ *****************************************************************************
+ *
+ * File    : mcp2515.cpp (mbed LPC1768 version)
+ * Version : 0.1
+ *
+ * All credits to the nerds above, this source has been adapted for the 
+ * LPC1768 platform by J.Engelman. And does'nt require and of the copyrighted
+ * SPI or AVR controller code that Martin or co have excluded copyright.
+ * This module remains free.
+ *
+ *
+ *****************************************************************************/
+
+#include "mcp2515.h"
+
+#include <mbed.h>
+#include "mcp2515_can.h"
+#include "mcp2515_defs.h"
+#include "mcp2515_bittime.h"
+
+#define SPI_NULL (0x00)
+
+
+
+mcp2515::mcp2515(PinName mosi, PinName miso, PinName clk, PinName ncs)
+        : _spi(mosi, miso, clk), _ncs(ncs) {
+
+     // _spi.format(8,0);
+     // _spi.frequency(10000000);
+    //_spi.frequency(5000000);
+
+}
+
+
+void mcp2515::_reset() {
+
+    _select();
+    _spi_readwrite(MCP_RESET);
+    _deselect();
+    wait(0.001);
+}
+
+void mcp2515::setRegister(const uint8_t address, const uint8_t value)
+{
+    _select();
+    _spi_readwrite(MCP_WRITE);
+    _spi_readwrite(address);
+    _spi_readwrite(value);
+    _deselect();
+}
+
+uint8_t mcp2515::configRate(const uint8_t canSpeed)
+{
+    uint8_t set, cfg1, cfg2, cfg3;
+    
+    set = 0;
+    
+    switch (canSpeed) {
+        case (CAN_125KBPS) :
+            cfg1 = MCP_4MHz_125kBPS_CFG1 ;
+            cfg2 = MCP_4MHz_125kBPS_CFG2 ;
+            cfg3 = MCP_4MHz_125kBPS_CFG3 ;
+            set = 1;
+            break;
+        case (CAN_20KBPS) :
+            cfg1 = MCP_4MHz_20kBPS_CFG1 ;
+            cfg2 = MCP_4MHz_20kBPS_CFG2 ;
+            cfg3 = MCP_4MHz_20kBPS_CFG3 ;
+            set = 1;
+            break;
+        default:
+            set = 0;
+            break;
+    }
+    
+    if (set) {
+        setRegister(MCP_CNF1, cfg1);
+        setRegister(MCP_CNF2, cfg2);
+        setRegister(MCP_CNF3, cfg3);
+        return MCP2515_OK;
+    }
+    else {
+        return MCP2515_FAIL;
+    }
+} 
+
+uint8_t mcp2515::readRegister(const uint8_t address)
+{
+    uint8_t ret;
+    
+    _select();
+    _spi_readwrite(MCP_READ);
+    _spi_readwrite(address);
+    ret = _spi_read();
+    _deselect();
+    
+    return ret;
+}
+
+void mcp2515::readRegisterS(const uint8_t address, 
+    uint8_t values[], const uint8_t n)
+{
+    uint8_t i;
+    
+    _select();
+    _spi_readwrite(MCP_READ);
+    _spi_readwrite(address);
+    // mcp2515 has auto-increment of address-pointer
+    for (i=0; i<n; i++) {
+        values[i] = _spi_read();
+    }
+    _deselect();
+}
+
+void mcp2515::modifyRegister(const uint8_t address, 
+    const uint8_t mask, const uint8_t data)
+{
+    _select();
+    _spi_readwrite(MCP_BITMOD);
+    _spi_readwrite(address);
+    _spi_readwrite(mask);
+    _spi_readwrite(data);
+    _deselect();
+}
+
+
+uint8_t mcp2515::readXXStatus_helper(const uint8_t cmd)
+{
+    uint8_t i;
+    
+    _select();
+    _spi_readwrite(cmd);
+    i = _spi_read();
+    _deselect();
+    
+    return i;
+}
+    
+uint8_t mcp2515::readStatus(void)
+{
+    return readXXStatus_helper(MCP_READ_STATUS);
+}
+
+uint8_t mcp2515::RXStatus(void)
+{
+    return readXXStatus_helper(MCP_RX_STATUS);
+}
+
+// read-modify-write - better: Bit Modify Instruction
+uint8_t mcp2515::setCANCTRL_Mode(uint8_t newmode)
+{
+    uint8_t i;
+    
+    i = readRegister(MCP_CANCTRL);
+    i &= ~(MODE_MASK);
+    i |= newmode;
+    setRegister(MCP_CANCTRL, i);
+    
+    // verify as advised in datasheet
+    i = readRegister(MCP_CANCTRL);
+    i &= MODE_MASK;
+    if ( i == newmode ) {
+        return MCP2515_OK; 
+    }
+    else {
+        return MCP2515_FAIL;
+    }
+}
+
+
+void mcp2515::setRegisterS(const uint8_t address, 
+    const uint8_t values[], const uint8_t n)
+{
+    uint8_t i;
+    
+    _select();
+    _spi_readwrite(MCP_WRITE);
+    _spi_readwrite(address);
+    // mcp2515 has auto-increment of address-pointer
+    for (i=0; i<n; i++) {
+        _spi_readwrite(values[i]);
+    }
+    _deselect();
+}
+
+void mcp2515::read_can_id( const uint8_t mcp_addr, 
+    uint8_t* ext, uint32_t* can_id )
+{
+    uint8_t tbufdata[4];
+    
+    *ext = 0;
+    *can_id = 0;
+    
+    readRegisterS( mcp_addr, tbufdata, 4 );
+    
+    *can_id = (tbufdata[MCP_SIDH]<<3) + (tbufdata[MCP_SIDL]>>5);
+    
+    if ( (tbufdata[MCP_SIDL] & MCP_TXB_EXIDE_M) ==  MCP_TXB_EXIDE_M ) {
+        // extended id
+        *can_id = (*can_id<<2) + (tbufdata[MCP_SIDL] & 0x03);
+        *can_id <<= 16;
+        *can_id = *can_id +(tbufdata[MCP_EID8]<<8) + tbufdata[MCP_EID0];
+        *ext = 1;
+    }
+}
+
+
+// Buffer can be MCP_RXBUF_0 or MCP_RXBUF_1
+void mcp2515::read_canMsg( const uint8_t buffer_sidh_addr,
+    CANMessage* msg)
+{
+/*
+    uint8_t mcp_addr, ctrl;
+
+    mcp_addr = buffer_sidh_addr;
+    
+    read_can_id( mcp_addr, &(msg->extended_identifier), 
+        &(msg->identifier) );
+    
+    ctrl = readRegister( mcp_addr-1 );
+    msg->dlc = readRegister( mcp_addr+4 );
+    
+    //if ((*dlc & RTR_MASK) || (ctrl & 0x08)) {
+    if ((ctrl & 0x08)) {
+        msg->rtr = 1;
+    } else {
+        msg->rtr = 0;
+    }
+    
+    msg->dlc &= MCP_DLC_MASK;
+    readRegisterS( mcp_addr+5, &(msg->dta[0]), msg->dlc );
+    */
+}
+
+
+void mcp2515::write_can_id( const uint8_t mcp_addr, 
+    const uint8_t ext, const uint32_t can_id )
+{
+    uint16_t canid;
+    uint8_t tbufdata[4];
+    
+    canid = (uint16_t)(can_id & 0x0FFFF);
+    
+    if ( ext == 1) {
+        tbufdata[MCP_EID0] = (uint8_t) (canid & 0xFF);
+        tbufdata[MCP_EID8] = (uint8_t) (canid / 256);
+        canid = (uint16_t)( can_id / 0x10000L );
+        tbufdata[MCP_SIDL] = (uint8_t) (canid & 0x03);
+        tbufdata[MCP_SIDL] += (uint8_t) ((canid & 0x1C )*8);
+        tbufdata[MCP_SIDL] |= MCP_TXB_EXIDE_M;
+        tbufdata[MCP_SIDH] = (uint8_t) (canid / 32 );
+    }
+    else {
+        tbufdata[MCP_SIDH] = (uint8_t) (canid / 8 );
+        tbufdata[MCP_SIDL] = (uint8_t) ((canid & 0x07 )*32);
+        tbufdata[MCP_EID0] = 0;
+        tbufdata[MCP_EID8] = 0;
+    }
+    setRegisterS( mcp_addr, tbufdata, 4 );
+}
+
+// Buffer can be MCP_TXBUF_0 MCP_TXBUF_1 or MCP_TXBUF_2
+void mcp2515::write_canMsg( const uint8_t buffer_sidh_addr, 
+     CANMessage* msg)
+{
+    uint8_t mcp_addr, dlc;
+
+    mcp_addr = buffer_sidh_addr;
+    dlc = msg->len;
+    
+    setRegisterS(mcp_addr+5, &(msg->data[0]), dlc );  // write data bytes
+    write_can_id( mcp_addr, msg->format,
+        msg->id );  // write CAN id
+    if ( msg->type == 1)  dlc |= MCP_RTR_MASK;  // if RTR set bit in byte
+    setRegister( (mcp_addr+4), dlc );  // write the RTR and DLC
+}
+
+void mcp2515::start_transmit(const uint8_t buffer_sidh_addr)
+{
+	// TXBnCTRL_addr = TXBnSIDH_addr - 1
+   modifyRegister( buffer_sidh_addr-1 , MCP_TXB_TXREQ_M, 
+		MCP_TXB_TXREQ_M );
+}
+
+uint8_t mcp2515::getNextFreeTXBuf(uint8_t *txbuf_n)
+{
+	uint8_t res, i, ctrlval;
+	uint8_t ctrlregs[MCP_N_TXBUFFERS] = { MCP_TXB0CTRL, MCP_TXB1CTRL, MCP_TXB2CTRL };
+	
+	res = MCP_ALLTXBUSY;
+	*txbuf_n = 0x00;
+	
+	// check all 3 TX-Buffers
+	for (i=0; i<MCP_N_TXBUFFERS; i++) {
+		ctrlval = readRegister( ctrlregs[i] );
+		if ( (ctrlval & MCP_TXB_TXREQ_M) == 0 ) {
+
+			*txbuf_n = ctrlregs[i]+1; // return SIDH-address of Buffer
+			res = MCP2515_OK;
+			return res; /* ! function exit */
+		}
+	}
+	
+	return res;
+}
+
+void mcp2515::initCANBuffers(void)
+{
+    uint8_t i, a1, a2, a3;
+    
+    // TODO: check why this is needed to receive extended 
+    //   and standard frames
+    // Mark all filter bits as don't care:
+    write_can_id(MCP_RXM0SIDH, 0, 0);
+    write_can_id(MCP_RXM1SIDH, 0, 0);
+    // Anyway, set all filters to 0:
+    write_can_id(MCP_RXF0SIDH, 1, 0); // RXB0: extended 
+    write_can_id(MCP_RXF1SIDH, 0, 0); //       AND standard
+    write_can_id(MCP_RXF2SIDH, 1, 0); // RXB1: extended 
+    write_can_id(MCP_RXF3SIDH, 0, 0); //       AND standard
+    write_can_id(MCP_RXF4SIDH, 0, 0);
+    write_can_id(MCP_RXF5SIDH, 0, 0);
+    
+    // Clear, deactivate the three transmit buffers
+    // TXBnCTRL -> TXBnD7
+    a1 = MCP_TXB0CTRL;
+    a2 = MCP_TXB1CTRL;
+    a3 = MCP_TXB2CTRL;
+    for (i = 0; i < 14; i++) { // in-buffer loop
+        setRegister(a1, 0);
+        setRegister(a2, 0);
+        setRegister(a3, 0);
+        a1++;
+        a2++;
+        a3++;
+    }
+    
+    // and clear, deactivate the two receive buffers.
+    setRegister(MCP_RXB0CTRL, 0);
+    setRegister(MCP_RXB1CTRL, 0);
+}
+
+uint8_t mcp2515::init(const uint8_t canSpeed)
+{
+    uint8_t res;
+    
+    _deselect();
+    //MCP_CS_DDR |= ( 1 << MCP_CS_BIT );
+    
+    _reset();
+    
+    res = setCANCTRL_Mode(MODE_CONFIG);
+    
+    if ( res == MCP2515_FAIL ){
+     printf("FAIL here");
+     return res;  /* function exit on error */
+    }
+    res = configRate(canSpeed);
+    
+    if ( res == MCP2515_OK ) {
+        initCANBuffers();
+        
+
+        // enable both receive-buffers to receive messages
+        // with std. and ext. identifiers
+        // and enable rollover
+        modifyRegister(MCP_RXB0CTRL, 
+            MCP_RXB_RX_MASK | MCP_RXB_BUKT_MASK, 
+            MCP_RXB_RX_STDEXT | MCP_RXB_BUKT_MASK );
+        modifyRegister(MCP_RXB1CTRL, MCP_RXB_RX_MASK, 
+            MCP_RXB_RX_STDEXT);
+
+    }
+    
+    return res;
+}
+
+/*
+ * Select function
+ */
+ 
+void mcp2515::_select() {
+//printf("{");
+    _ncs = 0;
+}
+
+
+/*
+ * Deselect function
+ */
+
+void mcp2515::_deselect() {
+    _ncs = 1;
+//printf("}");
+}
+
+int mcp2515::status() {
+    int status = 0;
+    _select();
+    _spi.write(0xd7);
+    status = (_spi.write(0x00) << 8 );
+    status |= _spi.write(0x00);
+    _deselect();
+    return status;
+}
+
+void mcp2515::_pollbusy() {
+    volatile int busy = 1;
+    while (busy) {
+        // if bit 7 is set, we can proceed
+        if ( status() & 0x80 ) {
+            busy = 0;
+        }
+    }
+}
+
+
+uint8_t mcp2515::_spi_readwrite(uint8_t data)
+{
+     //printf("W0x%x ", data);
+      uint8_t ret = _spi.write(data);
+       //     printf("R0x%x,", ret);
+    return ret;
+}
+
+uint8_t mcp2515::_spi_read(void)
+{
+    return _spi_readwrite(SPI_NULL);
+}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/mcp2515.h	Sat Jan 30 08:46:04 2010 +0000
@@ -0,0 +1,106 @@
+
+#ifndef _MCP2515_H_
+#define _MCP2515_H_
+
+#include <mbed.h>
+#include "mcp2515_defs.h"
+
+#define MCPDEBUG (1)
+#define MCPDEBUG_TXBUF (0)
+
+#define MCP_CS_PORT PORTB
+#define MCP_CS_DDR  DDRB
+#define MCP_CS_BIT  PB0
+
+#define MCP_N_TXBUFFERS (3)
+
+#define MCP_RXBUF_0 (MCP_RXB0SIDH)
+#define MCP_RXBUF_1 (MCP_RXB1SIDH)
+
+#define MCP_TXBUF_0 (MCP_TXB0SIDH)
+#define MCP_TXBUF_1 (MCP_TXB1SIDH)
+#define MCP_TXBUF_2 (MCP_TXB2SIDH)
+
+// #define MCP2515_SELECT() (SPI_SS_LOW())
+// #define MCP2515_UNSELECT() (SPI_SS_HIGH())
+
+#define MCP2515_SELECT()   ( MCP_CS_PORT &= ~(1<<MCP_CS_BIT) )
+#define MCP2515_UNSELECT() ( MCP_CS_PORT |=  (1<<MCP_CS_BIT) )
+
+#define MCP2515_OK         (0)
+#define MCP2515_FAIL       (1)
+#define MCP_ALLTXBUSY      (2)
+
+typedef unsigned char u8;
+
+// Connections to the chip
+//volatile bit mcp2515_rst @ PORTC . 1;
+//volatile bit mcp2515_rst_tris @ TRISC . 1;
+
+// Function declarations
+/*
+void can_reset();
+char can_read_register(char reg);
+void can_write_bits(char address, char data, char mask);
+void can_init(short id);
+char can_peek_message();
+char can_rx_byte();
+void can_set_id(short id); 
+void can_init_buffer();
+void can_load_byte(char input);
+void can_tx_buffer();
+void can_read_status();
+*/
+
+#include "mbed.h"
+#include "SPI.h"
+        class mcp2515  {
+        public:
+            mcp2515(PinName mosi, PinName miso, PinName clk, PinName ncs);
+           // float read (void);
+           // void setThigh (float);
+           // void setTlow (float);
+           // float getThigh (void);
+           // float getTlow (void);
+            virtual void _reset();
+            uint8_t configRate(const uint8_t canSpeed);
+            void    setRegister(const uint8_t address, const uint8_t value);
+            
+            uint8_t readRegister(const uint8_t address);
+            void    modifyRegister(const uint8_t address, const uint8_t mask, const uint8_t data);
+            uint8_t setCANCTRL_Mode(uint8_t newmode);
+            uint8_t init(const uint8_t canSpeed);
+            void    initCANBuffers(void);
+            void    setRegisterS(const uint8_t address, const uint8_t values[], const uint8_t n);
+            void    write_can_id( const uint8_t mcp_addr, const uint8_t ext, const uint32_t can_id );
+            //
+            
+            void    readRegisterS(const uint8_t address, uint8_t values[], const uint8_t n);
+            uint8_t readXXStatus_helper(const uint8_t cmd);
+            uint8_t readStatus(void);
+            uint8_t RXStatus(void);
+
+            void read_can_id( const uint8_t mcp_addr, uint8_t* ext, uint32_t* can_id );
+            void read_canMsg( const uint8_t buffer_sidh_addr, CANMessage* msg);
+            void write_canMsg( const uint8_t buffer_sidh_addr,  CANMessage* msg);
+    
+            uint8_t getNextFreeTXBuf(uint8_t *txbuf_n);
+    
+            void start_transmit(const uint8_t buffer_sidh_addr);
+            
+            SPI _spi;
+            DigitalOut _ncs;   
+        // Private functions
+        private :   
+            void _select (void);               
+            void _deselect (void);       
+            int status();
+           void _pollbusy() ;
+           
+            uint8_t _spi_readwrite(uint8_t data);
+            uint8_t _spi_read(void);
+         
+           
+        };
+
+#endif // _MCP2515_H_
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/mcp2515_bittime.h	Sat Jan 30 08:46:04 2010 +0000
@@ -0,0 +1,125 @@
+/******************************************************************************
+ * 
+ * Controller Area Network (CAN) Demo-Application
+ * Atmel AVR with Microchip MCP2515 
+ * 
+ * Copyright (C) 2005 Martin THOMAS, Kaiserslautern, Germany
+ * <eversmith@heizung-thomas.de>
+ * http://www.siwawi.arubi.uni-kl.de/avr_projects
+ *
+ *****************************************************************************
+ *
+ * File    : mcp2515_bittime.h
+ * Version : 0.9
+ * 
+ * Summary : MCP2515 CAN-timing values. Calculated with 
+ *           a spreadsheet-based "Preprocessor" with information
+ *           from the MCP2515 and AT90CAN128 datasheets.
+ *
+ *****************************************************************************/
+
+#include "mcp2515_defs.h"
+
+/*-----------------------*/
+/* global settings       */
+/*-----------------------*/
+
+/* CFG3 */
+
+// Start of Frame SOF (CLKOUT)
+// either SOF_ENABLE or SOF_DISABLE
+#define MCP_GENERAL_SOF (SOF_DISABLE)
+
+// Wake up Filter (WAKFIL)
+// either WAKFIL_ENABLE    or WAKFIL_DISABLE
+#define MCP_GENERAL_WAKFIL (WAKFIL_DISABLE)
+
+
+/*-----------------------*/
+/* 125 kBPS @ 4MHZ F_OSC */
+/*-----------------------*/
+
+/* CNF1 */
+
+// SJW as defined in mcp_defs.h
+// here: SJW = 1*TQ
+#define MCP_4MHz_125kBPS_SJW (SJW1)
+
+// Prescaler = (BRP+1)*2
+// here Prescaler = 4 -> BRP=1
+#define MCP_4MHz_125kBPS_BRP (1)
+
+
+/* CNF2 */
+
+// BLT-Mode defined in CNF3 (0 or BTLMODE from mcp_defs.h)
+#define MCP_4MHz_125kBPS_BLTMODE (BTLMODE)
+
+// 3 samples (SAMPLE_3X) or 1 sample (SAMPLE_1X)
+#define MCP_4MHz_125kBPS_SAM   (SAMPLE_1X)
+
+// (Phase Segment 1) PHSEG1 = PS1 - 1
+// here: PS1 calculated as 2 
+#define MCP_4MHz_125kBPS_PHSEG1 ((2-1)<<3)
+
+// (Propagation Delay) PRSEG = PRSEQTQ-1
+// here PRSEQTQ = 2
+#define MCP_4MHz_125kBPS_PRSEG (2-1)
+
+/* CNF3 */
+
+// (Phase Segment 2) PHSEG2 = PS2 - 1
+// here: PS2 calculated as 3
+#define MCP_4MHz_125kBPS_PHSEG (3-1)
+
+
+#define MCP_4MHz_125kBPS_CFG1 (MCP_4MHz_125kBPS_SJW | MCP_4MHz_125kBPS_BRP)
+#define MCP_4MHz_125kBPS_CFG2 (MCP_4MHz_125kBPS_BLTMODE | MCP_4MHz_125kBPS_SAM | \
+                MCP_4MHz_125kBPS_PHSEG1 | MCP_4MHz_125kBPS_PRSEG)
+#define MCP_4MHz_125kBPS_CFG3 (MCP_GENERAL_SOF | MCP_GENERAL_WAKFIL | \
+                MCP_4MHz_125kBPS_PHSEG)
+
+
+/*-----------------------*/
+/* 20 kBPS @ 4MHZ F_OSC  */
+/*-----------------------*/
+
+/* CNF1 */
+
+// SJW as defined in mcp_defs.h
+// here: SJW = 1*TQ
+#define MCP_4MHz_20kBPS_SJW (SJW1)
+
+// Prescaler = (BRP+1)*2
+// here Prescaler = 10 -> BRP=4  (20TQ)
+#define MCP_4MHz_20kBPS_BRP (4)
+
+
+/* CNF2 */
+
+// BLT-Mode defined in CNF3 (0 or BTLMODE from mcp_defs.h)
+#define MCP_4MHz_20kBPS_BLTMODE (BTLMODE)
+
+// 3 samples (SAMPLE_1X) or 1 sample (SAMPLE_1X)
+#define MCP_4MHz_20kBPS_SAM   (SAMPLE_1X)
+
+// (Phase Segment 1) PHSEG1 = PS1 - 1
+// here: PS1 calculated as 8
+#define MCP_4MHz_20kBPS_PHSEG1 ((8-1)<<3)
+
+// (Propagation Delay) PRSEG = PRSEQTQ-1
+// here PRSEQTQ = 3
+#define MCP_4MHz_20kBPS_PRSEG (3-1)
+
+/* CNF3 */
+
+// (Phase Segment 2) PHSEG2 = PS2 - 1
+// here: PS2 calculated as 8
+#define MCP_4MHz_20kBPS_PHSEG (8-1)
+
+
+#define MCP_4MHz_20kBPS_CFG1 (MCP_4MHz_20kBPS_SJW | MCP_4MHz_20kBPS_BRP)
+#define MCP_4MHz_20kBPS_CFG2 (MCP_4MHz_20kBPS_BLTMODE | MCP_4MHz_20kBPS_SAM | \
+                MCP_4MHz_20kBPS_PHSEG1 | MCP_4MHz_20kBPS_PRSEG)
+#define MCP_4MHz_20kBPS_CFG3 (MCP_GENERAL_SOF | MCP_GENERAL_WAKFIL | \
+                MCP_4MHz_20kBPS_PHSEG)
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/mcp2515_can.h	Sat Jan 30 08:46:04 2010 +0000
@@ -0,0 +1,35 @@
+#ifndef MCP2515_CAN_H_
+#define MCP2515_CAN_H_
+
+#define CANDEBUG   1
+
+#define CANUSELOOP 0
+
+#define CANSENDTIMEOUT (200) /* milliseconds */
+
+// initial value of gCANAutoProcess
+#define CANAUTOPROCESS (1)
+#define CANAUTOON  (1)
+#define CANAUTOOFF (0)
+
+#define CAN_STDID (0)
+#define CAN_EXTID (1)
+
+#define CANDEFAULTIDENT    (0x55CC)
+#define CANDEFAULTIDENTEXT (CAN_EXTID)
+
+#define CAN_20KBPS   (1)
+#define CAN_125KBPS  (CAN_20KBPS+1)
+
+#define CAN_OK         (0)
+#define CAN_FAILINIT   (1)
+#define CAN_FAILTX     (2)
+#define CAN_MSGAVAIL   (3)
+#define CAN_NOMSG      (4)
+#define CAN_CTRLERROR  (5)
+#define CAN_FAIL       (0xff)
+
+#define CAN_MAX_CHAR_IN_MESSAGE (8)
+
+
+#endif
\ No newline at end of file
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/mcp2515_defs.h	Sat Jan 30 08:46:04 2010 +0000
@@ -0,0 +1,215 @@
+/* from Microchip Example */
+
+#ifndef MCP2515_DEFS_H_
+#define MCP2515_DEFS_H_
+
+/*
+mcp2515_defs.h
+
+This file contains constants that are specific to the MCP2515.
+
+Version     Date        Description
+----------------------------------------------------------------------
+v1.00       2003/12/11  Initial release
+Copyright 2003 Kimberly Otten Software Consulting
+
+Changes M. Thomas:
+- rename to mcp2515_defs.h
+- added handy definitions from kvaser-sample
+- status-bits
+
+*/
+
+// Begin mt
+#define MCP_SIDH        0
+#define MCP_SIDL        1
+#define MCP_EID8        2
+#define MCP_EID0        3
+
+#define MCP_TXB_EXIDE_M     0x08    /* In TXBnSIDL */
+#define MCP_DLC_MASK        0x0F    /* 4 LSBits */
+#define MCP_RTR_MASK        0x40    /* (1<<6) Bit 6 */
+
+#define MCP_RXB_RX_ANY      0x60
+#define MCP_RXB_RX_EXT      0x40
+#define MCP_RXB_RX_STD      0x20
+#define MCP_RXB_RX_STDEXT   0x00
+#define MCP_RXB_RX_MASK     0x60
+#define MCP_RXB_BUKT_MASK   (1<<2)
+
+/*
+** Bits in the TXBnCTRL registers.
+*/
+#define MCP_TXB_TXBUFE_M    0x80
+#define MCP_TXB_ABTF_M      0x40
+#define MCP_TXB_MLOA_M      0x20
+#define MCP_TXB_TXERR_M     0x10
+#define MCP_TXB_TXREQ_M     0x08
+#define MCP_TXB_TXIE_M      0x04
+#define MCP_TXB_TXP10_M     0x03
+
+#define MCP_TXB_RTR_M       0x40    // In TXBnDLC
+#define MCP_RXB_IDE_M       0x08    // In RXBnSIDL
+#define MCP_RXB_RTR_M       0x40    // In RXBnDLC
+
+#define MCP_STAT_RXIF_MASK   (0x03)
+#define MCP_STAT_RX0IF (1<<0)
+#define MCP_STAT_RX1IF (1<<1)
+
+#define MCP_EFLG_RX1OVR (1<<7)
+#define MCP_EFLG_RX0OVR (1<<6)
+#define MCP_EFLG_TXBO   (1<<5)
+#define MCP_EFLG_TXEP   (1<<4)
+#define MCP_EFLG_RXEP   (1<<3)
+#define MCP_EFLG_TXWAR  (1<<2)
+#define MCP_EFLG_RXWAR  (1<<1)
+#define MCP_EFLG_EWARN  (1<<0)
+#define MCP_EFLG_ERRORMASK  (0xF8) /* 5 MS-Bits */
+
+// End mt
+
+
+// Define MCP2515 register addresses
+
+#define MCP_RXF0SIDH	0x00
+#define MCP_RXF0SIDL	0x01
+#define MCP_RXF0EID8	0x02
+#define MCP_RXF0EID0	0x03
+#define MCP_RXF1SIDH	0x04
+#define MCP_RXF1SIDL	0x05
+#define MCP_RXF1EID8	0x06
+#define MCP_RXF1EID0	0x07
+#define MCP_RXF2SIDH	0x08
+#define MCP_RXF2SIDL	0x09
+#define MCP_RXF2EID8	0x0A
+#define MCP_RXF2EID0	0x0B
+#define MCP_CANSTAT		0x0E
+#define MCP_CANCTRL		0x0F
+#define MCP_RXF3SIDH	0x10
+#define MCP_RXF3SIDL	0x11
+#define MCP_RXF3EID8	0x12
+#define MCP_RXF3EID0	0x13
+#define MCP_RXF4SIDH	0x14
+#define MCP_RXF4SIDL	0x15
+#define MCP_RXF4EID8	0x16
+#define MCP_RXF4EID0	0x17
+#define MCP_RXF5SIDH	0x18
+#define MCP_RXF5SIDL	0x19
+#define MCP_RXF5EID8	0x1A
+#define MCP_RXF5EID0	0x1B
+#define MCP_TEC			0x1C
+#define MCP_REC			0x1D
+#define MCP_RXM0SIDH	0x20
+#define MCP_RXM0SIDL	0x21
+#define MCP_RXM0EID8	0x22
+#define MCP_RXM0EID0	0x23
+#define MCP_RXM1SIDH	0x24
+#define MCP_RXM1SIDL	0x25
+#define MCP_RXM1EID8	0x26
+#define MCP_RXM1EID0	0x27
+#define MCP_CNF3		0x28
+#define MCP_CNF2		0x29
+#define MCP_CNF1		0x2A
+#define MCP_CANINTE		0x2B
+#define MCP_CANINTF		0x2C
+#define MCP_EFLG		0x2D
+#define MCP_TXB0CTRL	0x30
+#define MCP_TXB1CTRL	0x40
+#define MCP_TXB2CTRL	0x50
+#define MCP_RXB0CTRL	0x60
+#define MCP_RXB0SIDH	0x61
+#define MCP_RXB1CTRL	0x70
+#define MCP_RXB1SIDH	0x71
+
+
+#define MCP_TX_INT		0x1C		// Enable all transmit interrupts
+#define MCP_TX01_INT	0x0C		// Enable TXB0 and TXB1 interrupts
+#define MCP_RX_INT		0x03		// Enable receive interrupts
+#define MCP_NO_INT		0x00		// Disable all interrupts
+
+#define MCP_TX01_MASK	0x14
+#define MCP_TX_MASK		0x54
+
+// Define SPI Instruction Set
+
+#define MCP_WRITE		0x02
+
+#define MCP_READ		0x03
+
+#define MCP_BITMOD		0x05
+
+#define MCP_LOAD_TX0	0x40
+#define MCP_LOAD_TX1	0x42
+#define MCP_LOAD_TX2	0x44
+
+#define MCP_RTS_TX0		0x81
+#define MCP_RTS_TX1		0x82
+#define MCP_RTS_TX2		0x84
+#define MCP_RTS_ALL		0x87
+
+#define MCP_READ_RX0	0x90
+#define MCP_READ_RX1	0x94
+
+#define MCP_READ_STATUS	0xA0
+
+#define MCP_RX_STATUS	0xB0
+
+#define MCP_RESET		0xC0
+
+
+// CANCTRL Register Values
+
+#define MODE_NORMAL     0x00
+#define MODE_SLEEP      0x20
+#define MODE_LOOPBACK   0x40
+#define MODE_LISTENONLY 0x60
+#define MODE_CONFIG     0x80
+#define MODE_POWERUP	0xE0
+#define MODE_MASK		0xE0
+#define ABORT_TX        0x10
+#define MODE_ONESHOT	0x08
+#define CLKOUT_ENABLE	0x04
+#define CLKOUT_DISABLE	0x00
+#define CLKOUT_PS1		0x00
+#define CLKOUT_PS2		0x01
+#define CLKOUT_PS4		0x02
+#define CLKOUT_PS8		0x03
+
+
+// CNF1 Register Values
+
+#define SJW1            0x00
+#define SJW2            0x40
+#define SJW3            0x80
+#define SJW4            0xC0
+
+
+// CNF2 Register Values
+
+#define BTLMODE			0x80
+#define SAMPLE_1X       0x00
+#define SAMPLE_3X       0x40
+
+
+// CNF3 Register Values
+
+#define SOF_ENABLE		0x80
+#define SOF_DISABLE		0x00
+#define WAKFIL_ENABLE	0x40
+#define WAKFIL_DISABLE	0x00
+
+
+// CANINTF Register Bits
+
+#define MCP_RX0IF		0x01
+#define MCP_RX1IF		0x02
+#define MCP_TX0IF		0x04
+#define MCP_TX1IF		0x08
+#define MCP_TX2IF		0x10
+#define MCP_ERRIF		0x20
+#define MCP_WAKIF		0x40
+#define MCP_MERRF		0x80
+
+
+
+#endif