Tapio Valli / SDRAM_DISCO_F746NG_BlockDevice

SDRAM_DISCO_F746NG_BlockDevice

Dependents:   DISCO-F746NG_SDRAMBlockDevice

Fork of SDRAM_DISCO_F746NG by ST

SDRAM_DISCO_F746NG_BlockDevice.cpp@1:36b940e6b8d2, 2018-03-08 (annotated)

Committer:
tapiov
Date:
Thu Mar 08 20:14:42 2018 +0000
Revision:
1:36b940e6b8d2
First commit to publish

Who changed what in which revision?

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tapiov 1:36b940e6b8d2 1 /* Copyright (c) 2010-2016 mbed.org, MIT License
tapiov 1:36b940e6b8d2 2 *
tapiov 1:36b940e6b8d2 3 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
tapiov 1:36b940e6b8d2 4 * and associated documentation files (the "Software"), to deal in the Software without
tapiov 1:36b940e6b8d2 5 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
tapiov 1:36b940e6b8d2 6 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
tapiov 1:36b940e6b8d2 7 * Software is furnished to do so, subject to the following conditions:
tapiov 1:36b940e6b8d2 8 *
tapiov 1:36b940e6b8d2 9 * The above copyright notice and this permission notice shall be included in all copies or
tapiov 1:36b940e6b8d2 10 * substantial portions of the Software.
tapiov 1:36b940e6b8d2 11 *
tapiov 1:36b940e6b8d2 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
tapiov 1:36b940e6b8d2 13 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
tapiov 1:36b940e6b8d2 14 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
tapiov 1:36b940e6b8d2 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
tapiov 1:36b940e6b8d2 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
tapiov 1:36b940e6b8d2 17 */
tapiov 1:36b940e6b8d2 18
tapiov 1:36b940e6b8d2 19 #include <inttypes.h>
tapiov 1:36b940e6b8d2 20 #include "SDRAM_DISCO_F746NG_BlockDevice.h"
tapiov 1:36b940e6b8d2 21
tapiov 1:36b940e6b8d2 22 // Constructor
tapiov 1:36b940e6b8d2 23 //SDRAM_DISCO_F746NG_BlockDevice::SDRAM_DISCO_F746NG_BlockDevice()
tapiov 1:36b940e6b8d2 24 //{
tapiov 1:36b940e6b8d2 25 // BSP_SDRAM_Init();
tapiov 1:36b940e6b8d2 26 //}
tapiov 1:36b940e6b8d2 27
tapiov 1:36b940e6b8d2 28 // Destructor
tapiov 1:36b940e6b8d2 29 //SDRAM_DISCO_F746NG_BlockDevice::~SDRAM_DISCO_F746NG_BlockDevice()
tapiov 1:36b940e6b8d2 30 //{
tapiov 1:36b940e6b8d2 31 // BSP_SDRAM_DeInit();
tapiov 1:36b940e6b8d2 32
tapiov 1:36b940e6b8d2 33 //}
tapiov 1:36b940e6b8d2 34
tapiov 1:36b940e6b8d2 35 //=================================================================================================================
tapiov 1:36b940e6b8d2 36 // Public methods
tapiov 1:36b940e6b8d2 37 //=================================================================================================================
tapiov 1:36b940e6b8d2 38
tapiov 1:36b940e6b8d2 39 int SDRAM_DISCO_F746NG_BlockDevice::init()
tapiov 1:36b940e6b8d2 40 //uint8_t SDRAM_DISCO_F746NG::Init(void)
tapiov 1:36b940e6b8d2 41 {
tapiov 1:36b940e6b8d2 42 return BSP_SDRAM_Init();
tapiov 1:36b940e6b8d2 43 }
tapiov 1:36b940e6b8d2 44
tapiov 1:36b940e6b8d2 45 int SDRAM_DISCO_F746NG_BlockDevice::deinit()
tapiov 1:36b940e6b8d2 46 {
tapiov 1:36b940e6b8d2 47 return BSP_SDRAM_DeInit();
tapiov 1:36b940e6b8d2 48 }
tapiov 1:36b940e6b8d2 49
tapiov 1:36b940e6b8d2 50 void SDRAM_DISCO_F746NG_BlockDevice::Initialization_sequence(uint32_t RefreshCount)
tapiov 1:36b940e6b8d2 51 {
tapiov 1:36b940e6b8d2 52 BSP_SDRAM_Initialization_sequence(RefreshCount);
tapiov 1:36b940e6b8d2 53 }
tapiov 1:36b940e6b8d2 54
tapiov 1:36b940e6b8d2 55 int SDRAM_DISCO_F746NG_BlockDevice::read(void * pData, bd_addr_t uwStartAddress, bd_size_t uwDataSize)
tapiov 1:36b940e6b8d2 56 //uint8_t SDRAM_DISCO_F746NG::ReadData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize)
tapiov 1:36b940e6b8d2 57 {
tapiov 1:36b940e6b8d2 58 return BSP_SDRAM_ReadData(uwStartAddress,(uint32_t *) pData, uwDataSize);
tapiov 1:36b940e6b8d2 59 }
tapiov 1:36b940e6b8d2 60
tapiov 1:36b940e6b8d2 61 uint8_t SDRAM_DISCO_F746NG_BlockDevice::ReadData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize)
tapiov 1:36b940e6b8d2 62 {
tapiov 1:36b940e6b8d2 63 return BSP_SDRAM_ReadData_DMA(uwStartAddress, pData, uwDataSize);
tapiov 1:36b940e6b8d2 64 }
tapiov 1:36b940e6b8d2 65
tapiov 1:36b940e6b8d2 66 int SDRAM_DISCO_F746NG_BlockDevice::program(const void *pData, bd_addr_t uwStartAddress, bd_size_t uwDataSize)
tapiov 1:36b940e6b8d2 67 //uint8_t SDRAM_DISCO_F746NG::WriteData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize)
tapiov 1:36b940e6b8d2 68 {
tapiov 1:36b940e6b8d2 69 return BSP_SDRAM_WriteData(uwStartAddress, (uint32_t *) pData, uwDataSize);
tapiov 1:36b940e6b8d2 70 }
tapiov 1:36b940e6b8d2 71
tapiov 1:36b940e6b8d2 72 uint8_t SDRAM_DISCO_F746NG_BlockDevice::WriteData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize)
tapiov 1:36b940e6b8d2 73 {
tapiov 1:36b940e6b8d2 74 return BSP_SDRAM_WriteData_DMA(uwStartAddress, pData, uwDataSize);
tapiov 1:36b940e6b8d2 75 }
tapiov 1:36b940e6b8d2 76
tapiov 1:36b940e6b8d2 77 uint8_t SDRAM_DISCO_F746NG_BlockDevice::Sendcmd(FMC_SDRAM_CommandTypeDef *SdramCmd)
tapiov 1:36b940e6b8d2 78 {
tapiov 1:36b940e6b8d2 79 return BSP_SDRAM_Sendcmd(SdramCmd);
tapiov 1:36b940e6b8d2 80 }
tapiov 1:36b940e6b8d2 81
tapiov 1:36b940e6b8d2 82 int SDRAM_DISCO_F746NG_BlockDevice::erase(bd_addr_t addr, bd_size_t size)
tapiov 1:36b940e6b8d2 83 {
tapiov 1:36b940e6b8d2 84 uint32_t tmpIndex;
tapiov 1:36b940e6b8d2 85 uint32_t Value = 0;
tapiov 1:36b940e6b8d2 86 uint64_t PSize = SDRAM_DISCO_F746NG_BlockDevice::get_program_size();
tapiov 1:36b940e6b8d2 87 uint64_t DSize = SDRAM_DISCO_F746NG_BlockDevice::size();
tapiov 1:36b940e6b8d2 88
tapiov 1:36b940e6b8d2 89 uint32_t UDSize=(uint32_t) DSize;
tapiov 1:36b940e6b8d2 90 uint32_t UPSize=(uint32_t) PSize;
tapiov 1:36b940e6b8d2 91 uint32_t UAddr=(uint32_t) addr;
tapiov 1:36b940e6b8d2 92
tapiov 1:36b940e6b8d2 93 uint32_t *pBuffer = (uint32_t *)malloc(UPSize * sizeof(uint32_t));;
tapiov 1:36b940e6b8d2 94
tapiov 1:36b940e6b8d2 95 printf("Erase starting ");
tapiov 1:36b940e6b8d2 96
tapiov 1:36b940e6b8d2 97 printf("pBuffer mallocated ");
tapiov 1:36b940e6b8d2 98
tapiov 1:36b940e6b8d2 99 // Fill buffer with zeroes
tapiov 1:36b940e6b8d2 100 for (tmpIndex = 0; tmpIndex<UPSize; tmpIndex++ ) {
tapiov 1:36b940e6b8d2 101 pBuffer[tmpIndex] = Value;
tapiov 1:36b940e6b8d2 102 }
tapiov 1:36b940e6b8d2 103
tapiov 1:36b940e6b8d2 104 printf("pBuffer written\n");
tapiov 1:36b940e6b8d2 105
tapiov 1:36b940e6b8d2 106 printf("DSize %lu ", UDSize);
tapiov 1:36b940e6b8d2 107 printf("PSize %lu\n", UPSize);
tapiov 1:36b940e6b8d2 108
tapiov 1:36b940e6b8d2 109 // Write the buffer to fill whole device
tapiov 1:36b940e6b8d2 110 for (tmpIndex = 0; tmpIndex<(UDSize/UPSize); tmpIndex++ ) {
tapiov 1:36b940e6b8d2 111 // printf("Index %lu WAddr %#032x% %#032x% %lu EndIndex %lu \n", tmpIndex,(SDRAM_DEVICE_ADDR + UAddr+(tmpIndex*UPSize)),&pBuffer,(UDSize/UPSize));
tapiov 1:36b940e6b8d2 112 // wait(1);
tapiov 1:36b940e6b8d2 113 BSP_SDRAM_WriteData((SDRAM_DEVICE_ADDR + UAddr+(tmpIndex*UPSize)),pBuffer,UPSize);
tapiov 1:36b940e6b8d2 114 }
tapiov 1:36b940e6b8d2 115
tapiov 1:36b940e6b8d2 116 free(pBuffer);
tapiov 1:36b940e6b8d2 117 pBuffer=NULL;
tapiov 1:36b940e6b8d2 118 return 0;
tapiov 1:36b940e6b8d2 119 }
tapiov 1:36b940e6b8d2 120
tapiov 1:36b940e6b8d2 121 bd_size_t SDRAM_DISCO_F746NG_BlockDevice::get_read_size() const
tapiov 1:36b940e6b8d2 122 {
tapiov 1:36b940e6b8d2 123 return 1024;
tapiov 1:36b940e6b8d2 124 }
tapiov 1:36b940e6b8d2 125
tapiov 1:36b940e6b8d2 126 bd_size_t SDRAM_DISCO_F746NG_BlockDevice::get_program_size() const
tapiov 1:36b940e6b8d2 127 {
tapiov 1:36b940e6b8d2 128 return 1024;
tapiov 1:36b940e6b8d2 129 }
tapiov 1:36b940e6b8d2 130
tapiov 1:36b940e6b8d2 131 bd_size_t SDRAM_DISCO_F746NG_BlockDevice::get_erase_size() const
tapiov 1:36b940e6b8d2 132 {
tapiov 1:36b940e6b8d2 133 return 1048576;
tapiov 1:36b940e6b8d2 134 }
tapiov 1:36b940e6b8d2 135
tapiov 1:36b940e6b8d2 136 bd_size_t SDRAM_DISCO_F746NG_BlockDevice::size() const
tapiov 1:36b940e6b8d2 137 {
tapiov 1:36b940e6b8d2 138 return 1048576;
tapiov 1:36b940e6b8d2 139 }