Greg Steiert / pegasus_dev

Dependents:   blinky_max32630fthr

Committer:
switches
Date:
Fri Nov 11 20:59:50 2016 +0000
Revision:
0:5c4d7b2438d3
Initial commit

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switches 0:5c4d7b2438d3 1 /**
switches 0:5c4d7b2438d3 2 * @file
switches 0:5c4d7b2438d3 3 * @brief Modular Arithmetic Accelerator (MAA) API Function Implementations.
switches 0:5c4d7b2438d3 4 */
switches 0:5c4d7b2438d3 5 /* *****************************************************************************
switches 0:5c4d7b2438d3 6 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
switches 0:5c4d7b2438d3 7 *
switches 0:5c4d7b2438d3 8 * Permission is hereby granted, free of charge, to any person obtaining a
switches 0:5c4d7b2438d3 9 * copy of this software and associated documentation files (the "Software"),
switches 0:5c4d7b2438d3 10 * to deal in the Software without restriction, including without limitation
switches 0:5c4d7b2438d3 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
switches 0:5c4d7b2438d3 12 * and/or sell copies of the Software, and to permit persons to whom the
switches 0:5c4d7b2438d3 13 * Software is furnished to do so, subject to the following conditions:
switches 0:5c4d7b2438d3 14 *
switches 0:5c4d7b2438d3 15 * The above copyright notice and this permission notice shall be included
switches 0:5c4d7b2438d3 16 * in all copies or substantial portions of the Software.
switches 0:5c4d7b2438d3 17 *
switches 0:5c4d7b2438d3 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
switches 0:5c4d7b2438d3 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
switches 0:5c4d7b2438d3 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
switches 0:5c4d7b2438d3 21 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
switches 0:5c4d7b2438d3 22 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
switches 0:5c4d7b2438d3 23 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
switches 0:5c4d7b2438d3 24 * OTHER DEALINGS IN THE SOFTWARE.
switches 0:5c4d7b2438d3 25 *
switches 0:5c4d7b2438d3 26 * Except as contained in this notice, the name of Maxim Integrated
switches 0:5c4d7b2438d3 27 * Products, Inc. shall not be used except as stated in the Maxim Integrated
switches 0:5c4d7b2438d3 28 * Products, Inc. Branding Policy.
switches 0:5c4d7b2438d3 29 *
switches 0:5c4d7b2438d3 30 * The mere transfer of this software does not imply any licenses
switches 0:5c4d7b2438d3 31 * of trade secrets, proprietary technology, copyrights, patents,
switches 0:5c4d7b2438d3 32 * trademarks, maskwork rights, or any other form of intellectual
switches 0:5c4d7b2438d3 33 * property whatsoever. Maxim Integrated Products, Inc. retains all
switches 0:5c4d7b2438d3 34 * ownership rights.
switches 0:5c4d7b2438d3 35 *
switches 0:5c4d7b2438d3 36 **************************************************************************** */
switches 0:5c4d7b2438d3 37
switches 0:5c4d7b2438d3 38 /* **** Includes **** */
switches 0:5c4d7b2438d3 39 #include <string.h>
switches 0:5c4d7b2438d3 40 #include "mxc_assert.h"
switches 0:5c4d7b2438d3 41 #include "mxc_lock.h"
switches 0:5c4d7b2438d3 42 #include "mxc_sys.h"
switches 0:5c4d7b2438d3 43 #include "maa.h"
switches 0:5c4d7b2438d3 44
switches 0:5c4d7b2438d3 45 /**
switches 0:5c4d7b2438d3 46 * @ingroup maa
switches 0:5c4d7b2438d3 47 * @{
switches 0:5c4d7b2438d3 48 */
switches 0:5c4d7b2438d3 49
switches 0:5c4d7b2438d3 50 ///@cond
switches 0:5c4d7b2438d3 51 #define maa_is_running() (MXC_MAA->ctrl & MXC_F_MAA_CTRL_START ? 1 : 0)
switches 0:5c4d7b2438d3 52
switches 0:5c4d7b2438d3 53 /**
switches 0:5c4d7b2438d3 54 * Macro that translates from #mxc_maa_reg_select_t to a pointer for MAA memory operations.
switches 0:5c4d7b2438d3 55 */
switches 0:5c4d7b2438d3 56 #define UMAA_REGFILE_TO_ADDR(base, x) ((base + (MXC_MAA_HALF_SIZE * x)))
switches 0:5c4d7b2438d3 57
switches 0:5c4d7b2438d3 58 /**
switches 0:5c4d7b2438d3 59 * Macro that adjusts the pointer so that it is pointing to the last 32-bit word in the maa (sub-)segment
switches 0:5c4d7b2438d3 60 */
switches 0:5c4d7b2438d3 61 #define UMAA_ADDR_INDEX_LAST_32BIT(x) ((uint8_t *)x + (MXC_MAA_HALF_SIZE-4))
switches 0:5c4d7b2438d3 62 ///@endcond
switches 0:5c4d7b2438d3 63
switches 0:5c4d7b2438d3 64
switches 0:5c4d7b2438d3 65 /* ************************************************************************* */
switches 0:5c4d7b2438d3 66 mxc_maa_ret_t MAA_Init(void)
switches 0:5c4d7b2438d3 67 {
switches 0:5c4d7b2438d3 68 SYS_MAA_Init();
switches 0:5c4d7b2438d3 69
switches 0:5c4d7b2438d3 70 return MXC_E_MAA_OK;
switches 0:5c4d7b2438d3 71 }
switches 0:5c4d7b2438d3 72
switches 0:5c4d7b2438d3 73 /* ************************************************************************* */
switches 0:5c4d7b2438d3 74 mxc_maa_ret_t MAA_WipeRAM(void)
switches 0:5c4d7b2438d3 75 {
switches 0:5c4d7b2438d3 76 /* Check for running MAA */
switches 0:5c4d7b2438d3 77 if (maa_is_running()) {
switches 0:5c4d7b2438d3 78 return MXC_E_MAA_ERR;
switches 0:5c4d7b2438d3 79 }
switches 0:5c4d7b2438d3 80
switches 0:5c4d7b2438d3 81 /* Clear register files */
switches 0:5c4d7b2438d3 82 memset((void *)MXC_MAA_MEM->seg0, 0, sizeof(MXC_MAA_MEM->seg0));
switches 0:5c4d7b2438d3 83 memset((void *)MXC_MAA_MEM->seg1, 0, sizeof(MXC_MAA_MEM->seg1));
switches 0:5c4d7b2438d3 84 memset((void *)MXC_MAA_MEM->seg2, 0, sizeof(MXC_MAA_MEM->seg2));
switches 0:5c4d7b2438d3 85 memset((void *)MXC_MAA_MEM->seg3, 0, sizeof(MXC_MAA_MEM->seg3));
switches 0:5c4d7b2438d3 86 memset((void *)MXC_MAA_MEM->seg4, 0, sizeof(MXC_MAA_MEM->seg4));
switches 0:5c4d7b2438d3 87 memset((void *)MXC_MAA_MEM->seg5, 0, sizeof(MXC_MAA_MEM->seg5));
switches 0:5c4d7b2438d3 88
switches 0:5c4d7b2438d3 89 return MXC_E_MAA_OK;
switches 0:5c4d7b2438d3 90 }
switches 0:5c4d7b2438d3 91
switches 0:5c4d7b2438d3 92 /* ************************************************************************* */
switches 0:5c4d7b2438d3 93 mxc_maa_ret_t MAA_Load(mxc_maa_reg_select_t regfile, const uint8_t *data, unsigned int size, mxc_maa_endian_select_t flag)
switches 0:5c4d7b2438d3 94 {
switches 0:5c4d7b2438d3 95 uint32_t *maaptr;
switches 0:5c4d7b2438d3 96 uint32_t fill;
switches 0:5c4d7b2438d3 97 unsigned int zerotmp;
switches 0:5c4d7b2438d3 98
switches 0:5c4d7b2438d3 99 if ((regfile > MXC_E_REG_51) || (size > MXC_MAA_REG_SIZE)) {
switches 0:5c4d7b2438d3 100 /* Out of range */
switches 0:5c4d7b2438d3 101 return MXC_E_MAA_ERR;
switches 0:5c4d7b2438d3 102 }
switches 0:5c4d7b2438d3 103
switches 0:5c4d7b2438d3 104 if (flag == MXC_MAA_F_MEM_REVERSE) {
switches 0:5c4d7b2438d3 105 /* This is not currently implemented */
switches 0:5c4d7b2438d3 106 return MXC_E_MAA_ERR;
switches 0:5c4d7b2438d3 107 }
switches 0:5c4d7b2438d3 108
switches 0:5c4d7b2438d3 109 maaptr = (uint32_t *)UMAA_REGFILE_TO_ADDR(MXC_BASE_MAA_MEM, regfile);
switches 0:5c4d7b2438d3 110
switches 0:5c4d7b2438d3 111 /*
switches 0:5c4d7b2438d3 112 * MAA (sub-)segments must be loaded with zero pad to a 64-bit boundary, or the "garbage bits"
switches 0:5c4d7b2438d3 113 * will case erroneous results.
switches 0:5c4d7b2438d3 114 */
switches 0:5c4d7b2438d3 115 /* Find the ceiling for the closest 64-bit boundary based on the selected MAWS */
switches 0:5c4d7b2438d3 116 zerotmp = (((MXC_MAA->maws & MXC_F_MAA_MAWS_MODLEN) >> MXC_F_MAA_MAWS_MODLEN_POS) + 63) & 0xfc0;
switches 0:5c4d7b2438d3 117 /* Convert to bytes */
switches 0:5c4d7b2438d3 118 zerotmp /= 8;
switches 0:5c4d7b2438d3 119
switches 0:5c4d7b2438d3 120 /* Fill uMAA memory in long word sized chunks */
switches 0:5c4d7b2438d3 121 while (size > 3) {
switches 0:5c4d7b2438d3 122 *maaptr++ = (data[3] << 24) + (data[2] << 16) + (data[1] << 8) + data[0];
switches 0:5c4d7b2438d3 123 data += 4;
switches 0:5c4d7b2438d3 124 size -= 4;
switches 0:5c4d7b2438d3 125 zerotmp = (zerotmp > 4) ? (zerotmp - 4) : 0;
switches 0:5c4d7b2438d3 126 }
switches 0:5c4d7b2438d3 127
switches 0:5c4d7b2438d3 128 /* Remainder */
switches 0:5c4d7b2438d3 129 if (size) {
switches 0:5c4d7b2438d3 130 fill = data[0];
switches 0:5c4d7b2438d3 131 fill |= ((size > 1) ? (data[1] << 8) : 0);
switches 0:5c4d7b2438d3 132 fill |= ((size > 2) ? (data[2] << 16) : 0);
switches 0:5c4d7b2438d3 133 *maaptr++ = fill;
switches 0:5c4d7b2438d3 134
switches 0:5c4d7b2438d3 135 /* We just filled 4 bytes in this section */
switches 0:5c4d7b2438d3 136 zerotmp = (zerotmp > 4) ? (zerotmp - 4) : 0;
switches 0:5c4d7b2438d3 137 }
switches 0:5c4d7b2438d3 138
switches 0:5c4d7b2438d3 139 /* Wipe the remaining "garbage bits" */
switches 0:5c4d7b2438d3 140 while (zerotmp) {
switches 0:5c4d7b2438d3 141 *maaptr++ = 0;
switches 0:5c4d7b2438d3 142 zerotmp = (zerotmp > 4) ? (zerotmp - 4) : 0;
switches 0:5c4d7b2438d3 143 }
switches 0:5c4d7b2438d3 144
switches 0:5c4d7b2438d3 145 return MXC_E_MAA_OK;
switches 0:5c4d7b2438d3 146 }
switches 0:5c4d7b2438d3 147
switches 0:5c4d7b2438d3 148 /* ************************************************************************* */
switches 0:5c4d7b2438d3 149 mxc_maa_ret_t MAA_Unload(mxc_maa_reg_select_t regfile, uint8_t *data, unsigned int size, mxc_maa_endian_select_t flag)
switches 0:5c4d7b2438d3 150 {
switches 0:5c4d7b2438d3 151 uint32_t *maaptr;
switches 0:5c4d7b2438d3 152 uint32_t fill;
switches 0:5c4d7b2438d3 153
switches 0:5c4d7b2438d3 154 if ((regfile > MXC_E_REG_51) || (size > MXC_MAA_REG_SIZE)) {
switches 0:5c4d7b2438d3 155 /* Out of range */
switches 0:5c4d7b2438d3 156 return MXC_E_MAA_ERR;
switches 0:5c4d7b2438d3 157 }
switches 0:5c4d7b2438d3 158
switches 0:5c4d7b2438d3 159 if (flag == MXC_MAA_F_MEM_REVERSE) {
switches 0:5c4d7b2438d3 160 /* This is not currently implemented */
switches 0:5c4d7b2438d3 161 return MXC_E_MAA_ERR;
switches 0:5c4d7b2438d3 162 }
switches 0:5c4d7b2438d3 163
switches 0:5c4d7b2438d3 164 maaptr = (uint32_t *)UMAA_REGFILE_TO_ADDR(MXC_BASE_MAA_MEM, regfile);
switches 0:5c4d7b2438d3 165
switches 0:5c4d7b2438d3 166 /* Unload uMAA memory in long word sized chunks */
switches 0:5c4d7b2438d3 167 while (size > 3) {
switches 0:5c4d7b2438d3 168 fill = *maaptr++;
switches 0:5c4d7b2438d3 169 data[0] = fill & 0xff;
switches 0:5c4d7b2438d3 170 data[1] = (fill >> 8) & 0xff;
switches 0:5c4d7b2438d3 171 data[2] = (fill >> 16) & 0xff;
switches 0:5c4d7b2438d3 172 data[3] = (fill >> 24) & 0xff;
switches 0:5c4d7b2438d3 173 data += 4;
switches 0:5c4d7b2438d3 174 size -= 4;
switches 0:5c4d7b2438d3 175 }
switches 0:5c4d7b2438d3 176
switches 0:5c4d7b2438d3 177 /* Remainder */
switches 0:5c4d7b2438d3 178 if (size) {
switches 0:5c4d7b2438d3 179 fill = *maaptr;
switches 0:5c4d7b2438d3 180 data[0] = fill & 0xff;
switches 0:5c4d7b2438d3 181 if (size > 1) {
switches 0:5c4d7b2438d3 182 data[1] = (fill >> 8) & 0xff;
switches 0:5c4d7b2438d3 183 }
switches 0:5c4d7b2438d3 184 if (size > 2) {
switches 0:5c4d7b2438d3 185 data[2] = (fill >> 16) & 0xff;
switches 0:5c4d7b2438d3 186 }
switches 0:5c4d7b2438d3 187 }
switches 0:5c4d7b2438d3 188
switches 0:5c4d7b2438d3 189 return MXC_E_MAA_OK;
switches 0:5c4d7b2438d3 190 }
switches 0:5c4d7b2438d3 191
switches 0:5c4d7b2438d3 192 /* ************************************************************************* */
switches 0:5c4d7b2438d3 193 mxc_maa_ret_t MAA_Run(mxc_maa_operation_t op,
switches 0:5c4d7b2438d3 194 mxc_maa_reg_select_t al, mxc_maa_reg_select_t bl,
switches 0:5c4d7b2438d3 195 mxc_maa_reg_select_t rl, mxc_maa_reg_select_t tl)
switches 0:5c4d7b2438d3 196 {
switches 0:5c4d7b2438d3 197 if (maa_is_running()) {
switches 0:5c4d7b2438d3 198 /* Attempt to start the MAA while already running */
switches 0:5c4d7b2438d3 199 return MXC_E_MAA_ERR;
switches 0:5c4d7b2438d3 200 }
switches 0:5c4d7b2438d3 201
switches 0:5c4d7b2438d3 202 /* Clear out any previous flags */
switches 0:5c4d7b2438d3 203 MXC_MAA->ctrl = 0x00000020;
switches 0:5c4d7b2438d3 204
switches 0:5c4d7b2438d3 205 /* Construct memory segment selections, select operation, and start the uMAA */
switches 0:5c4d7b2438d3 206 MXC_MAA->ctrl = (((al << MXC_F_MAA_CTRL_SEG_A_POS) & MXC_F_MAA_CTRL_SEG_A) |
switches 0:5c4d7b2438d3 207 ((bl << MXC_F_MAA_CTRL_SEG_B_POS) & MXC_F_MAA_CTRL_SEG_B) |
switches 0:5c4d7b2438d3 208 ((rl << MXC_F_MAA_CTRL_SEG_RES_POS) & MXC_F_MAA_CTRL_SEG_RES) |
switches 0:5c4d7b2438d3 209 ((tl << MXC_F_MAA_CTRL_SEG_TMP_POS) & MXC_F_MAA_CTRL_SEG_TMP) |
switches 0:5c4d7b2438d3 210 ((op << MXC_F_MAA_CTRL_OPSEL_POS) & MXC_F_MAA_CTRL_OPSEL) |
switches 0:5c4d7b2438d3 211 MXC_F_MAA_CTRL_START);
switches 0:5c4d7b2438d3 212
switches 0:5c4d7b2438d3 213 /* Blocking wait for uMAA to complete. */
switches 0:5c4d7b2438d3 214 while ((MXC_MAA->ctrl & MXC_F_MAA_CTRL_IF_DONE) == 0);
switches 0:5c4d7b2438d3 215
switches 0:5c4d7b2438d3 216 if (MXC_MAA->ctrl & MXC_F_MAA_CTRL_IF_ERROR) {
switches 0:5c4d7b2438d3 217 /* MAA signaled error */
switches 0:5c4d7b2438d3 218 return MXC_E_MAA_ERR;
switches 0:5c4d7b2438d3 219 }
switches 0:5c4d7b2438d3 220
switches 0:5c4d7b2438d3 221 return MXC_E_MAA_OK;
switches 0:5c4d7b2438d3 222 }
switches 0:5c4d7b2438d3 223
switches 0:5c4d7b2438d3 224 /* ************************************************************************* */
switches 0:5c4d7b2438d3 225 mxc_maa_ret_t MAA_SetWordSize(unsigned int len)
switches 0:5c4d7b2438d3 226 {
switches 0:5c4d7b2438d3 227 if ((len > MXC_MAA_REG_SIZE_BITS) || maa_is_running()) {
switches 0:5c4d7b2438d3 228 return MXC_E_MAA_ERR;
switches 0:5c4d7b2438d3 229 }
switches 0:5c4d7b2438d3 230
switches 0:5c4d7b2438d3 231 /* Set bit length for calculation, and disable endian swap */
switches 0:5c4d7b2438d3 232 MXC_MAA->maws = ((len << MXC_F_MAA_MAWS_MODLEN_POS) & MXC_F_MAA_MAWS_MODLEN);
switches 0:5c4d7b2438d3 233
switches 0:5c4d7b2438d3 234 return MXC_E_MAA_OK;
switches 0:5c4d7b2438d3 235 }
switches 0:5c4d7b2438d3 236 /**@} end of ingroup maa */