Greg Steiert / pegasus_dev

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Dependents:   blinky_max32630fthr

hal/storage_abstraction/Driver_Storage.h@0:5c4d7b2438d3, 2016-11-11 (annotated)

Committer:
switches
Date:
Fri Nov 11 20:59:50 2016 +0000
Revision:
0:5c4d7b2438d3
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
switches 0:5c4d7b2438d3 1
switches 0:5c4d7b2438d3 2 /** \addtogroup hal */
switches 0:5c4d7b2438d3 3 /** @{*/
switches 0:5c4d7b2438d3 4 /*
switches 0:5c4d7b2438d3 5 * Copyright (c) 2006-2016, ARM Limited, All Rights Reserved
switches 0:5c4d7b2438d3 6 * SPDX-License-Identifier: Apache-2.0
switches 0:5c4d7b2438d3 7 *
switches 0:5c4d7b2438d3 8 * Licensed under the Apache License, Version 2.0 (the "License"); you may
switches 0:5c4d7b2438d3 9 * not use this file except in compliance with the License.
switches 0:5c4d7b2438d3 10 * You may obtain a copy of the License at
switches 0:5c4d7b2438d3 11 *
switches 0:5c4d7b2438d3 12 * http://www.apache.org/licenses/LICENSE-2.0
switches 0:5c4d7b2438d3 13 *
switches 0:5c4d7b2438d3 14 * Unless required by applicable law or agreed to in writing, software
switches 0:5c4d7b2438d3 15 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
switches 0:5c4d7b2438d3 16 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
switches 0:5c4d7b2438d3 17 * See the License for the specific language governing permissions and
switches 0:5c4d7b2438d3 18 * limitations under the License.
switches 0:5c4d7b2438d3 19 */
switches 0:5c4d7b2438d3 20
switches 0:5c4d7b2438d3 21 #ifndef __DRIVER_STORAGE_H
switches 0:5c4d7b2438d3 22 #define __DRIVER_STORAGE_H
switches 0:5c4d7b2438d3 23
switches 0:5c4d7b2438d3 24 #include <stdint.h>
switches 0:5c4d7b2438d3 25
switches 0:5c4d7b2438d3 26 #ifdef __cplusplus
switches 0:5c4d7b2438d3 27 extern "C" {
switches 0:5c4d7b2438d3 28 #endif // __cplusplus
switches 0:5c4d7b2438d3 29
switches 0:5c4d7b2438d3 30 #include "Driver_Common.h"
switches 0:5c4d7b2438d3 31
switches 0:5c4d7b2438d3 32 #define ARM_STORAGE_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,00) /* API version */
switches 0:5c4d7b2438d3 33
switches 0:5c4d7b2438d3 34
switches 0:5c4d7b2438d3 35 #define _ARM_Driver_Storage_(n) Driver_Storage##n
switches 0:5c4d7b2438d3 36 #define ARM_Driver_Storage_(n) _ARM_Driver_Storage_(n)
switches 0:5c4d7b2438d3 37
switches 0:5c4d7b2438d3 38 #define ARM_STORAGE_INVALID_OFFSET (0xFFFFFFFFFFFFFFFFULL) ///< Invalid address (relative to a storage controller's
switches 0:5c4d7b2438d3 39 ///< address space). A storage block may never start at this address.
switches 0:5c4d7b2438d3 40
switches 0:5c4d7b2438d3 41 #define ARM_STORAGE_INVALID_ADDRESS (0xFFFFFFFFUL) ///< Invalid address within the processor's memory address space.
switches 0:5c4d7b2438d3 42 ///< Refer to memory-mapped storage, i.e. < \ref ARM_DRIVER_STORAGE::ResolveAddress().
switches 0:5c4d7b2438d3 43
switches 0:5c4d7b2438d3 44 /****** Storage specific error codes *****/
switches 0:5c4d7b2438d3 45 #define ARM_STORAGE_ERROR_NOT_ERASABLE (ARM_DRIVER_ERROR_SPECIFIC - 1) ///< Part (or all) of the range provided to Erase() isn't erasable.
switches 0:5c4d7b2438d3 46 #define ARM_STORAGE_ERROR_NOT_PROGRAMMABLE (ARM_DRIVER_ERROR_SPECIFIC - 2) ///< Part (or all) of the range provided to ProgramData() isn't programmable.
switches 0:5c4d7b2438d3 47 #define ARM_STORAGE_ERROR_PROTECTED (ARM_DRIVER_ERROR_SPECIFIC - 3) ///< Part (or all) of the range to Erase() or ProgramData() is protected.
switches 0:5c4d7b2438d3 48 #define ARM_STORAGE_ERROR_RUNTIME_OR_INTEGRITY_FAILURE (ARM_DRIVER_ERROR_SPECIFIC - 4) ///< Runtime or sanity-check failure.
switches 0:5c4d7b2438d3 49
switches 0:5c4d7b2438d3 50 /**
switches 0:5c4d7b2438d3 51 * \brief Attributes of the storage range within a storage block.
switches 0:5c4d7b2438d3 52 */
switches 0:5c4d7b2438d3 53 typedef struct _ARM_STORAGE_BLOCK_ATTRIBUTES {
switches 0:5c4d7b2438d3 54 uint32_t erasable : 1; ///< Erasing blocks is permitted with a minimum granularity of 'erase_unit'.
switches 0:5c4d7b2438d3 55 ///< @note: if 'erasable' is 0--i.e. the 'erase' operation isn't available--then
switches 0:5c4d7b2438d3 56 ///< 'erase_unit' (see below) is immaterial and should be 0.
switches 0:5c4d7b2438d3 57 uint32_t programmable : 1; ///< Writing to ranges is permitted with a minimum granularity of 'program_unit'.
switches 0:5c4d7b2438d3 58 ///< Writes are typically achieved through the ProgramData operation (following an erase);
switches 0:5c4d7b2438d3 59 ///< if storage isn't erasable (see 'erasable' above) but is memory-mapped
switches 0:5c4d7b2438d3 60 ///< (i.e. 'memory_mapped'), it can be written directly using memory-store operations.
switches 0:5c4d7b2438d3 61 uint32_t executable : 1; ///< This storage block can hold program data; the processor can fetch and execute code
switches 0:5c4d7b2438d3 62 ///< sourced from it. Often this is accompanied with the device being 'memory_mapped' (see \ref ARM_STORAGE_INFO).
switches 0:5c4d7b2438d3 63 uint32_t protectable : 1; ///< The entire block can be protected from program and erase operations. Once protection
switches 0:5c4d7b2438d3 64 ///< is enabled for a block, its 'erasable' and 'programmable' bits are turned off.
switches 0:5c4d7b2438d3 65 uint32_t reserved : 28;
switches 0:5c4d7b2438d3 66 uint32_t erase_unit; ///< Minimum erase size in bytes.
switches 0:5c4d7b2438d3 67 ///< The offset of the start of the erase-range should also be aligned with this value.
switches 0:5c4d7b2438d3 68 ///< Applicable if the 'erasable' attribute is set for the block.
switches 0:5c4d7b2438d3 69 ///< @note: if 'erasable' (see above) is 0--i.e. the 'erase' operation isn't available--then
switches 0:5c4d7b2438d3 70 ///< 'erase_unit' is immaterial and should be 0.
switches 0:5c4d7b2438d3 71 uint32_t protection_unit; ///< Minimum protectable size in bytes. Applicable if the 'protectable'
switches 0:5c4d7b2438d3 72 ///< attribute is set for the block. This should be a divisor of the block's size. A
switches 0:5c4d7b2438d3 73 ///< block can be considered to be made up of consecutive, individually-protectable fragments.
switches 0:5c4d7b2438d3 74 } ARM_STORAGE_BLOCK_ATTRIBUTES;
switches 0:5c4d7b2438d3 75
switches 0:5c4d7b2438d3 76 /**
switches 0:5c4d7b2438d3 77 * \brief A storage block is a range of memory with uniform attributes. Storage blocks
switches 0:5c4d7b2438d3 78 * combine to make up the address map of a storage controller.
switches 0:5c4d7b2438d3 79 */
switches 0:5c4d7b2438d3 80 typedef struct _ARM_STORAGE_BLOCK {
switches 0:5c4d7b2438d3 81 uint64_t addr; ///< This is the start address of the storage block. It is
switches 0:5c4d7b2438d3 82 ///< expressed as an offset from the start of the storage map
switches 0:5c4d7b2438d3 83 ///< maintained by the owning storage controller.
switches 0:5c4d7b2438d3 84 uint64_t size; ///< This is the size of the storage block, in units of bytes.
switches 0:5c4d7b2438d3 85 ///< Together with addr, it describes a range [addr, addr+size).
switches 0:5c4d7b2438d3 86 ARM_STORAGE_BLOCK_ATTRIBUTES attributes; ///< Attributes for this block.
switches 0:5c4d7b2438d3 87 } ARM_STORAGE_BLOCK;
switches 0:5c4d7b2438d3 88
switches 0:5c4d7b2438d3 89 /**
switches 0:5c4d7b2438d3 90 * The check for a valid ARM_STORAGE_BLOCK.
switches 0:5c4d7b2438d3 91 */
switches 0:5c4d7b2438d3 92 #define ARM_STORAGE_VALID_BLOCK(BLK) (((BLK)->addr != ARM_STORAGE_INVALID_OFFSET) && ((BLK)->size != 0))
switches 0:5c4d7b2438d3 93
switches 0:5c4d7b2438d3 94 /**
switches 0:5c4d7b2438d3 95 * \brief Values for encoding storage memory-types with respect to programmability.
switches 0:5c4d7b2438d3 96 *
switches 0:5c4d7b2438d3 97 * Please ensure that the maximum of the following memory types doesn't exceed 16; we
switches 0:5c4d7b2438d3 98 * encode this in a 4-bit field within ARM_STORAGE_INFO::programmability.
switches 0:5c4d7b2438d3 99 */
switches 0:5c4d7b2438d3 100 #define ARM_STORAGE_PROGRAMMABILITY_RAM (0x0)
switches 0:5c4d7b2438d3 101 #define ARM_STORAGE_PROGRAMMABILITY_ROM (0x1) ///< Read-only memory.
switches 0:5c4d7b2438d3 102 #define ARM_STORAGE_PROGRAMMABILITY_WORM (0x2) ///< write-once-read-only-memory (WORM).
switches 0:5c4d7b2438d3 103 #define ARM_STORAGE_PROGRAMMABILITY_ERASABLE (0x3) ///< re-programmable based on erase. Supports multiple writes.
switches 0:5c4d7b2438d3 104
switches 0:5c4d7b2438d3 105 /**
switches 0:5c4d7b2438d3 106 * Values for encoding data-retention levels for storage blocks.
switches 0:5c4d7b2438d3 107 *
switches 0:5c4d7b2438d3 108 * Please ensure that the maximum of the following retention types doesn't exceed 16; we
switches 0:5c4d7b2438d3 109 * encode this in a 4-bit field within ARM_STORAGE_INFO::retention_level.
switches 0:5c4d7b2438d3 110 */
switches 0:5c4d7b2438d3 111 #define ARM_RETENTION_WHILE_DEVICE_ACTIVE (0x0) ///< Data is retained only during device activity.
switches 0:5c4d7b2438d3 112 #define ARM_RETENTION_ACROSS_SLEEP (0x1) ///< Data is retained across processor sleep.
switches 0:5c4d7b2438d3 113 #define ARM_RETENTION_ACROSS_DEEP_SLEEP (0x2) ///< Data is retained across processor deep-sleep.
switches 0:5c4d7b2438d3 114 #define ARM_RETENTION_BATTERY_BACKED (0x3) ///< Data is battery-backed. Device can be powered off.
switches 0:5c4d7b2438d3 115 #define ARM_RETENTION_NVM (0x4) ///< Data is retained in non-volatile memory.
switches 0:5c4d7b2438d3 116
switches 0:5c4d7b2438d3 117 /**
switches 0:5c4d7b2438d3 118 * Device Data Security Protection Features. Applicable mostly to EXTERNAL_NVM.
switches 0:5c4d7b2438d3 119 */
switches 0:5c4d7b2438d3 120 typedef struct _ARM_STORAGE_SECURITY_FEATURES {
switches 0:5c4d7b2438d3 121 uint32_t acls : 1; ///< Protection against internal software attacks using ACLs.
switches 0:5c4d7b2438d3 122 uint32_t rollback_protection : 1; ///< Roll-back protection. Set to true if the creator of the storage
switches 0:5c4d7b2438d3 123 ///< can ensure that an external attacker can't force an
switches 0:5c4d7b2438d3 124 ///< older firmware to run or to revert back to a previous state.
switches 0:5c4d7b2438d3 125 uint32_t tamper_proof : 1; ///< Tamper-proof memory (will be deleted on tamper-attempts using board level or chip level sensors).
switches 0:5c4d7b2438d3 126 uint32_t internal_flash : 1; ///< Internal flash.
switches 0:5c4d7b2438d3 127 uint32_t reserved1 : 12;
switches 0:5c4d7b2438d3 128
switches 0:5c4d7b2438d3 129 /**
switches 0:5c4d7b2438d3 130 * Encode support for hardening against various classes of attacks.
switches 0:5c4d7b2438d3 131 */
switches 0:5c4d7b2438d3 132 uint32_t software_attacks : 1; ///< device software (malware running on the device).
switches 0:5c4d7b2438d3 133 uint32_t board_level_attacks : 1; ///< board level attacks (debug probes, copy protection fuses.)
switches 0:5c4d7b2438d3 134 uint32_t chip_level_attacks : 1; ///< chip level attacks (tamper-protection).
switches 0:5c4d7b2438d3 135 uint32_t side_channel_attacks : 1; ///< side channel attacks.
switches 0:5c4d7b2438d3 136 uint32_t reserved2 : 12;
switches 0:5c4d7b2438d3 137 } ARM_STORAGE_SECURITY_FEATURES;
switches 0:5c4d7b2438d3 138
switches 0:5c4d7b2438d3 139 #define ARM_STORAGE_PROGRAM_CYCLES_INFINITE (0UL) /**< Infinite or unknown endurance for reprogramming. */
switches 0:5c4d7b2438d3 140
switches 0:5c4d7b2438d3 141 /**
switches 0:5c4d7b2438d3 142 * \brief Storage information. This contains device-metadata. It is the return
switches 0:5c4d7b2438d3 143 * value from calling GetInfo() on the storage driver.
switches 0:5c4d7b2438d3 144 *
switches 0:5c4d7b2438d3 145 * \details These fields serve a different purpose than the ones contained in
switches 0:5c4d7b2438d3 146 * \ref ARM_STORAGE_CAPABILITIES, which is another structure containing
switches 0:5c4d7b2438d3 147 * device-level metadata. ARM_STORAGE_CAPABILITIES describes the API
switches 0:5c4d7b2438d3 148 * capabilities, whereas ARM_STORAGE_INFO describes the device. Furthermore
switches 0:5c4d7b2438d3 149 * ARM_STORAGE_CAPABILITIES fits within a single word, and is designed to be
switches 0:5c4d7b2438d3 150 * passed around by value; ARM_STORAGE_INFO, on the other hand, contains
switches 0:5c4d7b2438d3 151 * metadata which doesn't fit into a single word and requires the use of
switches 0:5c4d7b2438d3 152 * pointers to be moved around.
switches 0:5c4d7b2438d3 153 */
switches 0:5c4d7b2438d3 154 typedef struct _ARM_STORAGE_INFO {
switches 0:5c4d7b2438d3 155 uint64_t total_storage; ///< Total available storage, in bytes.
switches 0:5c4d7b2438d3 156 uint32_t program_unit; ///< Minimum programming size in bytes.
switches 0:5c4d7b2438d3 157 ///< The offset of the start of the program-range should also be aligned with this value.
switches 0:5c4d7b2438d3 158 ///< Applicable only if the 'programmable' attribute is set for a block.
switches 0:5c4d7b2438d3 159 ///< @note: setting program_unit to 0 has the effect of disabling the size and alignment
switches 0:5c4d7b2438d3 160 ///< restrictions (setting it to 1 also has the same effect).
switches 0:5c4d7b2438d3 161 uint32_t optimal_program_unit; ///< Optimal programming page-size in bytes. Some storage controllers
switches 0:5c4d7b2438d3 162 ///< have internal buffers into which to receive data. Writing in chunks of
switches 0:5c4d7b2438d3 163 ///< 'optimal_program_unit' would achieve maximum programming speed.
switches 0:5c4d7b2438d3 164 ///< Applicable only if the 'programmable' attribute is set for the underlying block(s).
switches 0:5c4d7b2438d3 165 uint32_t program_cycles; ///< A measure of endurance for reprogramming.
switches 0:5c4d7b2438d3 166 ///< Use ARM_STORAGE_PROGRAM_CYCLES_INFINITE for infinite or unknown endurance.
switches 0:5c4d7b2438d3 167 uint32_t erased_value : 1; ///< Contents of erased memory (usually 1 to indicate erased bytes with state 0xFF).
switches 0:5c4d7b2438d3 168 uint32_t memory_mapped : 1; ///< This storage device has a mapping onto the processor's memory address space.
switches 0:5c4d7b2438d3 169 ///< @note: For a memory-mapped block which isn't erasable but is programmable (i.e. if
switches 0:5c4d7b2438d3 170 ///< 'erasable' is set to 0, but 'programmable' is 1), writes should be possible directly to
switches 0:5c4d7b2438d3 171 ///< the memory-mapped storage without going through the ProgramData operation.
switches 0:5c4d7b2438d3 172 uint32_t programmability : 4; ///< A value to indicate storage programmability.
switches 0:5c4d7b2438d3 173 uint32_t retention_level : 4;
switches 0:5c4d7b2438d3 174 uint32_t reserved : 22;
switches 0:5c4d7b2438d3 175 ARM_STORAGE_SECURITY_FEATURES security; ///< \ref ARM_STORAGE_SECURITY_FEATURES
switches 0:5c4d7b2438d3 176 } ARM_STORAGE_INFO;
switches 0:5c4d7b2438d3 177
switches 0:5c4d7b2438d3 178 /**
switches 0:5c4d7b2438d3 179 \brief Operating status of the storage controller.
switches 0:5c4d7b2438d3 180 */
switches 0:5c4d7b2438d3 181 typedef struct _ARM_STORAGE_STATUS {
switches 0:5c4d7b2438d3 182 uint32_t busy : 1; ///< Controller busy flag
switches 0:5c4d7b2438d3 183 uint32_t error : 1; ///< Read/Program/Erase error flag (cleared on start of next operation)
switches 0:5c4d7b2438d3 184 } ARM_STORAGE_STATUS;
switches 0:5c4d7b2438d3 185
switches 0:5c4d7b2438d3 186 /**
switches 0:5c4d7b2438d3 187 * \brief Storage Driver API Capabilities.
switches 0:5c4d7b2438d3 188 *
switches 0:5c4d7b2438d3 189 * This data structure is designed to fit within a single word so that it can be
switches 0:5c4d7b2438d3 190 * fetched cheaply using a call to driver->GetCapabilities().
switches 0:5c4d7b2438d3 191 */
switches 0:5c4d7b2438d3 192 typedef struct _ARM_STORAGE_CAPABILITIES {
switches 0:5c4d7b2438d3 193 uint32_t asynchronous_ops : 1; ///< Used to indicate if APIs like initialize,
switches 0:5c4d7b2438d3 194 ///< read, erase, program, etc. can operate in asynchronous mode.
switches 0:5c4d7b2438d3 195 ///< Setting this bit to 1 means that the driver is capable
switches 0:5c4d7b2438d3 196 ///< of launching asynchronous operations; command completion is
switches 0:5c4d7b2438d3 197 ///< signaled by the invocation of a completion callback. If
switches 0:5c4d7b2438d3 198 ///< set to 1, drivers may still complete asynchronous
switches 0:5c4d7b2438d3 199 ///< operations synchronously as necessary--in which case they
switches 0:5c4d7b2438d3 200 ///< return a positive error code to indicate synchronous completion.
switches 0:5c4d7b2438d3 201 uint32_t erase_all : 1; ///< Supports EraseAll operation.
switches 0:5c4d7b2438d3 202 uint32_t reserved : 30;
switches 0:5c4d7b2438d3 203 } ARM_STORAGE_CAPABILITIES;
switches 0:5c4d7b2438d3 204
switches 0:5c4d7b2438d3 205 /**
switches 0:5c4d7b2438d3 206 * Command opcodes for Storage. Completion callbacks use these codes to refer to
switches 0:5c4d7b2438d3 207 * completing commands. Refer to \ref ARM_Storage_Callback_t.
switches 0:5c4d7b2438d3 208 */
switches 0:5c4d7b2438d3 209 typedef enum _ARM_STORAGE_OPERATION {
switches 0:5c4d7b2438d3 210 ARM_STORAGE_OPERATION_GET_VERSION,
switches 0:5c4d7b2438d3 211 ARM_STORAGE_OPERATION_GET_CAPABILITIES,
switches 0:5c4d7b2438d3 212 ARM_STORAGE_OPERATION_INITIALIZE,
switches 0:5c4d7b2438d3 213 ARM_STORAGE_OPERATION_UNINITIALIZE,
switches 0:5c4d7b2438d3 214 ARM_STORAGE_OPERATION_POWER_CONTROL,
switches 0:5c4d7b2438d3 215 ARM_STORAGE_OPERATION_READ_DATA,
switches 0:5c4d7b2438d3 216 ARM_STORAGE_OPERATION_PROGRAM_DATA,
switches 0:5c4d7b2438d3 217 ARM_STORAGE_OPERATION_ERASE,
switches 0:5c4d7b2438d3 218 ARM_STORAGE_OPERATION_ERASE_ALL,
switches 0:5c4d7b2438d3 219 ARM_STORAGE_OPERATION_GET_STATUS,
switches 0:5c4d7b2438d3 220 ARM_STORAGE_OPERATION_GET_INFO,
switches 0:5c4d7b2438d3 221 ARM_STORAGE_OPERATION_RESOLVE_ADDRESS,
switches 0:5c4d7b2438d3 222 ARM_STORAGE_OPERATION_GET_NEXT_BLOCK,
switches 0:5c4d7b2438d3 223 ARM_STORAGE_OPERATION_GET_BLOCK
switches 0:5c4d7b2438d3 224 } ARM_STORAGE_OPERATION;
switches 0:5c4d7b2438d3 225
switches 0:5c4d7b2438d3 226 /**
switches 0:5c4d7b2438d3 227 * Declaration of the callback-type for command completion.
switches 0:5c4d7b2438d3 228 *
switches 0:5c4d7b2438d3 229 * @param [in] status
switches 0:5c4d7b2438d3 230 * A code to indicate the status of the completed operation. For data
switches 0:5c4d7b2438d3 231 * transfer operations, the status field is overloaded in case of
switches 0:5c4d7b2438d3 232 * success to return the count of items successfully transferred; this
switches 0:5c4d7b2438d3 233 * can be done safely because error codes are negative values.
switches 0:5c4d7b2438d3 234 *
switches 0:5c4d7b2438d3 235 * @param [in] operation
switches 0:5c4d7b2438d3 236 * The command op-code. This value isn't essential for the callback in
switches 0:5c4d7b2438d3 237 * the presence of the command instance-id, but it is expected that
switches 0:5c4d7b2438d3 238 * this information could be a quick and useful filter.
switches 0:5c4d7b2438d3 239 */
switches 0:5c4d7b2438d3 240 typedef void (*ARM_Storage_Callback_t)(int32_t status, ARM_STORAGE_OPERATION operation);
switches 0:5c4d7b2438d3 241
switches 0:5c4d7b2438d3 242 /**
switches 0:5c4d7b2438d3 243 * This is the set of operations constituting the Storage driver. Their
switches 0:5c4d7b2438d3 244 * implementation is platform-specific, and needs to be supplied by the
switches 0:5c4d7b2438d3 245 * porting effort.
switches 0:5c4d7b2438d3 246 *
switches 0:5c4d7b2438d3 247 * Some APIs within `ARM_DRIVER_STORAGE` will always operate synchronously:
switches 0:5c4d7b2438d3 248 * GetVersion, GetCapabilities, GetStatus, GetInfo, ResolveAddress,
switches 0:5c4d7b2438d3 249 * GetNextBlock, and GetBlock. This means that control returns to the caller
switches 0:5c4d7b2438d3 250 * with a relevant status code only after the completion of the operation (or
switches 0:5c4d7b2438d3 251 * the discovery of a failure condition).
switches 0:5c4d7b2438d3 252 *
switches 0:5c4d7b2438d3 253 * The remainder of the APIs: Initialize, Uninitialize, PowerControl, ReadData,
switches 0:5c4d7b2438d3 254 * ProgramData, Erase, EraseAll, can function asynchronously if the underlying
switches 0:5c4d7b2438d3 255 * controller supports it--i.e. if ARM_STORAGE_CAPABILITIES::asynchronous_ops is
switches 0:5c4d7b2438d3 256 * set. In the case of asynchronous operation, the invocation returns early
switches 0:5c4d7b2438d3 257 * (with ARM_DRIVER_OK) and results in a completion callback later. If
switches 0:5c4d7b2438d3 258 * ARM_STORAGE_CAPABILITIES::asynchronous_ops is not set, then all such APIs
switches 0:5c4d7b2438d3 259 * execute synchronously, and control returns to the caller with a status code
switches 0:5c4d7b2438d3 260 * only after the completion of the operation (or the discovery of a failure
switches 0:5c4d7b2438d3 261 * condition).
switches 0:5c4d7b2438d3 262 *
switches 0:5c4d7b2438d3 263 * If ARM_STORAGE_CAPABILITIES::asynchronous_ops is set, a storage driver may
switches 0:5c4d7b2438d3 264 * still choose to execute asynchronous operations in a synchronous manner. If
switches 0:5c4d7b2438d3 265 * so, the driver returns a positive value to indicate successful synchronous
switches 0:5c4d7b2438d3 266 * completion (or an error code in case of failure) and no further invocation of
switches 0:5c4d7b2438d3 267 * completion callback should be expected. The expected return value for
switches 0:5c4d7b2438d3 268 * synchronous completion of such asynchronous operations varies depending on
switches 0:5c4d7b2438d3 269 * the operation. For operations involving data access, it often equals the
switches 0:5c4d7b2438d3 270 * amount of data transferred or affected. For non data-transfer operations,
switches 0:5c4d7b2438d3 271 * such as EraseAll or Initialize, it is usually 1.
switches 0:5c4d7b2438d3 272 *
switches 0:5c4d7b2438d3 273 * Here's a code snippet to suggest how asynchronous APIs might be used by
switches 0:5c4d7b2438d3 274 * callers to handle both synchronous and asynchronous execution by the
switches 0:5c4d7b2438d3 275 * underlying storage driver:
switches 0:5c4d7b2438d3 276 * \code
switches 0:5c4d7b2438d3 277 * ASSERT(ARM_DRIVER_OK == 0); // this is a precondition; it doesn't need to be put in code
switches 0:5c4d7b2438d3 278 * int32_t returnValue = drv->asynchronousAPI(...);
switches 0:5c4d7b2438d3 279 * if (returnValue < ARM_DRIVER_OK) {
switches 0:5c4d7b2438d3 280 * // handle error.
switches 0:5c4d7b2438d3 281 * } else if (returnValue == ARM_DRIVER_OK) {
switches 0:5c4d7b2438d3 282 * ASSERT(drv->GetCapabilities().asynchronous_ops == 1);
switches 0:5c4d7b2438d3 283 * // handle early return from asynchronous execution; remainder of the work is done in the callback handler.
switches 0:5c4d7b2438d3 284 * } else {
switches 0:5c4d7b2438d3 285 * ASSERT(returnValue == EXPECTED_RETURN_VALUE_FOR_SYNCHRONOUS_COMPLETION);
switches 0:5c4d7b2438d3 286 * // handle synchronous completion.
switches 0:5c4d7b2438d3 287 * }
switches 0:5c4d7b2438d3 288 * \endcode
switches 0:5c4d7b2438d3 289 */
switches 0:5c4d7b2438d3 290 typedef struct _ARM_DRIVER_STORAGE {
switches 0:5c4d7b2438d3 291 /**
switches 0:5c4d7b2438d3 292 * \brief Get driver version.
switches 0:5c4d7b2438d3 293 *
switches 0:5c4d7b2438d3 294 * The function GetVersion() returns version information of the driver implementation in ARM_DRIVER_VERSION.
switches 0:5c4d7b2438d3 295 *
switches 0:5c4d7b2438d3 296 * - API version is the version of the CMSIS-Driver specification used to implement this driver.
switches 0:5c4d7b2438d3 297 * - Driver version is source code version of the actual driver implementation.
switches 0:5c4d7b2438d3 298 *
switches 0:5c4d7b2438d3 299 * Example:
switches 0:5c4d7b2438d3 300 * \code
switches 0:5c4d7b2438d3 301 * extern ARM_DRIVER_STORAGE *drv_info;
switches 0:5c4d7b2438d3 302 *
switches 0:5c4d7b2438d3 303 * void read_version (void) {
switches 0:5c4d7b2438d3 304 * ARM_DRIVER_VERSION version;
switches 0:5c4d7b2438d3 305 *
switches 0:5c4d7b2438d3 306 * version = drv_info->GetVersion ();
switches 0:5c4d7b2438d3 307 * if (version.api < 0x10A) { // requires at minimum API version 1.10 or higher
switches 0:5c4d7b2438d3 308 * // error handling
switches 0:5c4d7b2438d3 309 * return;
switches 0:5c4d7b2438d3 310 * }
switches 0:5c4d7b2438d3 311 * }
switches 0:5c4d7b2438d3 312 * \endcode
switches 0:5c4d7b2438d3 313 *
switches 0:5c4d7b2438d3 314 * @return \ref ARM_DRIVER_VERSION.
switches 0:5c4d7b2438d3 315 *
switches 0:5c4d7b2438d3 316 * @note This API returns synchronously--it does not result in an invocation
switches 0:5c4d7b2438d3 317 * of a completion callback.
switches 0:5c4d7b2438d3 318 *
switches 0:5c4d7b2438d3 319 * @note The function GetVersion() can be called any time to obtain the
switches 0:5c4d7b2438d3 320 * required information from the driver (even before initialization). It
switches 0:5c4d7b2438d3 321 * always returns the same information.
switches 0:5c4d7b2438d3 322 */
switches 0:5c4d7b2438d3 323 ARM_DRIVER_VERSION (*GetVersion)(void);
switches 0:5c4d7b2438d3 324
switches 0:5c4d7b2438d3 325 /**
switches 0:5c4d7b2438d3 326 * \brief Get driver capabilities.
switches 0:5c4d7b2438d3 327 *
switches 0:5c4d7b2438d3 328 * \details The function GetCapabilities() returns information about
switches 0:5c4d7b2438d3 329 * capabilities in this driver implementation. The data fields of the struct
switches 0:5c4d7b2438d3 330 * ARM_STORAGE_CAPABILITIES encode various capabilities, for example if the device
switches 0:5c4d7b2438d3 331 * is able to execute operations asynchronously.
switches 0:5c4d7b2438d3 332 *
switches 0:5c4d7b2438d3 333 * Example:
switches 0:5c4d7b2438d3 334 * \code
switches 0:5c4d7b2438d3 335 * extern ARM_DRIVER_STORAGE *drv_info;
switches 0:5c4d7b2438d3 336 *
switches 0:5c4d7b2438d3 337 * void read_capabilities (void) {
switches 0:5c4d7b2438d3 338 * ARM_STORAGE_CAPABILITIES drv_capabilities;
switches 0:5c4d7b2438d3 339 *
switches 0:5c4d7b2438d3 340 * drv_capabilities = drv_info->GetCapabilities ();
switches 0:5c4d7b2438d3 341 * // interrogate capabilities
switches 0:5c4d7b2438d3 342 *
switches 0:5c4d7b2438d3 343 * }
switches 0:5c4d7b2438d3 344 * \endcode
switches 0:5c4d7b2438d3 345 *
switches 0:5c4d7b2438d3 346 * @return \ref ARM_STORAGE_CAPABILITIES.
switches 0:5c4d7b2438d3 347 *
switches 0:5c4d7b2438d3 348 * @note This API returns synchronously--it does not result in an invocation
switches 0:5c4d7b2438d3 349 * of a completion callback.
switches 0:5c4d7b2438d3 350 *
switches 0:5c4d7b2438d3 351 * @note The function GetCapabilities() can be called any time to obtain the
switches 0:5c4d7b2438d3 352 * required information from the driver (even before initialization). It
switches 0:5c4d7b2438d3 353 * always returns the same information.
switches 0:5c4d7b2438d3 354 */
switches 0:5c4d7b2438d3 355 ARM_STORAGE_CAPABILITIES (*GetCapabilities)(void);
switches 0:5c4d7b2438d3 356
switches 0:5c4d7b2438d3 357 /**
switches 0:5c4d7b2438d3 358 * \brief Initialize the Storage Interface.
switches 0:5c4d7b2438d3 359 *
switches 0:5c4d7b2438d3 360 * The function Initialize is called when the middleware component starts
switches 0:5c4d7b2438d3 361 * operation. In addition to bringing the controller to a ready state,
switches 0:5c4d7b2438d3 362 * Initialize() receives a callback handler to be invoked upon completion of
switches 0:5c4d7b2438d3 363 * asynchronous operations.
switches 0:5c4d7b2438d3 364 *
switches 0:5c4d7b2438d3 365 * Initialize() needs to be called explicitly before
switches 0:5c4d7b2438d3 366 * powering the peripheral using PowerControl(), and before initiating other
switches 0:5c4d7b2438d3 367 * accesses to the storage controller.
switches 0:5c4d7b2438d3 368 *
switches 0:5c4d7b2438d3 369 * The function performs the following operations:
switches 0:5c4d7b2438d3 370 * - Initializes the resources needed for the Storage interface.
switches 0:5c4d7b2438d3 371 * - Registers the \ref ARM_Storage_Callback_t callback function.
switches 0:5c4d7b2438d3 372 *
switches 0:5c4d7b2438d3 373 * To start working with a peripheral the functions Initialize and PowerControl need to be called in this order:
switches 0:5c4d7b2438d3 374 * drv->Initialize (...); // Allocate I/O pins
switches 0:5c4d7b2438d3 375 * drv->PowerControl (ARM_POWER_FULL); // Power up peripheral, setup IRQ/DMA
switches 0:5c4d7b2438d3 376 *
switches 0:5c4d7b2438d3 377 * - Initialize() typically allocates the I/O resources (pins) for the
switches 0:5c4d7b2438d3 378 * peripheral. The function can be called multiple times; if the I/O resources
switches 0:5c4d7b2438d3 379 * are already initialized it performs no operation and just returns with
switches 0:5c4d7b2438d3 380 * ARM_DRIVER_OK.
switches 0:5c4d7b2438d3 381 *
switches 0:5c4d7b2438d3 382 * - PowerControl (ARM_POWER_FULL) sets the peripheral registers including
switches 0:5c4d7b2438d3 383 * interrupt (NVIC) and optionally DMA. The function can be called multiple
switches 0:5c4d7b2438d3 384 * times; if the registers are already set it performs no operation and just
switches 0:5c4d7b2438d3 385 * returns with ARM_DRIVER_OK.
switches 0:5c4d7b2438d3 386 *
switches 0:5c4d7b2438d3 387 * To stop working with a peripheral the functions PowerControl and Uninitialize need to be called in this order:
switches 0:5c4d7b2438d3 388 * drv->PowerControl (ARM_POWER_OFF); // Terminate any pending transfers, reset IRQ/DMA, power off peripheral
switches 0:5c4d7b2438d3 389 * drv->Uninitialize (...); // Release I/O pins
switches 0:5c4d7b2438d3 390 *
switches 0:5c4d7b2438d3 391 * The functions PowerControl and Uninitialize always execute and can be used
switches 0:5c4d7b2438d3 392 * to put the peripheral into a Safe State, for example after any data
switches 0:5c4d7b2438d3 393 * transmission errors. To restart the peripheral in an error condition,
switches 0:5c4d7b2438d3 394 * you should first execute the Stop Sequence and then the Start Sequence.
switches 0:5c4d7b2438d3 395 *
switches 0:5c4d7b2438d3 396 * @param [in] callback
switches 0:5c4d7b2438d3 397 * Caller-defined callback to be invoked upon command completion
switches 0:5c4d7b2438d3 398 * for asynchronous APIs (including the completion of
switches 0:5c4d7b2438d3 399 * initialization). Use a NULL pointer when no callback
switches 0:5c4d7b2438d3 400 * signals are required.
switches 0:5c4d7b2438d3 401 *
switches 0:5c4d7b2438d3 402 * @note This API may execute asynchronously if
switches 0:5c4d7b2438d3 403 * ARM_STORAGE_CAPABILITIES::asynchronous_ops is set. Asynchronous
switches 0:5c4d7b2438d3 404 * execution is optional even if 'asynchronous_ops' is set.
switches 0:5c4d7b2438d3 405 *
switches 0:5c4d7b2438d3 406 * @return If asynchronous activity is launched, an invocation returns
switches 0:5c4d7b2438d3 407 * ARM_DRIVER_OK, and the caller can expect to receive a callback in the
switches 0:5c4d7b2438d3 408 * future with a status value of ARM_DRIVER_OK or an error-code. In the
switches 0:5c4d7b2438d3 409 * case of synchronous execution, control returns after completion with a
switches 0:5c4d7b2438d3 410 * value of 1. Return values less than ARM_DRIVER_OK (0) signify errors.
switches 0:5c4d7b2438d3 411 */
switches 0:5c4d7b2438d3 412 int32_t (*Initialize)(ARM_Storage_Callback_t callback);
switches 0:5c4d7b2438d3 413
switches 0:5c4d7b2438d3 414 /**
switches 0:5c4d7b2438d3 415 * \brief De-initialize the Storage Interface.
switches 0:5c4d7b2438d3 416 *
switches 0:5c4d7b2438d3 417 * The function Uninitialize() de-initializes the resources of Storage interface.
switches 0:5c4d7b2438d3 418 *
switches 0:5c4d7b2438d3 419 * It is called when the middleware component stops operation, and wishes to
switches 0:5c4d7b2438d3 420 * release the software resources used by the interface.
switches 0:5c4d7b2438d3 421 *
switches 0:5c4d7b2438d3 422 * @note This API may execute asynchronously if
switches 0:5c4d7b2438d3 423 * ARM_STORAGE_CAPABILITIES::asynchronous_ops is set. Asynchronous
switches 0:5c4d7b2438d3 424 * execution is optional even if 'asynchronous_ops' is set.
switches 0:5c4d7b2438d3 425 *
switches 0:5c4d7b2438d3 426 * @return If asynchronous activity is launched, an invocation returns
switches 0:5c4d7b2438d3 427 * ARM_DRIVER_OK, and the caller can expect to receive a callback in the
switches 0:5c4d7b2438d3 428 * future with a status value of ARM_DRIVER_OK or an error-code. In the
switches 0:5c4d7b2438d3 429 * case of synchronous execution, control returns after completion with a
switches 0:5c4d7b2438d3 430 * value of 1. Return values less than ARM_DRIVER_OK (0) signify errors.
switches 0:5c4d7b2438d3 431 */
switches 0:5c4d7b2438d3 432 int32_t (*Uninitialize)(void);
switches 0:5c4d7b2438d3 433
switches 0:5c4d7b2438d3 434 /**
switches 0:5c4d7b2438d3 435 * \brief Control the Storage interface power.
switches 0:5c4d7b2438d3 436 *
switches 0:5c4d7b2438d3 437 * The function \b ARM_Storage_PowerControl operates the power modes of the Storage interface.
switches 0:5c4d7b2438d3 438 *
switches 0:5c4d7b2438d3 439 * To start working with a peripheral the functions Initialize and PowerControl need to be called in this order:
switches 0:5c4d7b2438d3 440 * drv->Initialize (...); // Allocate I/O pins
switches 0:5c4d7b2438d3 441 * drv->PowerControl (ARM_POWER_FULL); // Power up peripheral, setup IRQ/DMA
switches 0:5c4d7b2438d3 442 *
switches 0:5c4d7b2438d3 443 * - Initialize() typically allocates the I/O resources (pins) for the
switches 0:5c4d7b2438d3 444 * peripheral. The function can be called multiple times; if the I/O resources
switches 0:5c4d7b2438d3 445 * are already initialized it performs no operation and just returns with
switches 0:5c4d7b2438d3 446 * ARM_DRIVER_OK.
switches 0:5c4d7b2438d3 447 *
switches 0:5c4d7b2438d3 448 * - PowerControl (ARM_POWER_FULL) sets the peripheral registers including
switches 0:5c4d7b2438d3 449 * interrupt (NVIC) and optionally DMA. The function can be called multiple
switches 0:5c4d7b2438d3 450 * times; if the registers are already set it performs no operation and just
switches 0:5c4d7b2438d3 451 * returns with ARM_DRIVER_OK.
switches 0:5c4d7b2438d3 452 *
switches 0:5c4d7b2438d3 453 * To stop working with a peripheral the functions PowerControl and Uninitialize need to be called in this order:
switches 0:5c4d7b2438d3 454 *
switches 0:5c4d7b2438d3 455 * drv->PowerControl (ARM_POWER_OFF); // Terminate any pending transfers, reset IRQ/DMA, power off peripheral
switches 0:5c4d7b2438d3 456 * drv->Uninitialize (...); // Release I/O pins
switches 0:5c4d7b2438d3 457 *
switches 0:5c4d7b2438d3 458 * The functions PowerControl and Uninitialize always execute and can be used
switches 0:5c4d7b2438d3 459 * to put the peripheral into a Safe State, for example after any data
switches 0:5c4d7b2438d3 460 * transmission errors. To restart the peripheral in an error condition,
switches 0:5c4d7b2438d3 461 * you should first execute the Stop Sequence and then the Start Sequence.
switches 0:5c4d7b2438d3 462 *
switches 0:5c4d7b2438d3 463 * @param state
switches 0:5c4d7b2438d3 464 * \ref ARM_POWER_STATE. The target power-state for the storage controller.
switches 0:5c4d7b2438d3 465 * The parameter state can have the following values:
switches 0:5c4d7b2438d3 466 * - ARM_POWER_FULL : set-up peripheral for data transfers, enable interrupts
switches 0:5c4d7b2438d3 467 * (NVIC) and optionally DMA. Can be called multiple times. If the peripheral
switches 0:5c4d7b2438d3 468 * is already in this mode, then the function performs no operation and returns
switches 0:5c4d7b2438d3 469 * with ARM_DRIVER_OK.
switches 0:5c4d7b2438d3 470 * - ARM_POWER_LOW : may use power saving. Returns ARM_DRIVER_ERROR_UNSUPPORTED when not implemented.
switches 0:5c4d7b2438d3 471 * - ARM_POWER_OFF : terminates any pending data transfers, disables peripheral, disables related interrupts and DMA.
switches 0:5c4d7b2438d3 472 *
switches 0:5c4d7b2438d3 473 * @note This API may execute asynchronously if
switches 0:5c4d7b2438d3 474 * ARM_STORAGE_CAPABILITIES::asynchronous_ops is set. Asynchronous
switches 0:5c4d7b2438d3 475 * execution is optional even if 'asynchronous_ops' is set.
switches 0:5c4d7b2438d3 476 *
switches 0:5c4d7b2438d3 477 * @return If asynchronous activity is launched, an invocation returns
switches 0:5c4d7b2438d3 478 * ARM_DRIVER_OK, and the caller can expect to receive a callback in the
switches 0:5c4d7b2438d3 479 * future with a status value of ARM_DRIVER_OK or an error-code. In the
switches 0:5c4d7b2438d3 480 * case of synchronous execution, control returns after completion with a
switches 0:5c4d7b2438d3 481 * value of 1. Return values less than ARM_DRIVER_OK (0) signify errors.
switches 0:5c4d7b2438d3 482 */
switches 0:5c4d7b2438d3 483 int32_t (*PowerControl)(ARM_POWER_STATE state);
switches 0:5c4d7b2438d3 484
switches 0:5c4d7b2438d3 485 /**
switches 0:5c4d7b2438d3 486 * \brief read the contents of a given address range from the storage device.
switches 0:5c4d7b2438d3 487 *
switches 0:5c4d7b2438d3 488 * \details Read the contents of a range of storage memory into a buffer
switches 0:5c4d7b2438d3 489 * supplied by the caller. The buffer is owned by the caller and should
switches 0:5c4d7b2438d3 490 * remain accessible for the lifetime of this command.
switches 0:5c4d7b2438d3 491 *
switches 0:5c4d7b2438d3 492 * @param [in] addr
switches 0:5c4d7b2438d3 493 * This specifies the address from where to read data.
switches 0:5c4d7b2438d3 494 *
switches 0:5c4d7b2438d3 495 * @param [out] data
switches 0:5c4d7b2438d3 496 * The destination of the read operation. The buffer
switches 0:5c4d7b2438d3 497 * is owned by the caller and should remain accessible for the
switches 0:5c4d7b2438d3 498 * lifetime of this command.
switches 0:5c4d7b2438d3 499 *
switches 0:5c4d7b2438d3 500 * @param [in] size
switches 0:5c4d7b2438d3 501 * The number of bytes requested to read. The data buffer
switches 0:5c4d7b2438d3 502 * should be at least as large as this size.
switches 0:5c4d7b2438d3 503 *
switches 0:5c4d7b2438d3 504 * @note This API may execute asynchronously if
switches 0:5c4d7b2438d3 505 * ARM_STORAGE_CAPABILITIES::asynchronous_ops is set. Asynchronous
switches 0:5c4d7b2438d3 506 * execution is optional even if 'asynchronous_ops' is set.
switches 0:5c4d7b2438d3 507 *
switches 0:5c4d7b2438d3 508 * @return If asynchronous activity is launched, an invocation returns
switches 0:5c4d7b2438d3 509 * ARM_DRIVER_OK, and the caller can expect to receive a callback in the
switches 0:5c4d7b2438d3 510 * future with the number of successfully transferred bytes passed in as
switches 0:5c4d7b2438d3 511 * the 'status' parameter. In the case of synchronous execution, control
switches 0:5c4d7b2438d3 512 * returns after completion with a positive transfer-count. Return values
switches 0:5c4d7b2438d3 513 * less than ARM_DRIVER_OK (0) signify errors.
switches 0:5c4d7b2438d3 514 */
switches 0:5c4d7b2438d3 515 int32_t (*ReadData)(uint64_t addr, void *data, uint32_t size);
switches 0:5c4d7b2438d3 516
switches 0:5c4d7b2438d3 517 /**
switches 0:5c4d7b2438d3 518 * \brief program (write into) the contents of a given address range of the storage device.
switches 0:5c4d7b2438d3 519 *
switches 0:5c4d7b2438d3 520 * \details Write the contents of a given memory buffer into a range of
switches 0:5c4d7b2438d3 521 * storage memory. In the case of flash memory, the destination range in
switches 0:5c4d7b2438d3 522 * storage memory typically has its contents in an erased state from a
switches 0:5c4d7b2438d3 523 * preceding erase operation. The source memory buffer is owned by the
switches 0:5c4d7b2438d3 524 * caller and should remain accessible for the lifetime of this command.
switches 0:5c4d7b2438d3 525 *
switches 0:5c4d7b2438d3 526 * @param [in] addr
switches 0:5c4d7b2438d3 527 * This is the start address of the range to be written into. It
switches 0:5c4d7b2438d3 528 * needs to be aligned to the device's \em program_unit
switches 0:5c4d7b2438d3 529 * specified in \ref ARM_STORAGE_INFO.
switches 0:5c4d7b2438d3 530 *
switches 0:5c4d7b2438d3 531 * @param [in] data
switches 0:5c4d7b2438d3 532 * The source of the write operation. The buffer is owned by the
switches 0:5c4d7b2438d3 533 * caller and should remain accessible for the lifetime of this
switches 0:5c4d7b2438d3 534 * command.
switches 0:5c4d7b2438d3 535 *
switches 0:5c4d7b2438d3 536 * @param [in] size
switches 0:5c4d7b2438d3 537 * The number of bytes requested to be written. The buffer
switches 0:5c4d7b2438d3 538 * should be at least as large as this size. \note 'size' should
switches 0:5c4d7b2438d3 539 * be a multiple of the device's 'program_unit' (see \ref
switches 0:5c4d7b2438d3 540 * ARM_STORAGE_INFO).
switches 0:5c4d7b2438d3 541 *
switches 0:5c4d7b2438d3 542 * @note It is best for the middleware to write in units of
switches 0:5c4d7b2438d3 543 * 'optimal_program_unit' (\ref ARM_STORAGE_INFO) of the device.
switches 0:5c4d7b2438d3 544 *
switches 0:5c4d7b2438d3 545 * @note This API may execute asynchronously if
switches 0:5c4d7b2438d3 546 * ARM_STORAGE_CAPABILITIES::asynchronous_ops is set. Asynchronous
switches 0:5c4d7b2438d3 547 * execution is optional even if 'asynchronous_ops' is set.
switches 0:5c4d7b2438d3 548 *
switches 0:5c4d7b2438d3 549 * @return If asynchronous activity is launched, an invocation returns
switches 0:5c4d7b2438d3 550 * ARM_DRIVER_OK, and the caller can expect to receive a callback in the
switches 0:5c4d7b2438d3 551 * future with the number of successfully transferred bytes passed in as
switches 0:5c4d7b2438d3 552 * the 'status' parameter. In the case of synchronous execution, control
switches 0:5c4d7b2438d3 553 * returns after completion with a positive transfer-count. Return values
switches 0:5c4d7b2438d3 554 * less than ARM_DRIVER_OK (0) signify errors.
switches 0:5c4d7b2438d3 555 */
switches 0:5c4d7b2438d3 556 int32_t (*ProgramData)(uint64_t addr, const void *data, uint32_t size);
switches 0:5c4d7b2438d3 557
switches 0:5c4d7b2438d3 558 /**
switches 0:5c4d7b2438d3 559 * @brief Erase Storage range.
switches 0:5c4d7b2438d3 560 *
switches 0:5c4d7b2438d3 561 * @details This function erases a range of storage specified by [addr, addr +
switches 0:5c4d7b2438d3 562 * size). Both 'addr' and 'addr + size' should align with the
switches 0:5c4d7b2438d3 563 * 'erase_unit'(s) of the respective owning storage block(s) (see \ref
switches 0:5c4d7b2438d3 564 * ARM_STORAGE_BLOCK and \ref ARM_STORAGE_BLOCK_ATTRIBUTES). The range to
switches 0:5c4d7b2438d3 565 * be erased will have its contents returned to the un-programmed state--
switches 0:5c4d7b2438d3 566 * i.e. to 'erased_value' (see \ref ARM_STORAGE_BLOCK_ATTRIBUTES), which
switches 0:5c4d7b2438d3 567 * is usually 1 to indicate the pattern of all ones: 0xFF.
switches 0:5c4d7b2438d3 568 *
switches 0:5c4d7b2438d3 569 * @param [in] addr
switches 0:5c4d7b2438d3 570 * This is the start-address of the range to be erased. It must
switches 0:5c4d7b2438d3 571 * start at an 'erase_unit' boundary of the underlying block.
switches 0:5c4d7b2438d3 572 *
switches 0:5c4d7b2438d3 573 * @param [in] size
switches 0:5c4d7b2438d3 574 * Size (in bytes) of the range to be erased. 'addr + size'
switches 0:5c4d7b2438d3 575 * must be aligned with the 'erase_unit' of the underlying
switches 0:5c4d7b2438d3 576 * block.
switches 0:5c4d7b2438d3 577 *
switches 0:5c4d7b2438d3 578 * @note This API may execute asynchronously if
switches 0:5c4d7b2438d3 579 * ARM_STORAGE_CAPABILITIES::asynchronous_ops is set. Asynchronous
switches 0:5c4d7b2438d3 580 * execution is optional even if 'asynchronous_ops' is set.
switches 0:5c4d7b2438d3 581 *
switches 0:5c4d7b2438d3 582 * @return
switches 0:5c4d7b2438d3 583 * If the range to be erased doesn't align with the erase_units of the
switches 0:5c4d7b2438d3 584 * respective start and end blocks, ARM_DRIVER_ERROR_PARAMETER is returned.
switches 0:5c4d7b2438d3 585 * If any part of the range is protected, ARM_STORAGE_ERROR_PROTECTED is
switches 0:5c4d7b2438d3 586 * returned. If any part of the range is not erasable,
switches 0:5c4d7b2438d3 587 * ARM_STORAGE_ERROR_NOT_ERASABLE is returned. All such sanity-check
switches 0:5c4d7b2438d3 588 * failures result in the error code being returned synchronously and the
switches 0:5c4d7b2438d3 589 * storage bytes within the range remain unaffected.
switches 0:5c4d7b2438d3 590 * Otherwise the function executes in the following ways:
switches 0:5c4d7b2438d3 591 * If asynchronous activity is launched, an invocation returns
switches 0:5c4d7b2438d3 592 * ARM_DRIVER_OK, and the caller can expect to receive a callback in the
switches 0:5c4d7b2438d3 593 * future with the number of successfully erased bytes passed in as
switches 0:5c4d7b2438d3 594 * the 'status' parameter. In the case of synchronous execution, control
switches 0:5c4d7b2438d3 595 * returns after completion with a positive erase-count. Return values
switches 0:5c4d7b2438d3 596 * less than ARM_DRIVER_OK (0) signify errors.
switches 0:5c4d7b2438d3 597 *
switches 0:5c4d7b2438d3 598 * @note Erase() may return a smaller (positive) value than the size of the
switches 0:5c4d7b2438d3 599 * requested range. The returned value indicates the actual number of bytes
switches 0:5c4d7b2438d3 600 * erased. It is the caller's responsibility to follow up with an appropriate
switches 0:5c4d7b2438d3 601 * request to complete the operation.
switches 0:5c4d7b2438d3 602 *
switches 0:5c4d7b2438d3 603 * @note in the case of a failed erase (except when
switches 0:5c4d7b2438d3 604 * ARM_DRIVER_ERROR_PARAMETER, ARM_STORAGE_ERROR_PROTECTED, or
switches 0:5c4d7b2438d3 605 * ARM_STORAGE_ERROR_NOT_ERASABLE is returned synchronously), the
switches 0:5c4d7b2438d3 606 * requested range should be assumed to be in an unknown state. The
switches 0:5c4d7b2438d3 607 * previous contents may not be retained.
switches 0:5c4d7b2438d3 608 */
switches 0:5c4d7b2438d3 609 int32_t (*Erase)(uint64_t addr, uint32_t size);
switches 0:5c4d7b2438d3 610
switches 0:5c4d7b2438d3 611 /**
switches 0:5c4d7b2438d3 612 * @brief Erase complete storage. Optional function for faster erase of the complete device.
switches 0:5c4d7b2438d3 613 *
switches 0:5c4d7b2438d3 614 * This optional function erases the complete device. If the device does not
switches 0:5c4d7b2438d3 615 * support global erase then the function returns the error value \ref
switches 0:5c4d7b2438d3 616 * ARM_DRIVER_ERROR_UNSUPPORTED. The data field \em 'erase_all' =
switches 0:5c4d7b2438d3 617 * \token{1} of the structure \ref ARM_STORAGE_CAPABILITIES encodes that
switches 0:5c4d7b2438d3 618 * \ref ARM_STORAGE_EraseAll is supported.
switches 0:5c4d7b2438d3 619 *
switches 0:5c4d7b2438d3 620 * @note This API may execute asynchronously if
switches 0:5c4d7b2438d3 621 * ARM_STORAGE_CAPABILITIES::asynchronous_ops is set. Asynchronous
switches 0:5c4d7b2438d3 622 * execution is optional even if 'asynchronous_ops' is set.
switches 0:5c4d7b2438d3 623 *
switches 0:5c4d7b2438d3 624 * @return
switches 0:5c4d7b2438d3 625 * If any part of the storage range is protected,
switches 0:5c4d7b2438d3 626 * ARM_STORAGE_ERROR_PROTECTED is returned. If any part of the storage
switches 0:5c4d7b2438d3 627 * range is not erasable, ARM_STORAGE_ERROR_NOT_ERASABLE is returned. All
switches 0:5c4d7b2438d3 628 * such sanity-check failures result in the error code being returned
switches 0:5c4d7b2438d3 629 * synchronously and the storage bytes within the range remain unaffected.
switches 0:5c4d7b2438d3 630 * Otherwise the function executes in the following ways:
switches 0:5c4d7b2438d3 631 * If asynchronous activity is launched, an invocation returns
switches 0:5c4d7b2438d3 632 * ARM_DRIVER_OK, and the caller can expect to receive a callback in the
switches 0:5c4d7b2438d3 633 * future with ARM_DRIVER_OK passed in as the 'status' parameter. In the
switches 0:5c4d7b2438d3 634 * case of synchronous execution, control returns after completion with a
switches 0:5c4d7b2438d3 635 * value of 1. Return values less than ARM_DRIVER_OK (0) signify errors.
switches 0:5c4d7b2438d3 636 */
switches 0:5c4d7b2438d3 637 int32_t (*EraseAll)(void);
switches 0:5c4d7b2438d3 638
switches 0:5c4d7b2438d3 639 /**
switches 0:5c4d7b2438d3 640 * @brief Get the status of the current (or previous) command executed by the
switches 0:5c4d7b2438d3 641 * storage controller; stored in the structure \ref ARM_STORAGE_STATUS.
switches 0:5c4d7b2438d3 642 *
switches 0:5c4d7b2438d3 643 * @return
switches 0:5c4d7b2438d3 644 * The status of the underlying controller.
switches 0:5c4d7b2438d3 645 *
switches 0:5c4d7b2438d3 646 * @note This API returns synchronously--it does not result in an invocation
switches 0:5c4d7b2438d3 647 * of a completion callback.
switches 0:5c4d7b2438d3 648 */
switches 0:5c4d7b2438d3 649 ARM_STORAGE_STATUS (*GetStatus)(void);
switches 0:5c4d7b2438d3 650
switches 0:5c4d7b2438d3 651 /**
switches 0:5c4d7b2438d3 652 * @brief Get information about the Storage device; stored in the structure \ref ARM_STORAGE_INFO.
switches 0:5c4d7b2438d3 653 *
switches 0:5c4d7b2438d3 654 * @param [out] info
switches 0:5c4d7b2438d3 655 * A caller-supplied buffer capable of being filled in with an
switches 0:5c4d7b2438d3 656 * \ref ARM_STORAGE_INFO.
switches 0:5c4d7b2438d3 657 *
switches 0:5c4d7b2438d3 658 * @return ARM_DRIVER_OK if a ARM_STORAGE_INFO structure containing top level
switches 0:5c4d7b2438d3 659 * metadata about the storage controller is filled into the supplied
switches 0:5c4d7b2438d3 660 * buffer, else an appropriate error value.
switches 0:5c4d7b2438d3 661 *
switches 0:5c4d7b2438d3 662 * @note It is the caller's responsibility to ensure that the buffer passed in
switches 0:5c4d7b2438d3 663 * is able to be initialized with a \ref ARM_STORAGE_INFO.
switches 0:5c4d7b2438d3 664 *
switches 0:5c4d7b2438d3 665 * @note This API returns synchronously--it does not result in an invocation
switches 0:5c4d7b2438d3 666 * of a completion callback.
switches 0:5c4d7b2438d3 667 */
switches 0:5c4d7b2438d3 668 int32_t (*GetInfo)(ARM_STORAGE_INFO *info);
switches 0:5c4d7b2438d3 669
switches 0:5c4d7b2438d3 670 /**
switches 0:5c4d7b2438d3 671 * \brief For memory-mapped storage, resolve an address relative to
switches 0:5c4d7b2438d3 672 * the storage controller into a memory address.
switches 0:5c4d7b2438d3 673 *
switches 0:5c4d7b2438d3 674 * @param addr
switches 0:5c4d7b2438d3 675 * This is the address for which we want a resolution to the
switches 0:5c4d7b2438d3 676 * processor's physical address space. It is an offset from the
switches 0:5c4d7b2438d3 677 * start of the storage map maintained by the owning storage
switches 0:5c4d7b2438d3 678 * controller.
switches 0:5c4d7b2438d3 679 *
switches 0:5c4d7b2438d3 680 * @return
switches 0:5c4d7b2438d3 681 * The resolved address in the processor's address space; else
switches 0:5c4d7b2438d3 682 * ARM_STORAGE_INVALID_ADDRESS, if no resolution is possible.
switches 0:5c4d7b2438d3 683 *
switches 0:5c4d7b2438d3 684 * @note This API returns synchronously. The invocation should return quickly,
switches 0:5c4d7b2438d3 685 * and result in a resolved address.
switches 0:5c4d7b2438d3 686 */
switches 0:5c4d7b2438d3 687 uint32_t (*ResolveAddress)(uint64_t addr);
switches 0:5c4d7b2438d3 688
switches 0:5c4d7b2438d3 689 /**
switches 0:5c4d7b2438d3 690 * @brief Advance to the successor of the current block (iterator), or fetch
switches 0:5c4d7b2438d3 691 * the first block (if 'prev_block' is passed in as NULL).
switches 0:5c4d7b2438d3 692 *
switches 0:5c4d7b2438d3 693 * @details This helper function fetches (an iterator to) the next block (or
switches 0:5c4d7b2438d3 694 * the first block if 'prev_block' is passed in as NULL). In the failure
switches 0:5c4d7b2438d3 695 * case, a terminating, invalid block iterator is filled into the out
switches 0:5c4d7b2438d3 696 * parameter: 'next_block'. In combination with \ref
switches 0:5c4d7b2438d3 697 * ARM_STORAGE_VALID_BLOCK(), it can be used to iterate over the sequence
switches 0:5c4d7b2438d3 698 * of blocks within the storage map:
switches 0:5c4d7b2438d3 699 *
switches 0:5c4d7b2438d3 700 * \code
switches 0:5c4d7b2438d3 701 * ARM_STORAGE_BLOCK block;
switches 0:5c4d7b2438d3 702 * for (drv->GetNextBlock(NULL, &block); ARM_STORAGE_VALID_BLOCK(&block); drv->GetNextBlock(&block, &block)) {
switches 0:5c4d7b2438d3 703 * // make use of block
switches 0:5c4d7b2438d3 704 * }
switches 0:5c4d7b2438d3 705 * \endcode
switches 0:5c4d7b2438d3 706 *
switches 0:5c4d7b2438d3 707 * @param[in] prev_block
switches 0:5c4d7b2438d3 708 * An existing block (iterator) within the same storage
switches 0:5c4d7b2438d3 709 * controller. The memory buffer holding this block is owned
switches 0:5c4d7b2438d3 710 * by the caller. This pointer may be NULL; if so, the
switches 0:5c4d7b2438d3 711 * invocation fills in the first block into the out parameter:
switches 0:5c4d7b2438d3 712 * 'next_block'.
switches 0:5c4d7b2438d3 713 *
switches 0:5c4d7b2438d3 714 * @param[out] next_block
switches 0:5c4d7b2438d3 715 * A caller-owned buffer large enough to be filled in with
switches 0:5c4d7b2438d3 716 * the following ARM_STORAGE_BLOCK. It is legal to provide the
switches 0:5c4d7b2438d3 717 * same buffer using 'next_block' as was passed in with 'prev_block'. It
switches 0:5c4d7b2438d3 718 * is also legal to pass a NULL into this parameter if the
switches 0:5c4d7b2438d3 719 * caller isn't interested in populating a buffer with the next
switches 0:5c4d7b2438d3 720 * block--i.e. if the caller only wishes to establish the
switches 0:5c4d7b2438d3 721 * presence of a next block.
switches 0:5c4d7b2438d3 722 *
switches 0:5c4d7b2438d3 723 * @return ARM_DRIVER_OK if a valid next block is found (or first block, if
switches 0:5c4d7b2438d3 724 * prev_block is passed as NULL); upon successful operation, the contents
switches 0:5c4d7b2438d3 725 * of the next (or first) block are filled into the buffer pointed to by
switches 0:5c4d7b2438d3 726 * the parameter 'next_block' and ARM_STORAGE_VALID_BLOCK(next_block) is
switches 0:5c4d7b2438d3 727 * guaranteed to be true. Upon reaching the end of the sequence of blocks
switches 0:5c4d7b2438d3 728 * (iterators), or in case the driver is unable to fetch information about
switches 0:5c4d7b2438d3 729 * the next (or first) block, an error (negative) value is returned and an
switches 0:5c4d7b2438d3 730 * invalid StorageBlock is populated into the supplied buffer. If
switches 0:5c4d7b2438d3 731 * prev_block is NULL, the first block is returned.
switches 0:5c4d7b2438d3 732 *
switches 0:5c4d7b2438d3 733 * @note This API returns synchronously--it does not result in an invocation
switches 0:5c4d7b2438d3 734 * of a completion callback.
switches 0:5c4d7b2438d3 735 */
switches 0:5c4d7b2438d3 736 int32_t (*GetNextBlock)(const ARM_STORAGE_BLOCK* prev_block, ARM_STORAGE_BLOCK *next_block);
switches 0:5c4d7b2438d3 737
switches 0:5c4d7b2438d3 738 /**
switches 0:5c4d7b2438d3 739 * @brief Find the storage block (iterator) encompassing a given storage address.
switches 0:5c4d7b2438d3 740 *
switches 0:5c4d7b2438d3 741 * @param[in] addr
switches 0:5c4d7b2438d3 742 * Storage address in bytes.
switches 0:5c4d7b2438d3 743 *
switches 0:5c4d7b2438d3 744 * @param[out] block
switches 0:5c4d7b2438d3 745 * A caller-owned buffer large enough to be filled in with the
switches 0:5c4d7b2438d3 746 * ARM_STORAGE_BLOCK encapsulating the given address. This value
switches 0:5c4d7b2438d3 747 * can also be passed in as NULL if the caller isn't interested
switches 0:5c4d7b2438d3 748 * in populating a buffer with the block--if the caller only
switches 0:5c4d7b2438d3 749 * wishes to establish the presence of a containing storage
switches 0:5c4d7b2438d3 750 * block.
switches 0:5c4d7b2438d3 751 *
switches 0:5c4d7b2438d3 752 * @return ARM_DRIVER_OK if a containing storage-block is found. In this case,
switches 0:5c4d7b2438d3 753 * if block is non-NULL, the buffer pointed to by it is populated with
switches 0:5c4d7b2438d3 754 * the contents of the storage block--i.e. if block is valid and a block is
switches 0:5c4d7b2438d3 755 * found, ARM_STORAGE_VALID_BLOCK(block) would return true following this
switches 0:5c4d7b2438d3 756 * call. If there is no storage block containing the given offset, or in
switches 0:5c4d7b2438d3 757 * case the driver is unable to resolve an address to a storage-block, an
switches 0:5c4d7b2438d3 758 * error (negative) value is returned and an invalid StorageBlock is
switches 0:5c4d7b2438d3 759 * populated into the supplied buffer.
switches 0:5c4d7b2438d3 760 *
switches 0:5c4d7b2438d3 761 * @note This API returns synchronously--it does not result in an invocation
switches 0:5c4d7b2438d3 762 * of a completion callback.
switches 0:5c4d7b2438d3 763 */
switches 0:5c4d7b2438d3 764 int32_t (*GetBlock)(uint64_t addr, ARM_STORAGE_BLOCK *block);
switches 0:5c4d7b2438d3 765 } const ARM_DRIVER_STORAGE;
switches 0:5c4d7b2438d3 766
switches 0:5c4d7b2438d3 767 #ifdef __cplusplus
switches 0:5c4d7b2438d3 768 }
switches 0:5c4d7b2438d3 769 #endif // __cplusplus
switches 0:5c4d7b2438d3 770
switches 0:5c4d7b2438d3 771 #endif /* __DRIVER_STORAGE_H */
switches 0:5c4d7b2438d3 772
switches 0:5c4d7b2438d3 773 /** @}*/