Simon Ford / NetServices

Version of http://mbed.org/cookbook/NetServicesTribute with setting set the same for LPC2368

Dependents:   UDPSocketExample 24LCxx_I2CApp WeatherPlatform_pachube HvZServerLib ... more

drv/usb/UsbInc.h@0:350011bf8be7, 2010-11-23 (annotated)

Committer:
simon
Date:
Tue Nov 23 14:15:36 2010 +0000
Revision:
0:350011bf8be7
Experimental version for testing UDP

Who changed what in which revision?

UserRevisionLine numberNew contents of line
simon 0:350011bf8be7 1
simon 0:350011bf8be7 2 /*
simon 0:350011bf8be7 3 Copyright (c) 2010 Donatien Garnier (donatiengar [at] gmail [dot] com)
simon 0:350011bf8be7 4
simon 0:350011bf8be7 5 Permission is hereby granted, free of charge, to any person obtaining a copy
simon 0:350011bf8be7 6 of this software and associated documentation files (the "Software"), to deal
simon 0:350011bf8be7 7 in the Software without restriction, including without limitation the rights
simon 0:350011bf8be7 8 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
simon 0:350011bf8be7 9 copies of the Software, and to permit persons to whom the Software is
simon 0:350011bf8be7 10 furnished to do so, subject to the following conditions:
simon 0:350011bf8be7 11
simon 0:350011bf8be7 12 The above copyright notice and this permission notice shall be included in
simon 0:350011bf8be7 13 all copies or substantial portions of the Software.
simon 0:350011bf8be7 14
simon 0:350011bf8be7 15 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
simon 0:350011bf8be7 16 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
simon 0:350011bf8be7 17 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
simon 0:350011bf8be7 18 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
simon 0:350011bf8be7 19 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
simon 0:350011bf8be7 20 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
simon 0:350011bf8be7 21 THE SOFTWARE.
simon 0:350011bf8be7 22 */
simon 0:350011bf8be7 23
simon 0:350011bf8be7 24 #ifndef USB_INC_H
simon 0:350011bf8be7 25 #define USB_INC_H
simon 0:350011bf8be7 26
simon 0:350011bf8be7 27 #include "mbed.h"
simon 0:350011bf8be7 28
simon 0:350011bf8be7 29 #define MIN(a,b) ((a)<(b)?(a):(b))
simon 0:350011bf8be7 30 #define MAX(a,b) ((a)>(b)?(a):(b))
simon 0:350011bf8be7 31
simon 0:350011bf8be7 32 //typedef int32_t RC;
simon 0:350011bf8be7 33
simon 0:350011bf8be7 34 typedef uint8_t byte;
simon 0:350011bf8be7 35 typedef uint16_t word;
simon 0:350011bf8be7 36
simon 0:350011bf8be7 37 enum UsbErr
simon 0:350011bf8be7 38 {
simon 0:350011bf8be7 39 __USBERR_MIN = -0xFFFF,
simon 0:350011bf8be7 40 USBERR_DISCONNECTED,
simon 0:350011bf8be7 41 USBERR_NOTFOUND,
simon 0:350011bf8be7 42 USBERR_BADCONFIG,
simon 0:350011bf8be7 43 USBERR_PROCESSING,
simon 0:350011bf8be7 44 USBERR_HALTED, //Transfer on an ep is stalled
simon 0:350011bf8be7 45 USBERR_BUSY,
simon 0:350011bf8be7 46 USBERR_TDFAIL,
simon 0:350011bf8be7 47 USBERR_ERROR,
simon 0:350011bf8be7 48 USBERR_OK = 0
simon 0:350011bf8be7 49 };
simon 0:350011bf8be7 50
simon 0:350011bf8be7 51
simon 0:350011bf8be7 52 /* From NXP's USBHostLite stack's usbhost_lpc17xx.h */
simon 0:350011bf8be7 53 /* Only the types names have been changed to avoid unecessary typedefs */
simon 0:350011bf8be7 54
simon 0:350011bf8be7 55
simon 0:350011bf8be7 56 /*
simon 0:350011bf8be7 57 **************************************************************************************************************
simon 0:350011bf8be7 58 * NXP USB Host Stack
simon 0:350011bf8be7 59 *
simon 0:350011bf8be7 60 * (c) Copyright 2008, NXP SemiConductors
simon 0:350011bf8be7 61 * (c) Copyright 2008, OnChip Technologies LLC
simon 0:350011bf8be7 62 * All Rights Reserved
simon 0:350011bf8be7 63 *
simon 0:350011bf8be7 64 * www.nxp.com
simon 0:350011bf8be7 65 * www.onchiptech.com
simon 0:350011bf8be7 66 *
simon 0:350011bf8be7 67 * File : usbhost_lpc17xx.h
simon 0:350011bf8be7 68 * Programmer(s) : Ravikanth.P
simon 0:350011bf8be7 69 * Version :
simon 0:350011bf8be7 70 *
simon 0:350011bf8be7 71 **************************************************************************************************************
simon 0:350011bf8be7 72 */
simon 0:350011bf8be7 73
simon 0:350011bf8be7 74
simon 0:350011bf8be7 75
simon 0:350011bf8be7 76 /*
simon 0:350011bf8be7 77 **************************************************************************************************************
simon 0:350011bf8be7 78 * OHCI OPERATIONAL REGISTER FIELD DEFINITIONS
simon 0:350011bf8be7 79 **************************************************************************************************************
simon 0:350011bf8be7 80 */
simon 0:350011bf8be7 81
simon 0:350011bf8be7 82 /* ------------------ HcControl Register --------------------- */
simon 0:350011bf8be7 83 #define OR_CONTROL_CLE 0x00000010
simon 0:350011bf8be7 84 #define OR_CONTROL_BLE 0x00000020
simon 0:350011bf8be7 85 #define OR_CONTROL_HCFS 0x000000C0
simon 0:350011bf8be7 86 #define OR_CONTROL_HC_OPER 0x00000080
simon 0:350011bf8be7 87 /* ----------------- HcCommandStatus Register ----------------- */
simon 0:350011bf8be7 88 #define OR_CMD_STATUS_HCR 0x00000001
simon 0:350011bf8be7 89 #define OR_CMD_STATUS_CLF 0x00000002
simon 0:350011bf8be7 90 #define OR_CMD_STATUS_BLF 0x00000004
simon 0:350011bf8be7 91 /* --------------- HcInterruptStatus Register ----------------- */
simon 0:350011bf8be7 92 #define OR_INTR_STATUS_WDH 0x00000002
simon 0:350011bf8be7 93 #define OR_INTR_STATUS_RHSC 0x00000040
simon 0:350011bf8be7 94 #define OR_INTR_STATUS_UE 0x00000010
simon 0:350011bf8be7 95 /* --------------- HcInterruptEnable Register ----------------- */
simon 0:350011bf8be7 96 #define OR_INTR_ENABLE_WDH 0x00000002
simon 0:350011bf8be7 97 #define OR_INTR_ENABLE_RHSC 0x00000040
simon 0:350011bf8be7 98 #define OR_INTR_ENABLE_MIE 0x80000000
simon 0:350011bf8be7 99 /* ---------------- HcRhDescriptorA Register ------------------ */
simon 0:350011bf8be7 100 #define OR_RH_STATUS_LPSC 0x00010000
simon 0:350011bf8be7 101 #define OR_RH_STATUS_DRWE 0x00008000
simon 0:350011bf8be7 102 /* -------------- HcRhPortStatus[1:NDP] Register -------------- */
simon 0:350011bf8be7 103 #define OR_RH_PORT_CCS 0x00000001
simon 0:350011bf8be7 104 #define OR_RH_PORT_PRS 0x00000010
simon 0:350011bf8be7 105 #define OR_RH_PORT_CSC 0x00010000
simon 0:350011bf8be7 106 #define OR_RH_PORT_PRSC 0x00100000
simon 0:350011bf8be7 107
simon 0:350011bf8be7 108
simon 0:350011bf8be7 109 /*
simon 0:350011bf8be7 110 **************************************************************************************************************
simon 0:350011bf8be7 111 * FRAME INTERVAL
simon 0:350011bf8be7 112 **************************************************************************************************************
simon 0:350011bf8be7 113 */
simon 0:350011bf8be7 114
simon 0:350011bf8be7 115 #define FI 0x2EDF /* 12000 bits per frame (-1) */
simon 0:350011bf8be7 116 #define DEFAULT_FMINTERVAL ((((6 * (FI - 210)) / 7) << 16) | FI)
simon 0:350011bf8be7 117
simon 0:350011bf8be7 118 /*
simon 0:350011bf8be7 119 **************************************************************************************************************
simon 0:350011bf8be7 120 * ENDPOINT DESCRIPTOR CONTROL FIELDS
simon 0:350011bf8be7 121 **************************************************************************************************************
simon 0:350011bf8be7 122 */
simon 0:350011bf8be7 123
simon 0:350011bf8be7 124 #define ED_SKIP (uint32_t) (0x00001000) /* Skip this ep in queue */
simon 0:350011bf8be7 125
simon 0:350011bf8be7 126 /*
simon 0:350011bf8be7 127 **************************************************************************************************************
simon 0:350011bf8be7 128 * TRANSFER DESCRIPTOR CONTROL FIELDS
simon 0:350011bf8be7 129 **************************************************************************************************************
simon 0:350011bf8be7 130 */
simon 0:350011bf8be7 131
simon 0:350011bf8be7 132 #define TD_ROUNDING (uint32_t) (0x00040000) /* Buffer Rounding */
simon 0:350011bf8be7 133 #define TD_SETUP (uint32_t)(0) /* Direction of Setup Packet */
simon 0:350011bf8be7 134 #define TD_IN (uint32_t)(0x00100000) /* Direction In */
simon 0:350011bf8be7 135 #define TD_OUT (uint32_t)(0x00080000) /* Direction Out */
simon 0:350011bf8be7 136 #define TD_DELAY_INT(x) (uint32_t)((x) << 21) /* Delay Interrupt */
simon 0:350011bf8be7 137 #define TD_TOGGLE_0 (uint32_t)(0x02000000) /* Toggle 0 */
simon 0:350011bf8be7 138 #define TD_TOGGLE_1 (uint32_t)(0x03000000) /* Toggle 1 */
simon 0:350011bf8be7 139 #define TD_CC (uint32_t)(0xF0000000) /* Completion Code */
simon 0:350011bf8be7 140
simon 0:350011bf8be7 141 /*
simon 0:350011bf8be7 142 **************************************************************************************************************
simon 0:350011bf8be7 143 * USB STANDARD REQUEST DEFINITIONS
simon 0:350011bf8be7 144 **************************************************************************************************************
simon 0:350011bf8be7 145 */
simon 0:350011bf8be7 146
simon 0:350011bf8be7 147 #define USB_DESCRIPTOR_TYPE_DEVICE 1
simon 0:350011bf8be7 148 #define USB_DESCRIPTOR_TYPE_CONFIGURATION 2
simon 0:350011bf8be7 149 #define USB_DESCRIPTOR_TYPE_INTERFACE 4
simon 0:350011bf8be7 150 #define USB_DESCRIPTOR_TYPE_ENDPOINT 5
simon 0:350011bf8be7 151 /* ----------- Control RequestType Fields ----------- */
simon 0:350011bf8be7 152 #define USB_DEVICE_TO_HOST 0x80
simon 0:350011bf8be7 153 #define USB_HOST_TO_DEVICE 0x00
simon 0:350011bf8be7 154 #define USB_REQUEST_TYPE_CLASS 0x20
simon 0:350011bf8be7 155 #define USB_RECIPIENT_DEVICE 0x00
simon 0:350011bf8be7 156 #define USB_RECIPIENT_INTERFACE 0x01
simon 0:350011bf8be7 157 /* -------------- USB Standard Requests -------------- */
simon 0:350011bf8be7 158 #define SET_ADDRESS 5
simon 0:350011bf8be7 159 #define GET_DESCRIPTOR 6
simon 0:350011bf8be7 160 #define SET_CONFIGURATION 9
simon 0:350011bf8be7 161 #define SET_INTERFACE 11
simon 0:350011bf8be7 162
simon 0:350011bf8be7 163 /*
simon 0:350011bf8be7 164 **************************************************************************************************************
simon 0:350011bf8be7 165 * TYPE DEFINITIONS
simon 0:350011bf8be7 166 **************************************************************************************************************
simon 0:350011bf8be7 167 */
simon 0:350011bf8be7 168
simon 0:350011bf8be7 169 typedef struct hcEd { /* ----------- HostController EndPoint Descriptor ------------- */
simon 0:350011bf8be7 170 volatile uint32_t Control; /* Endpoint descriptor control */
simon 0:350011bf8be7 171 volatile uint32_t TailTd; /* Physical address of tail in Transfer descriptor list */
simon 0:350011bf8be7 172 volatile uint32_t HeadTd; /* Physcial address of head in Transfer descriptor list */
simon 0:350011bf8be7 173 volatile uint32_t Next; /* Physical address of next Endpoint descriptor */
simon 0:350011bf8be7 174 } HCED;
simon 0:350011bf8be7 175
simon 0:350011bf8be7 176 typedef struct hcTd { /* ------------ HostController Transfer Descriptor ------------ */
simon 0:350011bf8be7 177 volatile uint32_t Control; /* Transfer descriptor control */
simon 0:350011bf8be7 178 volatile uint32_t CurrBufPtr; /* Physical address of current buffer pointer */
simon 0:350011bf8be7 179 volatile uint32_t Next; /* Physical pointer to next Transfer Descriptor */
simon 0:350011bf8be7 180 volatile uint32_t BufEnd; /* Physical address of end of buffer */
simon 0:350011bf8be7 181 } HCTD;
simon 0:350011bf8be7 182
simon 0:350011bf8be7 183 typedef struct hcca { /* ----------- Host Controller Communication Area ------------ */
simon 0:350011bf8be7 184 volatile uint32_t IntTable[32]; /* Interrupt Table */
simon 0:350011bf8be7 185 volatile uint32_t FrameNumber; /* Frame Number */
simon 0:350011bf8be7 186 volatile uint32_t DoneHead; /* Done Head */
simon 0:350011bf8be7 187 volatile uint8_t Reserved[116]; /* Reserved for future use */
simon 0:350011bf8be7 188 volatile uint8_t Unknown[4]; /* Unused */
simon 0:350011bf8be7 189 } HCCA;
simon 0:350011bf8be7 190
simon 0:350011bf8be7 191
simon 0:350011bf8be7 192
simon 0:350011bf8be7 193 #endif