Sille Van Landschoot / SX1272Lib

SX1272Lib

Fork of SX1272Lib by Semtech

sx1272/sx1272-hal.cpp@6:3dbddff60dc9, 2016-06-10 (annotated)

Committer:
sillevl
Date:
Fri Jun 10 17:25:26 2016 +0000
Revision:
6:3dbddff60dc9
Parent:
4:90bd79f1b458
Child:
7:91ad5308e1a2
add support for lpc1768 and rfm95 WIP !

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mluis 0:45c4f0364ca4 1 /*
mluis 0:45c4f0364ca4 2 / _____) _ | |
mluis 0:45c4f0364ca4 3 ( (____ _____ ____ _| |_ _____ ____| |__
mluis 0:45c4f0364ca4 4 \____ \| ___ | (_ _) ___ |/ ___) _ \
mluis 0:45c4f0364ca4 5 _____) ) ____| | | || |_| ____( (___| | | |
mluis 0:45c4f0364ca4 6 (______/|_____)_|_|_| \__)_____)\____)_| |_|
mluis 0:45c4f0364ca4 7 (C) 2015 Semtech
mluis 0:45c4f0364ca4 8
mluis 0:45c4f0364ca4 9 Description: -
mluis 0:45c4f0364ca4 10
mluis 0:45c4f0364ca4 11 License: Revised BSD License, see LICENSE.TXT file include in the project
mluis 0:45c4f0364ca4 12
mluis 0:45c4f0364ca4 13 Maintainers: Miguel Luis, Gregory Cristian and Nicolas Huguenin
mluis 0:45c4f0364ca4 14 */
mluis 0:45c4f0364ca4 15 #include "sx1272-hal.h"
mluis 0:45c4f0364ca4 16
GregCr 2:cd1093b6676f 17 const RadioRegisters_t SX1272MB2xAS::RadioRegsInit[] = RADIO_INIT_REGISTERS_VALUE;
mluis 0:45c4f0364ca4 18
GregCr 2:cd1093b6676f 19 SX1272MB2xAS::SX1272MB2xAS( RadioEvents_t *events,
mluis 0:45c4f0364ca4 20 PinName mosi, PinName miso, PinName sclk, PinName nss, PinName reset,
mluis 0:45c4f0364ca4 21 PinName dio0, PinName dio1, PinName dio2, PinName dio3, PinName dio4, PinName dio5,
mluis 0:45c4f0364ca4 22 #if defined ( TARGET_MOTE_L152RC )
mluis 0:45c4f0364ca4 23 PinName rfSwitchCntr1, PinName rfSwitchCntr2 )
dudmuck 1:b0372ef620d0 24 #elif defined ( TARGET_MTS_MDOT_F411RE )
dudmuck 1:b0372ef620d0 25 PinName txctl, PinName rxctl )
mluis 0:45c4f0364ca4 26 #else
mluis 0:45c4f0364ca4 27 PinName antSwitch )
mluis 0:45c4f0364ca4 28 #endif
mluis 0:45c4f0364ca4 29 : SX1272( events, mosi, miso, sclk, nss, reset, dio0, dio1, dio2, dio3, dio4, dio5 ),
mluis 0:45c4f0364ca4 30 #if defined ( TARGET_MOTE_L152RC )
mluis 0:45c4f0364ca4 31 RfSwitchCntr1( rfSwitchCntr1 ),
mluis 0:45c4f0364ca4 32 RfSwitchCntr2( rfSwitchCntr2 ),
dudmuck 1:b0372ef620d0 33 PwrAmpCntr( PD_2 )
dudmuck 1:b0372ef620d0 34 #elif defined ( TARGET_MTS_MDOT_F411RE )
dudmuck 1:b0372ef620d0 35 TxCtl ( txctl ),
dudmuck 1:b0372ef620d0 36 RxCtl ( rxctl )
mluis 0:45c4f0364ca4 37 #else
mluis 0:45c4f0364ca4 38 AntSwitch( antSwitch ),
mluis 0:45c4f0364ca4 39 #if( defined ( TARGET_NUCLEO_L152RE ) )
dudmuck 1:b0372ef620d0 40 Fake( D8 )
mluis 0:45c4f0364ca4 41 #else
mluis 0:45c4f0364ca4 42 Fake( A3 )
mluis 0:45c4f0364ca4 43 #endif
mluis 0:45c4f0364ca4 44 #endif
mluis 0:45c4f0364ca4 45 {
mluis 0:45c4f0364ca4 46 this->RadioEvents = events;
mluis 0:45c4f0364ca4 47
mluis 0:45c4f0364ca4 48 Reset( );
mluis 4:90bd79f1b458 49
mluis 0:45c4f0364ca4 50 IoInit( );
mluis 4:90bd79f1b458 51
mluis 0:45c4f0364ca4 52 SetOpMode( RF_OPMODE_SLEEP );
mluis 4:90bd79f1b458 53
mluis 0:45c4f0364ca4 54 IoIrqInit( dioIrq );
mluis 4:90bd79f1b458 55
mluis 0:45c4f0364ca4 56 RadioRegistersInit( );
mluis 0:45c4f0364ca4 57
mluis 0:45c4f0364ca4 58 SetModem( MODEM_FSK );
mluis 0:45c4f0364ca4 59
mluis 0:45c4f0364ca4 60 this->settings.State = RF_IDLE ;
mluis 0:45c4f0364ca4 61 }
mluis 0:45c4f0364ca4 62
mluis 4:90bd79f1b458 63 SX1272MB2xAS::SX1272MB2xAS( RadioEvents_t *events )
mluis 0:45c4f0364ca4 64 #if defined ( TARGET_NUCLEO_L152RE )
mluis 0:45c4f0364ca4 65 : SX1272( events, D11, D12, D13, D10, A0, D2, D3, D4, D5, A3, D9 ), // For NUCLEO L152RE dio4 is on port A3
mluis 0:45c4f0364ca4 66 AntSwitch( A4 ),
mluis 0:45c4f0364ca4 67 Fake( D8 )
mluis 0:45c4f0364ca4 68 #elif defined ( TARGET_MOTE_L152RC )
mluis 0:45c4f0364ca4 69 : SX1272( events, PB_15, PB_14, PB_13, PB_12, PC_2, PC_6, PC_10, PC_11, PC_8, PC_9, PC_12 ),
mluis 0:45c4f0364ca4 70 RfSwitchCntr1( PC_4 ),
mluis 0:45c4f0364ca4 71 RfSwitchCntr2( PC_13 ),
mluis 0:45c4f0364ca4 72 PwrAmpCntr( PD_2 )
dudmuck 1:b0372ef620d0 73 #elif defined ( TARGET_MTS_MDOT_F411RE )
dudmuck 1:b0372ef620d0 74 : SX1272( events, LORA_MOSI, LORA_MISO, LORA_SCK, LORA_NSS, LORA_RESET, LORA_DIO0, LORA_DIO1, LORA_DIO2, LORA_DIO3, LORA_DIO4, LORA_DIO5 ),
dudmuck 1:b0372ef620d0 75 TxCtl( LORA_TXCTL ),
mluis 4:90bd79f1b458 76 RxCtl( LORA_RXCTL )
sillevl 6:3dbddff60dc9 77 #elif defined ( TARGET_MBED_LPC1768 )
sillevl 6:3dbddff60dc9 78 : SX1272( events, p5, p6, p7, p8, p9, p10, p11, p12, p13, p14, p15 ),
sillevl 6:3dbddff60dc9 79 AntSwitch( p16 ),
sillevl 6:3dbddff60dc9 80 Fake( p17 )
mluis 0:45c4f0364ca4 81 #else
mluis 0:45c4f0364ca4 82 : SX1272( events, D11, D12, D13, D10, A0, D2, D3, D4, D5, D8, D9 ),
mluis 0:45c4f0364ca4 83 AntSwitch( A4 ),
mluis 0:45c4f0364ca4 84 Fake( A3 )
mluis 0:45c4f0364ca4 85 #endif
mluis 0:45c4f0364ca4 86 {
mluis 0:45c4f0364ca4 87 this->RadioEvents = events;
mluis 0:45c4f0364ca4 88
mluis 0:45c4f0364ca4 89 Reset( );
mluis 4:90bd79f1b458 90
mluis 0:45c4f0364ca4 91 boardConnected = UNKNOWN;
mluis 4:90bd79f1b458 92
mluis 0:45c4f0364ca4 93 DetectBoardType( );
mluis 4:90bd79f1b458 94
mluis 0:45c4f0364ca4 95 IoInit( );
mluis 4:90bd79f1b458 96
mluis 0:45c4f0364ca4 97 SetOpMode( RF_OPMODE_SLEEP );
mluis 0:45c4f0364ca4 98 IoIrqInit( dioIrq );
mluis 4:90bd79f1b458 99
mluis 0:45c4f0364ca4 100 RadioRegistersInit( );
mluis 0:45c4f0364ca4 101
mluis 0:45c4f0364ca4 102 SetModem( MODEM_FSK );
mluis 0:45c4f0364ca4 103
mluis 0:45c4f0364ca4 104 this->settings.State = RF_IDLE ;
mluis 0:45c4f0364ca4 105 }
mluis 0:45c4f0364ca4 106
mluis 0:45c4f0364ca4 107 //-------------------------------------------------------------------------
mluis 0:45c4f0364ca4 108 // Board relative functions
mluis 0:45c4f0364ca4 109 //-------------------------------------------------------------------------
GregCr 2:cd1093b6676f 110 uint8_t SX1272MB2xAS::DetectBoardType( void )
mluis 0:45c4f0364ca4 111 {
mluis 0:45c4f0364ca4 112 if( boardConnected == UNKNOWN )
mluis 0:45c4f0364ca4 113 {
mluis 0:45c4f0364ca4 114 #if defined ( TARGET_MOTE_L152RC )
mluis 0:45c4f0364ca4 115 boardConnected = NA_MOTE_72;
dudmuck 1:b0372ef620d0 116 #elif defined ( TARGET_MTS_MDOT_F411RE )
dudmuck 1:b0372ef620d0 117 boardConnected = MDOT_F411RE;
sillevl 6:3dbddff60dc9 118 #elif defined ( TARGET_MBED_LPC1768 )
sillevl 6:3dbddff60dc9 119 boardConnected = LPC1768_RFM95;
mluis 0:45c4f0364ca4 120 #else
mluis 0:45c4f0364ca4 121 this->AntSwitch.input( );
mluis 0:45c4f0364ca4 122 wait_ms( 1 );
mluis 0:45c4f0364ca4 123 if( this->AntSwitch == 1 )
mluis 0:45c4f0364ca4 124 {
mluis 0:45c4f0364ca4 125 boardConnected = SX1272MB1DCS;
mluis 0:45c4f0364ca4 126 }
mluis 0:45c4f0364ca4 127 else
mluis 0:45c4f0364ca4 128 {
GregCr 2:cd1093b6676f 129 boardConnected = SX1272MB2XAS;
mluis 0:45c4f0364ca4 130 }
mluis 0:45c4f0364ca4 131 this->AntSwitch.output( );
mluis 0:45c4f0364ca4 132 wait_ms( 1 );
mluis 0:45c4f0364ca4 133 #endif
mluis 0:45c4f0364ca4 134 }
mluis 0:45c4f0364ca4 135 return ( boardConnected );
mluis 0:45c4f0364ca4 136 }
mluis 0:45c4f0364ca4 137
GregCr 2:cd1093b6676f 138 void SX1272MB2xAS::IoInit( void )
mluis 0:45c4f0364ca4 139 {
mluis 0:45c4f0364ca4 140 AntSwInit( );
mluis 0:45c4f0364ca4 141 SpiInit( );
mluis 0:45c4f0364ca4 142 }
mluis 0:45c4f0364ca4 143
GregCr 2:cd1093b6676f 144 void SX1272MB2xAS::RadioRegistersInit( )
mluis 0:45c4f0364ca4 145 {
mluis 0:45c4f0364ca4 146 uint8_t i = 0;
mluis 0:45c4f0364ca4 147 for( i = 0; i < sizeof( RadioRegsInit ) / sizeof( RadioRegisters_t ); i++ )
mluis 0:45c4f0364ca4 148 {
mluis 0:45c4f0364ca4 149 SetModem( RadioRegsInit[i].Modem );
mluis 0:45c4f0364ca4 150 Write( RadioRegsInit[i].Addr, RadioRegsInit[i].Value );
mluis 0:45c4f0364ca4 151 }
mluis 0:45c4f0364ca4 152 }
mluis 0:45c4f0364ca4 153
GregCr 2:cd1093b6676f 154 void SX1272MB2xAS::SpiInit( void )
mluis 0:45c4f0364ca4 155 {
mluis 0:45c4f0364ca4 156 nss = 1;
mluis 0:45c4f0364ca4 157 spi.format( 8,0 );
mluis 0:45c4f0364ca4 158 uint32_t frequencyToSet = 8000000;
sillevl 6:3dbddff60dc9 159 #if( defined ( TARGET_NUCLEO_L152RE ) || defined ( TARGET_MOTE_L152RC ) || defined ( TARGET_LPC11U6X ) || defined ( TARGET_MTS_MDOT_F411RE ) || defined ( TARGET_MBED_LPC1768 ) )
mluis 0:45c4f0364ca4 160 spi.frequency( frequencyToSet );
mluis 0:45c4f0364ca4 161 #elif( defined ( TARGET_KL25Z ) ) //busclock frequency is halved -> double the spi frequency to compensate
mluis 0:45c4f0364ca4 162 spi.frequency( frequencyToSet * 2 );
mluis 0:45c4f0364ca4 163 #else
mluis 0:45c4f0364ca4 164 #warning "Check the board's SPI frequency"
mluis 0:45c4f0364ca4 165 #endif
mluis 0:45c4f0364ca4 166 wait(0.1);
mluis 0:45c4f0364ca4 167 }
mluis 0:45c4f0364ca4 168
GregCr 2:cd1093b6676f 169 void SX1272MB2xAS::IoIrqInit( DioIrqHandler *irqHandlers )
mluis 0:45c4f0364ca4 170 {
mluis 0:45c4f0364ca4 171 #if( defined ( TARGET_NUCLEO_L152RE ) || defined ( TARGET_MOTE_L152RC ) || defined ( TARGET_LPC11U6X ) )
mluis 0:45c4f0364ca4 172 dio0.mode( PullDown );
mluis 0:45c4f0364ca4 173 dio1.mode( PullDown );
mluis 0:45c4f0364ca4 174 dio2.mode( PullDown );
mluis 0:45c4f0364ca4 175 dio3.mode( PullDown );
mluis 0:45c4f0364ca4 176 dio4.mode( PullDown );
mluis 0:45c4f0364ca4 177 #endif
GregCr 2:cd1093b6676f 178 dio0.rise( this, static_cast< TriggerMB2xAS > ( irqHandlers[0] ) );
GregCr 2:cd1093b6676f 179 dio1.rise( this, static_cast< TriggerMB2xAS > ( irqHandlers[1] ) );
GregCr 2:cd1093b6676f 180 dio2.rise( this, static_cast< TriggerMB2xAS > ( irqHandlers[2] ) );
GregCr 2:cd1093b6676f 181 dio3.rise( this, static_cast< TriggerMB2xAS > ( irqHandlers[3] ) );
GregCr 2:cd1093b6676f 182 dio4.rise( this, static_cast< TriggerMB2xAS > ( irqHandlers[4] ) );
mluis 0:45c4f0364ca4 183 }
mluis 0:45c4f0364ca4 184
GregCr 2:cd1093b6676f 185 void SX1272MB2xAS::IoDeInit( void )
mluis 0:45c4f0364ca4 186 {
mluis 0:45c4f0364ca4 187 //nothing
mluis 0:45c4f0364ca4 188 }
mluis 0:45c4f0364ca4 189
GregCr 2:cd1093b6676f 190 uint8_t SX1272MB2xAS::GetPaSelect( uint32_t channel )
mluis 0:45c4f0364ca4 191 {
sillevl 6:3dbddff60dc9 192 if( boardConnected == SX1272MB1DCS || boardConnected == MDOT_F411RE || boardConnected == LPC1768_RFM95 )
mluis 0:45c4f0364ca4 193 {
mluis 0:45c4f0364ca4 194 return RF_PACONFIG_PASELECT_PABOOST;
mluis 0:45c4f0364ca4 195 }
mluis 0:45c4f0364ca4 196 else
mluis 0:45c4f0364ca4 197 {
mluis 0:45c4f0364ca4 198 return RF_PACONFIG_PASELECT_RFO;
mluis 0:45c4f0364ca4 199 }
mluis 0:45c4f0364ca4 200 }
mluis 0:45c4f0364ca4 201
GregCr 2:cd1093b6676f 202 void SX1272MB2xAS::SetAntSwLowPower( bool status )
mluis 0:45c4f0364ca4 203 {
mluis 0:45c4f0364ca4 204 if( isRadioActive != status )
mluis 0:45c4f0364ca4 205 {
mluis 0:45c4f0364ca4 206 isRadioActive = status;
mluis 0:45c4f0364ca4 207
mluis 0:45c4f0364ca4 208 if( status == false )
mluis 0:45c4f0364ca4 209 {
mluis 0:45c4f0364ca4 210 AntSwInit( );
mluis 0:45c4f0364ca4 211 }
mluis 0:45c4f0364ca4 212 else
mluis 0:45c4f0364ca4 213 {
mluis 0:45c4f0364ca4 214 AntSwDeInit( );
mluis 0:45c4f0364ca4 215 }
mluis 0:45c4f0364ca4 216 }
mluis 0:45c4f0364ca4 217 }
mluis 0:45c4f0364ca4 218
GregCr 2:cd1093b6676f 219 void SX1272MB2xAS::AntSwInit( void )
mluis 0:45c4f0364ca4 220 {
mluis 0:45c4f0364ca4 221 #if defined ( TARGET_MOTE_L152RC )
mluis 0:45c4f0364ca4 222 this->RfSwitchCntr1 = 0;
mluis 0:45c4f0364ca4 223 this->RfSwitchCntr2 = 0;
mluis 0:45c4f0364ca4 224 this->PwrAmpCntr = 0;
dudmuck 1:b0372ef620d0 225 #elif defined ( TARGET_MTS_MDOT_F411RE )
dudmuck 1:b0372ef620d0 226 this->TxCtl = 0;
dudmuck 1:b0372ef620d0 227 this->RxCtl = 0;
mluis 0:45c4f0364ca4 228 #else
mluis 0:45c4f0364ca4 229 this->AntSwitch = 0;
mluis 0:45c4f0364ca4 230 #endif
mluis 0:45c4f0364ca4 231 }
mluis 0:45c4f0364ca4 232
GregCr 2:cd1093b6676f 233 void SX1272MB2xAS::AntSwDeInit( void )
mluis 0:45c4f0364ca4 234 {
mluis 0:45c4f0364ca4 235 #if defined ( TARGET_MOTE_L152RC )
mluis 0:45c4f0364ca4 236 this->RfSwitchCntr1 = 0;
mluis 0:45c4f0364ca4 237 this->RfSwitchCntr2 = 0;
mluis 0:45c4f0364ca4 238 this->PwrAmpCntr = 0;
dudmuck 1:b0372ef620d0 239 #elif defined ( TARGET_MTS_MDOT_F411RE )
dudmuck 1:b0372ef620d0 240 this->TxCtl = 0;
dudmuck 1:b0372ef620d0 241 this->RxCtl = 0;
mluis 0:45c4f0364ca4 242 #else
mluis 0:45c4f0364ca4 243 this->AntSwitch = 0;
mluis 0:45c4f0364ca4 244 #endif
mluis 0:45c4f0364ca4 245 }
mluis 0:45c4f0364ca4 246
GregCr 2:cd1093b6676f 247 void SX1272MB2xAS::SetAntSw( uint8_t rxTx )
mluis 0:45c4f0364ca4 248 {
mluis 0:45c4f0364ca4 249 #if defined ( TARGET_MOTE_L152RC )
mluis 0:45c4f0364ca4 250 switch( this->currentOpMode )
mluis 0:45c4f0364ca4 251 {
mluis 0:45c4f0364ca4 252 case RFLR_OPMODE_TRANSMITTER:
mluis 0:45c4f0364ca4 253 if( ( Read( REG_PACONFIG ) & RF_PACONFIG_PASELECT_PABOOST ) == RF_PACONFIG_PASELECT_PABOOST )
mluis 0:45c4f0364ca4 254 {
mluis 0:45c4f0364ca4 255 this->RfSwitchCntr1 = 1;
mluis 0:45c4f0364ca4 256 this->RfSwitchCntr2 = 0;
mluis 0:45c4f0364ca4 257 }
mluis 0:45c4f0364ca4 258 else
mluis 0:45c4f0364ca4 259 {
mluis 0:45c4f0364ca4 260 this->RfSwitchCntr1 = 0;
mluis 0:45c4f0364ca4 261 this->RfSwitchCntr2 = 1;
mluis 0:45c4f0364ca4 262 }
mluis 0:45c4f0364ca4 263 break;
mluis 0:45c4f0364ca4 264 case RFLR_OPMODE_RECEIVER:
mluis 0:45c4f0364ca4 265 case RFLR_OPMODE_RECEIVER_SINGLE:
mluis 0:45c4f0364ca4 266 case RFLR_OPMODE_CAD:
mluis 0:45c4f0364ca4 267 this->RfSwitchCntr1 = 1;
mluis 0:45c4f0364ca4 268 this->RfSwitchCntr2 = 1;
mluis 0:45c4f0364ca4 269 break;
mluis 0:45c4f0364ca4 270 default:
mluis 0:45c4f0364ca4 271 this->RfSwitchCntr1 = 0;
mluis 0:45c4f0364ca4 272 this->RfSwitchCntr2 = 0;
mluis 0:45c4f0364ca4 273 this->PwrAmpCntr = 0;
mluis 0:45c4f0364ca4 274 break;
mluis 0:45c4f0364ca4 275 }
dudmuck 1:b0372ef620d0 276 #elif defined ( TARGET_MTS_MDOT_F411RE )
dudmuck 1:b0372ef620d0 277 /* SKY13350 */
dudmuck 1:b0372ef620d0 278 this->rxTx = rxTx;
dudmuck 1:b0372ef620d0 279
dudmuck 1:b0372ef620d0 280 // 1: Tx, 0: Rx
dudmuck 1:b0372ef620d0 281 if( rxTx != 0 )
dudmuck 1:b0372ef620d0 282 {
dudmuck 1:b0372ef620d0 283 this->TxCtl = 1;
dudmuck 1:b0372ef620d0 284 this->RxCtl = 0;
dudmuck 1:b0372ef620d0 285 }
dudmuck 1:b0372ef620d0 286 else
dudmuck 1:b0372ef620d0 287 {
dudmuck 1:b0372ef620d0 288 this->TxCtl = 0;
dudmuck 1:b0372ef620d0 289 this->RxCtl = 1;
dudmuck 1:b0372ef620d0 290 }
mluis 0:45c4f0364ca4 291 #else
mluis 0:45c4f0364ca4 292 this->rxTx = rxTx;
mluis 0:45c4f0364ca4 293
mluis 0:45c4f0364ca4 294 // 1: Tx, 0: Rx
mluis 0:45c4f0364ca4 295 if( rxTx != 0 )
mluis 0:45c4f0364ca4 296 {
mluis 0:45c4f0364ca4 297 this->AntSwitch = 1;
mluis 0:45c4f0364ca4 298 }
mluis 0:45c4f0364ca4 299 else
mluis 0:45c4f0364ca4 300 {
mluis 0:45c4f0364ca4 301 this->AntSwitch = 0;
mluis 0:45c4f0364ca4 302 }
mluis 0:45c4f0364ca4 303 #endif
mluis 0:45c4f0364ca4 304 }
mluis 0:45c4f0364ca4 305
GregCr 2:cd1093b6676f 306 bool SX1272MB2xAS::CheckRfFrequency( uint32_t frequency )
mluis 0:45c4f0364ca4 307 {
mluis 0:45c4f0364ca4 308 //TODO: Implement check, currently all frequencies are supported
mluis 0:45c4f0364ca4 309 return true;
mluis 0:45c4f0364ca4 310 }
mluis 0:45c4f0364ca4 311
mluis 0:45c4f0364ca4 312
GregCr 2:cd1093b6676f 313 void SX1272MB2xAS::Reset( void )
mluis 0:45c4f0364ca4 314 {
mluis 0:45c4f0364ca4 315 reset.output();
mluis 0:45c4f0364ca4 316 reset = 0;
mluis 0:45c4f0364ca4 317 wait_ms( 1 );
mluis 0:45c4f0364ca4 318 reset.input();
mluis 0:45c4f0364ca4 319 wait_ms( 6 );
mluis 0:45c4f0364ca4 320 }
mluis 0:45c4f0364ca4 321
GregCr 2:cd1093b6676f 322 void SX1272MB2xAS::Write( uint8_t addr, uint8_t data )
mluis 0:45c4f0364ca4 323 {
mluis 0:45c4f0364ca4 324 Write( addr, &data, 1 );
mluis 0:45c4f0364ca4 325 }
mluis 0:45c4f0364ca4 326
GregCr 2:cd1093b6676f 327 uint8_t SX1272MB2xAS::Read( uint8_t addr )
mluis 0:45c4f0364ca4 328 {
mluis 0:45c4f0364ca4 329 uint8_t data;
mluis 0:45c4f0364ca4 330 Read( addr, &data, 1 );
mluis 0:45c4f0364ca4 331 return data;
mluis 0:45c4f0364ca4 332 }
mluis 0:45c4f0364ca4 333
GregCr 2:cd1093b6676f 334 void SX1272MB2xAS::Write( uint8_t addr, uint8_t *buffer, uint8_t size )
mluis 0:45c4f0364ca4 335 {
mluis 0:45c4f0364ca4 336 uint8_t i;
mluis 0:45c4f0364ca4 337
mluis 0:45c4f0364ca4 338 nss = 0;
mluis 0:45c4f0364ca4 339 spi.write( addr | 0x80 );
mluis 0:45c4f0364ca4 340 for( i = 0; i < size; i++ )
mluis 0:45c4f0364ca4 341 {
mluis 0:45c4f0364ca4 342 spi.write( buffer[i] );
mluis 0:45c4f0364ca4 343 }
mluis 0:45c4f0364ca4 344 nss = 1;
mluis 0:45c4f0364ca4 345 }
mluis 0:45c4f0364ca4 346
GregCr 2:cd1093b6676f 347 void SX1272MB2xAS::Read( uint8_t addr, uint8_t *buffer, uint8_t size )
mluis 0:45c4f0364ca4 348 {
mluis 0:45c4f0364ca4 349 uint8_t i;
mluis 0:45c4f0364ca4 350
mluis 0:45c4f0364ca4 351 nss = 0;
mluis 0:45c4f0364ca4 352 spi.write( addr & 0x7F );
mluis 0:45c4f0364ca4 353 for( i = 0; i < size; i++ )
mluis 0:45c4f0364ca4 354 {
mluis 0:45c4f0364ca4 355 buffer[i] = spi.write( 0 );
mluis 0:45c4f0364ca4 356 }
mluis 0:45c4f0364ca4 357 nss = 1;
mluis 0:45c4f0364ca4 358 }
mluis 0:45c4f0364ca4 359
GregCr 2:cd1093b6676f 360 void SX1272MB2xAS::WriteFifo( uint8_t *buffer, uint8_t size )
mluis 0:45c4f0364ca4 361 {
mluis 0:45c4f0364ca4 362 Write( 0, buffer, size );
mluis 0:45c4f0364ca4 363 }
mluis 0:45c4f0364ca4 364
GregCr 2:cd1093b6676f 365 void SX1272MB2xAS::ReadFifo( uint8_t *buffer, uint8_t size )
mluis 0:45c4f0364ca4 366 {
mluis 0:45c4f0364ca4 367 Read( 0, buffer, size );
mluis 0:45c4f0364ca4 368 }