seiichi horie / unzen_lpcxpresso_4337

First Publish. Works fine.

Dependents:   unzen_sample_lpcxpresso_4337_callbacks

unzen_hal.h@17:3db85c854f56, 2016-06-11 (annotated)

Committer:
shorie
Date:
Sat Jun 11 04:53:08 2016 +0000
Revision:
17:3db85c854f56
Parent:
2:6613e62da521 
Fixed comment for sample

Who changed what in which revision?

UserRevisionLine numberNew contents of line
shorie 0:5ac19c994288 1 #ifndef _UNZEN_HAL_H_
shorie 0:5ac19c994288 2 #define _UNZEN_HAL_H_
shorie 0:5ac19c994288 3
shorie 0:5ac19c994288 4 #include "mbed.h"
shorie 0:5ac19c994288 5
shorie 0:5ac19c994288 6 namespace unzen
shorie 0:5ac19c994288 7 {
shorie 0:5ac19c994288 8 // Set up I2S peripheral to ready to start.
shorie 0:5ac19c994288 9 // By this HAL, the I2S have to become :
shorie 0:5ac19c994288 10 // - slave mode
shorie 0:5ac19c994288 11 // - clock must be ready
shorie 2:6613e62da521 12 void hal_i2s_setup(void);
shorie 0:5ac19c994288 13
shorie 1:9710fb328a08 14 // configure the pins of I2S and then, wait for WS.
shorie 1:9710fb328a08 15 // This waiting is important to avoid the delay between TX and RX.
shorie 1:9710fb328a08 16 // The HAL API will wait for the WS changes from left to right then return.
shorie 1:9710fb328a08 17 // The procesure is :
shorie 2:6613e62da521 18 // 1. configure WS pin as GPIO
shorie 2:6613e62da521 19 // 2. wait the WS rising edge
shorie 2:6613e62da521 20 // 3. configure all pins as I2S
shorie 2:6613e62da521 21 void hal_i2s_pin_config_and_wait_ws(void);
shorie 1:9710fb328a08 22
shorie 1:9710fb328a08 23
shorie 0:5ac19c994288 24 // Start I2S transfer. Interrupt starts
shorie 2:6613e62da521 25 void hal_i2s_start(void);
shorie 2:6613e62da521 26
shorie 2:6613e62da521 27 // returns the IRQ ID for I2S RX interrupt
shorie 2:6613e62da521 28 IRQn_Type hal_get_i2s_irq_id(void);
shorie 0:5ac19c994288 29
shorie 2:6613e62da521 30 // returns the IRQ ID for process IRQ. Typically, this is allocated to the reserved IRQ.
shorie 2:6613e62da521 31 IRQn_Type hal_get_process_irq_id(void);
shorie 2:6613e62da521 32
shorie 2:6613e62da521 33 // The returned value must be compatible with CMSIS NVIC_SetPriority() API. That mean, it is integer like 0, 1, 2...
shorie 2:6613e62da521 34 unsigned int hal_get_i2s_irq_priority_level(void);
shorie 2:6613e62da521 35
shorie 2:6613e62da521 36 // The returned value must be compatible with CMSIS NVIC_SetPriority() API. That mean, it is integer like 0, 1, 2...
shorie 2:6613e62da521 37 unsigned int hal_get_process_irq_priority_level(void);
shorie 2:6613e62da521 38
shorie 0:5ac19c994288 39
shorie 0:5ac19c994288 40 // reutun the intenger value which tells how much data have to be transfered for each
shorie 0:5ac19c994288 41 // interrupt. For example, if the stereo 32bit data ( total 64 bit ) have to be sent,
shorie 0:5ac19c994288 42 // have to return 2.
shorie 2:6613e62da521 43 unsigned int hal_data_per_sample(void);
shorie 2:6613e62da521 44
shorie 2:6613e62da521 45 // get data from I2S RX peripheral. Where sample is one audio data. Stereo data is constructed by 2 samples.
shorie 2:6613e62da521 46 void hal_get_i2s_rx_data( int & sample);
shorie 0:5ac19c994288 47
shorie 2:6613e62da521 48 // put data into I2S TX peripheral. Where sample is one audio data. Stereo data is constructed by 2 samples.
shorie 2:6613e62da521 49 void hal_put_i2s_tx_data( int sample );
shorie 0:5ac19c994288 50 }
shorie 0:5ac19c994288 51
shorie 0:5ac19c994288 52
shorie 0:5ac19c994288 53 #endif