First publishment of Shimabara Audio Codec Controller library. Including code for ADAU1361 and UMB-ADAU1361A. Working pretty fine. Checked with LPCXpresso 4337 and Unzen_lpc4337
Dependents: unzen_sample_LPC4088_quickstart unzen_sample_lpcxpresso_4337_callbacks unzen_sample_nucleo_f746 unzen_delay_sample_nucleo_f746 ... more
shimabaraは、mbedからオーディオ・コーデックのハードウェアを操作するクラス・ライブラリです。このライブラリは雲仙オーディオ・フレームワークと共に使うことを想定して開発しましたが、独立して使うことも可能です。
使い方
shimabaraは BaseAudioCodec, ADAU1361, UMB_ADAU1361Aの三つのクラスを定義しています。いずれのクラスも名前空間simabaraに属しています。実際のアプリケーションで使用するのはshimabara::UMB_ADAU1361Aだけで、このクラスはアクアシグナルのUMB-ADAU1361-Aに対応しています。ヘッダーファイルは umb_adau1361a.hです。
shimabara::UMB_ADAU1361Aのコンストラクタは三つの引数を受け取ります。
- Fs はサンプル周波数です。これはenum Fs_type型の引数で、やはり名前空間shimabaraに属しています。
- controller はADAU1361Aが接続されているI2Cポートに対応するI2Cオブジェクトを与えます。shimabaraはこのポートを通してCODECと通信します。
- Addrには、コーデックのI2Cアドレスを与えます。現時点ではこの引数は0x38固定です。
コンストラクタでオブジェクトを初期化したら、start()メソッドを呼んでください。これでshimabaraはコーデックと通信し、I2Sモードでの動作が始まります。
参考リンク
- 『雲仙』 オーディオ・フレームワーク
- skeleton_unzen_nucleo_f746 Nucleo F746ZGおよびUI基板を使う場合のスケルトンプログラム。F746を使う方はここから読み始めると良いでしょう。
umb_adau1361a.h@3:c0f834049ee2, 2016-05-14 (annotated)
- Committer:
- shorie
- Date:
- Sat May 14 21:37:32 2016 +0000
- Revision:
- 3:c0f834049ee2
- Parent:
- 2:fba0b8afebf0
- Child:
- 4:a838173c951d
First Publishment
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
shorie | 3:c0f834049ee2 | 1 | /* |
shorie | 2:fba0b8afebf0 | 2 | * \brief header file for the UMB-ADAU1361A codec board controler |
shorie | 1:ea6d442bd68a | 3 | * \arthur SeiichiHorie |
shorie | 1:ea6d442bd68a | 4 | * \date 8/May/2016 |
shorie | 1:ea6d442bd68a | 5 | */ |
shorie | 1:ea6d442bd68a | 6 | |
shorie | 1:ea6d442bd68a | 7 | #ifndef _UMB_ADAU1361A_H_ |
shorie | 1:ea6d442bd68a | 8 | #define _UMB_ADAU1361A_H_ |
shorie | 1:ea6d442bd68a | 9 | |
shorie | 1:ea6d442bd68a | 10 | #include "adau1361.h" |
shorie | 1:ea6d442bd68a | 11 | #include "mbed.h" |
shorie | 1:ea6d442bd68a | 12 | /** |
shorie | 1:ea6d442bd68a | 13 | \brief audio framework name space. |
shorie | 1:ea6d442bd68a | 14 | */ |
shorie | 2:fba0b8afebf0 | 15 | namespace shimabara |
shorie | 1:ea6d442bd68a | 16 | { |
shorie | 1:ea6d442bd68a | 17 | |
shorie | 1:ea6d442bd68a | 18 | |
shorie | 1:ea6d442bd68a | 19 | /** |
shorie | 1:ea6d442bd68a | 20 | * \brief UMB-ADAU1361-A audio codec board controller. |
shorie | 1:ea6d442bd68a | 21 | * \details |
shorie | 1:ea6d442bd68a | 22 | * This class send a set of command to control an UMB-ADAU1361-A codec board. |
shorie | 1:ea6d442bd68a | 23 | * |
shorie | 1:ea6d442bd68a | 24 | * The hardware desription is here. http://dsps.shop-pro.jp/?pid=82798273 |
shorie | 3:c0f834049ee2 | 25 | |
shorie | 3:c0f834049ee2 | 26 | |
shorie | 3:c0f834049ee2 | 27 | example : |
shorie | 3:c0f834049ee2 | 28 | \code |
shorie | 3:c0f834049ee2 | 29 | #include "unzen.h" // audio framework include file |
shorie | 3:c0f834049ee2 | 30 | #include "umb_adau1361a.h" // audio codec contoler include file |
shorie | 3:c0f834049ee2 | 31 | #include "mbed.h" |
shorie | 3:c0f834049ee2 | 32 | |
shorie | 3:c0f834049ee2 | 33 | #define CODEC_I2C_ADDR 0x38 |
shorie | 3:c0f834049ee2 | 34 | |
shorie | 3:c0f834049ee2 | 35 | DigitalOut myled1(LED1); |
shorie | 3:c0f834049ee2 | 36 | |
shorie | 3:c0f834049ee2 | 37 | |
shorie | 3:c0f834049ee2 | 38 | // customer signal processing initialization call back. |
shorie | 3:c0f834049ee2 | 39 | void init_callback( |
shorie | 3:c0f834049ee2 | 40 | unsigned int block_size // block size [sample] |
shorie | 3:c0f834049ee2 | 41 | ) |
shorie | 3:c0f834049ee2 | 42 | { |
shorie | 3:c0f834049ee2 | 43 | // place initialization code here |
shorie | 3:c0f834049ee2 | 44 | } |
shorie | 3:c0f834049ee2 | 45 | |
shorie | 3:c0f834049ee2 | 46 | |
shorie | 3:c0f834049ee2 | 47 | // customer signal processing call back. |
shorie | 3:c0f834049ee2 | 48 | void process_callback( |
shorie | 3:c0f834049ee2 | 49 | float rx_left_buffer[], // array of the left input samples |
shorie | 3:c0f834049ee2 | 50 | float rx_right_buffer[], // array of the right input samples |
shorie | 3:c0f834049ee2 | 51 | float tx_left_buffer[], // place to write the left output samples |
shorie | 3:c0f834049ee2 | 52 | float tx_right_buffer[], // place to write the left output samples |
shorie | 3:c0f834049ee2 | 53 | unsigned int block_size // block size [sample] |
shorie | 3:c0f834049ee2 | 54 | ) |
shorie | 3:c0f834049ee2 | 55 | { |
shorie | 3:c0f834049ee2 | 56 | // Sample processing |
shorie | 3:c0f834049ee2 | 57 | for ( int i=0; i<block_size; i++) // for all sample |
shorie | 3:c0f834049ee2 | 58 | { |
shorie | 3:c0f834049ee2 | 59 | tx_left_buffer[i] = rx_left_buffer[i]; // copy from input to output |
shorie | 3:c0f834049ee2 | 60 | tx_right_buffer[i] = rx_right_buffer[i]; |
shorie | 3:c0f834049ee2 | 61 | |
shorie | 3:c0f834049ee2 | 62 | } |
shorie | 3:c0f834049ee2 | 63 | } |
shorie | 3:c0f834049ee2 | 64 | |
shorie | 3:c0f834049ee2 | 65 | |
shorie | 3:c0f834049ee2 | 66 | |
shorie | 3:c0f834049ee2 | 67 | int main() |
shorie | 3:c0f834049ee2 | 68 | { |
shorie | 3:c0f834049ee2 | 69 | // I2C is essential to talk with ADAU1361 |
shorie | 3:c0f834049ee2 | 70 | I2C i2c(SDA, SCL); |
shorie | 3:c0f834049ee2 | 71 | |
shorie | 3:c0f834049ee2 | 72 | // create an audio codec contoler |
shorie | 3:c0f834049ee2 | 73 | shimabara::UMB_ADAU1361A codec(shimabara::Fs_32, &i2c, CODEC_I2C_ADDR ); // Default Fs is 48kHz |
shorie | 3:c0f834049ee2 | 74 | // shimabara::UMB_ADAU1361A codec(shimabara::Fs_441, &i2c, CODEC_I2C_ADDR ); |
shorie | 3:c0f834049ee2 | 75 | // shimabara::UMB_ADAU1361A codec(shimabara::Fs_48, &i2c, CODEC_I2C_ADDR ); |
shorie | 3:c0f834049ee2 | 76 | // shimabara::UMB_ADAU1361A codec(shimabara::Fs_96, &i2c, CODEC_I2C_ADDR ); |
shorie | 3:c0f834049ee2 | 77 | |
shorie | 3:c0f834049ee2 | 78 | // create an audio framework by singlton pattern |
shorie | 3:c0f834049ee2 | 79 | unzen::Framework audio; |
shorie | 3:c0f834049ee2 | 80 | |
shorie | 3:c0f834049ee2 | 81 | // Set I3C clock to 10kHz |
shorie | 3:c0f834049ee2 | 82 | i2c.frequency( 10000 ); |
shorie | 3:c0f834049ee2 | 83 | |
shorie | 3:c0f834049ee2 | 84 | |
shorie | 3:c0f834049ee2 | 85 | // Configure the optional block size of signal processing. By default, it is 1[Sample] |
shorie | 3:c0f834049ee2 | 86 | // audio.set_block_size(16); |
shorie | 3:c0f834049ee2 | 87 | |
shorie | 3:c0f834049ee2 | 88 | |
shorie | 3:c0f834049ee2 | 89 | // Start the ADAU1361. Audio codec starts to generate the I2C signals |
shorie | 3:c0f834049ee2 | 90 | codec.start(); |
shorie | 3:c0f834049ee2 | 91 | |
shorie | 3:c0f834049ee2 | 92 | // Start the audio framework on ARM processor. |
shorie | 3:c0f834049ee2 | 93 | audio.start( init_callback, process_callback); // path the initializaiton and process call back to framework |
shorie | 3:c0f834049ee2 | 94 | |
shorie | 3:c0f834049ee2 | 95 | |
shorie | 3:c0f834049ee2 | 96 | // periodically changing gain for test |
shorie | 3:c0f834049ee2 | 97 | while(1) |
shorie | 3:c0f834049ee2 | 98 | { |
shorie | 3:c0f834049ee2 | 99 | for ( int i=-15; i<4; i++ ) |
shorie | 3:c0f834049ee2 | 100 | { |
shorie | 3:c0f834049ee2 | 101 | codec.set_hp_output_gain( i, i ); |
shorie | 3:c0f834049ee2 | 102 | codec.set_line_output_gain( i, i ); |
shorie | 3:c0f834049ee2 | 103 | myled1 = 1; |
shorie | 3:c0f834049ee2 | 104 | wait(0.2); |
shorie | 3:c0f834049ee2 | 105 | myled1 = 0; |
shorie | 3:c0f834049ee2 | 106 | wait(0.2); |
shorie | 3:c0f834049ee2 | 107 | } |
shorie | 3:c0f834049ee2 | 108 | } |
shorie | 3:c0f834049ee2 | 109 | } |
shorie | 3:c0f834049ee2 | 110 | |
shorie | 3:c0f834049ee2 | 111 | |
shorie | 3:c0f834049ee2 | 112 | \endcode |
shorie | 1:ea6d442bd68a | 113 | */ |
shorie | 1:ea6d442bd68a | 114 | class UMB_ADAU1361A:public Adau1361 |
shorie | 1:ea6d442bd68a | 115 | { |
shorie | 1:ea6d442bd68a | 116 | public: |
shorie | 1:ea6d442bd68a | 117 | /** |
shorie | 1:ea6d442bd68a | 118 | * \brief constructor. |
shorie | 1:ea6d442bd68a | 119 | * \param controler Pass the I2C controler object. |
shorie | 1:ea6d442bd68a | 120 | * \param Fs Sampling frequency. |
shorie | 1:ea6d442bd68a | 121 | * \param Addr I2C device address. value range is from 0 to 127 |
shorie | 1:ea6d442bd68a | 122 | * \details |
shorie | 1:ea6d442bd68a | 123 | * initialize the internal variables. |
shorie | 1:ea6d442bd68a | 124 | */ |
shorie | 2:fba0b8afebf0 | 125 | UMB_ADAU1361A( Fs_Type Fs, I2C * controler, unsigned int Addr ): |
shorie | 2:fba0b8afebf0 | 126 | Adau1361( Fs, controler, Addr ){}; |
shorie | 1:ea6d442bd68a | 127 | protected: |
shorie | 1:ea6d442bd68a | 128 | /** |
shorie | 1:ea6d442bd68a | 129 | * \brief configuration of the PLL for the desired Fs. |
shorie | 1:ea6d442bd68a | 130 | * \details |
shorie | 1:ea6d442bd68a | 131 | * Configure the PLL based on the given Fs and hardware clock configuration. |
shorie | 1:ea6d442bd68a | 132 | * Fs is stored in fs member variable already. Hadrware clock have to be given |
shorie | 1:ea6d442bd68a | 133 | * from the circuit designer. For the UMB-ADAU1361-A, the clock is external |
shorie | 1:ea6d442bd68a | 134 | * 12MHz oscillator from the clock input. |
shorie | 1:ea6d442bd68a | 135 | */ |
shorie | 1:ea6d442bd68a | 136 | virtual void configure_pll(void); |
shorie | 1:ea6d442bd68a | 137 | /** |
shorie | 1:ea6d442bd68a | 138 | * \brief configuration of the the codec for UMB-ADAU1361-A |
shorie | 1:ea6d442bd68a | 139 | * \details |
shorie | 1:ea6d442bd68a | 140 | * Configure Internal signal pass and parameters for UMB-ADAU1361. |
shorie | 1:ea6d442bd68a | 141 | * The all pass-through signals are shut off. All cross channel signals are shut off. |
shorie | 1:ea6d442bd68a | 142 | * Monoral output is disabled. |
shorie | 1:ea6d442bd68a | 143 | */ |
shorie | 1:ea6d442bd68a | 144 | virtual void configure_board(void); |
shorie | 1:ea6d442bd68a | 145 | }; |
shorie | 1:ea6d442bd68a | 146 | |
shorie | 1:ea6d442bd68a | 147 | } |
shorie | 1:ea6d442bd68a | 148 | |
shorie | 1:ea6d442bd68a | 149 | #endif |