SG12864A

Dependents:   SG12864A_TestProgram

Committer:
shintamainjp
Date:
Mon Jul 19 12:43:25 2010 +0000
Revision:
0:238f2d048222
Child:
1:aacd73a4e7ee

        

Who changed what in which revision?

UserRevisionLine numberNew contents of line
shintamainjp 0:238f2d048222 1 /**
shintamainjp 0:238f2d048222 2 * SG12864A Graphics LCD module driver class (Version 0.0.1)
shintamainjp 0:238f2d048222 3 *
shintamainjp 0:238f2d048222 4 * Copyright (C) 2010 Shinichiro Nakamura (CuBeatSystems)
shintamainjp 0:238f2d048222 5 * http://shinta.main.jp/
shintamainjp 0:238f2d048222 6 */
shintamainjp 0:238f2d048222 7
shintamainjp 0:238f2d048222 8 #include "SG12864A.h"
shintamainjp 0:238f2d048222 9
shintamainjp 0:238f2d048222 10 SG12864A::SG12864A(PinName di,
shintamainjp 0:238f2d048222 11 PinName rw,
shintamainjp 0:238f2d048222 12 PinName en,
shintamainjp 0:238f2d048222 13 PinName db0,
shintamainjp 0:238f2d048222 14 PinName db1,
shintamainjp 0:238f2d048222 15 PinName db2,
shintamainjp 0:238f2d048222 16 PinName db3,
shintamainjp 0:238f2d048222 17 PinName db4,
shintamainjp 0:238f2d048222 18 PinName db5,
shintamainjp 0:238f2d048222 19 PinName db6,
shintamainjp 0:238f2d048222 20 PinName db7,
shintamainjp 0:238f2d048222 21 PinName cs1,
shintamainjp 0:238f2d048222 22 PinName cs2,
shintamainjp 0:238f2d048222 23 PinName res)
shintamainjp 0:238f2d048222 24 :
shintamainjp 0:238f2d048222 25 ioDI(di),
shintamainjp 0:238f2d048222 26 ioRW(rw),
shintamainjp 0:238f2d048222 27 ioEN(en),
shintamainjp 0:238f2d048222 28 ioDB(db0, db1, db2, db3, db4, db5, db6, db7),
shintamainjp 0:238f2d048222 29 ioCS1(cs1),
shintamainjp 0:238f2d048222 30 ioCS2(cs2),
shintamainjp 0:238f2d048222 31 ioRES(res) {
shintamainjp 0:238f2d048222 32 setDirectionToWrite();
shintamainjp 0:238f2d048222 33 }
shintamainjp 0:238f2d048222 34
shintamainjp 0:238f2d048222 35 SG12864A::~SG12864A() {
shintamainjp 0:238f2d048222 36 }
shintamainjp 0:238f2d048222 37
shintamainjp 0:238f2d048222 38 /**
shintamainjp 0:238f2d048222 39 * High Level Interface.
shintamainjp 0:238f2d048222 40 *
shintamainjp 0:238f2d048222 41 * Reset display module.
shintamainjp 0:238f2d048222 42 */
shintamainjp 0:238f2d048222 43 void SG12864A::reset(void) {
shintamainjp 0:238f2d048222 44 setDisplayOnOff(SG12864A::CS1, false);
shintamainjp 0:238f2d048222 45 setDisplayOnOff(SG12864A::CS2, false);
shintamainjp 0:238f2d048222 46 clear();
shintamainjp 0:238f2d048222 47
shintamainjp 0:238f2d048222 48 reset(true);
shintamainjp 0:238f2d048222 49 wait_ms(200);
shintamainjp 0:238f2d048222 50 reset(false);
shintamainjp 0:238f2d048222 51 wait_ms(200);
shintamainjp 0:238f2d048222 52
shintamainjp 0:238f2d048222 53 setDisplayOnOff(SG12864A::CS1, true);
shintamainjp 0:238f2d048222 54 setDisplayOnOff(SG12864A::CS2, true);
shintamainjp 0:238f2d048222 55 setDisplayStartLine(SG12864A::CS1, 0);
shintamainjp 0:238f2d048222 56 setDisplayStartLine(SG12864A::CS2, 0);
shintamainjp 0:238f2d048222 57 setPageAddress(SG12864A::CS1, 0);
shintamainjp 0:238f2d048222 58 setPageAddress(SG12864A::CS2, 0);
shintamainjp 0:238f2d048222 59 setColumnAddress(SG12864A::CS1, 0);
shintamainjp 0:238f2d048222 60 setColumnAddress(SG12864A::CS2, 0);
shintamainjp 0:238f2d048222 61 }
shintamainjp 0:238f2d048222 62
shintamainjp 0:238f2d048222 63 /**
shintamainjp 0:238f2d048222 64 * High Level Interface.
shintamainjp 0:238f2d048222 65 *
shintamainjp 0:238f2d048222 66 * Clear display module.
shintamainjp 0:238f2d048222 67 */
shintamainjp 0:238f2d048222 68 void SG12864A::clear(void) {
shintamainjp 0:238f2d048222 69 for (uint8_t page = 0; page < PAGES; page++) {
shintamainjp 0:238f2d048222 70 for (uint8_t column = 0; column < COLUMNS; column++) {
shintamainjp 0:238f2d048222 71 // CS1
shintamainjp 0:238f2d048222 72 setPageAddress(SG12864A::CS1, page);
shintamainjp 0:238f2d048222 73 setColumnAddress(SG12864A::CS1, column);
shintamainjp 0:238f2d048222 74 writeData(CS1, 0x00);
shintamainjp 0:238f2d048222 75 // CS2
shintamainjp 0:238f2d048222 76 setPageAddress(SG12864A::CS2, page);
shintamainjp 0:238f2d048222 77 setColumnAddress(SG12864A::CS2, column);
shintamainjp 0:238f2d048222 78 writeData(CS2, 0x00);
shintamainjp 0:238f2d048222 79 }
shintamainjp 0:238f2d048222 80 }
shintamainjp 0:238f2d048222 81 // CS1
shintamainjp 0:238f2d048222 82 setPageAddress(SG12864A::CS1, 0);
shintamainjp 0:238f2d048222 83 setColumnAddress(SG12864A::CS1, 0);
shintamainjp 0:238f2d048222 84 writeData(CS1, 0x00);
shintamainjp 0:238f2d048222 85 // CS2
shintamainjp 0:238f2d048222 86 setPageAddress(SG12864A::CS2, 0);
shintamainjp 0:238f2d048222 87 setColumnAddress(SG12864A::CS2, 0);
shintamainjp 0:238f2d048222 88 writeData(CS2, 0x00);
shintamainjp 0:238f2d048222 89 }
shintamainjp 0:238f2d048222 90
shintamainjp 0:238f2d048222 91 /**
shintamainjp 0:238f2d048222 92 * Middle Level Interface.
shintamainjp 0:238f2d048222 93 *
shintamainjp 0:238f2d048222 94 * Set display on/off.
shintamainjp 0:238f2d048222 95 *
shintamainjp 0:238f2d048222 96 * @param t Target (CS1, CS2).
shintamainjp 0:238f2d048222 97 * @param on ON/OFF (true, false).
shintamainjp 0:238f2d048222 98 */
shintamainjp 0:238f2d048222 99 void SG12864A::setDisplayOnOff(Target t, bool on) {
shintamainjp 0:238f2d048222 100 setDirectionToWrite();
shintamainjp 0:238f2d048222 101 uint8_t c = 0x3e | (on ? 0x01 : 0x00);
shintamainjp 0:238f2d048222 102 write(t, SG12864A::Instruction, c);
shintamainjp 0:238f2d048222 103 wait_us(1);
shintamainjp 0:238f2d048222 104 }
shintamainjp 0:238f2d048222 105
shintamainjp 0:238f2d048222 106 /**
shintamainjp 0:238f2d048222 107 * Middle Level Interface.
shintamainjp 0:238f2d048222 108 *
shintamainjp 0:238f2d048222 109 * Set display start line.
shintamainjp 0:238f2d048222 110 *
shintamainjp 0:238f2d048222 111 * @param t Target (CS1, CS2).
shintamainjp 0:238f2d048222 112 * @param addr Display start line (0-63).
shintamainjp 0:238f2d048222 113 */
shintamainjp 0:238f2d048222 114 void SG12864A::setDisplayStartLine(Target t, uint8_t addr) {
shintamainjp 0:238f2d048222 115 setDirectionToWrite();
shintamainjp 0:238f2d048222 116 uint8_t c = 0xc0 | (addr & 0x3f);
shintamainjp 0:238f2d048222 117 write(t, SG12864A::Instruction, c);
shintamainjp 0:238f2d048222 118 wait_us(1);
shintamainjp 0:238f2d048222 119 }
shintamainjp 0:238f2d048222 120
shintamainjp 0:238f2d048222 121 /**
shintamainjp 0:238f2d048222 122 * Middle Level Interface.
shintamainjp 0:238f2d048222 123 *
shintamainjp 0:238f2d048222 124 * Set page address.
shintamainjp 0:238f2d048222 125 *
shintamainjp 0:238f2d048222 126 * @param t Target (CS1, CS2).
shintamainjp 0:238f2d048222 127 * @param addr Page address(0-7).
shintamainjp 0:238f2d048222 128 */
shintamainjp 0:238f2d048222 129 void SG12864A::setPageAddress(Target t, uint8_t addr) {
shintamainjp 0:238f2d048222 130 setDirectionToWrite();
shintamainjp 0:238f2d048222 131 uint8_t c = 0xb8 | (addr & 0x07);
shintamainjp 0:238f2d048222 132 write(t, SG12864A::Instruction, c);
shintamainjp 0:238f2d048222 133 wait_us(1);
shintamainjp 0:238f2d048222 134 }
shintamainjp 0:238f2d048222 135
shintamainjp 0:238f2d048222 136 /**
shintamainjp 0:238f2d048222 137 * Middle Level Interface.
shintamainjp 0:238f2d048222 138 *
shintamainjp 0:238f2d048222 139 * Set column address.
shintamainjp 0:238f2d048222 140 *
shintamainjp 0:238f2d048222 141 * @param t Target. (CS1, CS2)
shintamainjp 0:238f2d048222 142 * @param addr Column address (0-63).
shintamainjp 0:238f2d048222 143 */
shintamainjp 0:238f2d048222 144 void SG12864A::setColumnAddress(Target t, uint8_t addr) {
shintamainjp 0:238f2d048222 145 setDirectionToWrite();
shintamainjp 0:238f2d048222 146 uint8_t c = 0x40 | (addr & 0x3f);
shintamainjp 0:238f2d048222 147 write(t, SG12864A::Instruction, c);
shintamainjp 0:238f2d048222 148 wait_us(1);
shintamainjp 0:238f2d048222 149 }
shintamainjp 0:238f2d048222 150
shintamainjp 0:238f2d048222 151 /**
shintamainjp 0:238f2d048222 152 * Middle Level Interface.
shintamainjp 0:238f2d048222 153 */
shintamainjp 0:238f2d048222 154 void SG12864A::readStatus(Target t, uint8_t *c) {
shintamainjp 0:238f2d048222 155 setDirectionToRead();
shintamainjp 0:238f2d048222 156 read(t, SG12864A::Instruction, c);
shintamainjp 0:238f2d048222 157 wait_us(1);
shintamainjp 0:238f2d048222 158 }
shintamainjp 0:238f2d048222 159
shintamainjp 0:238f2d048222 160 /**
shintamainjp 0:238f2d048222 161 * Middle Level Interface.
shintamainjp 0:238f2d048222 162 */
shintamainjp 0:238f2d048222 163 void SG12864A::writeData(Target t, uint8_t c) {
shintamainjp 0:238f2d048222 164 setDirectionToWrite();
shintamainjp 0:238f2d048222 165 write(t, SG12864A::Data, c);
shintamainjp 0:238f2d048222 166 wait_us(1);
shintamainjp 0:238f2d048222 167 }
shintamainjp 0:238f2d048222 168
shintamainjp 0:238f2d048222 169 /**
shintamainjp 0:238f2d048222 170 * Middle Level Interface.
shintamainjp 0:238f2d048222 171 */
shintamainjp 0:238f2d048222 172 void SG12864A::readData(Target t, uint8_t *c) {
shintamainjp 0:238f2d048222 173 setDirectionToRead();
shintamainjp 0:238f2d048222 174 read(t, SG12864A::Data, c);
shintamainjp 0:238f2d048222 175 wait_us(1);
shintamainjp 0:238f2d048222 176 }
shintamainjp 0:238f2d048222 177
shintamainjp 0:238f2d048222 178 /**
shintamainjp 0:238f2d048222 179 * Low Level Interface.
shintamainjp 0:238f2d048222 180 */
shintamainjp 0:238f2d048222 181 void SG12864A::setDirectionToRead() {
shintamainjp 0:238f2d048222 182 ioDB.input();
shintamainjp 0:238f2d048222 183 ioRW = 1;
shintamainjp 0:238f2d048222 184 }
shintamainjp 0:238f2d048222 185
shintamainjp 0:238f2d048222 186 /**
shintamainjp 0:238f2d048222 187 * Low Level Interface.
shintamainjp 0:238f2d048222 188 */
shintamainjp 0:238f2d048222 189 void SG12864A::setDirectionToWrite() {
shintamainjp 0:238f2d048222 190 ioDB.output();
shintamainjp 0:238f2d048222 191 ioRW = 0;
shintamainjp 0:238f2d048222 192 }
shintamainjp 0:238f2d048222 193
shintamainjp 0:238f2d048222 194 /**
shintamainjp 0:238f2d048222 195 * Low Level Interface.
shintamainjp 0:238f2d048222 196 */
shintamainjp 0:238f2d048222 197 void SG12864A::write(Target t, Mode m, uint8_t c) {
shintamainjp 0:238f2d048222 198 switch (t) {
shintamainjp 0:238f2d048222 199 case CS1:
shintamainjp 0:238f2d048222 200 ioCS1 = 1;
shintamainjp 0:238f2d048222 201 ioCS2 = 0;
shintamainjp 0:238f2d048222 202 break;
shintamainjp 0:238f2d048222 203 case CS2:
shintamainjp 0:238f2d048222 204 ioCS1 = 0;
shintamainjp 0:238f2d048222 205 ioCS2 = 1;
shintamainjp 0:238f2d048222 206 break;
shintamainjp 0:238f2d048222 207 }
shintamainjp 0:238f2d048222 208 switch (m) {
shintamainjp 0:238f2d048222 209 case Data:
shintamainjp 0:238f2d048222 210 ioDI = 1;
shintamainjp 0:238f2d048222 211 break;
shintamainjp 0:238f2d048222 212 case Instruction:
shintamainjp 0:238f2d048222 213 ioDI = 0;
shintamainjp 0:238f2d048222 214 break;
shintamainjp 0:238f2d048222 215 }
shintamainjp 0:238f2d048222 216 ioDB = c;
shintamainjp 0:238f2d048222 217 wait_us(1);
shintamainjp 0:238f2d048222 218 ioEN = 1;
shintamainjp 0:238f2d048222 219 wait_us(1);
shintamainjp 0:238f2d048222 220 ioEN = 0;
shintamainjp 0:238f2d048222 221 wait_us(5);
shintamainjp 0:238f2d048222 222 }
shintamainjp 0:238f2d048222 223
shintamainjp 0:238f2d048222 224 /**
shintamainjp 0:238f2d048222 225 * Low Level Interface.
shintamainjp 0:238f2d048222 226 */
shintamainjp 0:238f2d048222 227 void SG12864A::read(Target t, Mode m, uint8_t *c) {
shintamainjp 0:238f2d048222 228 // TODO
shintamainjp 0:238f2d048222 229 }
shintamainjp 0:238f2d048222 230
shintamainjp 0:238f2d048222 231 /**
shintamainjp 0:238f2d048222 232 * Low Level Interface.
shintamainjp 0:238f2d048222 233 */
shintamainjp 0:238f2d048222 234 void SG12864A::reset(bool b) {
shintamainjp 0:238f2d048222 235 if (b) {
shintamainjp 0:238f2d048222 236 ioRES = 0;
shintamainjp 0:238f2d048222 237 } else {
shintamainjp 0:238f2d048222 238 ioRES = 1;
shintamainjp 0:238f2d048222 239 }
shintamainjp 0:238f2d048222 240 }