shao ziyang / mbed-dev

mbed library sources. Supersedes mbed-src. Add PORTG support for STM32L476JG (SensorTile kit)

Dependents:   SensorTileTest

Fork of mbed-dev by mbed official

targets/TARGET_NXP/TARGET_LPC23XX/serial_api.c@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/hal/TARGET_NXP/TARGET_LPC23XX/serial_api.c@144:ef7eb2e8f9f7 
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2006-2013 ARM Limited
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 144:ef7eb2e8f9f7 5 * you may not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 6 * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 144:ef7eb2e8f9f7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 13 * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 14 * limitations under the License.
<> 144:ef7eb2e8f9f7 15 */
<> 144:ef7eb2e8f9f7 16 // math.h required for floating point operations for baud rate calculation
<> 144:ef7eb2e8f9f7 17 #include "mbed_assert.h"
<> 144:ef7eb2e8f9f7 18 #include <math.h>
<> 144:ef7eb2e8f9f7 19 #include <string.h>
<> 144:ef7eb2e8f9f7 20 #include <stdlib.h>
<> 144:ef7eb2e8f9f7 21
<> 144:ef7eb2e8f9f7 22 #include "serial_api.h"
<> 144:ef7eb2e8f9f7 23 #include "cmsis.h"
<> 144:ef7eb2e8f9f7 24 #include "pinmap.h"
<> 144:ef7eb2e8f9f7 25
<> 144:ef7eb2e8f9f7 26 /******************************************************************************
<> 144:ef7eb2e8f9f7 27 * INITIALIZATION
<> 144:ef7eb2e8f9f7 28 ******************************************************************************/
<> 144:ef7eb2e8f9f7 29 #define UART_NUM 4
<> 144:ef7eb2e8f9f7 30
<> 144:ef7eb2e8f9f7 31 static const PinMap PinMap_UART_TX[] = {
<> 144:ef7eb2e8f9f7 32 {P0_0, UART_3, 2},
<> 144:ef7eb2e8f9f7 33 {P0_2, UART_0, 1},
<> 144:ef7eb2e8f9f7 34 {P0_10, UART_2, 1},
<> 144:ef7eb2e8f9f7 35 {P0_15, UART_1, 1},
<> 144:ef7eb2e8f9f7 36 {P0_25, UART_3, 3},
<> 144:ef7eb2e8f9f7 37 {P2_0 , UART_1, 2},
<> 144:ef7eb2e8f9f7 38 {P2_8 , UART_2, 2},
<> 144:ef7eb2e8f9f7 39 {P4_28, UART_3, 3},
<> 144:ef7eb2e8f9f7 40 {NC , NC , 0}
<> 144:ef7eb2e8f9f7 41 };
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 static const PinMap PinMap_UART_RX[] = {
<> 144:ef7eb2e8f9f7 44 {P0_1 , UART_3, 2},
<> 144:ef7eb2e8f9f7 45 {P0_3 , UART_0, 1},
<> 144:ef7eb2e8f9f7 46 {P0_11, UART_2, 1},
<> 144:ef7eb2e8f9f7 47 {P0_16, UART_1, 1},
<> 144:ef7eb2e8f9f7 48 {P0_26, UART_3, 3},
<> 144:ef7eb2e8f9f7 49 {P2_1 , UART_1, 2},
<> 144:ef7eb2e8f9f7 50 {P2_9 , UART_2, 2},
<> 144:ef7eb2e8f9f7 51 {P4_29, UART_3, 3},
<> 144:ef7eb2e8f9f7 52 {NC , NC , 0}
<> 144:ef7eb2e8f9f7 53 };
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55 static uint32_t serial_irq_ids[UART_NUM] = {0};
<> 144:ef7eb2e8f9f7 56 static uart_irq_handler irq_handler;
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 int stdio_uart_inited = 0;
<> 144:ef7eb2e8f9f7 59 serial_t stdio_uart;
<> 144:ef7eb2e8f9f7 60
<> 144:ef7eb2e8f9f7 61 void serial_init(serial_t *obj, PinName tx, PinName rx) {
<> 144:ef7eb2e8f9f7 62 int is_stdio_uart = 0;
<> 144:ef7eb2e8f9f7 63
<> 144:ef7eb2e8f9f7 64 // determine the UART to use
<> 144:ef7eb2e8f9f7 65 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
<> 144:ef7eb2e8f9f7 66 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
<> 144:ef7eb2e8f9f7 67 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
<> 144:ef7eb2e8f9f7 68 MBED_ASSERT((int)uart != NC);
<> 144:ef7eb2e8f9f7 69
<> 144:ef7eb2e8f9f7 70 obj->uart = (LPC_UART_TypeDef *)uart;
<> 144:ef7eb2e8f9f7 71 // enable power
<> 144:ef7eb2e8f9f7 72 switch (uart) {
<> 144:ef7eb2e8f9f7 73 case UART_0: LPC_SC->PCONP |= 1 << 3; break;
<> 144:ef7eb2e8f9f7 74 case UART_1: LPC_SC->PCONP |= 1 << 4; break;
<> 144:ef7eb2e8f9f7 75 case UART_2: LPC_SC->PCONP |= 1 << 24; break;
<> 144:ef7eb2e8f9f7 76 case UART_3: LPC_SC->PCONP |= 1 << 25; break;
<> 144:ef7eb2e8f9f7 77 }
<> 144:ef7eb2e8f9f7 78
<> 144:ef7eb2e8f9f7 79 // enable fifos and default rx trigger level
<> 144:ef7eb2e8f9f7 80 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
<> 144:ef7eb2e8f9f7 81 | 0 << 1 // Rx Fifo Reset
<> 144:ef7eb2e8f9f7 82 | 0 << 2 // Tx Fifo Reset
<> 144:ef7eb2e8f9f7 83 | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars
<> 144:ef7eb2e8f9f7 84
<> 144:ef7eb2e8f9f7 85 // disable irqs
<> 144:ef7eb2e8f9f7 86 obj->uart->IER = 0 << 0 // Rx Data available irq enable
<> 144:ef7eb2e8f9f7 87 | 0 << 1 // Tx Fifo empty irq enable
<> 144:ef7eb2e8f9f7 88 | 0 << 2; // Rx Line Status irq enable
<> 144:ef7eb2e8f9f7 89
<> 144:ef7eb2e8f9f7 90 // set default baud rate and format
<> 144:ef7eb2e8f9f7 91 serial_baud (obj, 9600);
<> 144:ef7eb2e8f9f7 92 serial_format(obj, 8, ParityNone, 1);
<> 144:ef7eb2e8f9f7 93
<> 144:ef7eb2e8f9f7 94 // pinout the chosen uart
<> 144:ef7eb2e8f9f7 95 pinmap_pinout(tx, PinMap_UART_TX);
<> 144:ef7eb2e8f9f7 96 pinmap_pinout(rx, PinMap_UART_RX);
<> 144:ef7eb2e8f9f7 97
<> 144:ef7eb2e8f9f7 98 // set rx/tx pins in PullUp mode
<> 144:ef7eb2e8f9f7 99 if (tx != NC) {
<> 144:ef7eb2e8f9f7 100 pin_mode(tx, PullUp);
<> 144:ef7eb2e8f9f7 101 }
<> 144:ef7eb2e8f9f7 102 if (rx != NC) {
<> 144:ef7eb2e8f9f7 103 pin_mode(rx, PullUp);
<> 144:ef7eb2e8f9f7 104 }
<> 144:ef7eb2e8f9f7 105
<> 144:ef7eb2e8f9f7 106 switch (uart) {
<> 144:ef7eb2e8f9f7 107 case UART_0: obj->index = 0; break;
<> 144:ef7eb2e8f9f7 108 case UART_1: obj->index = 1; break;
<> 144:ef7eb2e8f9f7 109 case UART_2: obj->index = 2; break;
<> 144:ef7eb2e8f9f7 110 case UART_3: obj->index = 3; break;
<> 144:ef7eb2e8f9f7 111 }
<> 144:ef7eb2e8f9f7 112
<> 144:ef7eb2e8f9f7 113 is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
<> 144:ef7eb2e8f9f7 114
<> 144:ef7eb2e8f9f7 115 if (is_stdio_uart) {
<> 144:ef7eb2e8f9f7 116 stdio_uart_inited = 1;
<> 144:ef7eb2e8f9f7 117 memcpy(&stdio_uart, obj, sizeof(serial_t));
<> 144:ef7eb2e8f9f7 118 }
<> 144:ef7eb2e8f9f7 119 }
<> 144:ef7eb2e8f9f7 120
<> 144:ef7eb2e8f9f7 121 void serial_free(serial_t *obj) {
<> 144:ef7eb2e8f9f7 122 serial_irq_ids[obj->index] = 0;
<> 144:ef7eb2e8f9f7 123 }
<> 144:ef7eb2e8f9f7 124
<> 144:ef7eb2e8f9f7 125 // serial_baud
<> 144:ef7eb2e8f9f7 126 // set the baud rate, taking in to account the current SystemFrequency
<> 144:ef7eb2e8f9f7 127 void serial_baud(serial_t *obj, int baudrate) {
<> 144:ef7eb2e8f9f7 128 MBED_ASSERT((int)obj->uart <= UART_3);
<> 144:ef7eb2e8f9f7 129 // The LPC2300 and LPC1700 have a divider and a fractional divider to control the
<> 144:ef7eb2e8f9f7 130 // baud rate. The formula is:
<> 144:ef7eb2e8f9f7 131 //
<> 144:ef7eb2e8f9f7 132 // Baudrate = (1 / PCLK) * 16 * DL * (1 + DivAddVal / MulVal)
<> 144:ef7eb2e8f9f7 133 // where:
<> 144:ef7eb2e8f9f7 134 // 1 < MulVal <= 15
<> 144:ef7eb2e8f9f7 135 // 0 <= DivAddVal < 14
<> 144:ef7eb2e8f9f7 136 // DivAddVal < MulVal
<> 144:ef7eb2e8f9f7 137 //
<> 144:ef7eb2e8f9f7 138 // set pclk to /1
<> 144:ef7eb2e8f9f7 139 switch ((int)obj->uart) {
<> 144:ef7eb2e8f9f7 140 case UART_0: LPC_SC->PCLKSEL0 &= ~(0x3 << 6); LPC_SC->PCLKSEL0 |= (0x1 << 6); break;
<> 144:ef7eb2e8f9f7 141 case UART_1: LPC_SC->PCLKSEL0 &= ~(0x3 << 8); LPC_SC->PCLKSEL0 |= (0x1 << 8); break;
<> 144:ef7eb2e8f9f7 142 case UART_2: LPC_SC->PCLKSEL1 &= ~(0x3 << 16); LPC_SC->PCLKSEL1 |= (0x1 << 16); break;
<> 144:ef7eb2e8f9f7 143 case UART_3: LPC_SC->PCLKSEL1 &= ~(0x3 << 18); LPC_SC->PCLKSEL1 |= (0x1 << 18); break;
<> 144:ef7eb2e8f9f7 144 default: break;
<> 144:ef7eb2e8f9f7 145 }
<> 144:ef7eb2e8f9f7 146
<> 144:ef7eb2e8f9f7 147 uint32_t PCLK = SystemCoreClock;
<> 144:ef7eb2e8f9f7 148
<> 144:ef7eb2e8f9f7 149 // First we check to see if the basic divide with no DivAddVal/MulVal
<> 144:ef7eb2e8f9f7 150 // ratio gives us an integer result. If it does, we set DivAddVal = 0,
<> 144:ef7eb2e8f9f7 151 // MulVal = 1. Otherwise, we search the valid ratio value range to find
<> 144:ef7eb2e8f9f7 152 // the closest match. This could be more elegant, using search methods
<> 144:ef7eb2e8f9f7 153 // and/or lookup tables, but the brute force method is not that much
<> 144:ef7eb2e8f9f7 154 // slower, and is more maintainable.
<> 144:ef7eb2e8f9f7 155 uint16_t DL = PCLK / (16 * baudrate);
<> 144:ef7eb2e8f9f7 156
<> 144:ef7eb2e8f9f7 157 uint8_t DivAddVal = 0;
<> 144:ef7eb2e8f9f7 158 uint8_t MulVal = 1;
<> 144:ef7eb2e8f9f7 159 int hit = 0;
<> 144:ef7eb2e8f9f7 160 uint16_t dlv;
<> 144:ef7eb2e8f9f7 161 uint8_t mv, dav;
<> 144:ef7eb2e8f9f7 162 if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder
<> 144:ef7eb2e8f9f7 163 int err_best = baudrate, b;
<> 144:ef7eb2e8f9f7 164 for (mv = 1; mv < 16 && !hit; mv++)
<> 144:ef7eb2e8f9f7 165 {
<> 144:ef7eb2e8f9f7 166 for (dav = 0; dav < mv; dav++)
<> 144:ef7eb2e8f9f7 167 {
<> 144:ef7eb2e8f9f7 168 // baudrate = PCLK / (16 * dlv * (1 + (DivAdd / Mul))
<> 144:ef7eb2e8f9f7 169 // solving for dlv, we get dlv = mul * PCLK / (16 * baudrate * (divadd + mul))
<> 144:ef7eb2e8f9f7 170 // mul has 4 bits, PCLK has 27 so we have 1 bit headroom which can be used for rounding
<> 144:ef7eb2e8f9f7 171 // for many values of mul and PCLK we have 2 or more bits of headroom which can be used to improve precision
<> 144:ef7eb2e8f9f7 172 // note: X / 32 doesn't round correctly. Instead, we use ((X / 16) + 1) / 2 for correct rounding
<> 144:ef7eb2e8f9f7 173
<> 144:ef7eb2e8f9f7 174 if ((mv * PCLK * 2) & 0x80000000) // 1 bit headroom
<> 144:ef7eb2e8f9f7 175 dlv = ((((2 * mv * PCLK) / (baudrate * (dav + mv))) / 16) + 1) / 2;
<> 144:ef7eb2e8f9f7 176 else // 2 bits headroom, use more precision
<> 144:ef7eb2e8f9f7 177 dlv = ((((4 * mv * PCLK) / (baudrate * (dav + mv))) / 32) + 1) / 2;
<> 144:ef7eb2e8f9f7 178
<> 144:ef7eb2e8f9f7 179 // datasheet says if DLL==DLM==0, then 1 is used instead since divide by zero is ungood
<> 144:ef7eb2e8f9f7 180 if (dlv == 0)
<> 144:ef7eb2e8f9f7 181 dlv = 1;
<> 144:ef7eb2e8f9f7 182
<> 144:ef7eb2e8f9f7 183 // datasheet says if dav > 0 then DL must be >= 2
<> 144:ef7eb2e8f9f7 184 if ((dav > 0) && (dlv < 2))
<> 144:ef7eb2e8f9f7 185 dlv = 2;
<> 144:ef7eb2e8f9f7 186
<> 144:ef7eb2e8f9f7 187 // integer rearrangement of the baudrate equation (with rounding)
<> 144:ef7eb2e8f9f7 188 b = ((PCLK * mv / (dlv * (dav + mv) * 8)) + 1) / 2;
<> 144:ef7eb2e8f9f7 189
<> 144:ef7eb2e8f9f7 190 // check to see how we went
<> 144:ef7eb2e8f9f7 191 b = abs(b - baudrate);
<> 144:ef7eb2e8f9f7 192 if (b < err_best)
<> 144:ef7eb2e8f9f7 193 {
<> 144:ef7eb2e8f9f7 194 err_best = b;
<> 144:ef7eb2e8f9f7 195
<> 144:ef7eb2e8f9f7 196 DL = dlv;
<> 144:ef7eb2e8f9f7 197 MulVal = mv;
<> 144:ef7eb2e8f9f7 198 DivAddVal = dav;
<> 144:ef7eb2e8f9f7 199
<> 144:ef7eb2e8f9f7 200 if (b == baudrate)
<> 144:ef7eb2e8f9f7 201 {
<> 144:ef7eb2e8f9f7 202 hit = 1;
<> 144:ef7eb2e8f9f7 203 break;
<> 144:ef7eb2e8f9f7 204 }
<> 144:ef7eb2e8f9f7 205 }
<> 144:ef7eb2e8f9f7 206 }
<> 144:ef7eb2e8f9f7 207 }
<> 144:ef7eb2e8f9f7 208 }
<> 144:ef7eb2e8f9f7 209
<> 144:ef7eb2e8f9f7 210 // set LCR[DLAB] to enable writing to divider registers
<> 144:ef7eb2e8f9f7 211 obj->uart->LCR |= (1 << 7);
<> 144:ef7eb2e8f9f7 212
<> 144:ef7eb2e8f9f7 213 // set divider values
<> 144:ef7eb2e8f9f7 214 obj->uart->DLM = (DL >> 8) & 0xFF;
<> 144:ef7eb2e8f9f7 215 obj->uart->DLL = (DL >> 0) & 0xFF;
<> 144:ef7eb2e8f9f7 216 obj->uart->FDR = (uint32_t) DivAddVal << 0
<> 144:ef7eb2e8f9f7 217 | (uint32_t) MulVal << 4;
<> 144:ef7eb2e8f9f7 218
<> 144:ef7eb2e8f9f7 219 // clear LCR[DLAB]
<> 144:ef7eb2e8f9f7 220 obj->uart->LCR &= ~(1 << 7);
<> 144:ef7eb2e8f9f7 221 }
<> 144:ef7eb2e8f9f7 222
<> 144:ef7eb2e8f9f7 223 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
<> 144:ef7eb2e8f9f7 224 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); // 0: 1 stop bits, 1: 2 stop bits
<> 144:ef7eb2e8f9f7 225 MBED_ASSERT((data_bits > 4) && (data_bits < 9)); // 0: 5 data bits ... 3: 8 data bits
<> 144:ef7eb2e8f9f7 226 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven) ||
<> 144:ef7eb2e8f9f7 227 (parity == ParityForced1) || (parity == ParityForced0));
<> 144:ef7eb2e8f9f7 228
<> 144:ef7eb2e8f9f7 229 stop_bits -= 1;
<> 144:ef7eb2e8f9f7 230 data_bits -= 5;
<> 144:ef7eb2e8f9f7 231
<> 144:ef7eb2e8f9f7 232 int parity_enable = 0, parity_select = 0;
<> 144:ef7eb2e8f9f7 233 switch (parity) {
<> 144:ef7eb2e8f9f7 234 case ParityNone: parity_enable = 0; parity_select = 0; break;
<> 144:ef7eb2e8f9f7 235 case ParityOdd : parity_enable = 1; parity_select = 0; break;
<> 144:ef7eb2e8f9f7 236 case ParityEven: parity_enable = 1; parity_select = 1; break;
<> 144:ef7eb2e8f9f7 237 case ParityForced1: parity_enable = 1; parity_select = 2; break;
<> 144:ef7eb2e8f9f7 238 case ParityForced0: parity_enable = 1; parity_select = 3; break;
<> 144:ef7eb2e8f9f7 239 default:
<> 144:ef7eb2e8f9f7 240 break;
<> 144:ef7eb2e8f9f7 241 }
<> 144:ef7eb2e8f9f7 242
<> 144:ef7eb2e8f9f7 243 obj->uart->LCR = data_bits << 0
<> 144:ef7eb2e8f9f7 244 | stop_bits << 2
<> 144:ef7eb2e8f9f7 245 | parity_enable << 3
<> 144:ef7eb2e8f9f7 246 | parity_select << 4;
<> 144:ef7eb2e8f9f7 247 }
<> 144:ef7eb2e8f9f7 248
<> 144:ef7eb2e8f9f7 249 /******************************************************************************
<> 144:ef7eb2e8f9f7 250 * INTERRUPTS HANDLING
<> 144:ef7eb2e8f9f7 251 ******************************************************************************/
<> 144:ef7eb2e8f9f7 252 static inline void uart_irq(uint32_t iir, uint32_t index) {
<> 144:ef7eb2e8f9f7 253 // [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling
<> 144:ef7eb2e8f9f7 254 SerialIrq irq_type;
<> 144:ef7eb2e8f9f7 255 switch (iir) {
<> 144:ef7eb2e8f9f7 256 case 1: irq_type = TxIrq; break;
<> 144:ef7eb2e8f9f7 257 case 2: irq_type = RxIrq; break;
<> 144:ef7eb2e8f9f7 258 default: return;
<> 144:ef7eb2e8f9f7 259 }
<> 144:ef7eb2e8f9f7 260
<> 144:ef7eb2e8f9f7 261 if (serial_irq_ids[index] != 0)
<> 144:ef7eb2e8f9f7 262 irq_handler(serial_irq_ids[index], irq_type);
<> 144:ef7eb2e8f9f7 263 }
<> 144:ef7eb2e8f9f7 264
<> 144:ef7eb2e8f9f7 265 void uart0_irq() {uart_irq((LPC_UART0->IIR >> 1) & 0x7, 0);}
<> 144:ef7eb2e8f9f7 266 void uart1_irq() {uart_irq((LPC_UART1->IIR >> 1) & 0x7, 1);}
<> 144:ef7eb2e8f9f7 267 void uart2_irq() {uart_irq((LPC_UART2->IIR >> 1) & 0x7, 2);}
<> 144:ef7eb2e8f9f7 268 void uart3_irq() {uart_irq((LPC_UART3->IIR >> 1) & 0x7, 3);}
<> 144:ef7eb2e8f9f7 269
<> 144:ef7eb2e8f9f7 270 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
<> 144:ef7eb2e8f9f7 271 irq_handler = handler;
<> 144:ef7eb2e8f9f7 272 serial_irq_ids[obj->index] = id;
<> 144:ef7eb2e8f9f7 273 }
<> 144:ef7eb2e8f9f7 274
<> 144:ef7eb2e8f9f7 275 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
<> 144:ef7eb2e8f9f7 276 IRQn_Type irq_n = (IRQn_Type)0;
<> 144:ef7eb2e8f9f7 277 uint32_t vector = 0;
<> 144:ef7eb2e8f9f7 278 switch ((int)obj->uart) {
<> 144:ef7eb2e8f9f7 279 case UART_0: irq_n=UART0_IRQn; vector = (uint32_t)&uart0_irq; break;
<> 144:ef7eb2e8f9f7 280 case UART_1: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
<> 144:ef7eb2e8f9f7 281 case UART_2: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break;
<> 144:ef7eb2e8f9f7 282 case UART_3: irq_n=UART3_IRQn; vector = (uint32_t)&uart3_irq; break;
<> 144:ef7eb2e8f9f7 283 }
<> 144:ef7eb2e8f9f7 284
<> 144:ef7eb2e8f9f7 285 if (enable) {
<> 144:ef7eb2e8f9f7 286 obj->uart->IER |= 1 << irq;
<> 144:ef7eb2e8f9f7 287 NVIC_SetVector(irq_n, vector);
<> 144:ef7eb2e8f9f7 288 NVIC_EnableIRQ(irq_n);
<> 144:ef7eb2e8f9f7 289 } else { // disable
<> 144:ef7eb2e8f9f7 290 int all_disabled = 0;
<> 144:ef7eb2e8f9f7 291 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
<> 144:ef7eb2e8f9f7 292 obj->uart->IER &= ~(1 << irq);
<> 144:ef7eb2e8f9f7 293 all_disabled = (obj->uart->IER & (1 << other_irq)) == 0;
<> 144:ef7eb2e8f9f7 294 if (all_disabled)
<> 144:ef7eb2e8f9f7 295 NVIC_DisableIRQ(irq_n);
<> 144:ef7eb2e8f9f7 296 }
<> 144:ef7eb2e8f9f7 297 }
<> 144:ef7eb2e8f9f7 298
<> 144:ef7eb2e8f9f7 299 /******************************************************************************
<> 144:ef7eb2e8f9f7 300 * READ/WRITE
<> 144:ef7eb2e8f9f7 301 ******************************************************************************/
<> 144:ef7eb2e8f9f7 302 int serial_getc(serial_t *obj) {
<> 144:ef7eb2e8f9f7 303 while (!serial_readable(obj));
<> 144:ef7eb2e8f9f7 304 return obj->uart->RBR;
<> 144:ef7eb2e8f9f7 305 }
<> 144:ef7eb2e8f9f7 306
<> 144:ef7eb2e8f9f7 307 void serial_putc(serial_t *obj, int c) {
<> 144:ef7eb2e8f9f7 308 while (!serial_writable(obj));
<> 144:ef7eb2e8f9f7 309 obj->uart->THR = c;
<> 144:ef7eb2e8f9f7 310 }
<> 144:ef7eb2e8f9f7 311
<> 144:ef7eb2e8f9f7 312 int serial_readable(serial_t *obj) {
<> 144:ef7eb2e8f9f7 313 return obj->uart->LSR & 0x01;
<> 144:ef7eb2e8f9f7 314 }
<> 144:ef7eb2e8f9f7 315
<> 144:ef7eb2e8f9f7 316 int serial_writable(serial_t *obj) {
<> 144:ef7eb2e8f9f7 317 return obj->uart->LSR & 0x20;
<> 144:ef7eb2e8f9f7 318 }
<> 144:ef7eb2e8f9f7 319
<> 144:ef7eb2e8f9f7 320 void serial_clear(serial_t *obj) {
<> 144:ef7eb2e8f9f7 321 obj->uart->FCR = 1 << 1 // rx FIFO reset
<> 144:ef7eb2e8f9f7 322 | 1 << 2 // tx FIFO reset
<> 144:ef7eb2e8f9f7 323 | 0 << 6; // interrupt depth
<> 144:ef7eb2e8f9f7 324 }
<> 144:ef7eb2e8f9f7 325
<> 144:ef7eb2e8f9f7 326 void serial_pinout_tx(PinName tx) {
<> 144:ef7eb2e8f9f7 327 pinmap_pinout(tx, PinMap_UART_TX);
<> 144:ef7eb2e8f9f7 328 }
<> 144:ef7eb2e8f9f7 329
<> 144:ef7eb2e8f9f7 330 void serial_break_set(serial_t *obj) {
<> 144:ef7eb2e8f9f7 331 obj->uart->LCR |= (1 << 6);
<> 144:ef7eb2e8f9f7 332 }
<> 144:ef7eb2e8f9f7 333
<> 144:ef7eb2e8f9f7 334 void serial_break_clear(serial_t *obj) {
<> 144:ef7eb2e8f9f7 335 obj->uart->LCR &= ~(1 << 6);
<> 144:ef7eb2e8f9f7 336 }
<> 144:ef7eb2e8f9f7 337