shao ziyang / mbed-dev

mbed library sources. Supersedes mbed-src. Add PORTG support for STM32L476JG (SensorTile kit)

Dependents:   SensorTileTest

Fork of mbed-dev by mbed official

targets/TARGET_NXP/TARGET_LPC13XX/PeripheralNames.h@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/hal/TARGET_NXP/TARGET_LPC11UXX/TARGET_MCU_LPC11U35_501/PeripheralNames.h@144:ef7eb2e8f9f7 
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2006-2013 ARM Limited
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 144:ef7eb2e8f9f7 5 * you may not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 6 * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 144:ef7eb2e8f9f7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 13 * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 14 * limitations under the License.
<> 144:ef7eb2e8f9f7 15 */
<> 144:ef7eb2e8f9f7 16 #ifndef MBED_PERIPHERALNAMES_H
<> 144:ef7eb2e8f9f7 17 #define MBED_PERIPHERALNAMES_H
<> 144:ef7eb2e8f9f7 18
<> 144:ef7eb2e8f9f7 19 #include "cmsis.h"
<> 144:ef7eb2e8f9f7 20
<> 144:ef7eb2e8f9f7 21 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 22 extern "C" {
<> 144:ef7eb2e8f9f7 23 #endif
<> 144:ef7eb2e8f9f7 24
<> 144:ef7eb2e8f9f7 25 typedef enum {
<> 144:ef7eb2e8f9f7 26 UART_0 = (int)LPC_USART_BASE
<> 144:ef7eb2e8f9f7 27 } UARTName;
<> 144:ef7eb2e8f9f7 28
<> 144:ef7eb2e8f9f7 29 typedef enum {
<> 144:ef7eb2e8f9f7 30 I2C_0 = (int)LPC_I2C_BASE
<> 144:ef7eb2e8f9f7 31 } I2CName;
<> 144:ef7eb2e8f9f7 32
<> 144:ef7eb2e8f9f7 33 typedef enum {
<> 144:ef7eb2e8f9f7 34 ADC0_0 = 0,
<> 144:ef7eb2e8f9f7 35 ADC0_1,
<> 144:ef7eb2e8f9f7 36 ADC0_2,
<> 144:ef7eb2e8f9f7 37 ADC0_3,
<> 144:ef7eb2e8f9f7 38 ADC0_4,
<> 144:ef7eb2e8f9f7 39 ADC0_5,
<> 144:ef7eb2e8f9f7 40 ADC0_6,
<> 144:ef7eb2e8f9f7 41 ADC0_7
<> 144:ef7eb2e8f9f7 42 } ADCName;
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 typedef enum {
<> 144:ef7eb2e8f9f7 45 SPI_0 = (int)LPC_SSP0_BASE,
<> 144:ef7eb2e8f9f7 46 SPI_1 = (int)LPC_SSP1_BASE
<> 144:ef7eb2e8f9f7 47 } SPIName;
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 typedef enum {
<> 144:ef7eb2e8f9f7 50 PWM_1 = 0,
<> 144:ef7eb2e8f9f7 51 PWM_2,
<> 144:ef7eb2e8f9f7 52 PWM_3,
<> 144:ef7eb2e8f9f7 53 PWM_4,
<> 144:ef7eb2e8f9f7 54 PWM_5,
<> 144:ef7eb2e8f9f7 55 PWM_6,
<> 144:ef7eb2e8f9f7 56 PWM_7,
<> 144:ef7eb2e8f9f7 57 PWM_8,
<> 144:ef7eb2e8f9f7 58 PWM_9,
<> 144:ef7eb2e8f9f7 59 PWM_10,
<> 144:ef7eb2e8f9f7 60 PWM_11
<> 144:ef7eb2e8f9f7 61 } PWMName;
<> 144:ef7eb2e8f9f7 62
<> 144:ef7eb2e8f9f7 63 #define STDIO_UART_TX UART_TX
<> 144:ef7eb2e8f9f7 64 #define STDIO_UART_RX UART_RX
<> 144:ef7eb2e8f9f7 65 #define STDIO_UART UART_0
<> 144:ef7eb2e8f9f7 66
<> 144:ef7eb2e8f9f7 67 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 68 }
<> 144:ef7eb2e8f9f7 69 #endif
<> 144:ef7eb2e8f9f7 70
<> 144:ef7eb2e8f9f7 71 #endif