shao ziyang / mbed-dev

mbed library sources. Supersedes mbed-src. Add PORTG support for STM32L476JG (SensorTile kit)

Dependents:   SensorTileTest

Fork of mbed-dev by mbed official

targets/TARGET_Freescale/TARGET_K20XX/pwmout_api.c@154:1375a99fb16d, 2017-01-02 (annotated)

Committer:
shaoziyang
Date:
Mon Jan 02 15:52:04 2017 +0000
Revision:
154:1375a99fb16d
Parent:
151:5eaa88a5bcc7 
Mbed for ST SensorTile kit, fixed GPIOG bug, add PORTG support.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2006-2015 ARM Limited
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 144:ef7eb2e8f9f7 5 * you may not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 6 * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 144:ef7eb2e8f9f7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 13 * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 14 * limitations under the License.
<> 144:ef7eb2e8f9f7 15 */
<> 144:ef7eb2e8f9f7 16 #include "mbed_assert.h"
<> 144:ef7eb2e8f9f7 17 #include "pwmout_api.h"
<> 144:ef7eb2e8f9f7 18
<> 144:ef7eb2e8f9f7 19 #include "cmsis.h"
<> 144:ef7eb2e8f9f7 20 #include "pinmap.h"
<> 144:ef7eb2e8f9f7 21 #include "PeripheralPins.h"
<> 144:ef7eb2e8f9f7 22
<> 144:ef7eb2e8f9f7 23 static float pwm_clock = 0;
<> 144:ef7eb2e8f9f7 24
<> 144:ef7eb2e8f9f7 25 void pwmout_init(pwmout_t* obj, PinName pin) {
<> 144:ef7eb2e8f9f7 26 // determine the channel
<> 144:ef7eb2e8f9f7 27 PWMName pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
<> 144:ef7eb2e8f9f7 28 MBED_ASSERT(pwm != (PWMName)NC);
<> 144:ef7eb2e8f9f7 29
<> 151:5eaa88a5bcc7 30 uint32_t MGCOUTClock = SystemCoreClock * (1u + ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV1_MASK) >> SIM_CLKDIV1_OUTDIV1_SHIFT));
<> 151:5eaa88a5bcc7 31 uint32_t BusClock = MGCOUTClock / (1u + ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV2_MASK) >> SIM_CLKDIV1_OUTDIV2_SHIFT));
<> 151:5eaa88a5bcc7 32
<> 144:ef7eb2e8f9f7 33 uint32_t clkdiv = 0;
<> 151:5eaa88a5bcc7 34 float clkval = BusClock / 1000000.0f;
<> 144:ef7eb2e8f9f7 35
<> 144:ef7eb2e8f9f7 36 while (clkval > 1) {
<> 144:ef7eb2e8f9f7 37 clkdiv++;
<> 144:ef7eb2e8f9f7 38 clkval /= 2.0;
<> 144:ef7eb2e8f9f7 39 if (clkdiv == 7)
<> 144:ef7eb2e8f9f7 40 break;
<> 144:ef7eb2e8f9f7 41 }
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 pwm_clock = clkval;
<> 144:ef7eb2e8f9f7 44 unsigned int ftm_n = (pwm >> TPM_SHIFT);
<> 144:ef7eb2e8f9f7 45 unsigned int ch_n = (pwm & 0xFF);
<> 144:ef7eb2e8f9f7 46
<> 144:ef7eb2e8f9f7 47 SIM->SCGC6 |= 1 << (SIM_SCGC6_FTM0_SHIFT + ftm_n);
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 FTM_Type *ftm = (FTM_Type *)(FTM0_BASE + 0x1000 * ftm_n);
<> 144:ef7eb2e8f9f7 50 ftm->CONF |= FTM_CONF_BDMMODE(3);
<> 144:ef7eb2e8f9f7 51 ftm->SC = FTM_SC_CLKS(1) | FTM_SC_PS(clkdiv); // (clock)MHz / clkdiv ~= (0.75)MHz
<> 144:ef7eb2e8f9f7 52 ftm->CONTROLS[ch_n].CnSC = (FTM_CnSC_MSB_MASK | FTM_CnSC_ELSB_MASK); /* No Interrupts; High True pulses on Edge Aligned PWM */
<> 144:ef7eb2e8f9f7 53 ftm->MODE = FTM_MODE_FTMEN_MASK;
<> 144:ef7eb2e8f9f7 54 ftm->SYNC = FTM_SYNC_CNTMIN_MASK;
<> 144:ef7eb2e8f9f7 55 ftm->SYNCONF = FTM_SYNCONF_SYNCMODE_MASK | FTM_SYNCONF_SWSOC_MASK | FTM_SYNCONF_SWWRBUF_MASK;
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 //Without SYNCEN set CnV does not seem to update
<> 144:ef7eb2e8f9f7 58 ftm->COMBINE = FTM_COMBINE_SYNCEN0_MASK | FTM_COMBINE_SYNCEN1_MASK | FTM_COMBINE_SYNCEN2_MASK | FTM_COMBINE_SYNCEN3_MASK;
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 obj->CnV = &ftm->CONTROLS[ch_n].CnV;
<> 144:ef7eb2e8f9f7 61 obj->MOD = &ftm->MOD;
<> 144:ef7eb2e8f9f7 62 obj->SYNC = &ftm->SYNC;
<> 144:ef7eb2e8f9f7 63
<> 144:ef7eb2e8f9f7 64 // default to 20ms: standard for servos, and fine for e.g. brightness control
<> 144:ef7eb2e8f9f7 65 pwmout_period_ms(obj, 20);
<> 144:ef7eb2e8f9f7 66 pwmout_write(obj, 0.0);
<> 144:ef7eb2e8f9f7 67
<> 144:ef7eb2e8f9f7 68 // Wire pinout
<> 144:ef7eb2e8f9f7 69 pinmap_pinout(pin, PinMap_PWM);
<> 144:ef7eb2e8f9f7 70 }
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 void pwmout_free(pwmout_t* obj) {}
<> 144:ef7eb2e8f9f7 73
<> 144:ef7eb2e8f9f7 74 void pwmout_write(pwmout_t* obj, float value) {
<> 144:ef7eb2e8f9f7 75 if (value < 0.0) {
<> 144:ef7eb2e8f9f7 76 value = 0.0;
<> 144:ef7eb2e8f9f7 77 } else if (value > 1.0) {
<> 144:ef7eb2e8f9f7 78 value = 1.0;
<> 144:ef7eb2e8f9f7 79 }
<> 144:ef7eb2e8f9f7 80
<> 144:ef7eb2e8f9f7 81 while(*obj->SYNC & FTM_SYNC_SWSYNC_MASK);
<> 144:ef7eb2e8f9f7 82 *obj->CnV = (uint32_t)((float)(*obj->MOD + 1) * value);
<> 144:ef7eb2e8f9f7 83 *obj->SYNC |= FTM_SYNC_SWSYNC_MASK;
<> 144:ef7eb2e8f9f7 84 }
<> 144:ef7eb2e8f9f7 85
<> 144:ef7eb2e8f9f7 86 float pwmout_read(pwmout_t* obj) {
<> 144:ef7eb2e8f9f7 87 while(*obj->SYNC & FTM_SYNC_SWSYNC_MASK);
<> 144:ef7eb2e8f9f7 88 float v = (float)(*obj->CnV) / (float)(*obj->MOD + 1);
<> 144:ef7eb2e8f9f7 89 return (v > 1.0) ? (1.0) : (v);
<> 144:ef7eb2e8f9f7 90 }
<> 144:ef7eb2e8f9f7 91
<> 144:ef7eb2e8f9f7 92 void pwmout_period(pwmout_t* obj, float seconds) {
<> 144:ef7eb2e8f9f7 93 pwmout_period_us(obj, seconds * 1000000.0f);
<> 144:ef7eb2e8f9f7 94 }
<> 144:ef7eb2e8f9f7 95
<> 144:ef7eb2e8f9f7 96 void pwmout_period_ms(pwmout_t* obj, int ms) {
<> 144:ef7eb2e8f9f7 97 pwmout_period_us(obj, ms * 1000);
<> 144:ef7eb2e8f9f7 98 }
<> 144:ef7eb2e8f9f7 99
<> 144:ef7eb2e8f9f7 100 // Set the PWM period, keeping the duty cycle the same.
<> 144:ef7eb2e8f9f7 101 void pwmout_period_us(pwmout_t* obj, int us) {
<> 144:ef7eb2e8f9f7 102 float dc = pwmout_read(obj);
<> 144:ef7eb2e8f9f7 103 *obj->MOD = (uint32_t)(pwm_clock * (float)us) - 1;
<> 144:ef7eb2e8f9f7 104 *obj->SYNC |= FTM_SYNC_SWSYNC_MASK;
<> 144:ef7eb2e8f9f7 105 pwmout_write(obj, dc);
<> 144:ef7eb2e8f9f7 106 }
<> 144:ef7eb2e8f9f7 107
<> 144:ef7eb2e8f9f7 108 void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
<> 144:ef7eb2e8f9f7 109 pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
<> 144:ef7eb2e8f9f7 110 }
<> 144:ef7eb2e8f9f7 111
<> 144:ef7eb2e8f9f7 112 void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
<> 144:ef7eb2e8f9f7 113 pwmout_pulsewidth_us(obj, ms * 1000);
<> 144:ef7eb2e8f9f7 114 }
<> 144:ef7eb2e8f9f7 115
<> 144:ef7eb2e8f9f7 116 void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
<> 144:ef7eb2e8f9f7 117 *obj->CnV = (uint32_t)(pwm_clock * (float)us);
<> 144:ef7eb2e8f9f7 118 *obj->SYNC |= FTM_SYNC_SWSYNC_MASK;
<> 144:ef7eb2e8f9f7 119 }